Radio frequency integrated capacitor structure based on rdl process and preparation method

Abstract

The present application relates to the field of radio frequency integrated circuit and advanced semiconductor packaging technology, especially to a radio frequency integrated capacitor structure based on RDL process and a preparation method thereof, comprising a substrate, a composite dielectric layer, a temperature sensor, a signal processing module and a compensation module. The composite dielectric layer is composed of alternating stacks of silicon nitride and aluminum oxide, the electrode profile is generated with an arc curvature radius and a side wall inclination angle parameter through three-dimensional electromagnetic field simulation, a machine learning model optimizes mask design and etching process parameters based on measured leakage current data, and edge leakage current density is reduced. Each module realizes high-density interconnection through RDL process, is compatible with existing packaging process, and systematically solves the problems of phase synchronization error and high-frequency signal distortion caused by uncontrollable temperature coefficient of capacitance in radio frequency circuit.

Description

Technical Field

[0001] This invention relates to the fields of advanced semiconductor packaging and radio frequency integrated circuit technology, and particularly to radio frequency integrated capacitor structures and fabrication methods based on RDL technology. Background Technology

[0002] RDL (Radio Frequency Interconnection) technology is a wiring technique used in advanced semiconductor packaging. It achieves high-density interconnects between internal chip electrodes and external package pins by depositing and patterning metal layers on the chip surface or package substrate. Its core lies in using photolithography and electroplating processes to form micron-level metal traces, combined with dielectric layer isolation, providing flexible signal redistribution capabilities for complex package structures. In RF integrated capacitor structures, this process forms embedded capacitor cells through multi-layer metal dielectric stacking. The electrode spacing and overlap area are controlled by photolithographic precision, thereby utilizing the parasitic capacitance effect between metal layers to achieve high-frequency coupling or energy storage functions.

[0003] Existing technologies suffer from the problem of uncontrollable temperature coefficients of MIM capacitors in radio frequency integrated circuits, leading to decreased stability in high-frequency systems. This technical challenge stems from the fact that the intrinsic dielectric constant temperature coefficient of a single homogeneous dielectric material exhibits a fixed polarity. Under wide temperature range operating conditions, the intrinsic properties of the material cannot counteract the capacitance shift caused by temperature. For example, in the beamforming circuit of a 5G millimeter-wave phased array antenna, the phase-shifting capacitors in the transmit and receive channels experience nonlinear capacitance drift due to drastic fluctuations in the base station's ambient temperature. This causes phase synchronization errors between array elements to exceed tolerances, ultimately resulting in deterioration of beam pointing accuracy and signal transmission interruption. Summary of the Invention

[0004] To address the shortcomings of existing technologies, this invention provides a radio frequency integrated capacitor structure and fabrication method based on RDL technology, solving the problem of uncontrollable temperature coefficient of MIM capacitors in radio frequency integrated circuits leading to decreased stability of high-frequency systems.

[0005] To solve the above-mentioned technical problems, the specific technical solution of the present invention is as follows:

[0006] In a first aspect, the radio frequency integrated capacitor structure based on RDL technology provided by the present invention includes a substrate, a composite dielectric layer, a temperature sensor, a signal processing module, an electric field optimization module, a compensation module, and a capacitor unit:

[0007] A composite dielectric layer is disposed on the surface of the substrate and is composed of alternating stacked silicon nitride layers and aluminum oxide layers. The silicon nitride layer has an amorphous structure, and the aluminum oxide layer has a lattice orientation control interface.

[0008] A temperature sensor, integrated on the substrate, is used to detect the operating temperature of the capacitor unit;

[0009] The signal processing module is electrically connected to the platinum thin-film temperature sensor via RDL metal interconnect, receives the temperature signal and outputs a compensation voltage signal;

[0010] The electric field optimization module is configured to generate electrode geometric parameters through three-dimensional electromagnetic field simulation, the electrode geometric parameters including the arc curvature radius and the sidewall inclination angle;

[0011] The compensation module receives the compensation voltage signal and applies it to the capacitor plates. The compensation voltage signal is dynamically adjusted according to the temperature signal and the preset capacitance drift mapping relationship to offset the capacitance offset caused by temperature.

[0012] The capacitor unit is composed of the composite dielectric layer and a multilayer metal dielectric stack in the RDL metal interconnect;

[0013] The electrode geometry parameters generated by the electric field optimization module control the radius of curvature of the electrode arc through grayscale exposure of the photolithography mask, and adjust the electrode sidewall tilt angle through reactive ion etching.

[0014] The signal processing module receives real-time temperature data from the platinum thin-film temperature sensor, calculates a compensation voltage signal through the capacitance drift mapping relationship, and transmits the signal to the compensation module.

[0015] The compensation module adjusts the voltage applied to the capacitor plates according to the compensation voltage signal, and feeds back the adjusted capacitance value to the signal processing module to form a closed-loop control.

[0016] Secondly, the method for fabricating an RDL-based RF integrated capacitor structure provided by the present invention, applied to the aforementioned RDL-based RF integrated capacitor structure, includes:

[0017] Oxygen plasma cleaning is performed on the surface of a silicon-based or glass substrate, and a composite adhesion layer is deposited after cleaning to enhance the interfacial bonding between the substrate and the subsequent composite dielectric layer.

[0018] Alumina and silicon nitride layers are sequentially generated by atomic layer deposition to form a composite dielectric layer. In-situ infrared spectroscopy analysis is used to monitor the precursor adsorption reaction during the deposition of the alumina layer, and the number of deposition cycles is dynamically adjusted to control the film density.

[0019] During the deposition of silicon nitride layers, the ratio of silane to ammonia is detected in real time by plasma emission spectroscopy to optimize the stoichiometry of silicon nitride in order to form an amorphous structure.

[0020] Furthermore, the method for fabricating an RF integrated capacitor structure based on RDL technology according to the present invention includes:

[0021] After completing the deposition of the composite dielectric layer, a platinum thin film is deposited on the surface of the substrate and patterned to generate the platinum thin film temperature sensor;

[0022] The platinum thin film temperature sensor was placed in a constant temperature bath for multi-point calibration, with the calibration temperature covering the range of -40℃ to 125℃. The resistance-temperature characteristic curves were recorded and stored in the microcontroller unit.

[0023] A piecewise linear interpolation algorithm is used to process the calibration data, enabling the microcontroller unit to dynamically correct the temperature measurement value based on the calibration data, thereby reducing temperature measurement error.

[0024] Furthermore, the method for fabricating an RF integrated capacitor structure based on RDL technology according to the present invention includes:

[0025] Based on the electrode geometry parameters generated by the electric field optimization module, a grayscale photomask is fabricated using a preset electron beam direct writing process, and a gradient exposure pattern is formed on the photoresist covering the composite dielectric layer by dose modulation.

[0026] Based on the gradient exposure pattern, reactive ion etching is performed using fluorine-based gas to simultaneously remove photoresist residue and passivate the electrode sidewalls, generating an electrode profile with an arc-shaped radius of curvature and a sidewall tilt angle.

[0027] Furthermore, the method for fabricating an RF integrated capacitor structure based on RDL technology according to the present invention includes:

[0028] Electrical tests were performed on the electrode profile with an arc-shaped radius of curvature and a sidewall inclination angle to obtain measured leakage current data. The measured leakage current data was then compared with the results of a three-dimensional electromagnetic field simulation.

[0029] Based on the generated electrode geometry parameters and leakage current data, a correlation database of arc curvature radius, sidewall tilt angle and leakage current is established;

[0030] A machine learning algorithm is used to train an optimization model. The optimization model takes electrode geometry parameters as input and outputs mask design parameters, which are used to update the grayscale lithography mask fabrication process.

[0031] Furthermore, the method for fabricating a radio frequency integrated capacitor structure based on RDL technology according to the present invention includes: acquiring operating temperature data at a preset period using the platinum thin film temperature sensor, and inputting the data into the signal processing module after digital filtering to eliminate environmental noise;

[0032] The signal processing module calculates the compensation voltage adjustment amount using a preset algorithm and transmits it to the compensation module.

[0033] The compensation module applies a compensation voltage to the capacitor plates, resamples the capacitance value, and feeds it back to the signal processing module to form a closed-loop control.

[0034] Furthermore, the method for fabricating an RF integrated capacitor structure based on RDL technology according to the present invention includes: processing temperature and capacitor drift data through a polynomial fitting algorithm in the signal processing module to generate a capacitor drift mapping relationship; and applying the compensation voltage signal to the capacitor plate after being converted into an analog voltage by a digital-to-analog converter.

[0035] The microcontroller unit dynamically controls the output strength of the compensation voltage by adjusting the duty cycle of the pulse width modulation signal based on the capacitance drift mapping relationship and real-time temperature data.

[0036] Beneficial effects of this invention;

[0037] This invention significantly improves the temperature stability and high-frequency performance of RF integrated capacitors through the stress buffering effect of the heterogeneous interface of the composite dielectric layer, the temperature closed-loop compensation mechanism, and data-driven process parameter optimization. The amorphous structure of silicon nitride and the lattice orientation regulation interface of alumina in the composite dielectric layer work synergistically to reduce the temperature sensitivity of the dielectric constant. A platinum thin-film temperature sensor and a closed-loop control circuit dynamically adjust the compensation voltage to suppress capacitance drift over a wide temperature range. A machine learning model iteratively optimizes mask design parameters based on measured leakage current data, and combined with reactive ion etching (RIE) technology, precisely controls electrode geometry to reduce edge leakage current density. All technical modules achieve high-density integration through RDL metal interconnects, ensuring compatibility with existing packaging processes and systematically solving the phase synchronization error and signal distortion problems caused by the uncontrollable temperature coefficient of capacitors in RF circuits. Attached Figure Description

[0038] To more clearly illustrate the technical solution of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on the drawings without creative effort.

[0039] Figure 1 A flowchart illustrating the method for fabricating an RF integrated capacitor structure based on RDL technology, as provided in an embodiment of the present invention. Detailed Implementation

[0040] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this invention, and not all of them. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention. The technical solutions provided by various embodiments of this invention will be described in detail below with reference to the accompanying drawings. To better understand the objectives of this invention, it will be described in further detail below.

[0041] In a first aspect, the radio frequency integrated capacitor structure based on RDL technology provided by the present invention includes a substrate, a composite dielectric layer, a temperature sensor, a signal processing module, an electric field optimization module, a compensation module, and a capacitor unit:

[0042] A composite dielectric layer is disposed on the surface of the substrate and is composed of alternating stacked silicon nitride layers and aluminum oxide layers. The silicon nitride layer has an amorphous structure, and the aluminum oxide layer has a lattice orientation control interface.

[0043] A temperature sensor, integrated on the substrate, is used to detect the operating temperature of the capacitor unit;

[0044] The signal processing module is electrically connected to the platinum thin-film temperature sensor via RDL metal interconnect, receives the temperature signal and outputs a compensation voltage signal;

[0045] The electric field optimization module is configured to generate electrode geometric parameters through three-dimensional electromagnetic field simulation, the electrode geometric parameters including the arc curvature radius and the sidewall inclination angle;

[0046] The compensation module receives the compensation voltage signal and applies it to the capacitor plates. The compensation voltage signal is dynamically adjusted according to the temperature signal and the preset capacitance drift mapping relationship to offset the capacitance offset caused by temperature.

[0047] The capacitor unit is composed of the composite dielectric layer and a multilayer metal dielectric stack in the RDL metal interconnect;

[0048] The electrode geometry parameters generated by the electric field optimization module control the radius of curvature of the electrode arc through grayscale exposure of the photolithography mask, and adjust the electrode sidewall tilt angle through reactive ion etching.

[0049] The signal processing module receives real-time temperature data from the platinum thin-film temperature sensor, calculates a compensation voltage signal through the capacitance drift mapping relationship, and transmits the signal to the compensation module.

[0050] The compensation module adjusts the voltage applied to the capacitor plates according to the compensation voltage signal, and feeds back the adjusted capacitance value to the signal processing module to form a closed-loop control.

[0051] A composite dielectric layer is deposited on the substrate surface, forming a stacked structure by alternately depositing silicon nitride and aluminum oxide layers. The silicon nitride layer is generated as an amorphous structure using plasma-enhanced chemical vapor deposition (PECVD), while the aluminum oxide layer's lattice orientation interface is controlled using atomic layer deposition (ALD) to optimize the temperature stability of the dielectric constant. A temperature sensor is integrated on the substrate surface, formed by sputtering and patterning a platinum thin film to create a platinum resistance structure. This sensor is electrically connected to the signal processing module via RDL metal interconnects. The signal processing module receives real-time temperature data from the platinum thin film temperature sensor, converts it to digital, and inputs it to the microcontroller unit. The microcontroller unit then generates a compensation voltage signal using a preset capacitance drift mapping relationship.

[0052] The electric field optimization module establishes an electrode model based on 3D electromagnetic field simulation software, generating electrode geometric parameters including the radius of curvature and sidewall tilt angle. These parameters are used to fabricate a grayscale photomask using electron beam direct writing, forming a gradient exposure pattern on the photoresist covering the composite dielectric layer. Reactive ion etching uses a fluorine-based gas to anisotropically etch the exposed pattern, simultaneously removing photoresist residue and passivating the electrode sidewalls, ultimately generating an electrode profile with a radius of curvature and optimized sidewall tilt angle.

[0053] The compensation module receives the compensation voltage signal output from the signal processing module, converts it into an analog voltage via a digital-to-analog converter, and applies it to the capacitor plates. The feedback circuit acquires the adjusted capacitance value at preset intervals, digitally filters it to eliminate environmental noise, and then sends the result back to the signal processing module, forming a closed-loop control circuit. The microcontroller unit dynamically adjusts the duty cycle of the pulse width modulation signal based on real-time temperature data and a capacitance drift mapping table, controlling the output strength of the compensation voltage to offset the capacitance shift caused by temperature.

[0054] The leakage current characteristics of the electrode profile were obtained through electrical testing. The measured data were compared with the results of three-dimensional electromagnetic field simulation to establish a correlation database between the radius of curvature of the arc, the sidewall tilt angle, and the leakage current. A machine learning algorithm was used to train and optimize the model based on this database, generating mask design parameters using the electrode geometric parameters as input, and iteratively updating the grayscale photolithography mask fabrication process. Before packaging, the platinum thin-film temperature sensor underwent multi-point calibration in a thermostatic bath. A piecewise linear interpolation algorithm was used to process the calibration data, reducing temperature measurement errors, and the data was then burned into the embedded memory of the microcontroller unit.

[0055] A multilayer metal dielectric stack consisting of a composite dielectric layer and an RDL metal interconnect constitutes a capacitor unit. The electrode spacing is controlled by photolithography precision, and the temperature coefficient of parasitic capacitance is adjusted by alternating stacked silicon nitride and alumina heterojunction interfaces. The amorphous structure of the silicon nitride layer is optimized for stoichiometry by real-time monitoring of the silane and ammonia ratio using plasma emission spectroscopy. The lattice orientation of the alumina layer is dynamically adjusted for the number of deposition cycles by analyzing the precursor adsorption kinetics using in-situ infrared spectroscopy.

[0056] Each module is electrically connected through RDL metal interconnects. The closed-loop control logic of the signal processing module, the parameter iteration mechanism of the electric field optimization module, and the dynamic adjustment function of the compensation module work together to systematically solve the problem of capacitor temperature coefficient drift in RF integrated circuits, while being compatible with existing RDL packaging processes.

[0057] Secondly, please refer to Figure 1 The method for fabricating an RDL-based RF integrated capacitor structure provided by this invention is applied to the aforementioned RDL-based RF integrated capacitor structure, and includes:

[0058] Step 1: Perform oxygen plasma cleaning on the surface of a silicon-based or glass substrate, and deposit a composite adhesion layer after cleaning to enhance the interfacial bonding between the substrate and the subsequent composite dielectric layer.

[0059] Step 2: An aluminum oxide layer and a silicon nitride layer are sequentially generated by atomic layer deposition to form a composite dielectric layer. During the deposition of the aluminum oxide layer, in-situ infrared spectroscopy analysis is used to monitor the precursor adsorption reaction and the number of deposition cycles is dynamically adjusted to control the film density.

[0060] Step 3: During the deposition of the silicon nitride layer, the ratio of silane to ammonia is detected in real time by plasma emission spectroscopy to optimize the stoichiometry of silicon nitride in order to form an amorphous structure.

[0061] During oxygen plasma cleaning of silicon-based or glass substrates, oxygen plasma with a radio frequency power of 100-500W is used for 5-15 minutes to remove surface organic contaminants and activate hydroxyl groups on the substrate surface. Subsequently, a titanium / copper composite adhesion layer is deposited using magnetron sputtering. The titanium layer thickness is controlled within the range of 5-15 nanometers to improve interfacial adhesion, while the copper layer thickness is 20-50 nanometers to enhance conductivity. This adhesion layer provides a stable interfacial foundation for the subsequent uniform deposition of the composite dielectric layer.

[0062] A composite dielectric layer is formed by sequentially depositing an alumina layer and a silicon nitride layer using atomic layer deposition (ALD). Trimethylaluminum and water vapor are used as precursors for alumina deposition. The adsorption-desorption dynamics of the precursors on the substrate surface are monitored using in-situ infrared spectroscopy. The number of deposition cycles is adjusted in real time based on the adsorption saturation to control the alumina film density within the range of 2.8-3.2 g / cm³. The silicon nitride layer is deposited using plasma-enhanced chemical vapor deposition (PECVD) with silane and ammonia as reactant gases. The formation of the amorphous structure is controlled by adjusting the reaction chamber pressure and substrate temperature. The lattice orientation interface of the alumina layer and the amorphous structure of the silicon nitride layer form a heterogeneous dielectric layer, synergistically regulating the temperature sensitivity of the dielectric constant.

[0063] During the silicon nitride layer deposition process, the intensity ratio of molecular emission lines of silane and ammonia in the reaction chamber was monitored in real time using plasma emission spectroscopy, and the gas flow rate ratio was dynamically adjusted to the range of 1:3-1:5. When silane was in excess, the ammonia flow rate was increased to suppress the formation of silicon-rich phases; when ammonia was in excess, the silane supply was increased to avoid porosity defects in the silicon nitride layer. The optimized stoichiometry stabilized the silicon-nitrogen atomic ratio of the silicon nitride layer at 3:4, forming a continuous and dense amorphous dielectric layer with a breakdown field strength on the order of 8-10 MV / cm. The alternating stacking of alumina and silicon nitride layers buffered the interfacial stress, causing the overall temperature coefficient of the composite dielectric layer to approach zero.

[0064] Each process step achieves functional synergy through complementary material properties: oxygen plasma cleaning and titanium / copper adhesion layers enhance interface reliability; atomic layer deposition precisely controls the alumina lattice structure; and plasma-enhanced chemical vapor deposition optimizes the amorphous properties of silicon nitride. The gradient design of the composite dielectric layer offsets the intrinsic temperature coefficient of a single material through the heterogeneous interface. Combined with the multilayer stacked structure of RDL metal interconnects, this ultimately forms a radio frequency integrated capacitor unit with wide temperature range stability.

[0065] Specifically, the method for fabricating an RF integrated capacitor structure based on RDL technology according to the present invention includes:

[0066] After completing the deposition of the composite dielectric layer, a platinum thin film is deposited on the surface of the substrate and patterned to generate the platinum thin film temperature sensor;

[0067] The platinum thin film temperature sensor was placed in a constant temperature bath for multi-point calibration, with the calibration temperature covering the range of -40℃ to 125℃. The resistance-temperature characteristic curves were recorded and stored in the microcontroller unit.

[0068] A piecewise linear interpolation algorithm is used to process the calibration data, enabling the microcontroller unit to dynamically correct the temperature measurement value based on the calibration data, thereby reducing temperature measurement error.

[0069] After the composite dielectric layer is deposited, a platinum thin film with a thickness of 50-200 nanometers is deposited on the substrate surface using magnetron sputtering. The platinum thin film is then patterned using photolithography and ion beam etching to form a platinum resistance temperature sensor with a serpentine structure. This sensor is connected to the metal traces of the signal processing module via RDL metal interconnects, achieving low-impedance transmission of the temperature signal.

[0070] A platinum thin-film temperature sensor was placed in a high-precision thermostatic bath and calibrated at multiple points within the range of -40℃ to 125℃ at 10℃ intervals. Each temperature point was held at that temperature for 5 minutes, and the resistance change of the platinum resistance was measured using the four-wire method to generate resistance-temperature characteristic curve data. The calibration data was then converted from analog to digital and stored in the flash memory of the microcontroller unit, establishing a mapping table between temperature and digital signals.

[0071] The microcontroller unit uses a piecewise linear interpolation algorithm to process the calibration data, dividing the resistance-temperature curve over a wide temperature range into multiple linear intervals. Within each interval, the slope and intercept parameters are calculated using two calibration points, dynamically correcting the real-time temperature measurement. This algorithm reduces nonlinear errors, keeping the temperature detection accuracy within ±0.5℃, providing high-precision temperature input for subsequent capacitance drift compensation.

[0072] The calibrated platinum thin-film temperature sensor is integrated with the composite dielectric layer and RDL metal interconnect on the same substrate. The microcontroller unit periodically reads temperature data via the I²C bus and generates a compensation voltage control signal by combining it with a pre-stored capacitance drift mapping table. The resistance change of the temperature sensor is converted into a voltage signal through a Wheatstone bridge, amplified by an instrumentation amplifier, and then input to the signal processing module, forming a closed-loop control link from temperature acquisition to capacitance compensation.

[0073] System stability is enhanced through functional synergy among process steps: platinum thin-film patterning ensures compatibility between the sensor and RDL interconnect; multi-point calibration eliminates intrinsic nonlinear errors in the material; and piecewise interpolation algorithms reduce the computational load on the microcontroller. Embedded integration of the temperature sensor avoids parasitic inductance introduced by external leads, meeting the signal integrity requirements of the RF circuit.

[0074] Specifically, the method for fabricating an RF integrated capacitor structure based on RDL technology according to the present invention includes:

[0075] Based on the electrode geometry parameters generated by the electric field optimization module, a grayscale photomask is fabricated using a preset electron beam direct writing process, and a gradient exposure pattern is formed on the photoresist covering the composite dielectric layer by dose modulation.

[0076] Based on the gradient exposure pattern, reactive ion etching is performed using fluorine-based gas to simultaneously remove photoresist residue and passivate the electrode sidewalls, generating an electrode profile with an arc-shaped radius of curvature and a sidewall tilt angle.

[0077] The electrode geometry parameters output by the electric field optimization module include the radius of curvature and sidewall tilt angle values. These parameters are converted into a grayscale photomask using an electron beam direct writing process. The electron beam scans the mask substrate with an accelerating voltage of 50-100kV. Dosage modulation is achieved by adjusting the beam current density in different regions, forming an exposure pattern with continuous grayscale transitions on the photoresist covering the composite dielectric layer. After exposure, the photoresist is treated with tetramethylammonium hydroxide developer for 30-60 seconds, forming a gradient sidewall profile corresponding to the radius of curvature.

[0078] Reactive ion etching was performed using a mixture of carbon tetrafluoride and oxygen, with a gas flow ratio set to 4:1 to 6:1, and the RF power maintained in the range of 200-400W. During the etching process, fluorine-based plasma simultaneously and anisotropically etched the photoresist and composite dielectric layer in the exposure area, with the ratio of vertical etching rate to lateral etching rate controlled above 3:1, forming an arc-shaped radius of curvature corresponding to the grayscale mask. Oxygen free radicals reacted with the sidewall carbon polymer during the etching process to generate volatile products, simultaneously removing photoresist residues and forming a silicon nitride passivation layer, stabilizing the electrode sidewall tilt angle within the range of 75-85 degrees.

[0079] The electrode profile formation process achieves parameter control through process coordination: the dose modulation of the grayscale mask determines the three-dimensional morphology after photoresist development, and the parameter matching of reactive ion etching precisely transfers the morphology to the composite dielectric layer. The radius of curvature of the arc is adjusted by varying the exposure dose to regulate the edge electric field distribution, and the sidewall tilt angle is optimized to suppress leakage current through the passivation layer. After etching, the electrode profile and the multilayer stacked structure of the RDL metal interconnect together constitute the capacitor unit. Its geometric parameters are optimized through a closed-loop process using three-dimensional electromagnetic field simulation and measured leakage current data, ultimately improving the temperature stability of the RF capacitor.

[0080] Specifically, the method for fabricating an RF integrated capacitor structure based on RDL technology according to the present invention includes:

[0081] Electrical tests were performed on the electrode profile with an arc-shaped radius of curvature and a sidewall inclination angle to obtain measured leakage current data. The measured leakage current data was then compared with the results of a three-dimensional electromagnetic field simulation.

[0082] Based on the generated electrode geometry parameters and leakage current data, a correlation database of arc curvature radius, sidewall tilt angle and leakage current is established;

[0083] A machine learning algorithm is used to train an optimization model. The optimization model takes electrode geometry parameters as input and outputs mask design parameters, which are used to update the grayscale lithography mask fabrication process.

[0084] When performing electrical tests on electrode profiles with curved radii of curvature and sidewall tilt angles, a test system consisting of a probe station and a semiconductor parameter analyzer is used to scan and acquire leakage current data within a preset bias range. The test environment covers the actual operating temperature range of the RF capacitor. The data is transmitted to a data processing terminal through a standardized interface, and the difference between the data and the theoretical values ​​exported from the three-dimensional electromagnetic field simulation software is analyzed to generate an error distribution map as a basis for process optimization.

[0085] When establishing the associated database, electrode geometric parameters and leakage current data are stored and categorized by process batch number. The data structure includes fields for arc curvature radius, sidewall tilt angle, leakage current density, and temperature conditions. The database is linked to 3D electromagnetic field simulation result files via primary keys, supporting multi-dimensional data retrieval based on combinations of curvature radius and tilt angle. The geometric parameters of the electrode profile and leakage current characteristics form a nonlinear mapping relationship, providing a training sample set for machine learning models.

[0086] A random forest algorithm was used to train and optimize the model. The input layer received electrode geometry parameters and operating temperature data, while the output layer generated mask design parameters, including the dose gradient distribution for electron beam writing and the gas ratio combination for reactive ion etching. Cross-validation was used during model training, and the loss function incorporated leakage current error and process cost weights. The trained optimized model was integrated into the mask layout design system via an interface, generating mask exposure graphic files based on real-time input geometry parameters and driving the electron beam writing equipment to update the grayscale mask fabrication process.

[0087] During process iteration, after the electrode profile fabricated with the new mask undergoes electrical testing, the leakage current data is automatically transmitted back to the database, triggering online learning and updating of the model parameters. Electrode geometry parameters, leakage current characteristics, and mask design parameters form a closed-loop feedback loop. Through the nonlinear fitting capability of the machine learning model, the breakdown voltage and temperature stability of the RF capacitor are gradually optimized. The difference analysis results between the 3D electromagnetic field simulation results and the measured data are written to a log file to verify the model's prediction accuracy and process consistency.

[0088] The various technical modules collaborate through data flow: electrical testing provides process verification data, the database establishes parameter correlations, and machine learning models generate process optimization instructions. The radius of curvature of the electrode profile is controlled by mask dose gradient to regulate the edge electric field distribution, and the sidewall tilt angle is optimized by etching gas ratio to reduce leakage current density.

[0089] Specifically, the method for fabricating a radio frequency integrated capacitor structure based on RDL technology according to the present invention includes: collecting operating temperature data at a preset period using the platinum thin film temperature sensor, and inputting the data into the signal processing module after digital filtering to eliminate environmental noise;

[0090] The signal processing module calculates the compensation voltage adjustment amount using a preset algorithm and transmits it to the compensation module.

[0091] The compensation module applies a compensation voltage to the capacitor plates, resamples the capacitance value, and feeds it back to the signal processing module to form a closed-loop control.

[0092] The platinum thin-film temperature sensor acquires operating temperature data via an I²C bus at a period of 10-100 milliseconds. The acquired analog signal is converted into a digital signal by a 24-bit analog-to-digital converter. The digital filtering module uses a Kalman filter algorithm to eliminate environmental noise, and the processed temperature data is stored in the dual-port RAM of the microcontroller unit. The signal processing module calls a pre-stored capacitance drift mapping table to match the temperature data with a preset mapping relationship, and calculates the compensation voltage adjustment amount using a proportional-integral derivative algorithm.

[0093] The calculated compensation voltage digital signal is transmitted to the compensation module via a serial peripheral interface and converted into an analog voltage signal by a 16-bit digital-to-analog converter. This signal is then amplified by a power amplifier to enhance its driving capability before being applied to the capacitor plates, adjusting the electric field strength between the plates to counteract temperature-induced changes in the dielectric constant. After the compensation voltage is applied, the capacitance value is resampled via a charge integration circuit, and the sampled data is converted back to digital data and transmitted to the signal processing module.

[0094] The signal processing module compares the feedback capacitance value with the target capacitance value and dynamically adjusts the control parameters of the proportional-integral-derivative algorithm based on the error amplitude. The adjusted parameters are updated to the capacitance drift mapping table, forming a closed-loop control loop for temperature detection, compensation voltage generation, and capacitance feedback. The microcontroller unit synchronizes data acquisition, processing, and feedback timing through a hardware timer, ensuring that the response time of the closed-loop control matches the period of the radio frequency signal.

[0095] A platinum thin-film temperature sensor is integrated with a coplanar waveguide structure with RDL metal interconnects to reduce high-frequency signal crosstalk. The power amplifier of the compensation module adopts a differential output structure and is connected to the capacitor plate through a shielded wire to suppress the impact of common-mode noise on the accuracy of the compensation voltage. During the closed-loop control process, the coordinated optimization of the digital filtering algorithm and the proportional-integral-derivative algorithm keeps the capacitance value fluctuation range within the tolerance of the RF circuit.

[0096] In terms of process implementation, the data acquisition link of the temperature sensor and the voltage application path of the compensation module are integrated on the same metal layer using RDL technology, and the algorithm firmware of the signal processing module is burned into the flash memory of the microcontroller unit. The closed-loop control logic reduces the impact of external temperature disturbances on the RF capacitor while maintaining compatibility with existing RDL packaging processes.

[0097] Specifically, the method for fabricating a radio frequency integrated capacitor structure based on RDL technology according to the present invention includes: processing temperature and capacitor drift data through a polynomial fitting algorithm in the signal processing module to generate a capacitor drift mapping relationship; and applying the compensation voltage signal to the capacitor plate after being converted into an analog voltage by a digital-to-analog converter.

[0098] The microcontroller unit dynamically controls the output strength of the compensation voltage by adjusting the duty cycle of the pulse width modulation signal based on the capacitance drift mapping relationship and real-time temperature data.

[0099] The signal processing module retrieves stored historical temperature and capacitance drift data and uses a third-order polynomial fitting algorithm to establish a capacitance drift mapping relationship. The polynomial coefficients are optimized using the least squares method, and the mapping table is stored as a two-dimensional array in the microcontroller unit's flash memory. Temperature data, after analog-to-digital conversion, is input into the polynomial calculation unit, which outputs the predicted capacitance drift compensation value for the corresponding temperature point in real time.

[0100] The compensation voltage signal is converted into an analog voltage by a 16-bit digital-to-analog converter. The conversion reference voltage source uses a low-temperature drift Zener diode, and the output voltage range covers 0-5V. The converted analog signal is then amplified by a differential amplifier circuit to enhance its driving capability and transmitted to the capacitor plates via shielded wires to suppress high-frequency noise interference with compensation accuracy. After the compensation voltage is applied, the change in the equivalent capacitance of the capacitor unit is detected by a charge integration circuit, and the sampled data is sent back to the signal processing module for closed-loop verification.

[0101] The microcontroller unit generates a pulse width modulation signal through a hardware PWM module, and its duty cycle is dynamically adjusted according to the capacitor drift mapping relationship. When the detected temperature change rate exceeds the threshold, a fuzzy control algorithm is used to adaptively adjust the PWM frequency and duty cycle step size to match the compensation voltage output strength with the temperature drift rate. The PWM signal is converted into a DC voltage through a low-pass filter and superimposed on the main compensation voltage to form a composite control signal, expanding the compensation dynamic range.

[0102] Timing alignment of temperature data and capacitor drift is achieved through a DMA controller, ensuring synchronization between polynomial fitting calculations and PWM duty cycle updates. The closed-loop control cycle of the signal processing module maintains an integer multiple relationship with the RF signal modulation cycle to avoid harmonic interference. The microcontroller unit forms a common ground loop with the capacitor unit and temperature sensor via RDL metal interconnects, reducing the impact of parasitic inductance on the stability of the compensation circuit.

[0103] In terms of manufacturing process, the polynomial coefficient table and PWM control parameters are programmed into the microcontroller unit via an online programming interface, supporting on-site calibration and updates. The digital-to-analog converter and PWM module are integrated into the analog front end of the same chip, isolated from the digital circuitry by a metal shielding layer.

[0104] This invention addresses the uncontrollable temperature coefficient of MIM capacitors in radio frequency integrated circuits through a composite dielectric layer, temperature closed-loop compensation, and synergistic optimization of process parameters. The composite dielectric layer employs an alternating stacked structure of silicon nitride and aluminum oxide. The silicon nitride layer is formed into an amorphous state via plasma-enhanced chemical vapor deposition, while the aluminum oxide layer's lattice orientation interface is controlled through atomic layer deposition. This heterogeneous interface between the two materials generates a stress buffering effect, causing the overall temperature coefficient of the composite dielectric layer to approach zero, thus offsetting the intrinsic temperature sensitivity of a single dielectric material.

[0105] A temperature sensor is integrated on the substrate surface, detecting the operating temperature of the capacitor unit via a platinum thin-film resistor and transmitting the data to the signal processing module via the RDL metal interconnect. The signal processing module calls a pre-stored capacitance drift mapping relationship, calculates the compensation voltage adjustment using a proportional-integral-differential algorithm, and applies it to the capacitor plates via a digital-to-analog converter. After the compensation voltage is applied, the charge integration circuit feeds back the capacitance value to the signal processing module in real time, forming a closed-loop control link of temperature, voltage, and capacitance to dynamically offset the dielectric constant shift caused by temperature.

[0106] The electrode profile is generated using 3D electromagnetic field simulation to obtain parameters for the radius of curvature and sidewall tilt angle. Mask design and etching process are optimized based on a machine learning model. After comparing measured leakage current data with simulation results, the associated database is updated, driving iterative adjustments to the dose gradient and reactive ion etching gas ratio during electron beam direct writing. This collaborative process mechanism, through data-driven parameter optimization, reduces the leakage current density at the electrode edges and improves the high-frequency stability of the RF capacitor across a wide temperature range.

Claims

1. A radio frequency integrated capacitor structure based on RDL technology, characterized in that, Includes a substrate, a composite dielectric layer, a platinum thin-film temperature sensor, a signal processing module, an electric field optimization module, a compensation module, and a capacitor unit: A composite dielectric layer is disposed on the surface of the substrate and is composed of alternating stacked silicon nitride layers and aluminum oxide layers. The silicon nitride layer has an amorphous structure, and the aluminum oxide layer has a lattice orientation control interface. A platinum thin-film temperature sensor, integrated on the substrate, is used to detect the operating temperature of the capacitor unit; The signal processing module includes a microcontroller unit, which is electrically connected to the platinum thin-film temperature sensor via RDL metal interconnect, receives temperature signals and outputs compensation voltage signals; The electric field optimization module is configured to generate electrode geometric parameters through three-dimensional electromagnetic field simulation, the electrode geometric parameters including the arc curvature radius and the sidewall inclination angle; The compensation module receives the compensation voltage signal and applies it to the capacitor plates. The compensation voltage signal is dynamically adjusted according to the temperature signal and the preset capacitance drift mapping relationship to offset the capacitance offset caused by temperature. The capacitor unit is composed of a composite dielectric layer and multiple metal and dielectric layers stacked in the RDL metal interconnect; The electrode geometry parameters generated by the electric field optimization module control the radius of curvature of the electrode arc through grayscale exposure of the photolithography mask, and adjust the electrode sidewall tilt angle through reactive ion etching. The signal processing module receives real-time temperature data from the platinum thin-film temperature sensor, calculates a compensation voltage signal through the capacitance drift mapping relationship, and transmits the compensation voltage signal to the compensation module. The compensation module adjusts the voltage applied to the capacitor plates according to the compensation voltage signal, and feeds back the adjusted capacitance value to the signal processing module to form a closed-loop control.

2. The RF integrated capacitor structure based on RDL technology according to claim 1, characterized in that, include: Based on the electrode geometry parameters generated by the electric field optimization module, a grayscale photomask is fabricated using a preset electron beam direct writing process, and a gradient exposure pattern is formed on the photoresist covering the composite dielectric layer by dose modulation. Based on the gradient exposure pattern, reactive ion etching is performed using fluorine-based gas to simultaneously remove photoresist residue and passivate the electrode sidewalls, generating an electrode profile with an arc-shaped radius of curvature and a sidewall tilt angle.

3. The RF integrated capacitor structure based on RDL technology according to claim 2, characterized in that, include: Electrical tests were performed on the electrode profile with an arc-shaped radius of curvature and a sidewall inclination angle to obtain measured leakage current data. The measured leakage current data was then compared with the results of a three-dimensional electromagnetic field simulation. Based on the generated electrode geometry parameters and leakage current data, a correlation database of arc curvature radius, sidewall tilt angle and leakage current is established; A machine learning algorithm is used to train an optimization model. The optimization model takes electrode geometry parameters as input and outputs mask design parameters, which are used to update the grayscale lithography mask fabrication process.

4. The RF integrated capacitor structure based on RDL technology according to claim 1, characterized in that, include: The platinum thin film temperature sensor collects operating temperature data at a preset period, and after digital filtering to eliminate environmental noise, the data is input into the signal processing module. The signal processing module calculates the compensation voltage adjustment amount using a preset algorithm and transmits it to the compensation module. The compensation module applies a compensation voltage to the capacitor plates, resamples the capacitance value, and feeds it back to the signal processing module to form a closed-loop control.

5. The RF integrated capacitor structure based on RDL technology according to claim 4, characterized in that, include: The temperature and capacitance drift data are processed by the polynomial fitting algorithm in the signal processing module to generate a capacitance drift mapping relationship. The compensation voltage signal is converted into an analog voltage by a digital-to-analog converter and then applied to the capacitor plates. The microcontroller unit dynamically controls the output strength of the compensation voltage by adjusting the duty cycle of the pulse width modulation signal based on the capacitance drift mapping relationship and real-time temperature data.

6. A method for fabricating an RF integrated capacitor structure based on RDL technology, applied to the RF integrated capacitor structure based on RDL technology as described in any one of claims 1 to 5, characterized in that, include: Oxygen plasma cleaning is performed on the surface of a silicon-based or glass substrate, and a composite adhesion layer is deposited after cleaning to enhance the interfacial bonding between the substrate and the subsequent composite dielectric layer. Alumina and silicon nitride layers are sequentially generated by atomic layer deposition to form a composite dielectric layer. In-situ infrared spectroscopy analysis is used to monitor the precursor adsorption reaction during the deposition of the alumina layer, and the number of deposition cycles is dynamically adjusted to control the film density. During the deposition of silicon nitride layers, the ratio of silane to ammonia is detected in real time by plasma emission spectroscopy to optimize the stoichiometry of silicon nitride in order to form an amorphous structure.

7. The method for fabricating an RF integrated capacitor structure based on RDL technology according to claim 6, characterized in that, include: After completing the deposition of the composite dielectric layer, a platinum thin film is deposited on the surface of the substrate and patterned to generate the platinum thin film temperature sensor; The platinum thin film temperature sensor was placed in a constant temperature bath for multi-point calibration, with the calibration temperature covering the range of -40℃ to 125℃. The resistance-temperature characteristic curves were recorded and stored in the microcontroller unit. A piecewise linear interpolation algorithm is used to process the calibration data, enabling the microcontroller unit to dynamically correct the temperature measurement value based on the calibration data, thereby reducing temperature measurement error.

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