Light emitting diode and display device

Abstract

The invention relates to a light emitting diode and a display device. The display device includes: a pixel circuit layer; a via insulating layer on the pixel circuit layer and including a groove; and a light emitting diode including a first region overlapping the groove in a plan view and a second region surrounding the first region. The light emitting diode includes: a first electrode including a first portion disposed in the groove in the first region and a second portion extending from the first portion and disposed in the second region; a light scattering layer on the first portion of the first electrode and including a scatterer; a light-transmitting conductive layer on the light scattering layer; an emission layer on the light-transmissive conductive layer; and a second electrode on the emission layer. A distance between the substrate and the first portion of the first electrode is less than a distance between the substrate and the second portion of the first electrode.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2024-0035981 filed on March 14, 2024, in the Korean Intellectual Property Office (KIPO), the entire contents of which are incorporated herein by reference. Technical Field

[0003] Embodiments relate to a light emitting diode and a display device including the same. Background Art

[0004] The display device visually displays data and is used as a display for a compact product such as a mobile phone or as a display for a large-sized product such as a television.

[0005] A display device includes a plurality of pixels that receive electrical signals and emit light to display an image to the outside. Each of the pixels includes a light-emitting diode. For example, an organic light-emitting display device includes an organic light-emitting diode (OLED) as a light-emitting diode. Summary of the Invention

[0006] The embodiment includes a display device having reduced luminance deviation and / or color deviation caused by viewing angle and excellent light efficiency. However, this purpose is only an example, and the scope of the present disclosure is not limited thereto.

[0007] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the presented embodiments of the disclosure.

[0008] According to an embodiment, a display device may include: a pixel circuit layer disposed on a substrate and including a thin film transistor; a via insulating layer disposed on the pixel circuit layer and including a groove; and a light-emitting diode disposed on the via insulating layer, the light-emitting diode including a first region overlapping the groove in plan view and a second region surrounding the first region. The light-emitting diode may include: a first electrode including a first portion disposed in the groove in the first region and a second portion extending from the first portion and disposed in the second region; a light-scattering layer disposed on the first portion of the first electrode and including a scatterer; a light-transmitting conductive layer disposed on the light-scattering layer; an emission layer disposed on the light-transmitting conductive layer; and a second electrode on the emission layer. The distance between the substrate and the first portion of the first electrode may be smaller than the distance between the substrate and the second portion of the first electrode.

[0009] The upper surface of the via insulation layer may include a first surface, a second surface at a higher level than the first surface, and a third surface connecting the first surface to the second surface, and the first surface of the via insulation layer and the third surface of the via insulation layer may define the groove.

[0010] The first portion of the first electrode may be disposed on the first surface of the via insulation layer and the third surface of the via insulation layer, and the second portion of the first electrode may be disposed on the second surface of the via insulation layer.

[0011] An angle between the first surface of the via insulation layer and the third surface of the via insulation layer may be in the range of about 20° to about 40°.

[0012] The light scattering layer may be disposed in the groove of the via insulating layer.

[0013] The light-transmitting conductive layer may contact the light scattering layer in the first region, and the light-transmitting conductive layer may contact the first electrode in the second region.

[0014] The light-transmitting conductive layer may include a first inorganic layer and a second inorganic layer on the first inorganic layer.

[0015] The display device may further include a pixel defining layer on the light-transmitting conductive layer, the pixel defining layer including a pixel opening exposing a portion of the light-transmitting conductive layer.

[0016] In a plan view, the area of ​​the first region may be about 20% to about 80% of the area of ​​the light emitting region of the light emitting diode defined by the pixel defining layer.

[0017] In a plan view, the area of ​​the first region may be smaller than that of the second region.

[0018] In a plan view, the area of ​​the first region may be larger than the area of ​​the second region.

[0019] The display device may further include an insulating pattern overlapping the pixel defining layer in a plan view and disposed between the via insulating layer and the first electrode. The first electrode may further include a third portion extending from the second portion and disposed on a side surface of the insulating pattern.

[0020] The thickness of the light scattering layer may be in the range of about 1.5 μm to about 4 μm.

[0021] The display device may further include: an encapsulation layer disposed on the light emitting diode and encapsulating the light emitting diode; and a color filter layer disposed on the encapsulation layer.

[0022] According to an embodiment, a display device may include: a pixel circuit layer, which is arranged on a substrate and includes a thin film transistor; a via insulating layer, which is arranged on the pixel circuit layer and includes a groove; a first electrode, which includes a first portion arranged in the groove of the via insulating layer and a second portion extending from the first portion and arranged outside the groove; a light scattering layer, which is arranged on the first portion of the first electrode and includes a scatterer; an emission layer, which is arranged on the light scattering layer; a second electrode, which is on the emission layer; and a light-transmitting conductive portion, which includes a portion arranged between the light scattering layer and the emission layer and another portion arranged between the second portion of the first electrode and the emission layer.

[0023] The upper surface of the via insulation layer may include a first surface, a second surface at a higher level than the first surface, and a third surface connecting the first surface to the second surface, and the first surface of the via insulation layer and the third surface of the via insulation layer may define the groove.

[0024] The first portion of the first electrode may be disposed on the first surface of the via insulation layer and the third surface of the via insulation layer, and the second portion of the first electrode may be disposed on the second surface of the via insulation layer.

[0025] An angle between the first surface of the via insulation layer and the third surface of the via insulation layer may be in the range of about 20° to about 40°.

[0026] The display device may further include a pixel defining layer disposed on the first electrode and including a pixel opening exposing a portion of the first electrode.

[0027] The display device may further include an insulating pattern overlapping the pixel defining layer in a plan view and disposed between the via insulating layer and the first electrode. The first electrode may further include a third portion extending from the second portion and disposed on a side surface of the insulating pattern.

[0028] The thickness of the light scattering layer may be in the range of about 1.5 μm to about 4 μm.

[0029] The display device may further include: an encapsulation layer disposed on the second electrode; and a color filter layer disposed on the encapsulation layer.

[0030] According to an embodiment, a light emitting diode may include: a first electrode including a first portion and a second portion, the first portion including a flat portion and an inclined portion, and the second portion surrounding the first portion in a plan view and connected to the flat portion of the first portion through the inclined portion of the first portion; a light scattering layer provided on the first portion of the first electrode and including a scatterer; a light-transmitting conductive layer provided on the light-scattering layer; an emission layer provided on the light-transmitting conductive layer; and a second electrode provided on the emission layer.

[0031] An upper surface of the second portion may be at a higher level than an upper surface of the flat portion of the first portion, and the inclined portion of the first portion may be disposed between the flat portion and the second portion and inclined from the flat portion of the first portion.

[0032] The light-transmitting conductive layer may be in contact with the second portion of the first electrode, and the light scattering layer may be provided between the first portion of the first electrode and the light-transmitting conductive layer.

[0033] The thickness of the light scattering layer may be in the range of about 1.5 μm to about 4 μm. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The above and other aspects, features and advantages of certain embodiments of the present disclosure will become more apparent through the following description in conjunction with the accompanying drawings, in which:

[0035] Figure 1A and Figure 1B are perspective views each schematically showing a display device according to an embodiment;

[0036] Figure 2 Shows a display element provided in one pixel of a display device and a pixel circuit connected to the display element according to an embodiment;

[0037] Figure 3 It is along Figure 1A A schematic cross-sectional view of a display device according to an embodiment taken along line AA′ in FIG.

[0038] Figure 4 is a schematic plan view showing a portion of a pixel arrangement in a display area of ​​a display device according to an embodiment;

[0039] Figure 5 is a schematic cross-sectional view showing a portion of a display area of ​​a display device according to an embodiment;

[0040] Figure 6 According to the embodiment Figure 5 A schematic enlarged view of area B;

[0041] Figure 7 is a schematic plan view showing a portion of a pixel arrangement in a display area of ​​a display device according to another embodiment;

[0042] Figure 8 According to another embodiment Figure 5 A schematic enlarged view of area B;

[0043] Figure 9 According to another embodiment Figure 5 A schematic enlarged view of area B;

[0044] Figure 10 is a schematic graph showing a luminance ratio depending on a viewing angle in a comparative example and an example in which a pixel emitting red light is included;

[0045] Figure 11 is a schematic graph showing a luminance ratio depending on a viewing angle in a comparative example and an example in which a pixel emitting green light is included;

[0046] Figure 12 is a schematic graph showing a luminance ratio depending on a viewing angle in a comparative example and an example including a pixel emitting blue light; and

[0047] Figures 13 to 19 is a schematic cross-sectional view illustrating a method of manufacturing a display device according to an embodiment. DETAILED DESCRIPTION

[0048] With reference now to embodiment in detail, the example of embodiment is shown in the accompanying drawings, wherein the same reference numerals refer to the same elements from time to time. In this respect, embodiment can have different forms and should not be construed as being limited to the description set forth in this article. Therefore, the embodiment is described below only by reference to the accompanying drawings to illustrate the various aspects of the specification. As used in this article, the term "and / or" includes any combination and all combinations of one or more of the relevant listed items. Throughout this disclosure, the expression "at least one of a, b and c (kind / person)" indicates only a, only b, only c, both a and b, both a and c, both b and c, all of a, b and c or its variations.

[0049] When an element or layer is referred to as being “on”, “connected to” or “coupled to” another element or layer, the element or layer may be directly on, directly connected to or directly coupled to the other element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being “directly on”, “directly connected to” or “directly coupled to” another element or layer, there are no intervening elements or layers. For this purpose, the term “connected” may refer to a physical connection, an electrical connection and / or a fluid connection with or without intervening elements. Additionally, when an element is referred to as being “in contact with” or “in contact with” another element, etc., the element may be “in electrical contact with” or “in physical contact with” the other element; or “in in indirect contact with” or “in direct contact with” the other element.

[0050] Because the present disclosure allows for various changes and many embodiments, specific embodiments will be shown in the drawings and described in detail in the written description. Hereinafter, the effects and features of the present disclosure and methods for achieving these effects and features will be more fully described with reference to the drawings, in which embodiments of the present disclosure are shown. However, the present disclosure can be implemented in many different forms and should not be construed as limited to the embodiments set forth herein.

[0051] Hereinafter, embodiments will be described with reference to the accompanying drawings, wherein like reference numerals refer to like elements throughout and repeated descriptions thereof will be omitted.

[0052] Although the terms "first," "second," etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another. Thus, the first element discussed below may be referred to as the second element without departing from the teachings of the present disclosure.

[0053] The terms used in this document are for the purpose of describing particular embodiments and are not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular forms "a", "an", and "the" are intended to include the plural forms as well. In addition, when the terms "comprises / comprising" and / or "includes / including" are used in this specification, it indicates the presence of the stated features, wholes, steps, operations, elements, components and / or groups thereof, but does not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof.

[0054] As used herein, "about" or "approximately" is inclusive of the stated value and means within an acceptable range of deviation from the particular value as determined by one of ordinary skill in the art, taking into account the measurements in question and errors associated with the measurement of the particular quantity (i.e., limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value.

[0055] In the following embodiments, when a portion of a film, region, element, etc. is provided above or on another portion, it refers not only to the case where the portion is directly on the other portion but also to the case where another film, region, element, etc. is located therebetween.

[0056] In the accompanying drawings, the size of the elements may be exaggerated or reduced for ease of description. For example, the size and thickness of each element shown in the accompanying drawings are arbitrarily shown for ease of description, and therefore, the present disclosure is not necessarily limited to the shown contents.

[0057] When the embodiment can be implemented differently, the specific process order can be performed differently from the described order. For example, two processes described in succession can be performed substantially simultaneously, or can be performed in the reverse order of the described order.

[0058] In the specification and claims, for the purposes of its meaning and interpretation, the phrase "at least one of..." is intended to include the meaning of "at least one of the group of..." For example, "at least one of A and B" may be understood to mean "A, B, or A and B". In the specification and claims, for the purposes of its meaning and interpretation, the term "and / or" is intended to include any combination of the terms "and" and "or". For example, "A and / or B" may be understood to mean "A, B, or A and B". The terms "and" and "or" may be used in a conjunction or disjunction sense and may be understood to be equivalent to "and / or".

[0059] In the following embodiments, when films, regions, or elements are described as being connected, this includes cases where the films, regions, or elements are directly connected, and / or cases where the films, regions, or elements are indirectly connected with other films, regions, or elements interposed therebetween. For example, herein, when films, regions, or elements are described as being electrically connected, this includes cases where the films, regions, or elements are directly electrically connected, and / or cases where the films, regions, or elements are indirectly electrically connected with other films, regions, or elements interposed therebetween.

[0060] The x-axis (x-direction), the y-axis (y-direction), and the z-axis (z-direction) are not limited to the three axes in the Cartesian coordinate system, but can be interpreted in a broad sense including these axes. For example, the x-axis (x-direction), the y-axis (y-direction), and the z-axis (z-direction) may be orthogonal to each other, but may also refer to directions that are not orthogonal to each other.

[0061] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used have the meaning consistent with that commonly understood by those skilled in the art to which the present disclosure belongs. It will be further understood that, unless expressly defined in the specification, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense.

[0062] Figure 1A and Figure 1B 1 and 2 are perspective views schematically showing display devices 1 and 1 ′ according to the embodiments, respectively. Figure 1A The display device 1 is schematically shown in a flat state, and Figure 1B A display device 1 ′ is shown which comprises a three-dimensional display surface or a curved display surface.

[0063] In an embodiment, each of the display devices 1 and 1' can be a device configured to display moving images or still images, and can be used as a display screen for various products such as televisions, laptop computers, monitors, billboards, or Internet of Things (IoT) devices, as well as portable devices such as mobile phones, smart phones, tablet personal computers (PCs), mobile communication terminals, electronic notebooks, e-book readers, portable multimedia players (PMPs), navigation systems, or ultra-mobile PCs (UMPCs).

[0064] In an embodiment, the display devices 1 and 1' can be used in wearable devices such as smart watches, watch phones, glasses-type displays, and head-mounted displays (HMDs). In an embodiment, the display devices 1 and 1' can be used as a display for a vehicle's instrument panel, a center information display (CID) provided on a vehicle's central instrument panel (fascias) or instrument panel, an interior rearview mirror display that replaces a vehicle's side mirrors, or a display provided on the back surface of a front seat as an entertainment device for a vehicle's rear seat.

[0065] refer to Figure 1A and Figure 1B, the display devices 1 and 1' may each include a display area DA and a non-display area NDA adjacent to the display area DA. A plurality of pixels P including display elements may be disposed in the display area DA, and the display devices 1 and 1' may each provide an image by using light emitted from the pixels P disposed in the display area DA. The non-display area NDA may be an area in which no display elements are disposed, and the display area DA may be completely surrounded by the non-display area NDA in a plan view.

[0066] The display devices 1 and 1' may each be provided in various shapes in a plan view, for example, in a rectangular plate shape having two pairs of sides parallel to each other. Figure 1A and Figure 1B In the present invention, for ease of description, the display devices 1 and 1' may each have a rectangular shape in a plan view, wherein the rectangular shape has a pair of long sides and a pair of short sides. However, the shape of the display devices 1 and 1' in a plan view is not limited thereto and may vary. For example, the display devices 1 and 1' may be provided in various shapes in a plan view, such as a closed polygon including straight lines, a circle or an ellipse including curved sides, or a semicircle or semiellipse including straight sides and curved sides.

[0067] The display area DA may be a portion where an image is displayed, and pixels P may be disposed in the display area DA. Each of the pixels P may include a display element such as an organic light emitting diode. Each of the pixels P may emit, for example, red light, green light, blue light, or white light.

[0068] The display area DA may provide an image by light emitted from the pixel P. As described above, the pixel P (the size of the pixel P) as used herein may be defined as a light emitting area (the size of the light emitting area) in which one of red, green, blue, and white light is emitted.

[0069] The non-display area NDA may be an area in which no pixels P are provided and may not provide an image. In the non-display area NDA, a printed circuit board including a power supply line and a driving circuit portion for driving the pixels P, or a terminal portion to which a driver integrated circuit (IC) is connected may be provided.

[0070] The display devices 1 and 1' according to the embodiment may be an organic light-emitting display, an inorganic light-emitting display (or an inorganic electroluminescent (EL) display), or a quantum dot light-emitting display. For example, the emission layer included in the light-emitting diode provided in the display devices 1 and 1' may include an organic material or an inorganic material. In an embodiment, quantum dots may be positioned on the path of light emitted from the emission layer.

[0071] refer to Figure 1B, the display device 1' may include a three-dimensional display surface or a curved display surface. In another embodiment, when the display device 1' includes a curved display surface, the display device 1' may be implemented in various forms such as a flexible, foldable or rollable display device.

[0072] like Figure 1B As shown in , in the case where the display device 1 ' has straight edges, at least some edges of each planar shape can be curved. For example, in the case where the display device 1 ' has a rectangular shape in a plan view, the portion where adjacent straight edges meet each other can be replaced by a curved line with curvature. In other words, the vertex portion of the rectangular shape can have relatively adjacent ends respectively connected to two adjacent straight lines, and can include a curved edge with curvature. The curvature can be set according to the position. For example, the curvature can vary according to the position where the curved line starts and the length of the curved line.

[0073] Figure 1B The display area DA of the display device 1 ′ may include a front display area FDA, a side display area SDA, and a corner display area CDA.

[0074] In an embodiment, pixels P, each having a display element, may be arranged in the front display area FDA, the side display area SDA, and the corner display area CDA. In an embodiment, each of the pixels P may provide an independent image. In another embodiment, each of the pixels P in the front display area FDA, the side display area SDA, and the corner display area CDA may provide a portion of an image.

[0075] For example, the front display area FDA may be a non-curved area, and the side display area SDA and the corner display area CDA may be curved areas that can be bent with a curvature.

[0076] The side display area SDA may be provided at each of the four edges of the front display area FDA. The side display area SDA may be provided on the left side (e.g., -x direction) and the right side (e.g., x direction), with the front display area FDA interposed between the left and right sides, and the side display area SDA may be bent relative to a bending axis in a long-axis direction (e.g., y direction). The side display area SDA may be provided on the upper side (e.g., y direction) and the lower side (e.g., -y direction), with the front display area FDA interposed between the upper side and the lower side, and the side display area SDA may be bent relative to a bending axis in a short-axis direction (e.g., x direction). Therefore, the display device 1' according to the embodiment may have a four-sided curved structure.

[0077] The corner display area CDA can be positioned and curved at a corner CN of the display device 1'. In other words, the corner display area CDA can be positioned to correspond to the corner CN. The corner CN may be the portion where the long side in the major axis direction (e.g., the y-direction) and the short side in the minor axis direction (e.g., the x-direction) meet. The corner display area CDA can be positioned between adjacent side display areas SDA. The side display areas SDA and the corner display area CDA can at least partially surround the front display area FDA and can be curved.

[0078] Figure 2 A display element provided in one pixel P of a display device and a pixel circuit PC connected to the display element according to an embodiment are shown.

[0079] refer to Figure 2 A light-emitting diode (LED) serving as a display element may be electrically connected to a pixel circuit (PC). The pixel circuit (PC) may include a first thin-film transistor (T1), a second thin-film transistor (T2), and a storage capacitor (Cst). For example, the light-emitting diode (LED) may emit one of red, green, and blue light, or one of red, green, blue, and white light.

[0080] The second thin film transistor T2, which is a switching thin film transistor, may be connected to the scan line SL and the data line DL and may transmit a data voltage received via the data line DL to the first thin film transistor T1 in response to a switching voltage received via the scan line SL. A storage capacitor Cst may be connected to the second thin film transistor T2 and the driving voltage line PL and may store a voltage corresponding to a voltage difference between a voltage received from the second thin film transistor T2 and the first power voltage ELVDD supplied from the driving voltage line PL.

[0081] The first thin film transistor T1, which serves as a driving transistor, can be connected to the driving voltage line PL and the storage capacitor Cst, and can control the driving current flowing from the driving voltage line PL to the light-emitting diode LED in response to the voltage stored in the storage capacitor Cst. The light-emitting diode LED can emit light with a predetermined brightness according to the driving current. A first electrode (e.g., an anode) of the light-emitting diode LED can be connected to the pixel circuit PC, and a second electrode (e.g., a cathode) of the light-emitting diode LED can receive a second power voltage ELVSS.

[0082] Figure 2 The pixel circuit PC is shown to include two thin film transistors and one storage capacitor. However, the present disclosure is not limited thereto, and the number of thin film transistors and the number of storage capacitors may be variously modified according to the design of the pixel circuit PC.

[0083] In an embodiment, each of the first thin film transistor T1 and the second thin film transistor T2 may be provided as a P-channel metal oxide semiconductor field effect transistor (MOSFET; PMOS) or provided as an N-channel MOSFET (NMOS). In an embodiment, some of the transistors included in the pixel circuit PC may be provided as PMOS, while the other transistors may be provided as NMOS.

[0084] Figure 3 It is along Figure 1A Schematic cross-sectional view of the display device 1 according to the embodiment, taken along line AA′ in FIG.

[0085] refer to Figure 3 The display device 1 according to the embodiment may include a substrate 100 , a display layer 200 , an encapsulation layer 300 , a touch sensing layer 400 , and an anti-reflection layer 500 .

[0086] The substrate 100 may include glass or a polymer resin. For example, the polymer resin may include polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, or cellulose acetate propionate. The substrate 100 including the polymer resin may have flexible, rollable, or bendable properties. The substrate 100 may have a multilayer structure including a layer containing a polymer resin and an inorganic layer.

[0087] The display layer 200 may be provided on the substrate 100. The display layer 200 may include a light emitting diode, a thin film transistor electrically connected to the light emitting diode, and an insulating layer positioned between the light emitting diode and the thin film transistor.

[0088] The encapsulation layer 300 may be disposed on the display layer 200. For example, the display layer 200 may be sealed by the encapsulation layer 300. In an embodiment, the encapsulation layer 300 may include at least one inorganic film layer and at least one organic film layer.

[0089] The touch sensing layer 400 may be provided on the encapsulation layer 300. The touch sensing layer 400 may detect an external input (e.g., a touch by an object such as a finger or a stylus), allowing the display device 1 to obtain coordinate information corresponding to the touch position. The touch sensing layer 400 may include touch electrodes and trace lines connected to the touch electrodes. The touch sensing layer 400 may detect an external input using a mutual capacitance method or a self-capacitance method.

[0090] In an embodiment, the touch sensing layer 400 may be formed on (eg, directly on) the encapsulation layer 300. In another embodiment, the touch sensing layer 400 may be formed separately and bonded to the encapsulation layer 300 through an adhesive layer such as an optically clear adhesive (OCA).

[0091] The anti-reflection layer 500 may be provided on the touch sensing layer 400. The anti-reflection layer 500 may reduce reflectivity of light (external light) incident toward the display device 1. Figure 3 The anti-reflection layer 500 is shown as being disposed on the touch sensing layer 400. However, the present disclosure is not limited thereto. In another embodiment, the anti-reflection layer 500 may be disposed on the encapsulation layer 300, and the touch sensing layer 400 may be disposed on the anti-reflection layer 500. In other words, in another embodiment, the anti-reflection layer 500 may be disposed between the encapsulation layer 300 and the touch sensing layer 400.

[0092] Figure 4 FIG. 1 is a diagram showing a display device 1 according to an embodiment (see FIG. Figure 3 ) is a schematic plan view of a portion of a pixel arrangement in a display area DA of . Figure 5 FIG. 1 is a diagram showing a display area DA (see FIG. 2 ) of the display device 1 according to the embodiment. Figure 4 ) is a schematic cross-sectional view of a portion of ). Figure 6 According to the embodiment Figure 5 Schematic enlargement of area B.

[0093] refer to Figure 4 , also refer to Figure 5 , the display device 1 may include a plurality of pixels, and the plurality of pixels may include a first pixel P1, a second pixel P2, and a third pixel P3 that emit light of different colors. For example, the first pixel P1 may emit red light L1, the second pixel P2 may emit green light L2, and the third pixel P3 may emit blue light L3. However, the present disclosure is not limited thereto, and various modifications may be made. For example, the first pixel P1 may emit blue light, the second pixel P2 may emit green light, and the third pixel P3 may emit red light.

[0094] The first pixel P1, the second pixel P2, and the third pixel P3 may have a rectangular shape among polygonal shapes in a plan view. In this document, a polygon (such as a rectangle) also includes a shape with rounded corners. In another embodiment, the first pixel P1, the second pixel P2, and the third pixel P3 may have a circular or elliptical shape in a plan view.

[0095] The first pixel P1, the second pixel P2, and the third pixel P3 may have different sizes in a plan view. For example, the area of ​​the second pixel P2 may be smaller than the area of ​​the first pixel P1 and the area of ​​the third pixel P3, and the area of ​​the third pixel P3 may be larger than the area of ​​the first pixel P1. In another embodiment, the first pixel P1, the second pixel P2, and the third pixel P3 may have substantially the same size, and various modifications may be made.

[0096] Herein, the sizes of the first pixel P1, the second pixel P2, and the third pixel P3 may be the sizes of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 of the display element realizing the corresponding pixel, and the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may be formed by the pixel defining layer 209 (see Figure 5 ) is limited by the pixel opening 209OP.

[0097] Each of the first, second, and third emission regions EA1, EA2, and EA3 of the display element may include a groove 207G (see FIG. Figure 6 ) and a second region R2 surrounding the first region R1 in a plan view. In other words, each light-emitting diode serving as a display element may include a first region R1 and a second region R2. The first region R1 may be disposed at the center of the light-emitting diode, and the second region R2 may be disposed outside the first region R1. In an embodiment, in a plan view, the area of ​​the first region R1 may be smaller than the area of ​​the second region R2. However, the present disclosure is not limited thereto, and in another embodiment, the area of ​​the first region R1 may be larger than the area of ​​the second region R2. In another embodiment, the area of ​​the first region R1 and the area of ​​the second region R2 may be substantially the same. For example, the area of ​​the first region R1 may be approximately 20% to approximately 80% of the area of ​​each of the first light-emitting area EA1, the second light-emitting area EA2, and the third light-emitting area EA3. If the area of ​​the first region R1 is less than approximately 20% of the area of ​​each of the first light-emitting area EA1, the second light-emitting area EA2, and the third light-emitting area EA3, the brightness deviation and / or color deviation depending on the viewing angle of the display device 1 may be significantly increased. In the case where the area of ​​the first region R1 is greater than about 80% of the area of ​​each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3, the front light efficiency of the display device 1 may be significantly reduced. The area of ​​each of the first region R1 and the second region R2 may be an area viewed in a direction facing the upper surface of the substrate 100 (e.g., the -z direction).

[0098] The light shielding layer 510 disposed above the display layer 200 may have a first opening 510OP1, a second opening 510OP2, and a third opening 510OP3 corresponding to the first pixel P1, the second pixel P2, and the third pixel P3, respectively. The first opening 510OP1, the second opening 510OP2, and the third opening 510OP3 may be regions obtained by removing a portion of the light shielding layer 510, and light emitted by the display element may be emitted to the outside through the first opening 510OP1, the second opening 510OP2, and the third opening 510OP3 defined in the light shielding layer 510. The main portion of the light shielding layer 510 may include a material that absorbs external light, and thus, the visibility of the display device 1 may be improved.

[0099] In a plan view, the first opening 510OP1, the second opening 510OP2, and the third opening 510OP3 defined in the light shielding layer 510 may surround pixels P1, P2, and P3, respectively. The first opening 510OP1, the second opening 510OP2, and the third opening 510OP3 defined in the light shielding layer 510 may have a rectangular shape, a circular shape, or an elliptical shape with rounded edges in a plan view. The areas of the first opening 510OP1, the second opening 510OP2, and the third opening 510OP3 corresponding to the pixels P1, P2, and P3, respectively, may be larger than the areas of the pixels P1, P2, and P3, respectively. However, the present disclosure is not limited thereto. The areas of the first opening 510OP1, the second opening 510OP2, and the third opening 510OP3 defined in the light shielding layer 510 may be substantially the same as the areas of the pixels P1, P2, and P3, respectively.

[0100] like Figure 4 As shown in FIG, the first pixel P1, the second pixel P2 and the third pixel P3 can be However, the present disclosure is not limited thereto. For example, the first pixel P1, the second pixel P2, and the third pixel P3 may be arranged in various pixel array structures such as a stripe structure, a mosaic structure, and a delta structure.

[0101] refer to Figure 5 and Figure 6 The display device 1 may include a substrate 100 , a display layer 200 , an encapsulation layer 300 , a touch sensing layer 400 and an anti-reflection layer 500 .

[0102] The display layer 200 may include: a pixel circuit layer PCL including a thin film transistor (TFT) and an insulating layer; a via insulating layer 207 disposed on the pixel circuit layer PCL; and a first light-emitting diode (LED1), a second light-emitting diode (LED2), and a third light-emitting diode (LED3). In an embodiment, the display layer 200 may further include a pixel defining layer 209 and / or a spacer 211.

[0103] The pixel circuit layer PCL may be provided on the substrate 100. The pixel circuit layer PCL may include a buffer layer 201 as an insulating layer, a gate insulating layer 203, and an interlayer insulating layer 205; and a thin film transistor TFT.

[0104] The buffer layer 201 may be provided on the substrate 100 to reduce or block the penetration of foreign matter, moisture or external air through the lower portion of the substrate 100, and may provide a flat surface on the substrate 100. The buffer layer 201 may include an inorganic material such as an oxide or a nitride, an organic material, or an organic and inorganic compound, and may have a single layer or multilayer structure of an inorganic material and an organic material. A barrier layer (not shown) for blocking the penetration of external air may also be included between the substrate 100 and the buffer layer 201. The buffer layer 201 may include silicon oxide (SiO2) or silicon nitride (SiN x ).

[0105] The thin film transistor TFT may be disposed on the buffer layer 201. Each of the thin film transistors TFT may include a semiconductor layer ACT, a gate electrode GE, a source electrode SE, and a drain electrode DE. The thin film transistor TFT may be electrically connected to the first light emitting diode LED1, the second light emitting diode LED2, and the third light emitting diode LED3, respectively, to drive the first light emitting diode LED1, the second light emitting diode LED2, and the third light emitting diode LED3.

[0106] The semiconductor layer ACT may be disposed on the buffer layer 201 and may include polycrystalline silicon. In another embodiment, the semiconductor layer ACT may include amorphous silicon. In another embodiment, the semiconductor layer ACT may include an oxide of at least one of indium (In), gallium (Ga), tin (Sn), zirconium (Zr), vanadium (V), hafnium (Hf), cadmium (Cd), germanium (Ge), chromium (Cr), titanium (Ti), and zinc (Zn). The semiconductor layer ACT may include a channel region and a source region and a drain region doped with impurities.

[0107] The gate electrode GE, the source electrode SE, and the drain electrode DE may include a conductive material. The gate electrode GE may include at least one of molybdenum, aluminum, copper, and titanium. For example, the gate electrode GE may be a single molybdenum layer or a three-layer structure including a molybdenum layer, an aluminum layer, and a molybdenum layer. The source electrode SE and the drain electrode DE may each include at least one of copper, titanium, and aluminum. For example, the source electrode SE and the drain electrode DE may each have a three-layer structure including a titanium layer, an aluminum layer, and a titanium layer.

[0108] In order to ensure insulation between the semiconductor layer ACT and the gate electrode GE, a gate insulating layer 203 including an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride may be positioned between the semiconductor layer ACT and the gate electrode GE. In an embodiment, an interlayer insulating layer 205 including an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride may be provided above the gate electrode GE, and the source electrode SE and the drain electrode DE may be provided on the interlayer insulating layer 205 described above. The insulating film including the inorganic material described above may be formed by chemical vapor deposition (CVD) or atomic layer deposition (ALD).

[0109] A via insulating layer 207 may be provided on the thin film transistor TFT. The via insulating layer 207 may be provided on the interlayer insulating layer 205. The via insulating layer 207 may substantially planarize an upper portion of the thin film transistor TFT.

[0110] The via insulating layer 207 may have (or define) a groove 207G. The via insulating layer 207 may have a region having a concave shape toward the substrate 100. Figure 14 As described, the groove 207G of the via insulating layer 207 may be a region formed by removing a portion of the via insulating layer 207 .

[0111] The upper surface of the via insulating layer 207 may include a first surface 207S1 positioned at a relatively low level, a second surface 207S2 positioned at a level higher than the first surface 207S1, and a third surface 207S3 connecting the first surface 207S1 to the second surface 207S2. The third surface 207S3 of the via insulating layer 207 may be inclined from the first surface 207S1 and may be referred to as an inclined surface. The groove 207G of the via insulating layer 207 may be defined by the first surface 207S1 and the third surface 207S3 of the via insulating layer 207.

[0112] The term "horizontal" as used herein may be defined as a vertical level representing the distance between the upper surface of the substrate 100 and the surface of the element in a direction perpendicular to the substrate 100 (e.g., the z direction). In other words, in the case where the level of "X" is lower than the level of "Y", it may mean that the vertical distance between the upper surface of the substrate 100 and "X" is smaller than the vertical distance between the upper surface of the substrate 100 and "Y". In other words, in the case where the level of "X" is higher than the level of "Y", it may mean that the vertical distance between the upper surface of the substrate 100 and "X" is greater than the vertical distance between the upper surface of the substrate 100 and "Y". In the case where the level of "X" is substantially the same as the level of "Y", it may mean that the vertical distance between the upper surface of the substrate 100 and "X" is substantially the same as the vertical distance between the upper surface of the substrate 100 and "Y". For example, a distance D2 between the upper surface of the substrate 100 and the second surface 207S2 of the via insulating layer 207 may be greater than a distance D1 between the upper surface of the substrate 100 and the first surface 207S1 of the via insulating layer 207 .

[0113] In an embodiment, the inclination angle of the surface of the via insulating layer 207 where the groove 207G is formed may be in a range of about 20° to about 40°. In an embodiment, the angle θ between the first surface 207S1 and the third surface 207S3 of the via insulating layer 207 may be in a range of about 20° to about 40°. In an embodiment, the angle θ between the first surface 207S1 and the third surface 207S3 of the via insulating layer 207 may be in a range of about 20° to about 25°. When the angle θ between the first surface 207S1 and the third surface 207S3 of the via insulating layer 207 satisfies the above range, the first electrode 210 formed on the via insulating layer 207 may have inclined portions 210ab (hereinafter referred to as first-second portions 210ab) having the same or similar angles, and thus, brightness deviation and / or color deviation depending on the viewing angle may be improved. When the angle θ between the first surface 207S1 and the third surface 207S3 of the via insulating layer 207 is less than about 20°, luminance deviation and / or color deviation depending on the viewing angle may increase. When the angle θ between the first surface 207S1 and the third surface 207S3 of the via insulating layer 207 exceeds about 40°, front light efficiency of the display device 1 may decrease.

[0114] In an embodiment, the via insulating layer 207 may include an organic material, such as a general polymer (such as polystyrene (PS) and poly(methyl methacrylate) (PMMA)), polycarbonate (PC), benzocyclobutene (BCB), hexamethyldisiloxane (HMDSO), a polymer derivative having a phenol group, an acrylic polymer, an imide polymer (such as a polyimide including photosensitive polyimide (PSPI)), an aryl ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, or a vinyl alcohol polymer. Figure 5 It is illustrated that the via insulating layer 207 includes a single layer. However, the present disclosure is not limited thereto, and the via insulating layer 207 may include a plurality of layers.

[0115] The first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3 can be disposed on the via insulating layer 207. Each of the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3 may include a first electrode, an intermediate layer on the first electrode, and a second electrode on the intermediate layer. For example, the first electrode may be an anode electrode, and the second electrode may be a cathode electrode, but the present disclosure is not limited thereto. In another embodiment, the first electrode may be a cathode electrode, and the second electrode may be an anode electrode. In an embodiment, each of the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3 may further include a light scattering layer 215 and a light-transmitting conductive layer 218.

[0116] The first light-emitting diode LED1 may include a first-first electrode 210, a first intermediate layer 220, and a second electrode 230, and the first intermediate layer 220 may include a first common layer 221, a first emission layer 222, and a second common layer 223. The second light-emitting diode LED2 may include first-second electrodes 210′, a second intermediate layer 220′, and a second electrode 230, and the second intermediate layer 220′ may include a first common layer 221, a second emission layer 222′, and a second common layer 223. The third light-emitting diode LED3 may include first-third electrodes 210″, a third intermediate layer 220″, and a second electrode 230, and the third intermediate layer 220″ may include a first common layer 221, a third emission layer 222″, and a second common layer 223.

[0117] Hereinafter, description is made based on the first light emitting diode LED1 included in the first pixel P1, and since the second light emitting diode LED2 included in the second pixel P2 and the third light emitting diode LED3 included in the third pixel P3 have substantially the same stacking structure as the first light emitting diode LED1, redundant descriptions thereof are omitted.

[0118] The first light emitting diode LED1 (hereinafter referred to as “light emitting diode LED”) may include a first electrode 210 (hereinafter referred to as “first electrode 210 ”), a first intermediate layer 220 (hereinafter referred to as “intermediate layer 220 ”), and a second electrode 230 .

[0119] The first electrode 210 may be provided on the via insulating layer 207. The first electrode 210 may be provided in each pixel. The first electrodes 210 corresponding to adjacent pixels may be provided to be spaced apart from each other.

[0120] The first electrode 210 may include a first portion 210a overlapping the groove 207G of the via insulating layer 207 in a first region R1 in a plan view, and a second portion 210b disposed outside the groove 207G of the via insulating layer 207 in a second region R2. The first portion 210a of the first electrode 210 may be disposed at the center of each light emitting diode LED and may be referred to as a central portion, and the second portion 210b of the first electrode 210 may be referred to as a peripheral portion.

[0121] The first portion 210a of the first electrode 210 may be disposed in the groove 207G of the via insulating layer 207. The second portion 210b of the first electrode 210 may extend from the first portion 210a and may be disposed outside the groove 207G of the via insulating layer 207. The first portion 210a of the first electrode 210 may be disposed at the center of the light emitting diode LED, and the second portion 210b of the first electrode 210 may surround the first portion 210a in a plan view.

[0122] The first portion 210 a of the first electrode 210 may be disposed on the first surface 207S 1 and the third surface 207S 3 of the via insulating layer 207 . The second portion 210 b of the first electrode 210 may be disposed on the second surface 207S 2 of the via insulating layer 207 .

[0123] The first portion 210a of the first electrode 210 may include a first-first portion 210aa disposed on the first surface 207S1 and a first-second portion 210ab disposed on the third surface 207S3. The first-first portion 210aa of the first electrode 210 may be a flat portion having a substantially flat upper surface, and the first-second portion 210ab may be an inclined portion inclined from the first-first portion 210aa. Since the first electrode 210 includes the first-second portion 210ab as an inclined portion, luminance deviation and / or color deviation depending on the viewing angle may be improved.

[0124] The tilt angle between the first-first portion 210aa and the first-second portion 210ab of the first electrode 210 may be in a range of about 20° to about 40°. In an embodiment, the tilt angle between the first-first portion 210aa and the first-second portion 210ab of the first electrode 210 may be in a range of about 20° to about 25°.

[0125] The first electrode 210 may have a stepped structure. In an embodiment, the upper surface of the second portion 210b of the first electrode 210 may be disposed at a higher level than the upper surface of the first-first portion 210aa of the first electrode 210. For example, the second portion 210b of the first electrode 210 may be connected to the first-first portion 210aa of the first electrode 210 via the first-second portion 210ab, which is an inclined portion of the first electrode 210. In other words, the first-second portion 210ab of the first electrode 210 may be disposed between the first-first portion 210aa and the second portion 210b of the first electrode 210, and may connect the first-first portion 210aa of the first electrode 210 to the second portion 210b.

[0126] For example, the distance between the substrate 100 and the first portion 210a of the first electrode 210 may be smaller than the distance between the substrate 100 and the second portion 210b of the first electrode 210. For example, the distance between the upper surface of the substrate 100 and the lowermost surface of the first portion 210a of the first electrode 210 may be smaller than the distance between the upper surface of the substrate 100 and the lowermost surface of the second portion 210b of the first electrode 210. Herein, the distance between A and B may be defined as the shortest vertical distance between A and B.

[0127] For example, the upper surface of the second portion 210b of the first electrode 210 may be disposed at a higher level than the upper surface of the first-first portion 210aa. In other words, the distance D4 between the upper surface of the substrate 100 and the upper surface of the second portion 210b of the first electrode 210 may be greater than the distance D3 between the upper surface of the substrate 100 and the upper surface of the first-first portion 210aa of the first electrode 210.

[0128] The first electrode 210 may be a reflective electrode. The first electrode 210 may include a reflective film comprising silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr) and compounds thereof. In an embodiment, the first electrode 210 may further include a transparent or translucent conductive layer formed on at least one of the upper and lower portions of the reflective film. The transparent or translucent conductive layer may include at least one of indium tin oxide (ITO), indium zinc oxide (IZO), indium oxide (In2O3), indium gallium oxide (IGO) and aluminum zinc oxide (AZO). For example, the first electrode 210 may have a stacked structure of ITO / Ag / ITO.

[0129] The light scattering layer 215 may be disposed in the first region R1. The light scattering layer 215 may overlap with the groove 207G of the via-hole insulating layer 207 in a plan view. The light scattering layer 215 may not overlap with the second region R2. In an embodiment, the light scattering layer 215 may be disposed in the groove 207G of the via-hole insulating layer 207. For example, the light scattering layer 215 may be disposed to fill the groove 207G of the via-hole insulating layer 207. Figure 6 The light scattering layer 215 is shown to have a substantially flat upper surface. However, the present disclosure is not limited thereto. For example, the upper surface of the light scattering layer 215 may have a convex shape at the center.

[0130] The light scattering layer 215 may include an organic material 215a and scatterers 215b dispersed in the organic material 215a. The organic material 215a of the light scattering layer 215 may be, for example, photosensitive polyimide (PSPI). The scatterers 215b included in the light scattering layer 215 may be metal oxide particles. For example, the scatterers 215b may include metal oxide particles such as titanium oxide (TiO2), ZnO, or tin oxide (SnO2). The size and concentration of the scatterers 215b may vary depending on the embodiment.

[0131] The light scattering layer 215 can scatter light through the scatterers 215b dispersed in the organic material 215a, thereby improving the light efficiency toward the front. For example, the light scattering layer 215 can recirculate light through surface plasmon resonance and / or recirculate light through a waveguide, thereby improving the light efficiency toward the front.

[0132] The thickness TH of the light scattering layer 215 may be in the range of about 1.5 μm to about 4 μm. Figures 10 to 12As described above, when the thickness TH of the light scattering layer 215 is less than about 1.5 μm, the brightness deviation depending on the viewing angle may increase. When the thickness TH of the light scattering layer 215 is less than 1.5 μm, the color deviation depending on the viewing angle may increase. When the thickness TH of the light scattering layer 215 exceeds 4 μm, the pixel shrinkage problem may occur due to degassing.

[0133] In the first region R1, while the characteristics depending on the viewing angle are improved by including the inclined portion 210ab of the first electrode 210, light efficiency toward the front may be reduced without including the light scattering layer 215. In an embodiment, the light scattering layer 215 may be formed on the first portion 210a of the first electrode 210 in the first region R1, thereby improving the characteristics depending on the viewing angle and improving light efficiency toward the front.

[0134] In the second region R2, where the light scattering layer 215 is not provided, light can be reflected by the first electrode 210, thereby causing a light resonance effect. In the first region R1, the first light-emitting diode LED1 may include the light scattering layer 215 between the first electrode 210 and the first intermediate layer 220, so that the light resonance effect does not occur. Therefore, the first region R1 can be referred to as a non-resonance region, and the second region R2 can be referred to as a resonant region. In the second region R2 of the light-emitting diode LED, a light resonance effect can occur, and thus, light efficiency toward the front can be increased.

[0135] When the light scattering layer 215 is provided throughout the entire light emitting diode (LED) and no light resonance effect occurs, the front light efficiency may be reduced. In an embodiment, the first region R1 as a non-resonance region and the second region R2 as a resonance region may be included simultaneously to improve the brightness deviation and / or color deviation depending on the viewing angle and improve the light efficiency toward the front.

[0136] According to the embodiment, the area of ​​the first region R1 and the area of ​​the second region R2 may be modified differently. Figure 4 and Figure 6 As shown in FIG, in a plan view, the area of ​​the first region R1 may be smaller than the area of ​​the second region R2. In other words, the area of ​​the region where the light-emitting region overlaps with the groove 207G of the via-hole insulating layer 207 may be smaller than the area of ​​the region where the light-emitting region does not overlap with the groove 207G of the via-hole insulating layer 207. The area of ​​the first portion 210a of the first electrode 210 may be smaller than the area of ​​the second portion 210b of the first electrode 210 exposed by the pixel opening 209OP defined in the pixel-defining layer 209. For example, the area of ​​the first region R1 may be in a range of approximately 20% to approximately 50% of the first light-emitting region EA1.

[0137] The light-transmitting conductive layer 218 may be provided in each pixel. The light-transmitting conductive layer 218 may be provided in a region corresponding to each first electrode 210. The light-transmitting conductive layers 218 corresponding to adjacent pixels may be provided to be spaced apart from each other.

[0138] The light-transmitting conductive layer 218 may be disposed in the first region R1 and the second region R2. In a plan view, the light-transmitting conductive layer 218 may overlap with the groove 207G of the via insulating layer 207 and may overlap with an area outside the groove 207G. The light-transmitting conductive layer 218 may be disposed on the light-scattering layer 215. The light-transmitting conductive layer 218 may be disposed on the light-scattering layer 215 in the first region R1 and on the first electrode 210 in the second region R2. For example, the light-transmitting conductive layer 218 may contact the light-scattering layer 215 in the first region R1 and contact the first electrode 210 in the second region R2. A portion of the light-transmitting conductive layer 218 may be disposed between the light-scattering layer 215 and the intermediate layer 220 in the first region R1, and the remaining portion of the light-transmitting conductive layer 218 may be disposed between the second portion 210b of the first electrode 210 and the intermediate layer 220 in the second region R2. In other words, the light-transmitting conductive layer 218 may be disposed between the light scattering layer 215 and the first emission layer 222 in the first region R1 and between the second portion 210 b of the first electrode 210 and the first emission layer 222 in the second region R2.

[0139] The light-transmitting conductive layer 218 may include an inorganic material. For example, the light-transmitting conductive layer 218 may include an inorganic material such as a metal or a metal oxide. For example, the light-transmitting conductive layer 218 may be transparent or translucent. For example, the light-transmitting conductive layer 218 may include at least one of ITO, IZO, ZnO, In2O3, IGO, and AZO.

[0140] Although the light-transmitting conductive layer 218 is shown as comprising a single layer, the present disclosure is not limited thereto. For example, the light-transmitting conductive layer 218 may comprise two or more layers comprising inorganic materials. For example, the light-transmitting conductive layer 218 may comprise a first inorganic layer and a second inorganic layer on the first inorganic layer. For example, each of the first inorganic layer and the second inorganic layer may comprise at least one of ITO, IZO, ZnO, In2O3, IGO, and AZO. For example, the light-transmitting conductive layer 218 may comprise a first inorganic layer comprising ITO and a second inorganic layer comprising IZO.

[0141] The pixel-defining layer 209 may be disposed on the light-transmitting conductive layer 218. The pixel-defining layer 209 may have a pixel opening 209OP that exposes the central portion of each light-transmitting conductive layer 218. The pixel-defining layer 209 may cover the edge of the light-transmitting conductive layer 218. The pixel opening 209OP defined in the pixel-defining layer 209 may overlap with the groove 207G of the via insulating layer 207 in a plan view. The width of the pixel opening 209OP defined in the pixel-defining layer 209 may be greater than the width of the groove 207G of the via insulating layer 207.

[0142] The pixel defining layer 209 may include an organic insulating material. In another embodiment, the pixel defining layer 209 may include an inorganic insulating material, such as silicon nitride (SiN x ) or silicon oxide (SiO2). In some embodiments, the pixel defining layer 209 may include an organic insulating material and an inorganic insulating material.

[0143] The pixel defining layer 209 may include a light-blocking material. For example, the light-blocking material of the pixel defining layer 209 may be black. The light-blocking material may include carbon black, carbon nanotubes, a resin or paste containing a black dye, metal particles (such as Ni, Al, Mo and alloys thereof), metal oxide particles or metal nitride particles. In the case where the pixel defining layer 209 includes a light-blocking material, the reflection of external light by the metal structure disposed below the pixel defining layer 209 may be reduced. However, the present disclosure is not limited thereto. In another embodiment, the pixel defining layer 209 may not include a light-blocking material, but may include a light-transmitting organic insulating material.

[0144] The spacer 211 may be disposed on the pixel defining layer 209. The spacer 211 may include an organic insulating material such as polyimide. In another embodiment, the spacer 211 may include an organic insulating material such as silicon nitride (SiN x ) or an inorganic insulating material of silicon oxide (SiO2), or may include an organic insulating material and an inorganic insulating material.

[0145] In an embodiment, the spacer 211 and the pixel defining layer 209 may include the same material. The pixel defining layer 209 and the spacer 211 may be formed together in a mask process using a half-tone mask, etc. In another embodiment, the spacer 211 and the pixel defining layer 209 may include different materials.

[0146] The intermediate layer 220 may be disposed on the first electrode 210. The intermediate layer 220 may be disposed on the light scattering layer 215 and the light-transmitting conductive layer 218. The intermediate layer 220 may be disposed on the pixel defining layer 209. At least a portion of the intermediate layer 220 may be disposed in the pixel opening 209OP defined in the pixel defining layer 209. The intermediate layer 220 may include a first common layer 221, an emission layer 222 (i.e., a first emission layer 222), and a second common layer 223.

[0147] The emission layer 222 can be arranged in the pixel opening 209OP defined in the pixel defining layer 209. The emission layer 222 may include an organic material, and the organic material includes a fluorescent or phosphorescent material that can emit blue light, green light or red light. The organic material described above may be a low molecular weight organic material or a polymer organic material. In another embodiment, the emission layer 222 may include an inorganic material containing quantum dots. Quantum dots may be crystals of semiconductor compounds and may include materials that can emit light of various emission wavelengths depending on the size of the crystals. Quantum dots may include, for example, III-VI semiconductor compounds, II-VI semiconductor compounds, III-V semiconductor compounds, I-III-VI semiconductor compounds, IV-VI semiconductor compounds, IV elements or compounds, or combinations thereof.

[0148] The first common layer 221 and the second common layer 223 may be disposed below and above the emission layer 222, respectively. For example, the first common layer 221 may include a hole transport layer (HTL), or may include an HTL and a hole injection layer (HIL). For example, the second common layer 223 may include an electron transport layer (ETL), or may include an ETL and an electron injection layer (EIL). In an embodiment, the second common layer 223 may not be provided.

[0149] Although the emission layer 222 is provided in each pixel to correspond to the pixel opening 209OP defined in the pixel defining layer 209, each of the first common layer 221 and the second common layer 223 may be formed to cover the entire area of ​​the substrate 100. In other words, each of the first common layer 221 and the second common layer 223 may be formed to completely cover the display area DA of the substrate 100.

[0150] The second electrode 230 may include a conductive material having a low work function. For example, the second electrode 230 may include a (semi-) transparent layer containing Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, lithium (Li), calcium (Ca), ytterbium (Yb) or an alloy thereof. For example, the second electrode 230 may include magnesium silver (AgMg) or silver ytterbium (AgYb). In an embodiment, the second electrode 230 may further include a layer containing ITO, IZO, ZnO or In2O3 above the (semi-) transparent layer containing the above materials. The layers from the first electrode 210 to the second electrode 230 may form a light-emitting diode (LED).

[0151] The encapsulation layer 300 may be disposed on the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3. The encapsulation layer 300 may include at least one inorganic film layer and at least one organic film layer. For example, the encapsulation layer 300 may include a first inorganic encapsulation layer 310, an organic encapsulation layer 320, and a second inorganic encapsulation layer 330 stacked sequentially.

[0152] The first inorganic encapsulation layer 310 and the second inorganic encapsulation layer 330 may each include an inorganic insulating material such as SiO2, SiN x , silicon oxynitride (SiON), Al2O3, TiO2, tantalum oxide (Ta2O5), hafnium oxide (HfO2), or ZnO. The first inorganic encapsulating layer 310 and the second inorganic encapsulating layer 330 may each have a single-layer or multi-layer structure including the inorganic insulating material described above.

[0153] The organic encapsulation layer 320 can reduce the internal stress of the first inorganic encapsulation layer 310 and / or the second inorganic encapsulation layer 330. The organic encapsulation layer 320 may include a polymer material. The polymer material may include polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyimide, polyethylene sulfonate, polyoxymethylene, polyarylate, hexamethyldisiloxane, acrylic resin (e.g., poly(methyl methacrylate) or polyacrylic acid), or a combination thereof.

[0154] The organic encapsulating layer 320 may have fluidity and may be formed by applying a material including monomers and reacting the monomers to form a polymer by using heat or light such as ultraviolet rays. In another embodiment, the organic encapsulating layer 320 may be formed by applying a polymer material.

[0155] The touch sensing layer 400 may be provided on the encapsulation layer 300. The touch sensing layer 400 may include a first conductive layer MTL1, a first touch insulating layer 410, a second conductive layer MTL2, and a second touch insulating layer 420. The first conductive layer MTL1 may be provided (e.g., directly provided) on the encapsulation layer 300, and the first conductive layer MTL1 may be provided (e.g., directly provided) on the second inorganic encapsulation layer 330 of the encapsulation layer 300. However, the present disclosure is not limited thereto.

[0156] In an embodiment, the touch sensing layer 400 may include an insulating film (not shown) between the first conductive layer MTL1 and the encapsulation layer 300. The insulating film may be provided on the second inorganic encapsulation layer 330 of the encapsulation layer 300 to flatten the surface on which the first conductive layer MTL1 is provided, and the first conductive layer MTL1 may be provided (e.g., directly provided) on the insulating film. The insulating film may include, for example, SiO2, SiN x In another embodiment, the insulating film may include an organic insulating material.

[0157] In an embodiment, the first touch insulating layer 410 may be disposed on the first conductive layer MTL1. The first touch insulating layer 410 may include an inorganic material or an organic material. When the first touch insulating layer 410 includes an inorganic material, the first touch insulating layer 410 may include at least one of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, cerium oxide, and silicon oxynitride. When the first touch insulating layer 410 includes an organic material, the first touch insulating layer 410 may include at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, and perylene resin.

[0158] In an embodiment, the second conductive layer MTL2 may be provided on the first touch insulating layer 410. The second conductive layer MTL2 may function as a sensor for detecting a user's touch input. The first conductive layer MTL1 may function as a connection portion for connecting the patterned second conductive layer MTL2 in one direction. In an embodiment, both the first conductive layer MTL1 and the second conductive layer MTL2 may function as sensors, and the first conductive layer MTL1 and the second conductive layer MTL2 may be electrically connected via the contact hole CH. As described above, since both the first conductive layer MTL1 and the second conductive layer MTL2 function as sensors, the resistance of the touch electrode may be reduced, and thus, the user's touch input may be quickly detected.

[0159] In embodiments, the first conductive layer MTL1 and the second conductive layer MTL2 may have, for example, a mesh structure so that light emitted from the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3 can pass through the first conductive layer MTL1 and the second conductive layer MTL2. In embodiments, the first conductive layer MTL1 and the second conductive layer MTL2 may be arranged so as not to overlap with any of the first light-emitting area EA1 of the first light-emitting diode LED1, the second light-emitting area EA2 of the second light-emitting diode LED2, and the third light-emitting area EA3 of the third light-emitting diode LED3.

[0160] The first conductive layer MTL1 and the second conductive layer MTL2 may include a metal layer and a transparent conductive layer. The metal layer may include at least one of Mo, Ag, Ti, Cu, Al, and alloys thereof. The transparent conductive layer may include a transparent conductive oxide such as ITO, IZO, ZnO, or indium tin zinc oxide (ITZO). In an embodiment, the transparent conductive layer may include a conductive polymer such as poly(3,4-ethylenedioxythiophene) (PEDOT), metal nanowires, carbon nanotubes, or graphene.

[0161] In an embodiment, the second touch insulating layer 420 may be disposed on the second conductive layer MTL2. The second touch insulating layer 420 may include an inorganic material or an organic material. When the second touch insulating layer 420 includes an inorganic material, the second touch insulating layer 420 may include at least one of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, titanium oxide, tin oxide, cerium oxide, and silicon oxynitride. When the second touch insulating layer 420 includes an organic material, the second touch insulating layer 420 may include at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, and perylene resin.

[0162] In another embodiment, the touch sensing layer 400 may include a first conductive layer MTL1, a first touch insulating layer 410, and a second conductive layer MTL2, but may not include a second touch insulating layer 420. The light shielding layer 510 may have a structure covering the second conductive layer MTL2, and a portion of the first touch insulating layer 410 may be exposed through an opening 510OP defined in the light shielding layer 510.

[0163] The anti-reflection layer 500 may be disposed on the touch sensing layer 400. The anti-reflection layer 500 may include a light shielding layer 510 and a color filter layer 521. In an embodiment, the anti-reflection layer 500 may further include a light shielding layer 510 and an overcoat layer 525 disposed on the color filter layer 521.

[0164] The light shielding layer 510 may include a material capable of blocking light. For example, the light shielding layer 510 may include an organic material with a high light absorption rate. The light shielding layer 510 may include a black pigment or a black dye. The light shielding layer 510 may include a photosensitive organic material and may include, for example, a colorant (such as a pigment or dye).

[0165] The light shielding layer 510 may have an opening 510OP that overlaps with each of the first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 in a plan view. The opening 510OP defined in the light shielding layer 510 may include a first opening 510OP1, a second opening 510OP2, and a third opening 510OP3 corresponding to the first light emitting diode LED1, the second light emitting diode LED2, and the third light emitting diode LED3, respectively. The first light emitting area EA1, the second light emitting area EA2, and the third light emitting area EA3 may be defined by the pixel opening 209OP defined in the pixel defining layer 209. In an embodiment, the opening 510OP defined in the light shielding layer 510 may overlap with the pixel opening 209OP defined in the pixel defining layer 209, and the width of the opening 510OP defined in the light shielding layer 510 may be greater than the width of the pixel opening 209OP defined in the pixel defining layer 209.

[0166] In a plan view, the main portion of the light shielding layer 510 in which the opening 510OP is provided may overlap with the main portion of the pixel defining layer 209. For example, the main portion of the light shielding layer 510 may overlap only with the main portion of the pixel defining layer 209. The main portion of the light shielding layer 510 may be a portion distinguished from the opening 510OP defined in the light shielding layer 510, and may refer to a portion having a specific volume (thickness). Similarly, the main portion of the pixel defining layer 209 may be a portion distinguished from the pixel opening 209OP defined in the pixel defining layer 209, and may refer to a portion having a specific volume.

[0167] The color filter layer 521 may include color filters 521 a , 521 b , and 521 c of different colors corresponding to the first light emitting diode LED1 , the second light emitting diode LED2 , and the third light emitting diode LED3 , respectively.

[0168] In an embodiment, the first color filter 521a, the second color filter 521b, and the third color filter 521c may be respectively disposed in the first opening 510OP1, the second opening 510OP2, and the third opening 510OP3 defined in the light shielding layer 510. In an embodiment, the first color filter 521a, the second color filter 521b, and the third color filter 521c may have colors corresponding to the light emitted from the first light-emitting diode LED1, the second light-emitting diode LED2, and the third light-emitting diode LED3, respectively. In an embodiment, if the first light-emitting diode LED1 emits red light, the first color filter 521a may be a red filter, if the second light-emitting diode LED2 emits green light, the second color filter 521b may be a green filter, and if the third light-emitting diode LED3 emits blue light, the third color filter 521c may be a blue filter. The light shielding layer 510 may be disposed between adjacent color filters and may surround the edges of each of the pixels P1, P2, and P3 in a plan view.

[0169] The overcoat 525 may be disposed on the light shielding layer 510 and the color filter layer 521. The overcoat 525 may be a colorless, light-transmitting layer that does not have a color in the visible light band and may flatten the upper surface of the light shielding layer 510 and the upper surface of the color filter layer 521. The overcoat 525 may include a colorless, light-transmitting organic material such as an acrylic resin and may be covered by a window (not shown). The window may include a transparent (light-transmitting) material. For example, the window may include a glass substrate or a polymer substrate.

[0170] In the display device 1 described below, Figures 4 to 6 The same reference numerals as those in the drawings denote the same components, and thus, redundant descriptions thereof are omitted, and only differences are described.

[0171] Figure 7 FIG. 1 is a diagram showing a display device 1 according to another embodiment (see FIG. Figure 3 ) is a schematic plan view of a portion of a pixel arrangement in a display area DA of . Figure 8 According to another embodiment Figure 5 Schematic enlargement of area B.

[0172] refer to Figure 7 and Figure 8, the area of ​​the first region R1 in a plan view may be greater than the area of ​​the second region R2 in a plan view. In other words, the area of ​​the region where the light-emitting region overlaps with the groove 207G of the via-hole insulating layer 207 may be greater than the area of ​​the region where the light-emitting region does not overlap with the groove 207G of the via-hole insulating layer 207. The area of ​​the first portion 210a of the first electrode 210 may be greater than the area of ​​the second portion 210b of the first electrode 210 exposed by the pixel opening 209OP defined in the pixel defining layer 209.

[0173] For example, the area of ​​the first region R1 may be greater than about 50% to about 80% of the first light emitting area EA1. In products that need to improve brightness deviation and color deviation depending on the viewing angle, the area of ​​the first region R1 may be formed to be greater than the area of ​​the second region R2.

[0174] Figure 9 According to another embodiment Figure 5 Schematic enlargement of area B.

[0175] refer to Figure 9 , display device 1 (see Figure 3 ) may further include an insulating pattern 217 on the via insulating layer 207. The insulating pattern 217 may overlap the pixel defining layer 209 in a plan view.

[0176] The first electrode 210 may include a first portion 210a overlapping the groove 207G of the via insulating layer 207 in the first region R1, a second portion 210b disposed outside the groove 207G of the via insulating layer 207 in the second region R2, and a third portion 210c extending from the second portion 210b and having at least a portion disposed on a side surface of the insulating pattern 217. In an embodiment, the third portion 210c of the first electrode 210 may be disposed on the side surface and the upper surface of the insulating pattern 217.

[0177] The first portion 210a of the first electrode 210 may include a first-first portion 210aa disposed on the first surface 207S1 and a first-second portion 210ab disposed on the third surface 207S3. The first-first portion 210aa of the first electrode 210 may be a flat portion having a substantially flat upper surface, and the first-second portion 210ab may be referred to as a first inclined portion inclined from the first-first portion 210aa. A portion of the third portion 210c of the first electrode 210 disposed on the side surface of the insulating pattern 217 may be referred to as a second inclined portion. In embodiments, the first electrode 210 may further include a second inclined portion, thereby improving light efficiency by utilizing light recycling performed by a waveguide.

[0178] Figure 10 : is a schematic graph showing a luminance ratio depending on a viewing angle in a comparative example and an example in which a pixel emitting red light is included. Figure 11 : is a schematic graph showing a luminance ratio depending on a viewing angle in a comparative example and an example in which a pixel emitting green light is included. Figure 12 : is a schematic graph showing the luminance ratio depending on the viewing angle in the comparative example and the example including a pixel emitting blue light. Figures 10 to 12 In Comparative Example 1, the light-emitting diode of the pixel may not include a light scattering layer, in Examples 1 and 2, the light-emitting diode of the pixel may include a light scattering layer having a thickness of approximately 1.5 μm, and in Examples 3 and 4, the light-emitting diode of the pixel may include a light scattering layer having a thickness of approximately 1 μm.

[0179] refer to Figures 10 to 12 , it can be seen that the luminance deviation depending on the viewing angle is improved in Examples 1 to 4 compared to Comparative Example 1 which does not include a light scattering layer. Figure 10 As shown in , as in Examples 3 and 4, in pixels emitting red light, in the case where the thickness of the light scattering layer is about 1 μm, it can be seen that the luminance ratio at a high viewing angle is greatly reduced. Figure 11 As shown in , as in Examples 3 and 4, in the pixel emitting green light, in the case where the thickness of the light scattering layer is about 1 μm, it can be seen that the luminance ratio at a high viewing angle is relatively reduced. Figure 12 As shown in , as in Examples 3 and 4, in the pixel emitting blue light, in the case where the thickness of the light scattering layer is about 1 μm, it can be seen that the luminance ratio at a high viewing angle increases. On the other hand, in Figures 10 to 12 In each of the figures, as shown in Examples 1 and 2, when the thickness of the light scattering layer is about 1.5 μm, it can be seen that the luminance deviation at low and high viewing angles is not large. Therefore, when the thickness of the light scattering layer is formed to be about 1.5 μm or more, the luminance deviation can be greatly improved.

[0180] Figures 13 to 19 is a schematic cross-sectional view illustrating a method of manufacturing a display device according to an embodiment.

[0181] Figure 13 Schematically shown in Figure 5 A method for manufacturing a display device in a corresponding area. Figures 14 to 19 Schematically shown in Figure 5 A method for manufacturing a display device in an area corresponding to area B.

[0182] refer to Figure 13, a substrate 100 may be formed, and a pixel circuit layer PCL including a thin film transistor TFT and an insulating layer may be formed on the substrate 100. A via insulating layer 207 may be formed on the pixel circuit layer PCL.

[0183] In an embodiment, a buffer layer 201 on the substrate 100, a semiconductor layer ACT on the buffer layer 201, a gate insulating layer 203 on the semiconductor layer ACT, a gate electrode GE on the gate insulating layer 203, an interlayer insulating layer 205 on the gate electrode GE, and a source electrode SE and a drain electrode DE on the interlayer insulating layer 205 can be sequentially formed.

[0184] A via insulating layer 207 may be formed on the thin film transistor TFT. The via insulating layer 207 may be formed on the interlayer insulating layer 205 to cover the thin film transistor TFT. The via insulating layer 207 may be formed to cover the source electrode SE and the drain electrode DE.

[0185] In an embodiment, the via insulating layer 207 may be formed by applying an organic material such as a general polymer (such as PS and PMMA), PC, BCB, HMDSO, a polymer derivative having a phenolic group, an acrylic polymer, an imide polymer (such as polyimide including PSPI), an aryl ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, or a vinyl alcohol polymer. In an embodiment, in order to provide a flat upper surface of the via insulating layer 207, chemical and mechanical polishing may be performed on the upper surface of the via insulating layer 207 after applying the organic material.

[0186] refer to Figure 14 , the groove 207G can be formed by removing a portion of the via insulating layer 207. In an embodiment, when the via insulating layer 207 includes a photosensitive material, the portion of the via insulating layer 207 can be removed by a photolithography process. In another embodiment, the portion of the via insulating layer 207 can be removed by an etching process.

[0187] By removing a portion of the via insulating layer 207, the upper surface of the via insulating layer 207 may be formed to include a first surface 207S1 positioned at a relatively low level, a second surface 207S2 positioned at a higher level than the first surface 207S1, and a third surface 207S3 connecting the first surface 207S1 and the second surface 207S2 to each other. The groove 207G of the via insulating layer 207 may be defined by the first surface 207S1 and the third surface 207S3 of the via insulating layer 207. Therefore, the distance D2 between the upper surface of the substrate 100 and the second surface 207S2 of the via insulating layer 207 may be greater than the distance D1 between the upper surface of the substrate 100 and the first surface 207S1 of the via insulating layer 207.

[0188] In an embodiment, the inclination angle of the surface of the groove 207G forming the via insulating layer 207 may be formed in a range of about 20° to about 40°. For example, the angle θ between the first surface 207S1 and the third surface 207S3 of the via insulating layer 207 may be formed in a range of about 20° to about 40°.

[0189] refer to Figure 5 and Figure 14 , a portion of the via insulating layer 207 may be removed to form a contact hole that passes through the via insulating layer 207 and connects the thin film transistor TFT to the first electrode 210. The contact hole may be formed in the via insulating layer 207 at the same time as the groove 207G is formed on the via insulating layer 207, or may be formed sequentially with the groove 207G being formed on the via insulating layer 207. For example, the contact hole may be formed in the via insulating layer 207 after the groove 207G is formed on the via insulating layer 207, or the groove 207G may be formed in the via insulating layer 207 after the contact hole is formed in the via insulating layer 207.

[0190] refer to Figure 15 , a first electrode 210 may be formed on the via insulating layer 207. Figure 5 and Figure 15 , a first electrode 210 may be formed in each pixel. In other words, the first electrodes 210 corresponding to adjacent pixels may be formed to be spaced apart from each other. For example, the first electrode 210 may be formed by depositing a conductive material and removing a portion of the conductive material through an etching process.

[0191] The first electrode 210 may include a first portion 210a disposed in the groove 207G of the via insulating layer 207 and a second portion 210b disposed outside the groove 207G of the via insulating layer 207. The first portion 210a of the first electrode 210 may be disposed on the first surface 207S1 and the third surface 207S3 of the via insulating layer 207. The second portion 210b of the first electrode 210 may be disposed on the second surface 207S2 of the via insulating layer 207. The first portion 210a of the first electrode 210 may include a first-first portion 210aa disposed on the first surface 207S1 and a first-second portion 210ab disposed on the third surface 207S3. The first-first portion 210aa of the first electrode 210 may be a flat portion having a substantially flat upper surface, and the first-second portion 210ab may be an inclined portion inclined from the first-first portion 210aa.

[0192] The first electrode 210 may be formed to have a stepped structure. For example, the upper surface of the second portion 210b of the first electrode 210 may be disposed at a higher level than the upper surface of the first portion 210a of the first electrode 210. For example, the upper surface of the second portion 210b of the first electrode 210 may be disposed at a higher level than the upper surface of the first-first portion 210aa. In other words, the distance D4 between the upper surface of the substrate 100 and the upper surface of the second portion 210b of the first electrode 210 may be greater than the distance D3 between the upper surface of the substrate 100 and the upper surface of the first-first portion 210aa of the first electrode 210.

[0193] refer to Figure 16 , a light scattering layer 215 may be formed on the first portion 210a of the first electrode 210. The light scattering layer 215 may be formed to fill the groove 207G of the via-hole insulating layer 207. In other words, the light scattering layer 215 may be disposed in the groove 207G of the via-hole insulating layer 207. Therefore, the light scattering layer 215 may be disposed so as to overlap with the groove 207G of the via-hole insulating layer 207 in a plan view and may not be disposed outside the groove 207G of the via-hole insulating layer 207. The light scattering layer 215 may be formed to have a substantially flat upper surface. For example, the upper surface of the light scattering layer 215 and the upper surface of the second portion 210b of the first electrode 210 may be formed to be positioned at substantially the same level. In an embodiment, the light scattering layer 215 may be formed to have a raised upper surface in the groove 207G.

[0194] The light scattering layer 215 may include an organic material 215a and scatterers 215b dispersed in the organic material 215a. The organic material 215a of the light scattering layer 215 may include a photosensitive organic material, such as PSPI. The scatterers 215b included in the light scattering layer 215 may be metal oxide particles. For example, the scatterers 215b may include metal oxide particles, such as TiO2, ZnO, or SnO2. The size and concentration of the scatterers 215b may vary depending on the embodiment.

[0195] In an embodiment, the light scattering layer 215 may be formed in the entire display area DA (see FIG. Figure 4 ) and removing a portion of the applied organic material 215a so as to be disposed only in the groove 207G of the via insulating layer 207 and not outside the groove 207G of the via insulating layer 207. For example, a portion of the light scattering layer 215 may be removed by a photolithography process.

[0196] refer to Figure 17 , a light-transmitting conductive layer 218 may be formed on the light scattering layer 215 and the first electrode 210. Figure 5 and Figure 17 , a light-transmitting conductive layer 218 may be formed in each pixel. In other words, the light-transmitting conductive layers 218 corresponding to adjacent pixels may be formed to be spaced apart from each other. For example, the light-transmitting conductive layer 218 may be formed by depositing a conductive material and removing a portion of the conductive material through an etching process.

[0197] The light-transmitting conductive layer 218 may be formed to overlap with the groove 207G of the via insulating layer 207 in a plan view and to overlap with an area outside the groove 207G in a plan view. A portion of the light-transmitting conductive layer 218 may contact the light scattering layer 215, and the remaining portion may be formed to contact the first electrode 210.

[0198] The light-transmitting conductive layer 218 may include an inorganic material. For example, the light-transmitting conductive layer 218 may include an inorganic material such as a metal or a metal oxide. For example, the light-transmitting conductive layer 218 may be transparent or translucent. For example, the light-transmitting conductive layer 218 may include at least one of ITO, IZO, ZnO, In2O3, IGO, and AZO.

[0199] refer to Figure 18 , a pixel defining layer 209 may be formed on the light-transmitting conductive layer 218. After forming the pixel defining layer 209, a portion of the pixel defining layer 209 may be removed to form a pixel opening 209OP, such that the central portion of each light-transmitting conductive layer 218 is exposed. The pixel opening 209OP defined in the pixel defining layer 209 may overlap with the groove 207G of the via insulating layer 207 in a plan view. The width of the pixel opening 209OP defined in the pixel defining layer 209 may be greater than the width of the groove 207G of the via insulating layer 207. The pixel defining layer 209 may cover the edge of the light-transmitting conductive layer 218.

[0200] The pixel defining layer 209 may include an organic insulating material. In another embodiment, the pixel defining layer 209 may include an inorganic insulating material, such as SiN x In some embodiments, the pixel defining layer 209 may include an organic insulating material and an inorganic insulating material.

[0201] The pixel defining layer 209 may include a light-blocking material. For example, the light-blocking material of the pixel defining layer 209 may be black. The light-blocking material may include carbon black, carbon nanotubes, a resin or paste containing a black dye, metal particles (such as Ni, Al, Mo and alloys thereof), metal oxide particles or metal nitride particles. In the case where the pixel defining layer 209 includes a light-blocking material, the reflection of external light by the metal structure disposed below the pixel defining layer 209 may be reduced. However, the present disclosure is not limited thereto. In another embodiment, the pixel defining layer 209 may not include a light-blocking material, but may include a light-transmitting organic insulating material.

[0202] refer to Figure 19 , a light emitting diode (LED) can be formed by sequentially forming an intermediate layer 220 and a second electrode 230 on the light-transmitting conductive layer 218. The intermediate layer 220 may include a first common layer 221, an emission layer 222, and a second common layer 223. Each of the first common layer 221, the second common layer 223, and the second electrode 230 may be integrally formed to cover the entire area of ​​the substrate 100. In other words, the first common layer 221, the second common layer 223, and the second electrode 230 may be formed to be shared by each pixel.

[0203] Reference again Figure 5 A packaging layer 300 for sealing the light emitting diode LED may be formed, a touch sensing layer 400 may be formed on the packaging layer 300 , and an anti-reflection layer 500 may be formed on the touch sensing layer 400 .

[0204] In the light emitting diode or the display device including the light emitting diode according to the embodiment, the luminance deviation and / or color deviation depending on the viewing angle can be improved, and the light efficiency can be improved. However, these effects are only examples, and the scope of the present disclosure is not limited thereto.

[0205] The above description is an example of the technical features of the present disclosure, and those skilled in the art to which the present disclosure pertains will be able to make various modifications and changes. Therefore, the embodiments of the present disclosure described above may be implemented individually or in combination with each other.

[0206] Therefore, the embodiments disclosed in this disclosure are not intended to limit the technical spirit of this disclosure, but to describe the technical spirit of this disclosure, and the scope of the technical spirit of this disclosure is not limited by these embodiments. The scope of protection of this disclosure should be interpreted by the appended claims, and should be interpreted as all technical spirits within the scope of equivalents are included in the scope of this disclosure.

Claims

1. A display device, wherein: The display device includes: a pixel circuit layer, disposed on the substrate and comprising a thin film transistor; a via insulating layer, disposed on the pixel circuit layer and comprising a groove; and A light emitting diode is provided on the via insulating layer, and the light emitting diode includes a first area overlapping with the groove and a second area surrounding the first area in a plan view, wherein The light emitting diode comprises: a first electrode including a first portion disposed in the groove in the first region and a second portion extending from the first portion and disposed in the second region; a light scattering layer disposed on the first portion of the first electrode and comprising a scatterer; a light-transmitting conductive layer, disposed on the light-scattering layer; an emitting layer, disposed on the light-transmitting conductive layer; and a second electrode on the emitting layer, and A distance between the substrate and the first portion of the first electrode is smaller than a distance between the substrate and the second portion of the first electrode.

2. The display device according to claim 1, wherein The upper surface of the via insulating layer includes a first surface, a second surface at a higher level than the first surface, and a third surface connecting the first surface to the second surface, and The first surface of the via insulation layer and the third surface of the via insulation layer define the groove.

3. The display device according to claim 2, wherein: The first portion of the first electrode is disposed on the first surface of the via insulating layer and the third surface of the via insulating layer, and The second portion of the first electrode is disposed on the second surface of the via insulating layer.

4. The display device according to claim 2, wherein An angle between the first surface of the via insulation layer and the third surface of the via insulation layer is in a range of 20° to 40°.

5. The display device according to claim 1, wherein The light scattering layer is disposed in the groove of the via insulating layer. The display device according to claim 1 , wherein: The light-transmitting conductive layer contacts the light scattering layer in the first region, and the light-transmitting conductive layer contacts the first electrode in the second region.

7. The display device according to claim 1, wherein The light-transmitting conductive layer includes a first inorganic layer and a second inorganic layer on the first inorganic layer.

8. The display device according to claim 1, wherein The display device further includes: A pixel defining layer is formed on the light-transmitting conductive layer, wherein the pixel defining layer includes a pixel opening exposing a portion of the light-transmitting conductive layer.

9. The display device according to claim 8, wherein In a plan view, the area of ​​the first region is 20% to 80% of the area of ​​the light emitting region of the light emitting diode defined by the pixel defining layer.

10. The display device according to claim 9, wherein In a plan view, the area of ​​the first region is smaller than the area of ​​the second region.

11. The display device according to claim 9, wherein In a plan view, the area of ​​the first region is larger than the area of ​​the second region.

12. The display device according to claim 8, wherein The display device further includes: an insulating pattern overlapping the pixel defining layer in a plan view and disposed between the via insulating layer and the first electrode, The first electrode further includes a third portion extending from the second portion and disposed on a side surface of the insulation pattern.

13. The display device according to claim 1, wherein The thickness of the light scattering layer is in the range of 1.5 μm to 4 μm.

14. The display device according to claim 1, wherein The display device further includes: an encapsulation layer, disposed on the light emitting diode and encapsulating the light emitting diode; and The color filter layer is arranged on the encapsulation layer.

15. A display device, wherein: The display device includes: a pixel circuit layer, disposed on the substrate and comprising a thin film transistor; a via insulating layer, disposed on the pixel circuit layer and comprising a groove; a first electrode including a first portion disposed in the groove of the via insulating layer and a second portion extending from the first portion and disposed outside the groove; a light scattering layer disposed on the first portion of the first electrode and comprising a scatterer; an emitting layer, disposed on the light scattering layer; a second electrode on the emitting layer; and The light-transmitting conductive portion includes a portion disposed between the light scattering layer and the emitting layer and another portion disposed between the second portion of the first electrode and the emitting layer.

16. The display device according to claim 15, wherein The upper surface of the via insulating layer includes a first surface, a second surface at a higher level than the first surface, and a third surface connecting the first surface to the second surface, and The first surface of the via insulation layer and the third surface of the via insulation layer define the groove.

17. The display device according to claim 16, wherein: The first portion of the first electrode is disposed on the first surface of the via insulating layer and the third surface of the via insulating layer, and The second portion of the first electrode is disposed on the second surface of the via insulating layer.

18. The display device according to claim 16, wherein: An angle between the first surface of the via insulation layer and the third surface of the via insulation layer is in a range of 20° to 40°.

19. The display device according to claim 15, wherein: The display device further includes: A pixel defining layer is disposed on the first electrode and includes a pixel opening exposing a portion of the first electrode.

20. The display device according to claim 19, wherein The display device further includes: an insulating pattern overlapping the pixel defining layer in a plan view and disposed between the via insulating layer and the first electrode, The first electrode further includes a third portion extending from the second portion and disposed on a side surface of the insulation pattern.

21. The display device according to claim 15, wherein The thickness of the light scattering layer is in the range of 1.5 μm to 4 μm.

22. The display device according to claim 15, wherein The display device further includes: an encapsulation layer, disposed on the second electrode; and The color filter layer is arranged on the encapsulation layer.

23. A light emitting diode, wherein: The light emitting diode comprises: a first electrode including a first portion and a second portion, the first portion including a flat portion and an inclined portion, and the second portion surrounding the first portion in a plan view and connected to the flat portion of the first portion through the inclined portion of the first portion; a light scattering layer disposed on the first portion of the first electrode and comprising a scatterer; a light-transmitting conductive layer, disposed on the light-scattering layer; an emitting layer, disposed on the light-transmitting conductive layer; and The second electrode is arranged on the emission layer.

24. The light emitting diode according to claim 23, wherein an upper surface of the second portion is at a higher level than an upper surface of the flat portion of the first portion, and The inclined portion of the first portion is disposed between the flat portion and the second portion and is inclined from the flat portion of the first portion.

25. The light emitting diode according to claim 23, wherein The light-transmitting conductive layer contacts the second portion of the first electrode, and The light scattering layer is disposed between the first portion of the first electrode and the light-transmitting conductive layer.

26. The light emitting diode according to claim 23, wherein The thickness of the light scattering layer is in the range of 1.5 μm to 4 μm.

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