Display substrate and display device

Abstract

The display substrate comprises a display area and a first frame area located on one side of the display area in the first direction. The first frame area comprises a bending area and a first sub-area located between the bending area and the display area. The display area is provided with a first center line extending in the first direction, and the first frame area is provided with a second center line extending in the first direction. A distance between the first centerline and the second centerline is greater than 0. The display substrate comprises a substrate body, a plurality of sub-pixels, a plurality of data lines, a plurality of first data fan-out lines and a plurality of data bending lines, wherein the sub-pixels and the data lines are arranged on one side of the substrate body and located in a display area, the first data fan-out lines are located in a first sub-area, and the data bending lines are located in a bending area. The plurality of data bending lines are symmetrically arranged about the third center line; the third center line coincides with the first center line or coincides with the second center line or is located between the first center line and the second center line.

Description

Technical Field

[0001] This article relates to but is not limited to the field of display technology, and in particular to a display substrate and a display device. Background Art

[0002] With the rapid development of mobile devices and consumer electronics, the demand for larger screen sizes and more portable designs continues to grow. Traditional tablets and smartphones have limited display sizes, and users desire a wider viewing experience in their daily lives. In recent years, large foldable display technology has gained increasing interest. This technology combines the features of flexible and foldable displays, allowing users to adjust the screen size by unfolding or folding it, thereby achieving a larger display area while maintaining portability. Summary of the Invention

[0003] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0004] Embodiments of the present disclosure provide a display substrate and a display device.

[0005] In one aspect, this embodiment provides a display substrate comprising: a display area and a first frame area located on one side of the display area along a first direction; the first frame area comprising a bending area and a first sub-area located between the bending area and the display area; the display area having a first centerline extending along the first direction, and the first frame area having a second centerline extending along the first direction; and a distance between the first centerline and the second centerline being greater than zero. The display substrate comprises: a substrate; a plurality of sub-pixels and a plurality of data lines disposed on one side of the substrate and located in the display area; a plurality of first data fan-out lines located in the first sub-area; and a plurality of data bending lines located in the bending area. The plurality of data lines are electrically connected to the plurality of sub-pixels and configured to provide data signals to the plurality of sub-pixels. A plurality of first data fan-out lines are connected to the plurality of data lines. A plurality of data bending lines are connected to the plurality of first data fan-out lines, and the plurality of data bending lines are symmetrically arranged about a third centerline; the third centerline coincides with the first centerline, or coincides with the second centerline, or is located between the first centerline and the second centerline.

[0006] In some exemplary embodiments, the display substrate further comprises: a plurality of first power fold lines located in the bending region and extending along the first direction, the plurality of first power fold lines being spaced apart from the plurality of data fold lines along a second direction, the second direction intersecting the first direction. The first border region further comprises: a second subregion located on a side of the bending region away from the first subregion. The display substrate further comprises: a first peripheral power line located in the first subregion and a first power lead located in the second subregion, the first peripheral power line and the first power lead being connected via the plurality of first power fold lines; the plurality of first power fold lines being symmetrically arranged about the third centerline.

[0007] In some exemplary embodiments, the plurality of data bending lines include: a first group of data bending lines, a second group of data bending lines, a third group of data bending lines, and a fourth group of data bending lines. The plurality of first power bending lines include at least: a first group of first power bending lines, a second group of first power bending lines, and a third group of first power bending lines. The third group of data bending lines, the second group of first power bending lines, the first group of data bending lines, the first group of first power bending lines, the second group of data bending lines, the third group of first power bending lines, and the fourth group of data bending lines are arranged sequentially along the second direction. The first group of data bending lines and the second group of data bending lines are symmetrically arranged about the third center line, and the third group of data bending lines and the fourth group of data bending lines are symmetrically arranged about the third center line; the second group of first power bending lines and the third group of first power bending lines are symmetrically arranged about the third center line, and the first group of first power bending lines are symmetrically arranged about the third center line.

[0008] In some exemplary embodiments, the total length of the first group of first power bending lines along the second direction is greater than or equal to the total length of the second group of first power bending lines along the second direction, and greater than or equal to the total length of the third group of first power bending lines along the second direction.

[0009] In some exemplary embodiments, the plurality of first power bending lines further include: a fourth group of first power bending lines and a fifth group of first power bending lines, the fourth group of first power bending lines being located on a side of the third group of data bending lines away from the second group of first power bending lines, the fifth group of first power bending lines being located on a side of the fourth group of data bending lines away from the third group of first power bending lines; the fourth group of first power bending lines and the fifth group of first power bending lines being symmetrically arranged about the third center line.

[0010] In some exemplary embodiments, the display substrate further includes: a plurality of second power bending lines located in the bending region and extending along the first direction, the plurality of second power bending lines being located on both sides of the plurality of data bending lines along the second direction. The display substrate further includes: a second peripheral power line located in the first sub-region and a second power lead line located in the second sub-region, the second peripheral power line and the second power lead line being connected via the plurality of second power bending lines, the second peripheral power line transmitting a second voltage signal that is different from the first voltage signal transmitted by the first peripheral power line; the plurality of second power bending lines being symmetrically arranged about the third center line.

[0011] In some exemplary embodiments, the display substrate further includes: a plurality of control bending lines located in the bending area and extending along the first direction, the plurality of control bending lines being located on both sides of the plurality of second power bending lines along the second direction; and the plurality of control bending lines being symmetrically arranged about the third center line.

[0012] In some exemplary embodiments, the third centerline coincides with the second centerline. The first border region has a first border edge and a second border edge extending along the first direction, the first border edge and the second border edge being located on either side of the alignment of the bending region along the second direction, and the second direction intersecting the first direction. The minimum distance between the alignment of the bending region and the first border edge is a first edge distance, and the minimum distance between the alignment of the bending region and the second border edge is a second edge distance, and the ratio of the first edge distance to the second edge distance is 0.9 to 1.1.

[0013] In some exemplary embodiments, the third centerline is located between the first centerline and the second centerline, or the third centerline coincides with the first centerline. The first border area has a first border edge and a second border edge extending along the first direction, the first border edge and the second border edge are located on either side of the alignment of the bending area along the second direction, and the second direction intersects the first direction. The minimum distance between the alignment of the bending area and the first border edge is the first edge distance, the minimum distance between the alignment of the bending area and the second border edge is the second edge distance, the ratio of the first edge distance to the second edge distance is greater than 1, or the ratio of the second edge distance to the first edge distance is greater than 1.

[0014] In some exemplary embodiments, at least one of the plurality of first data fan-out lines includes a first data extension segment and a second data extension segment connected to each other, the second data extension segment being connected to at least one of the plurality of data bend lines, and the second data extension segment being a straight line segment extending along the first direction, with the extension direction of the first data extension segment intersecting the first direction. A second centerline is located on a first side of the first centerline in a second direction, with the second direction intersecting the first direction; and the third centerline does not overlap with the first centerline. The length of the first data extension segment of the at least one first data fan-out line located near the first centerline and on a first side of the first centerline is greater than the length of the first data extension segment of the at least one first data fan-out line located near the first centerline and on a second side of the first centerline.

[0015] In some exemplary embodiments, the third center line coincides with the first center line, and the plurality of first data fan-out lines are symmetrically arranged about the third center line.

[0016] In some exemplary embodiments, the first border region further includes a second sub-region located on a side of the bending region away from the first sub-region. The display substrate further includes a plurality of data lead lines located in the second sub-region, the plurality of data lead lines being connected to the plurality of data bending lines; the plurality of data lead lines being symmetrically arranged about the third center line.

[0017] In some exemplary embodiments, the display substrate further comprises: a plurality of power bending lines located in the bending region, the plurality of power bending lines being spaced apart from the plurality of data bending lines along a second direction, the second direction intersecting the first direction. The plurality of power bending lines include: a first group of power bending lines and a second group of power bending lines located on either side of the third centerline. The total length of the first group of power bending lines along the second direction is different from the total length of the second group of power bending lines along the second direction.

[0018] In some exemplary embodiments, the third centerline coincides with the first centerline. The first border region has a first border edge and a second border edge extending along the first direction, the first border edge and the second border edge being located on either side of the alignment of the bending region along a second direction, and the second direction intersecting the first direction. The minimum distance between the alignment of the bending region and the first border edge is a first edge distance, and the minimum distance between the alignment of the bending region and the second border edge is a second edge distance, and the ratio of the first edge distance to the second edge distance is 0.9 to 1.1.

[0019] In some exemplary embodiments, the third center line coincides with the first center line, the second center line and the first group of power bending lines are located on the same side of the first center line; and the total length of the first group of power bending lines along the second direction is greater than the total length of the second group of power bending lines along the second direction.

[0020] On the other hand, this embodiment further provides a display device including the display substrate described above.

[0021] On the other hand, this embodiment provides a display substrate comprising: a display area and a first frame area located on one side of the display area along a first direction, the first frame area comprising a bending area and a first sub-area located between the bending area and the display area; the display area having a first centerline extending along the first direction, the first frame area having a second centerline extending along the first direction, and the distance between the first centerline and the second centerline being greater than zero. The display substrate comprises: a substrate, a plurality of sub-pixels and a plurality of data lines disposed on one side of the substrate and located in the display area, a plurality of first data fan-out lines located in the first sub-area, and a plurality of signal bending lines located in the bending area. The plurality of data lines are electrically connected to the plurality of sub-pixels and configured to provide data signals to the plurality of sub-pixels. A plurality of first data fan-out lines are connected to the plurality of data lines. A plurality of signal bending lines are located on the same conductive layer. The plurality of signal bending lines include at least a plurality of data bending lines connected to the plurality of first data fan-out lines, and the plurality of data bending lines are symmetrically arranged about a third centerline. The plurality of signal bending lines have a fourth center line extending along the first direction. The fourth center line coincides with the third center line, or is located on a side of the third center line close to the second center line.

[0022] In some exemplary embodiments, the plurality of signal bend lines are symmetrically arranged about the fourth centerline; the third centerline and the fourth centerline coincide with the second centerline. The first border region has a first border edge and a second border edge extending along the first direction, the first border edge and the second border edge being located on either side of the signal bend line of the bend region along a second direction, the second direction intersecting the first direction. The minimum distance between the signal bend line of the bend region and the first border edge is a first edge distance, and the minimum distance between the signal bend line of the bend region and the second border edge is a second edge distance, with the ratio of the first edge distance to the second edge distance being 0.9 to 1.1.

[0023] In some exemplary embodiments, the plurality of signal bend lines are symmetrically arranged about the fourth center line. The third center line coincides with the fourth center line and is located between the first center line and the second center line; or, the third center line and the fourth center line coincide with the first center line. The first border area has a first border edge and a second border edge extending along the first direction, and the first border edge and the second border edge are located on both sides of the signal bend line of the bend area along the second direction, and the second direction intersects the first direction. The minimum distance between the signal bend line of the bend area and the first border edge is the first edge distance, and the minimum distance between the signal bend line of the bend area and the second border edge is the second edge distance, and the ratio of the first edge distance to the second edge distance is greater than 1, or the ratio of the second edge distance to the first edge distance is greater than 1.

[0024] In some exemplary embodiments, the plurality of signal bend lines are asymmetrically arranged about the fourth centerline, the fourth centerline coincides with the second centerline, and the third centerline coincides with the first centerline. The first border region has a first border edge and a second border edge extending along the first direction, the first border edge and the second border edge being located on either side of the signal bend line of the bend region along a second direction; the second direction intersects the first direction. The minimum distance between the signal bend line of the bend region and the first border edge is a first edge distance, and the minimum distance between the signal bend line of the bend region and the second border edge is a second edge distance, with the ratio of the first edge distance to the second edge distance being 0.9 to 1.1.

[0025] Other features and advantages of the present application will be described in the following description, and in part will become apparent from the description, or will be understood by practicing the present application. Other advantages of the present application can be realized and obtained by the solutions described in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The accompanying drawings are used to provide an understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.

[0027] Figure 1 is a schematic diagram of a display substrate according to at least one embodiment of the present disclosure;

[0028] Figure 2A is a partial cross-sectional schematic diagram of a display area of ​​a display substrate according to at least one embodiment of the present disclosure;

[0029] Figure 2Bis another partial cross-sectional schematic diagram of the display area of ​​the display substrate of at least one embodiment of the present disclosure;

[0030] Figure 3 A schematic diagram of a partial structure of a first border area according to at least one embodiment of the present disclosure;

[0031] Figure 4 for Figure 3 A partial enlarged schematic diagram of the middle region S1;

[0032] Figure 5 This is another partial structural diagram of the first border area of ​​at least one embodiment of the present disclosure;

[0033] Figure 6 A schematic diagram of local wiring in the first border area of ​​at least one embodiment of the present disclosure;

[0034] Figure 7 is another partial schematic diagram of the first border area of ​​at least one embodiment of the present disclosure;

[0035] Figure 8 is another partial schematic diagram of the first border area of ​​at least one embodiment of the present disclosure;

[0036] Figure 9 for Figure 8 A partial enlarged schematic diagram of the middle region S2;

[0037] Figure 10 is another partial schematic diagram of the first border area of ​​at least one embodiment of the present disclosure;

[0038] Figure 11 for Figure 10 A partial enlarged schematic diagram of the middle region S3;

[0039] Figure 12 is another partial schematic diagram of the first border area of ​​at least one embodiment of the present disclosure;

[0040] Figure 13 for Figure 12 A partial enlarged schematic diagram of the middle region S4;

[0041] Figure 14 is another partial schematic diagram of the first border area of ​​at least one embodiment of the present disclosure;

[0042] Figure 15 is another schematic diagram of a display substrate according to at least one embodiment of the present disclosure;

[0043] Figure 16 is a schematic diagram of a display device according to at least one embodiment of the present disclosure. DETAILED DESCRIPTION

[0044] The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. The embodiments can be implemented in a variety of different forms. A person skilled in the art can easily understand that the method and content can be transformed into other forms without departing from the purpose and scope of the present disclosure. Therefore, the present disclosure should not be interpreted as being limited to the contents described in the following embodiments. In the absence of conflict, the embodiments and features in the embodiments of the present disclosure can be combined with each other in any manner.

[0045] In the drawings, the size of one or more components, layer thicknesses, or regions may be exaggerated for clarity. Therefore, one embodiment of the present disclosure is not necessarily limited to these dimensions, and the shapes and sizes of one or more components in the drawings do not reflect true proportions. Furthermore, the drawings schematically illustrate idealized examples, and one embodiment of the present disclosure is not limited to the shapes or values ​​shown in the drawings.

[0046] In this specification, ordinal numbers such as "first," "second," and "third" are provided to avoid confusion among constituent elements, and are not intended to limit the number. "Multiple" in this disclosure means two or more.

[0047] In this specification, for convenience, words and phrases indicating orientation or positional relationships, such as "middle," "upper," "lower," "front," "back," "vertical," "horizontal," "top," "bottom," "inside," and "outside," are used to illustrate the positional relationships of constituent elements with reference to the accompanying drawings. This is merely for the purpose of facilitating the description of this specification and simplifying the description, and is not intended to indicate or imply that the device or element referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on the present disclosure. The positional relationships of constituent elements may be appropriately changed depending on the orientation of the constituent elements being described. Therefore, the present disclosure is not limited to the words and phrases described in the specification and may be appropriately replaced depending on the circumstances.

[0048] In this specification, unless otherwise specified or limited, the terms "mounted," "connected," and "connected" should be understood broadly. For example, they can refer to fixed connections, removable connections, or integral connections; they can refer to mechanical connections or connections; they can refer to direct connections, indirect connections through intermediaries, or internal communication between two components. Those skilled in the art will understand the meaning of these terms in this disclosure based on the circumstances.

[0049] In this specification, "electrically connected" includes components connected together via an element having some electrical function. There are no particular limitations on the "element having some electrical function" as long as it enables transmission of electrical signals between the connected components. Examples of "element having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other components with multiple functions.

[0050] In this specification, a transistor refers to a device that includes at least three terminals: a gate, a drain, and a source. A transistor has a channel region between the drain (drain electrode terminal, drain region, or drain electrode) and the source (source electrode terminal, source region, or source electrode), and current can flow through the drain, channel region, and source. In this specification, the channel region refers to the region through which current primarily flows.

[0051] In this specification, the first electrode can be referred to as the drain and the second electrode as the source, or vice versa. The functions of "source" and "drain" are sometimes interchanged when using transistors with opposite polarity or when the direction of current changes during circuit operation. Therefore, in this specification, the terms "source" and "drain" can be interchanged. Furthermore, the gate electrode can also be referred to as the control electrode.

[0052] In this specification, "parallel" refers to a state where the angle formed by two straight lines is greater than -10° and less than 10°, and thus also includes a state where the angle is greater than -5° and less than 5°. Furthermore, "perpendicular" refers to a state where the angle formed by two straight lines is greater than 80° and less than 100°, and thus also includes a state where the angle is greater than 85° and less than 95°.

[0053] In this specification, circles, ellipses, triangles, rectangles, trapezoids, pentagons or hexagons are not in the strict sense, but may be approximate circles, approximate ellipses, approximate triangles, approximate rectangles, approximate trapezoids, approximate pentagons or approximate hexagons, etc. There may be some small deformations caused by tolerances, such as chamfers, arc edges and deformations.

[0054] In this disclosure, the terms "approximately" and "substantially" are used without strict boundaries, allowing for process and measurement errors. In this disclosure, "approximately the same" means values ​​that differ by less than 10%. In this disclosure, "symmetric" means symmetric within the limits of process and measurement errors.

[0055] In this disclosure, "A extends along direction B" means that A may include a main portion and a secondary portion connected to the main portion, the main portion being a line, line segment, or strip, extending along direction B, and the length of the main portion extending along direction B being greater than the length of the secondary portion extending along other directions. In this disclosure, "A extends along direction B" means "the main portion of A extends along direction B."

[0056] In the present disclosure, "the orthographic projection of B is within the range of the orthographic projection of A" or "the orthographic projection of A contains the orthographic projection of B" means that the boundary of the orthographic projection of B falls within the boundary of the orthographic projection of A, or the boundary of the orthographic projection of A overlaps with the boundary of the orthographic projection of B. The "shape of A" mentioned in the present disclosure refers to the shape of the orthographic projection of A on the substrate.

[0057] In the present disclosure, the distance between A and B refers to the vertical distance or the minimum distance between A and B.

[0058] In some implementations, the secondary screen of the large folding display needs to be designed with a cover. Usually, the appearance is asymmetrical, so that the center line of the display area and the center line of the lower frame are not on the same straight line, which puts forward new requirements for the signal routing layout of the lower frame.

[0059] This embodiment provides a display substrate, comprising: a display area and a first frame area located on one side of the display area along a first direction. The first frame area includes a bending area and a first sub-area located between the bending area and the display area. The display area has a first centerline extending along the first direction, and the first frame area has a second centerline extending along the first direction. The distance between the first centerline and the second centerline is greater than zero. The display substrate includes: a substrate, a plurality of sub-pixels and a plurality of data lines disposed on one side of the substrate and located in the display area, a plurality of first data fan-out lines located in the first sub-area, and a plurality of data bending lines located in the bending area. The plurality of data lines are electrically connected to the plurality of sub-pixels, and the plurality of data lines are configured to provide data signals to the plurality of sub-pixels. The plurality of first data fan-out lines are connected to the plurality of data lines. The plurality of data bending lines are connected to the plurality of first data fan-out lines, and the plurality of data bending lines are symmetrically arranged about a third centerline. The third centerline coincides with the first centerline, or coincides with the second centerline, or is located between the first and second centerlines. The third centerline, the first centerline, and the second centerline may extend in the same direction.

[0060] In this embodiment, to address the situation where the first centerline of the display area and the second centerline of the first frame area are not aligned, multiple data bending lines in the bending area are symmetrically arranged about a third centerline. This ensures the density and film consistency of the data bending lines on both sides of the third centerline, thus ensuring a good bending effect. Furthermore, the third centerline coincides with the first or second centerline, or lies between the first and second centerlines, thereby alleviating the problem of signal routing differences caused by the asymmetric shape of the display substrate.

[0061] In some exemplary embodiments, the display substrate may further include: a plurality of first power zigzag lines located in the bend region and extending along a first direction, the plurality of first power zigzag lines being spaced apart from the plurality of data zigzag lines along a second direction. The second direction intersects the first direction; for example, the second direction may be perpendicular to the first direction. The first border region may further include: a second subregion located on a side of the bend region away from the first subregion. The display substrate may further include: a first peripheral power line located in the first subregion and a first power lead located in the second subregion. The first peripheral power line and the first power lead may be connected via the plurality of first power zigzag lines. The plurality of first power zigzag lines may be symmetrically arranged about a third centerline. In some examples, the first peripheral power line, the first power lead, and the plurality of first power zigzag lines are electrically connected and configured to transmit a first voltage signal. By arranging the plurality of first power zigzag lines in the bend region symmetrically about the third centerline, this example ensures the density and film consistency of the first power zigzag lines on both sides of the third centerline, and also helps ensure consistent transmission load of the first voltage signal on both sides of the third centerline.

[0062] In some exemplary embodiments, the display substrate may further include: a plurality of second power zigzag lines extending along the first direction; the plurality of second power zigzag lines may be located on either side of the plurality of data zigzag lines along the second direction. The display substrate may further include: a second peripheral power line located in the first sub-region and a second power lead line located in the second sub-region; the second peripheral power line and the second power lead line may be connected via the plurality of second power zigzag lines; the second peripheral power line transmits a second voltage signal that is different from the first voltage signal transmitted by the first peripheral power line. The plurality of second power zigzag lines may be symmetrically arranged about a third centerline. In some examples, the first voltage signal may be greater than the second voltage signal. The first voltage signal may be configured to be supplied to the first power line connected to the sub-pixels in the display area, and the second voltage signal may be configured to be supplied to the cathode of the light-emitting element of the sub-pixel in the display area or to the second power line connected to the sub-pixel. By arranging the plurality of second power zigzag lines in the zigzag region symmetrically about the third centerline, this embodiment ensures the density and film consistency of the second power zigzag lines on both sides of the third centerline, and also helps ensure consistent transmission load of the second voltage signal on both sides of the third centerline.

[0063] In some exemplary embodiments, the display substrate may further include: a plurality of control bend lines located in the bend region and extending along the first direction, the plurality of control bend lines being located on both sides of the plurality of second power bend lines along the second direction; the plurality of control bend lines may be symmetrically arranged about a third center line. In some examples, the plurality of control bend lines may include: a plurality of traces for providing control signals (e.g., including a start signal, a clock signal, a voltage signal, etc.) to the gate drive circuit, and traces for transmitting panel test signals. The gate drive circuit may be configured to provide pixel control signals (e.g., including a scan signal, a reset signal, a light-emitting control signal, etc.) to the plurality of sub-pixels in the display region. In this example, by arranging the plurality of control bend lines in the bend region symmetrically about the third center line, the density and film consistency of the control bend lines on both sides of the third center line can be ensured, and the transmission load consistency of the same control signal on both sides of the third center line can be ensured.

[0064] In some exemplary embodiments, the third center line may coincide with the second center line. The first frame area may have a first frame edge and a second frame edge extending along the first direction, and the first frame edge and the second frame edge may be located on both sides of the routing of the bending area along the second direction. The minimum distance between the routing of the bending area and the first frame edge is the first edge distance, and the minimum distance between the routing of the bending area and the second frame edge is the second edge distance, and the ratio of the first edge distance to the second edge distance is 0.9 to 1.1. For example, the first edge distance may be equal to the second edge distance. This example can ensure the consistency of the distance between the routing of the bending area and the two side edges of the display panel, which is beneficial to the routing arrangement of the bending area and to ensure the bending effect.

[0065] In some exemplary embodiments, the third center line may be located between the first center line and the second center line, or the third center line may coincide with the first center line. The first border area may have a first border edge and a second border edge extending along the first direction, and the first border edge and the second border edge are located on both sides of the routing of the bending area along the second direction. The minimum distance between the routing of the bending area and the first border edge is the first edge distance, and the minimum distance between the routing of the bending area and the second border edge is the second edge distance, and the ratio of the first edge distance to the second edge distance is greater than 1, or the ratio of the second edge distance to the first edge distance is greater than 1. In other words, the first edge distance is different from the second edge distance. This example helps to ensure the symmetrical arrangement of the routing of the bending area by adjusting the difference between the first edge distance and the second edge distance, thereby reducing the difference between the signals transmitted on both sides of the second center line in the first border area.

[0066] In some exemplary embodiments, the display substrate may include: a plurality of power bend lines located in a bend region, wherein the plurality of power bend lines and the plurality of data bend lines may be spaced apart along a second direction. The plurality of power bend lines may include: a first group of power bend lines and a second group of power bend lines located on either side of a third center line, wherein the total length of the first group of power bend lines along the second direction may be different from the total length of the second group of power bend lines along the second direction. In some examples, the total length of a group of power bend lines along the second direction may include: the sum of the line width of each power bend line within the group of power bend lines and the spacing between adjacent power bend lines. In this example, no other wiring is provided between adjacent power bend lines. In this example, the symmetrical arrangement of the plurality of data bend lines can be ensured by adjusting the total length of one or more groups of power bend lines along the second direction on either side of the third center line.

[0067] In some examples, the third centerline can coincide with the first centerline, and the second centerline and the first group of power meander lines can be located on the same side of the first centerline. The total length of the first group of power meander lines along the second direction can be greater than the total length of the second group of power meander lines along the second direction. In this example, the wiring layout of the first border area can be optimized by adjusting the lengths of the first and second groups of power meander lines along the second direction.

[0068] The solution of this embodiment is illustrated below through some examples.

[0069] Figure 1 Schematic diagram of a display substrate according to at least one embodiment of the present disclosure. Figure 1 As shown, the display substrate may be a closed polygon including linear edges. For example, the display substrate of this example may be applied to a sub-screen of a large stack display product. The display substrate may include: a display area AA and a border area BB located around the display area AA. For example, the display area AA may include: a first display edge (lower display edge) and a second display edge (upper display edge) arranged opposite to each other in the first direction Y, and a third display edge (left display edge) and a fourth display edge (right display edge) arranged opposite to each other in the second direction X. The first display edge and the second display edge may be linear edges parallel to each other, and the third display edge and the fourth display edge may be linear edges parallel to each other. Adjacent linear edges may be connected by curved edges (e.g., arcuate edges).

[0070] In some examples, the border area BB may include: a first border area B1 and a fourth border area B4 located on both sides of the display area AA along the first direction Y, and a second border area B2 and a third border area B3 located on both sides of the display area AA along the second direction X. The first border area B1 can be connected to the first display edge, the second border area B2 can be connected to the third display edge, the third border area B3 can be connected to the fourth display edge, and the fourth border area B4 can be connected to the second display edge. The first border area B1 can be connected to the second border area B2 and the third border area B3, and the third border area B4 can be connected to the second border area B2 and the third border area B3. After the first border area B1, the second border area B2, the third border area B3 and the fourth border area B4 are connected, they can surround the display area AA. For example, the first border area B1 can also be called the lower border area of ​​the display substrate, the second border area B2 can also be called the left border area of ​​the display substrate, the third border area B3 can also be called the right border area of ​​the display substrate, and the fourth border area B4 can also be called the upper border area of ​​the display substrate. However, this embodiment is not limited to this.

[0071] In some examples, the display area AA of the display substrate may include at least: a plurality of sub-pixels PX, a plurality of gate lines GL, and a plurality of data lines DL. The plurality of gate lines GL may extend along the second direction X and be arranged along the first direction Y; the plurality of data lines DL may extend along the first direction Y and be arranged along the second direction X. The plurality of data lines DL may be electrically connected to the plurality of sub-pixels PX, and the plurality of data lines DL may be configured to provide data signals to the plurality of sub-pixels PX. The plurality of gate lines GL may be electrically connected to the plurality of sub-pixels PX, and the plurality of gate lines GL may be configured to provide pixel control signals to the plurality of sub-pixels PX. For example, the pixel control signal may include a scan signal, or may include a scan signal and a light-emitting control signal, or may include a scan signal, a reset control signal, and a light-emitting control signal.

[0072] In some examples, the second direction X may be the extending direction (e.g., the row direction) of the gate lines GL in the display area AA; the first direction Y may be the extending direction (e.g., the column direction) of the data lines DL in the display area AA. The first direction Y and the second direction X may intersect with each other, for example, may be perpendicular to each other.

[0073] In some examples, a pixel unit of the display area AA may include three sub-pixels, and the three sub-pixels may be a first sub-pixel emitting a first color light (e.g., red light), a second sub-pixel emitting a second color light (e.g., green light), and a third sub-pixel emitting a third color light (e.g., blue light). However, this embodiment is not limited to this. In some examples, a pixel unit may include four sub-pixels, and the four sub-pixels may be a sub-pixel emitting red light, a sub-pixel emitting green light, a sub-pixel emitting blue light, and a sub-pixel emitting white light. For another example, a pixel unit may include four sub-pixels, and the four sub-pixels may include a sub-pixel emitting red light, a sub-pixel emitting blue light, and two sub-pixels emitting green light.

[0074] In some examples, a sub-pixel may include: a pixel circuit and a light-emitting element electrically connected to the pixel circuit. The pixel circuit may include multiple transistors and at least one capacitor. For example, the pixel circuit may be a 3T1C, 4T1C, 5T1C, 5T2C, 6T1C, 7T1C or 8T1C structure. In the above circuit structure, T refers to a thin film transistor, C refers to a capacitor, the number before T represents the number of thin film transistors in the circuit, and the number before C represents the number of capacitors in the circuit. In some examples, the multiple transistors in the pixel circuit may include P-type transistors and N-type transistors. In other examples, the multiple transistors in the pixel circuit may be P-type transistors or N-type transistors. Using the same type of transistors in the pixel circuit can simplify the process flow, reduce the process difficulty of the display substrate, and improve the product yield.

[0075] In some examples, the shape of the light-emitting elements of a sub-pixel can be rectangular, rhombus, pentagonal, or hexagonal. When a pixel unit includes three sub-pixels, the light-emitting elements of the three sub-pixels can be arranged horizontally, vertically, or in a triangular pattern; when a pixel unit includes four sub-pixels, the light-emitting elements of the four sub-pixels can be arranged horizontally, vertically, or in a square pattern. However, this embodiment is not limited to this.

[0076] In some examples, the light-emitting element may be any one of a light-emitting diode (LED), an organic light-emitting diode (OLED), a quantum dot light-emitting diode (QLED), a micro-LED (including mini-LED or micro-LED), etc. For example, the light-emitting element may be an OLED, which may emit red light, green light, blue light, or white light, etc. when driven by its corresponding pixel circuit. The color of the light emitted by the light-emitting element may be determined as needed. In some examples, the light-emitting element may include: an anode, a cathode, and an organic light-emitting layer located between the anode and the cathode. The anode of the light-emitting element may be electrically connected to the corresponding pixel circuit. However, this embodiment is not limited to this.

[0077] Figure 2A FIG. 1 is a schematic partial cross-sectional view of a display region of a display substrate according to at least one embodiment of the present disclosure. Figure 2A In this example, the multiple pixel transistors in the pixel circuit may be of different transistor types, such as low-temperature polysilicon thin film transistors and oxide thin film transistors.

[0078] In some examples, such as Figure 2A As shown, in a direction perpendicular to the display substrate, the display area of ​​the display substrate may include: a substrate 10, and a circuit structure layer 12, a light-emitting structure layer 13, and an encapsulation structure layer 14 sequentially arranged on the substrate. The circuit structure layer 12 may include at least: pixel circuits for multiple sub-pixels, and the pixel circuit of each sub-pixel may include multiple transistors and at least one capacitor. The light-emitting structure layer 13 may include at least: light-emitting elements for multiple sub-pixels. In other examples, the display substrate may further include: a touch structure layer located on the side of the encapsulation structure layer away from the substrate. For example, the touch structure layer may include at least one touch conductive layer.

[0079] In some examples, Figure 2AIn the figure, each sub-pixel includes a first transistor 21, a second transistor 22, and a capacitor 23. The first transistor 21 and the second transistor 22 can be of different transistor types. The first transistor 21 can be a low-temperature polysilicon thin-film transistor, and the second transistor 22 can be an oxide thin-film transistor.

[0080] In some examples, the circuit structure layer 12 of the display area may include: a first semiconductor layer, a first gate metal layer, a second gate metal layer, a second semiconductor layer, a third gate metal layer, a first source-drain metal layer, and a second source-drain metal layer disposed on the substrate 10 . A first insulating layer 101 may be provided between the first semiconductor layer and the first gate metal layer, and a second insulating layer 102 may be provided between the first gate metal layer and the second gate metal layer; a third insulating layer 103 may be provided between the second gate metal layer and the second semiconductor layer; a fourth insulating layer 104 may be provided between the second semiconductor layer and the third gate metal layer; a fifth insulating layer 105 may be provided between the third gate metal layer and the first source-drain metal layer; a sixth insulating layer 106 (also referred to as a passivation (PVX) layer) and a seventh insulating layer 107 (also referred to as a first flattening (PLN) layer) may be provided between the first source-drain metal layer and the second source-drain metal layer, and the seventh insulating layer 107 may be located on the side of the sixth insulating layer 106 away from the substrate 10; an eighth insulating layer 108 (also referred to as a second flattening layer) may be provided on the side of the second source-drain metal layer away from the substrate 10. Among them, the first insulating layer 101, the second insulating layer 102, the third insulating layer 103, the fourth insulating layer 104, the fifth insulating layer 105 and the sixth insulating layer 106 can be inorganic insulating layers, and the seventh insulating layer 107 and the eighth insulating layer 108 can be organic insulating layers. However, this embodiment is not limited to this. In other examples, a buffer layer can be further provided on the side of the first semiconductor layer close to the substrate. The buffer layer can prevent harmful substances in the substrate from invading the interior of the display substrate and can also increase the adhesion of the film layer in the display substrate to the substrate. In other examples, a bottom shading metal layer (BSM, Bottom Shielding Metal) can also be provided on the side of the buffer layer close to the substrate. The bottom shading metal layer can be configured to at least partially cover the active layer of the transistor of the pixel circuit to avoid external light from affecting the performance of the transistor. In other examples, the sixth insulating layer can be omitted between the first source and drain metal layer and the second source and drain metal layer, and only the seventh insulating layer can be provided between the first source and drain metal layer and the second source and drain metal layer.

[0081] In some examples, such as Figure 2AAs shown, the first semiconductor layer in the display area may include at least a first active layer 210 of the first transistor 21. The first active layer 210 of the first transistor 21 may include a first region 2101, a second region 2102, and a channel region 2100 located between the first region 2101 and the second region 2102. The first gate metal layer may include at least a first gate electrode 213 of the first transistor 21 and a first plate 231 of the capacitor 23. The orthographic projection of the first gate electrode 213 of the first transistor 21 on the substrate 10 may overlap the orthographic projection of the channel region 2100 of the first active layer 210 on the substrate 10. The second gate metal layer may include at least a second plate 232 of the capacitor 23. The orthographic projections of the second plate 232 and the first plate 231 of the capacitor 23 on the substrate 10 may at least partially overlap, for example, they may overlap. The second semiconductor layer may include at least a second active layer 220 of the second transistor 22. The third gate metal layer may include at least a second gate electrode 223 of the second transistor 22. An orthographic projection of the second gate 223 of the second transistor 22 on the substrate 10 may partially overlap with an orthographic projection of the second active layer 220 on the substrate 10 .

[0082] In some examples, such as Figure 2AAs shown, the first source-drain metal layer may include at least: a first source 211 and a first drain 212 of the first transistor 21, and a second source 221 and a second drain 222 of the second transistor 22. The fifth insulating layer 105 may have a plurality of pixel vias (e.g., including a first pixel via, a second pixel via, a third pixel via, and a fourth pixel via) in the display area. The fifth insulating layer 105, the fourth insulating layer 104, the third insulating layer 103, the second insulating layer 102, and the first insulating layer 101 within the first pixel via may be removed to expose at least a portion of the surface of the first region 2101 of the first active layer 210; the fifth insulating layer 105, the fourth insulating layer 104, the third insulating layer 103, the second insulating layer 102, and the first insulating layer 101 within the second pixel via may be removed to expose at least a portion of the surface of the second region 2102 of the first active layer 210. The fifth insulating layer 105 and the fourth insulating layer 104 within the third and fourth pixel vias can be removed, exposing at least portions of the surfaces of both ends of the second active layer 220. The first source electrode 211 of the first transistor 21 can be electrically connected to the first region 2101 of the first active layer 210 through the first pixel via, and the first drain electrode 212 can be electrically connected to the second region 2102 of the first active layer 210 through the second pixel via. The second source electrode 221 of the second transistor 22 can be electrically connected to one end of the second active layer 220 through the third pixel via, and the second drain electrode 222 of the second transistor 22 can be electrically connected to the other end of the second active layer 220 through the fourth pixel via. The second source-drain metal layer can include at least a first transition electrode 241. The first transition electrode 241 can be electrically connected to the first drain electrode 212 of the first transistor 21 of the pixel circuit through a fifth pixel via defined between the sixth and seventh insulating layers 106 and 107. In this example, the first transition electrode 241 can be used to achieve electrical connection between the pixel circuit and the light-emitting element.

[0083] In some examples, the multiple gate lines of the display substrate may include: a first scan line, a second scan line, a first reset control line, a second reset control line, and a light emission control line. The multiple gate lines may, for example, be located in a first gate metal layer and a third gate metal layer. For example, the first scan line, the first reset control line, the second reset control line, and the light emission control line may be located in the first gate metal layer, and the second scan line may be located in the third gate metal layer. The multiple data lines may, for example, be located in the second source / drain metal layer, and the first power line of the display area may, for example, be located in the second source / drain metal layer. However, this embodiment is not limited to this.

[0084] In some examples, such as Figure 2AAs shown, the light-emitting structure layer 13 may include a pixel definition layer 134 and multiple light-emitting elements. For example, each light-emitting element may include a stacked first electrode 131, an organic light-emitting layer 132, and a second electrode 133. The first electrode 131 of the light-emitting element may be an anode. The first electrode 131 may be disposed on the eighth insulating layer 108 and electrically connected to the first transfer electrode 241 through a sixth pixel via provided in the eighth insulating layer 108. The pixel definition layer 134 is disposed on the first electrode 131 and the eighth insulating layer 108. The pixel definition layer 134 may have multiple pixel openings, each of which may expose at least a portion of the surface of a corresponding first electrode 131. At least a portion of the organic light-emitting layer 132 may be disposed within a pixel opening and connected to the corresponding first electrode 131. The second electrode 133 may be disposed on and connected to the organic light-emitting layer 132. Driven by the first electrode 131 and the second electrode 133, the organic light-emitting layer 132 may emit light of a corresponding color.

[0085] In some examples, the organic light-emitting layer 132 of the light-emitting element may include an emitting layer (EML), and one or more film layers including a hole injection layer (HIL), a hole transport layer (HTL), a hole blocking layer (HBL), an electron blocking layer (EBL), an electron injection layer (EIL), and an electron transport layer (ETL). Under the voltage drive of the first electrode 131 and the second electrode 133, the light-emitting characteristics of the organic material can be used to emit light according to the required grayscale.

[0086] In some examples, the light-emitting layers of light-emitting elements of different colors may be different. For example, a red light-emitting element includes a red light-emitting layer, a green light-emitting element includes a green light-emitting layer, and a blue light-emitting element includes a blue light-emitting layer. In order to reduce the process difficulty and improve the yield, the hole injection layer and the hole transport layer on one side of the light-emitting layer may adopt a common layer, and the electron injection layer and the electron transport layer on the other side of the light-emitting layer may adopt a common layer. In some examples, any one or more layers of the hole injection layer, the hole transport layer, the electron injection layer and the electron transport layer can be made by a one-time process (a one-time evaporation process or a one-time inkjet printing process), and isolation is achieved by means of a surface step difference of the formed film layer or by surface treatment. For example, any one or more layers of the hole injection layer, the hole transport layer, the electron injection layer and the electron transport layer corresponding to adjacent sub-pixels may be isolated. In some examples, the organic light-emitting layer can be formed by evaporation using a fine metal mask (FMM, FineMetal Mask) or an open mask (Open Mask), or by inkjet technology.

[0087] In some examples, such as Figure 2A As shown, the encapsulation structure layer 14 may include a stacked first encapsulation layer 141, a second encapsulation layer 142, and a third encapsulation layer 143. The first and third encapsulation layers 141 and 143 may be made of inorganic materials, such as silicon nitride, silicon oxide, or silicon oxynitride. Inorganic materials have high density and can prevent the intrusion of water, oxygen, and the like. The second encapsulation layer 142 may be disposed between the first and third encapsulation layers 141 and 143 to prevent external moisture from entering the light-emitting element. The second encapsulation layer 142 may be made of an organic material, such as a polymer material containing a desiccant or a polymer material that can block moisture, or a polymer resin to planarize the surface of the display substrate and relieve stress in the first and third encapsulation layers 141 and 143. It may also include a desiccant or other absorbent material to absorb intrusive water, oxygen, and other substances. However, this embodiment is not limited to this. For example, the encapsulation structure layer may have a five-layer stacked structure: inorganic / organic / inorganic / organic / inorganic.

[0088] Figure 2B FIG. 1 is another partial cross-sectional view of a display area of ​​a display substrate according to at least one embodiment of the present disclosure. Figure 2BAs shown, the circuit structure layer 12 of the display area may include: a first semiconductor layer, a first gate metal layer, a second gate metal layer, a second semiconductor layer, a third gate metal layer, a first source-drain metal layer, a second source-drain metal layer and a third source-drain metal layer arranged on the substrate 10. An eighth insulating layer 108 may be arranged between the second source-drain metal layer and the third source-drain metal layer, and a ninth insulating layer 109 (also referred to as a third flat layer) may be arranged on the side of the third source-drain metal layer away from the substrate. The ninth insulating layer 109 may be an organic insulating layer. The third source-drain metal layer may include at least: a second transfer electrode 242, and the second transfer electrode 242 may be connected to the first transfer electrode 241 located in the second source-drain metal layer. In this example, the electrical connection between the pixel circuit and the first electrode 131 of the light-emitting element may be achieved through the first transfer electrode 241 and the second transfer electrode 242. For the remaining structures of the display area of ​​the display substrate of this example, please refer to Figure 2A The description of the embodiment shown is omitted here.

[0089] In some examples, such as Figure 1 As shown, the first border area B1 may include: a first sub-area B11, a bending area B12 and a second sub-area B13 arranged in sequence along a direction away from the display area AA. The bending area B12 may connect the first sub-area B11 and the second sub-area B12. The first sub-area B11 may connect the second border area B2 and the third border area B3, and be connected to the display area AA. The first sub-area B11 may also be referred to as a first fan-out area. The bending area B12 may be configured to bend the second sub-area B13 to the back of the display area AA. A plurality of signal bending lines may be provided in the bending area B12 to achieve electrical connection between the traces transmitting the same signal in the first sub-area B11 and the second sub-area B13. The second sub-area B13 may include at least: a first signal access area B14. The first signal access area B14 may be provided with a plurality of first contact pads, and the plurality of first contact pads may be configured to connect a driver integrated circuit (IC).

[0090] In some examples, the second sub-area B13 may include: a first signal access area B14, a circuit configuration area located between the bending area B12 and the first signal access area B14, a second fan-out area located between the bending area B12 and the circuit configuration area, a third fan-out area located between the circuit configuration area and the first signal access area B14, and a second signal access area located on a side of the first signal access area B14 away from the bending area B12. The second fan-out area, the circuit configuration area, the third fan-out area, the first signal access area B14, and the second signal access area may be arranged sequentially in a direction away from the bending area B12. The circuit configuration area may include at least a plurality of test circuits arranged along the second direction X; alternatively, the circuit configuration area may include a plurality of test circuits, a plurality of electrostatic discharge circuits located on a side of the plurality of test circuits near the bending area B12, and a plurality of data selection circuits located on a side of the plurality of test circuits away from the bending area B12. The second signal access area may include a plurality of second contact pads, which may be configured to be bonded to an external flexible printed circuit (FPC). At least one first contact pad within the first signal access area B14 and at least one second contact pad within the second signal access area can be connected via a lead-out connection line. This embodiment is not limited to this. In other examples, the second sub-area B13 may include a second fan-out area, a first signal access area B14, and a second signal access area, arranged sequentially in a direction away from the bending area B12.

[0091] In some examples, such as Figure 1 As shown, the display area AA may have a first center line O1 extending along a first direction Y, and the first center line O1 passes through the center point C1 of the display area AA. For example, the distance between the first display edge and the center point C1 may be the same as the distance between the second display edge and the center point C1; the distance between the third display edge and the center point C1 may be the same as the distance between the fourth display edge and the center point C1. The first center line O1 may divide the display area AA into a first sub-display area and a second sub-display area arranged along the second direction X. The multiple data lines DL within the display area AA may include: a first group of data lines located in the first sub-display area and a second group of data lines located in the second sub-display area. The number of data lines in the first group of data lines may be the same as the number of data lines in the second group of data lines. For example, the first group of data lines and the second group of data lines may be symmetrically arranged about the first center line O1. However, this embodiment is not limited to this.

[0092] In this example, two groups of routing lines are arranged symmetrically about a centerline, meaning that the two groups have the same number of routing lines and are arranged symmetrically about the centerline. The routing lines in the two groups arranged symmetrically about the centerline have the same line width and the same spacing length as adjacent routing lines. A group of routing lines is arranged symmetrically about a centerline, meaning that the group of routing lines can be divided into two symmetrically arranged sections on either side of the centerline, with the two sections including the same number of routing lines; or, the group of routing lines can be divided into two symmetrically arranged sections on either side of the centerline and a routing line passing through the centerline, with the two sections including the same number of routing lines.

[0093] Figure 3 FIG. 1 is a partial structural diagram of the first border area of ​​at least one embodiment of the present disclosure. Figure 1 and Figure 3 As shown, the border area BB may include at least: a first border edge B101 and a second border edge B102 of the first border area B1 that are opposite to each other in the second direction X, and a third border edge B201 and a fourth border edge B301 that are opposite to each other in the second direction X. The first border edge B101 and the second border edge B102 may extend approximately along the first direction Y. For example, the first border edge B101 and the second border edge B102 may be linear edges parallel to each other. The first border edge B101 is, for example, the left edge of the first border area B1, and the second border edge B102 is, for example, the right edge of the first border area B1. The third border edge B201 may be the left edge of the second border area B2, and the right edge of the second border area B2 is connected to the third display edge of the display area AA. The fourth border edge B202 may be the right edge of the third border area B3, and the left edge of the third border area B3 is connected to the fourth display edge of the display area AA. The third frame edge B201 and the third display edge may be parallel linear edges, and the fourth frame edge B301 and the fourth display edge may be parallel linear edges. The first frame edge B101 and the third frame edge B201 may be connected by a curved frame edge, and the third frame edge B201 and the fourth frame edge B202 may be connected by a curved frame edge. The first frame edge B101 and the second frame edge B102 may be connected by a fifth frame edge B103 extending along the second direction X, and the third frame edge B201 and the fourth frame edge B301 may be connected by an edge of the fourth frame area B4 away from the display area AA.

[0094] In some examples, such as Figure 1 and Figure 3As shown, the first border area B1 may have a second center line O2 extending along the first direction Y, and the second center line O2 passes through the center point C2 of the first border area B1. The distance between the first border edge B101 and the center point C2 may be approximately the same as the distance between the second border edge B102 and the center point C2, and the distance between the first display edge and the center point C2 may be approximately the same as the distance between the fifth border edge B103 and the center point C2. The second center line O2 may divide the first border area B1 into a lower left border area and a lower right border area arranged along the second direction X. The second center line O2 may pass through the center point of the first signal access area B14. In other words, the center line of the first signal access area B14 extending along the first direction Y may coincide with the second center line O2. However, this embodiment is not limited to this. In other examples, the center line of the first signal access area B14 extending along the first direction Y may coincide with the first center line O1.

[0095] In some examples, the first frame edge B101 and the third frame edge B201 have a first distance L1 in the second direction X, and the second frame edge B102 and the fourth frame edge B301 have a second distance L2 in the second direction X. The first distance L1 is not equal to the second distance L2. For example, the first distance L1 may be smaller than the second distance L2. The display substrate of this example has an asymmetric structure as a whole, and the second center line O2 of the first frame area B1 and the first center line O1 of the display area AA do not overlap. For example, the second center line O2 may be located on one side of the first center line O1 in the opposite direction of the second direction X. In other examples, when the first distance L1 is greater than the second distance L2, the second center line O2 may be located on one side of the first center line O1 in the second direction X.

[0096] In some examples, such as Figure 3As shown, the bending region B12 may be provided with a set of signal bending lines, including multiple signal bending lines (e.g., multiple data bending lines, multiple first power bending lines, multiple second power bending lines, and multiple control bending lines). The multiple signal bending lines may extend along a first direction Y and be arranged along a second direction X. The orthographic projection of the set of signal bending lines on the substrate may have a fourth centerline O4 extending along the first direction Y. The set of signal bending lines may be symmetrically arranged about the fourth centerline O4. For example, the fourth centerline O4 may coincide with the third centerline O3. The third centerline O3 passes through the center point of the region corresponding to the orthographic projection of the set of signal bending lines on the substrate. For example, the region corresponding to the orthographic projection of the set of signal bending lines on the substrate may be substantially rectangular. The orthographic projection of the group of signal meander lines on the substrate may include a first routing edge B121 and a second routing edge B122. The first routing edge B121 may be an edge routing of the group of signal meander lines (e.g., the leftmost routing, such as the control bending line of the edge) close to the edge of the first frame edge B101, and the second routing edge B122 may be an edge routing of the group of signal meander lines (e.g., the rightmost routing, such as the control bending line of the edge) close to the edge of the second frame left edge B102. The first routing edge B121 and the second routing edge B122 may both extend approximately along the first direction Y. The distance between the first routing edge B121 and the third center line O3 and the distance between the second routing edge B122 and the third center line O3 may be approximately the same. The distance between the first routing edge B121 and the third center line O3 can be the sum of the line widths and spacings of multiple signal bending lines located on the side of the third center line O3 in the opposite direction of the second direction X; the distance between the second edge routing B122 and the third center line O3 can be the sum of the line widths and spacings of multiple signal bending lines located on the side of the third center line O3 in the second direction X.

[0097] In some examples, such as Figure 3 As shown, the bending area B12 can be provided with: four groups of data bending lines (for example, including a first group of data bending lines 311, a second group of data bending lines 312, a third group of data bending lines 313, and a fourth group of data bending lines 314), five groups of first power bending lines (for example, including a first group of first power bending lines 321, a second group of first power bending lines 322, a third group of first power bending lines 323, a third group of first power bending lines 324 and a fifth group of first power bending lines 325), two groups of second power bending lines (for example, including a first group of second power bending lines 331 and a second group of second power bending lines 332), and two groups of control bending lines (for example, including a first group of control bending lines 341 and a second group of control bending lines 342). Figure 3 , each group of data bending lines, each group of first power bending lines, each group of second power bending lines, each group of control bending lines, and each group of touch bending lines in the bending area B12 are schematically illustrated as a whole.

[0098] In some examples, each group of data meander lines may include multiple data meander lines arranged along the second direction X. The multiple data meander lines may have the same line width, and the spacing between adjacent data meander lines may be the same. Each group of first power meander lines may include multiple first power meander lines arranged along the second direction X. The multiple first power meander lines may have the same line width, and the spacing between adjacent first power meander lines may be the same. Multiple first power meander lines within the same group of first power meander lines may be interconnected. Each group of second power meander lines may include multiple second power meander lines arranged along the second direction X. The multiple second power meander lines may have the same line width, and the spacing between adjacent second power meander lines may be the same. Multiple second power meander lines within the same group of second power meander lines may be interconnected. Each group of control meander lines may include multiple control meander lines arranged along the second direction X. Control meander lines transmitting the same signal may have the same line width, and the spacing between adjacent control meander lines may be the same.

[0099] In some examples, the multiple signal meander lines within the bend region B12 may be located in the same conductive film layer, such as the second source / drain metal layer. However, this embodiment is not limited to this. For example, the multiple signal meander lines may be located in the first source / drain metal layer, or in the third source / drain metal layer.

[0100] In some examples, the first group of control bending lines 341, the first group of second power bending lines 331, the fourth group of first power bending lines 324, the third group of data bending lines 313, the second group of first power bending lines 322, the first group of data bending lines 311, the first group of first power bending lines 321, the second group of data bending lines 312, the third group of first power bending lines 323, the fourth group of data bending lines 314, the fifth group of first power bending lines 325, the second group of second power bending lines 332, and the second group of control bending lines 342 can be arranged in sequence along the second direction X.

[0101] In some examples, the plurality of data bending lines may be arranged symmetrically about the third centerline O3. Specifically, the number of data bending lines in the first group of data bending lines 311 and the number of data bending lines in the second group of data bending lines 312 may be the same, and the first group of data bending lines 311 and the second group of data bending lines 312 may be arranged symmetrically about the third centerline O3. Furthermore, the number of data bending lines in the third group of data bending lines 313 and the number of data bending lines in the fourth group of data bending lines 314 may be the same, and the third group of data bending lines 313 and the fourth group of data bending lines 314 may be arranged symmetrically about the third centerline O3.

[0102] In some examples, multiple first power fold lines can be symmetrically arranged about the third centerline O3. Specifically, the first group of first power fold lines 321 can be arranged symmetrically about the third centerline O3. The number of first power fold lines in the second group of first power fold lines 322 can be the same as the number of first power fold lines in the third group of first power fold lines 323, and the second group of first power fold lines 322 and the third group of first power fold lines 323 can be arranged symmetrically about the third centerline O3. The number of first power fold lines in the fourth group of first power fold lines 324 and the number of first power fold lines in the fifth group of first power fold lines 325 can be the same, and the fourth group of first power fold lines 324 and the fifth group of first power fold lines 325 can be arranged symmetrically about the third centerline O3.

[0103] In some examples, the total length of the first group of first power zigzag lines 321 along the second direction X can be greater than the total length of the second group of first power zigzag lines 322 along the second direction X, and greater than the total length of the fourth group of first power zigzag lines 324 along the second direction X. The total lengths of the second group of first power zigzag lines 322, the third group of first power zigzag lines 323, the fourth group of first power zigzag lines 324, and the fifth group of first power zigzag lines 325 along the second direction X can be substantially the same. However, this embodiment is not limited to this. For example, the total lengths of the second group of first power zigzag lines 322 and the third group of first power zigzag lines 323 along the second direction X can be substantially the same, the total lengths of the fourth group of first power zigzag lines 324 and the fifth group of first power zigzag lines 325 along the second direction X can be substantially the same, and the total lengths of the second group of first power zigzag lines 322 and the fourth group of first power zigzag lines 324 along the second direction X can be different. Taking a group of first power bending lines including N first power bending lines as an example, the total length of the group of first power bending lines along the second direction may include: the line widths of the N first power bending lines in the group of first power bending lines and the sum of the lengths of N-1 adjacent intervals.

[0104] In some examples, the plurality of second power meander lines may be symmetrically arranged about the third center line O3. The number of second power meander lines in the first group of second power meander lines 331 and the number of second power meander lines in the second group of second power meander lines 332 may be the same, and the first group of second power meander lines 331 and the second group of second power meander lines 332 may be symmetrically arranged about the third center line O3.

[0105] In some examples, multiple control bending lines can be arranged symmetrically about the third centerline O3. The number of control bending lines in the first group of control bending lines 341 and the number of control bending lines in the second group of control bending lines 342 can be the same, and the first group of control bending lines 341 and the second group of control bending lines 342 can be arranged symmetrically about the third centerline O3. In some examples, the control bending lines in the first group of control bending lines 341 or the second group of control bending lines 342 can include: active control bending lines and inactive control bending lines. If the number of active control bending lines in the first group of control bending lines 341 and the second group of control bending lines 342 is different, inactive control bending lines can be provided to ensure that the number of control bending lines in the first group of control bending lines 341 and the second group of control bending lines 342 are the same and that they are arranged symmetrically about the third centerline O3.

[0106] In some examples, the third center line O3 may coincide with the second center line O2. In other words, the plurality of signal bending lines of the bending area B12 may be symmetrically arranged about the second center line O2.

[0107] In some examples, the minimum distance between the first trace edge B121 and the first frame edge B101 is a first edge distance a, and the minimum distance between the second trace edge B122 and the second frame edge B102 is a second edge distance b. The ratio of the first edge distance a to the second edge distance b can be 0.9 to 1.1. For example, the first edge distance a can be equal to the second edge distance b. For example, the first edge distance a can be greater than or equal to 0.4 mm, and the second edge distance b can be greater than or equal to 0.4 mm.

[0108] In this example, the signal bending line of the bending area B12 is set symmetrically about the second center line O2, and the first edge distance a and the second edge distance b are roughly the same, which can reduce the wiring differences within the lower left frame and the lower right frame, and is conducive to reducing the transmission load differences of the same signal in the lower left frame and the lower right frame.

[0109] Figure 4 for Figure 3 A partial enlarged schematic diagram of the middle area S1. Figure 4 The first group of data bending lines 311, the second group of data bending lines 312 and the first group of first power bending lines 321 are schematically shown in FIG. Figure 4As shown, the multiple data lines in the display area AA are divided into a first group of data lines DL1a and a second group of data lines DL1b based on a first center line O1. The number of data lines in the first group of data lines DL1a and the number of data lines in the second group of data lines DL1b can be the same. For example, the first group of data lines DL1a and the second group of data lines DL1b can be arranged symmetrically about the first center line O1. For example, the multiple data lines can be located in the second source and drain metal layer or the third source and drain metal layer.

[0110] In some examples, such as Figure 4 As shown, the first sub-area B11 may be provided with a plurality of first data fan-out lines. The plurality of first data fan-out lines may include a first group of first data fan-out lines 211 and a second group of first data fan-out lines 212. The first group of first data fan-out lines 211 may be connected to the first group of data lines DLa, and the second group of first data fan-out lines 212 may be connected to the second group of data lines DLb. The first group of first data fan-out lines 211 may include a plurality of first data fan-out lines 21a, and the plurality of first data fan-out lines 21a may be electrically connected to the plurality of data lines in the first group of data lines DLa in a one-to-one correspondence. The second group of first data fan-out lines 212 may include a plurality of first data fan-out lines 21b, and the plurality of second data fan-out lines 21b may be electrically connected to the plurality of data lines in the second group of data lines DLb in a one-to-one correspondence. For example, the plurality of first data fan-out lines may be alternately arranged in the first gate metal layer and the second gate metal layer, and the orthographic projections of adjacent first data fan-out lines on the substrate may not overlap.

[0111] In some examples, the first data fan-out line 21a may include a first data extension segment 21-1a and a second data extension segment 21-2a that are interconnected. The second data extension segment 21-2a may be connected to at least one data bend line within a set of data bend lines (e.g., the first set of data bend lines 311). The first data extension segment 21-1a may be located on a side of the second data extension segment 21-2a that is closer to the display area AA. The second data extension segment 21-2a may be a straight line segment extending along the first direction Y. The extension direction of the first data extension segment 21-1a may intersect the first direction Y. For example, the first data extension segment 21-1a may be an oblique line segment whose extension direction intersects both the first direction Y and the second direction X.

[0112] In some examples, the first data fan-out line 21b may include a first data extension segment 21-1b and a second data extension segment 21-2b that are interconnected. The second data extension segment 21-2b may be connected to at least one data bend line within a set of data bend lines (e.g., the second set of data bend lines 312). The first data extension segment 21-1b may be located on a side of the second data extension segment 21-2b that is closer to the display area AA. The second data extension segment 21-2b may be a straight line segment extending along the first direction Y. The extension direction of the first data extension segment 21-1b may intersect the first direction Y. For example, the first data extension segment 21-1b may be an oblique line segment whose extension direction intersects both the first direction Y and the second direction X.

[0113] In some examples, the length of the first data extension segment 21-1a of at least one first data fan-out line (e.g., first data fan-out line 21a) near the first center line O1 and located on a first side (e.g., the left side) of the first center line O1 can be greater than the length of the first data extension line 21-1b of at least one first data fan-out line (e.g., first data fan-out line 21b) near the first center line O1 and located on a second side (e.g., the right side) of the first center line O1. The length of the second data extension segment 21-2a of the at least one first data fan-out line 21a near the first center line O1 can be less than the length of the second data extension line 21-2b of the at least one first data fan-out line 21b near the first center line O1. In this example, by setting the length of the first data extension segment 21-1a to be greater than the length of the first data extension segment 21-1b, the symmetric center lines of the data bending lines in the bending area B12 can be moved toward the side opposite to the first center line O1 along the second direction X. For example, the symmetric center lines of multiple data bending lines in the bending area B12 (i.e., the third center line O3) can be made to coincide with the second center line O2.

[0114] In some examples, the second sub-area B13 may be provided with multiple data lead lines. The multiple data lead lines may include at least: a first group of data lead lines 411 and a second group of data lead lines 412. The first group of data lead lines 411 may be connected to the first group of data meander lines 311, and the second group of data lead lines 412 may be connected to the second group of data meander lines 312. The number of data lead lines located on both sides of the second center line O2 may be the same, and the data lead lines located on both sides of the second center line O2 may not be arranged symmetrically about the second center line O2. For example, the multiple data lead lines may be arranged alternately in the first gate metal layer and the second gate metal layer, and the orthographic projections of adjacent data lead lines on the substrate may not overlap. However, this embodiment is not limited to this. In other examples, the data lead lines located on both sides of the second center line O2 may be arranged symmetrically about the second center line O2.

[0115] In this example, the multiple signal bending lines in bending region B12 can be arranged symmetrically about the third centerline O3, and the third centerline O3 can coincide with the second centerline O2. This ensures consistency of the signal bending lines in the regions on both sides of the second centerline O2, thereby ensuring a good bending effect. For example, this arrangement can ensure that the routing loads of the same signal within the bending regions on both sides of the second centerline O2 are consistent, thereby avoiding display issues caused by inconsistent signal loads.

[0116] In some examples, the multiple first data fan-out lines within the first sub-area B11 are not symmetrically arranged about the second center line O2, and the multiple data lead lines within the second sub-area B13 are not symmetrically arranged about the second center line O2. The multiple data contact pads provided in the first signal access area B14 can be symmetrically arranged about the second center line O2, and the multiple data lead lines can be connected to the multiple data contact pads. For example, a data load compensation structure can be provided in the second sub-area B13 to achieve load uniformity for data signals transmitted in the first border area.

[0117] In some examples, the second sub-area B13 may include a second fan-out area and a third fan-out area. The plurality of data lead lines may include: a plurality of second data fan-out lines located in the second fan-out area and a plurality of third data fan-out lines located in the third fan-out area. The data load compensation structure may be located in at least one of the second and third fan-out areas of the second sub-area. The data load compensation structure may be connected in series with the data lead lines in the second sub-area. For example, the data load compensation structure may be located in the second fan-out area and connected in series with the second data fan-out line, or located in the third fan-out area and connected in series with the third data fan-out line. In some examples, the data load compensation structure may be a serpentine trace, which increases resistance by increasing the length of the data lead line. A serpentine trace is a meandering curve. For example, one end of the trace extends a certain distance in one direction, then bends and twists and extends a certain distance in the opposite direction, then bends and twists again to extend in the same direction, and repeats this process several times to form a serpentine trace.

[0118] In other examples, the resistance of the data lead lines in the second sub-region can be increased by thinning them to achieve load compensation. Alternatively, the resistance of the data lead lines in the second sub-region can be increased by increasing the number of jumpers between multiple segments to achieve load compensation. Alternatively, the resistance of the data lead lines in the second sub-region can be increased by placing them in a conductive layer with a higher resistivity.

[0119] In other examples, the resistance can be reduced by increasing the line width of the data lead lines in the second sub-region to perform load compensation. Alternatively, the resistance can be reduced by configuring the data lead lines in the second sub-region as double-layer or multi-layer routing. Alternatively, the resistance can be reduced by configuring the data lead lines in the second sub-region as a conductive layer with a lower resistivity. This embodiment does not limit the load compensation method for the data signal in the first border region.

[0120] Figure 5 This is another partial structural diagram of the first border area of ​​at least one embodiment of the present disclosure. Figure 6 This is a schematic diagram of local wiring in the first border area of ​​at least one embodiment of the present disclosure. Figure 5 and Figure 6 Schematically illustrates each group of data bending lines, each group of first power bending lines, each group of second power bending lines, each group of control bending lines, and each group of touch bending lines in the bending area B12.

[0121] In some examples, such as Figure 5 and Figure 6 As shown, the bending area B12 can be provided with: four groups of data bending lines (for example, including a first group of data bending lines 311, a second group of data bending lines 312, a third group of data bending lines 313 and a fourth group of data bending lines 314), three groups of first power bending lines (for example, including a first group of first power bending lines 321, a second group of first power bending lines 322 and a third group of first power bending lines 323), four groups of second power bending lines (for example, including a first group of second power bending lines 331, a second group of second power bending lines 332, a third group of second power bending lines 333 and a fourth group of second power bending lines 334), two groups of control bending lines (for example, including a first group of control bending lines 341 and a second group of control bending lines 342), and two groups of touch bending lines (for example, including a first group of touch bending lines 351 and a second group of touch bending lines 352). The multiple signal bending lines within the bending area B12 can have a fourth center line O4 extending along the first direction Y, the fourth center line O4 can coincide with the third center line O3, the multiple signal bending lines within the bending area B12 can be symmetrically arranged about the third center line O3, and the third center line O3 can coincide with the second center line O2.

[0122] In some examples, the first group of control bending lines 341, the third group of second power bending lines 333, the first group of touch bending lines 351, the first group of second power bending lines 331, the third group of data bending lines 313, the second group of first power bending lines 322, the first group of data bending lines 311, the first group of first power bending lines 321, the second group of data bending lines 312, the third group of first power bending lines 323, the fourth group of data bending lines 314, the second group of second power bending lines 332, the second group of touch bending lines 351, the fourth group of second power bending lines 334, and the second group of control bending lines 342 can be arranged in sequence along the second direction X.

[0123] In some examples, such as Figure 6 As shown, the first sub-area B11 may be provided with a plurality of first data fan-out lines, a first peripheral power line 22, second peripheral power lines 231 and 232, and a plurality of peripheral control lines (for example, including a first group of peripheral control lines 241 and a second group of peripheral control lines 242). The plurality of first data fan-out lines may include a first group of first data fan-out lines, a second group of first data fan-out lines, a third group of first data fan-out lines 213, and a fourth group of first data fan-out lines 214. The third group of first data fan-out lines 213, the first group of first data fan-out lines, the second group of first data fan-out lines, and the fourth group of first data fan-out lines 214 may be arranged sequentially along the second direction X. The first group of first data fan-out lines may be connected to the first group of data bending lines 311, the second group of first data fan-out lines may be connected to the second group of data bending lines 312, the third group of first data fan-out lines 213 may be connected to the third group of data bending lines 313, and the fourth group of first data fan-out lines 214 may be connected to the fourth group of data bending lines 314. For example, the plurality of first data fan-out lines may be alternately arranged in the first gate metal layer and the second gate metal layer, or may all be located in the first gate metal layer, or may all be located in the second gate metal layer.

[0124] In some examples, the first peripheral power line 22 can be a single-layer trace located in the first source-drain metal layer, or can be a single-layer trace located in the second source-drain metal layer, or can be a double-layer trace located in the first source-drain metal layer and the second source-drain metal layer. The first peripheral power line 22 may include a first power main body extending along the second direction X and a plurality of first power connection portions (for example, three first connection portions) extending along the first direction Y. The three first power connection portions can be electrically connected to three groups of first power bending lines (for example, including a first group of first power bending lines 321, a second group of first power bending lines 322, and a third group of first power bending lines 323) in a one-to-one correspondence. For example, a first power connection portion and a corresponding group of first power bending lines can be an integrated structure connected to each other. In some examples, the first peripheral power line 22 can be roughly symmetrical about the third center line O3.

[0125] In some examples, the second peripheral power lines 231 and 232 may be located on a side of the first power main portion of the first peripheral power line 22 that is away from the display area AA. The second peripheral power line 231 may extend toward the second border area B2, and the second peripheral power line 232 may extend toward the third border area B3. The second peripheral power line 231 may be located on one side of the third centerline O3, and the second peripheral power line 232 may be located on the other side of the third centerline O3. For example, the second peripheral power lines 231 and 232 may be substantially symmetrical about the third centerline O3. The second peripheral power line 231 may be connected to the first group of second power meander lines 331 and the third group of second power meander lines 333. The second peripheral power line 232 may be connected to the second group of second power meander lines 332 and the fourth group of second power meander lines 334. In some examples, the second peripheral power lines 231 and 232 may be single-layer traces located in the first source / drain metal layer, single-layer traces located in the second source / drain metal layer, or double-layer traces located in both the first source / drain metal layer and the second source / drain metal layer.

[0126] In some examples, the first group of peripheral control lines 241 can be located on one side of the third center line O3, and the second group of peripheral control lines 242 can be located on the other side of the third center line O3. The first group of peripheral control lines 241 can extend toward the second border area B2, and the second group of peripheral control lines 242 can extend toward the third border area B3. The first group of peripheral control lines 241 can be connected to the first group of control bending lines 341, and the second group of peripheral control lines 242 can be connected to the second group of control bending lines 342. The multiple peripheral control lines can be located on a side of the second peripheral power lines 231 and 232 that is close to the substrate, for example, in the first gate metal layer or the second gate metal layer.

[0127] In some examples, the second sub-area B13 may be provided with a first power lead 42, second power lead 431 and 432, a plurality of control lead 441 and a second control lead 442, and a plurality of data lead 413 and a fourth data lead 414. The third data lead 413, the first data lead, the second data lead, and the fourth data lead 414 may be arranged along the second direction X. The first data lead may be connected to the first data meandering line 311, the second data lead may be connected to the second data meandering line 312, the third data lead 413 may be connected to the third data meandering line 313, and the fourth data lead 414 may be connected to the fourth data meandering line 314. The first group of data bending lines 311 can electrically connect the first group of first data fan-out lines to the first group of data lead-out lines, the second group of data bending lines 312 can electrically connect the second group of first data fan-out lines to the second group of data lead-out lines, the third group of data bending lines 313 can electrically connect the third group of first data fan-out lines to the third group of data lead-out lines, and the fourth group of data bending lines 314 can electrically connect the fourth group of first data fan-out lines to the fourth group of data lead-out lines. In some examples, the multiple data lead-out lines can be alternately arranged in the first gate metal layer and the second gate metal layer, or can all be arranged in the first gate metal layer, or can all be arranged in the second gate metal layer.

[0128] In some examples, such as Figure 5 and Figure 6As shown, the first power lead 42 may include: a second power main body 420 extending along the second direction X; a first power extension 421 and a second power extension 422 extending along the first direction Y and located on the side of the second power main body 420 away from the bending region B12; and a plurality of second power connection portions (e.g., including three second power connection portions) extending along the second direction Y and located on the side of the second power main body 420 closer to the bending region B12. The second power main body 420, the first power extension 421, the second power extension 422, and the plurality of second power connection portions may be interconnected and integrally formed. For example, the first power lead 42 may be substantially symmetrical about the third centerline O3. The first power extension 421 is connected to one end of the second power main body 420 in the second direction X, and the second power extension 422 is connected to the other end of the second power main body 420 in the second direction X. The first power extension portion 421 can extend from the first signal access area B14 on one side (e.g., the left side) opposite to the second direction X, bypassing the first signal access area B14, and extending to the second signal access area B15, thereby connecting to the second contact pad within the second signal access area B15. The second power extension portion 422 can extend from the first signal access area B14 on the other side (e.g., the right side) of the first signal access area B14, bypassing the first signal access area B14, and extending to the second signal access area B15, thereby connecting to the second contact pad within the second signal access area B15. The three second power connectors can be electrically connected to the first group of first power meander lines 321, the second group of first power meander lines 322, and the third group of first power meander lines 323 in a one-to-one correspondence, thereby achieving electrical connection with the first peripheral power lines 22 within the first sub-area B11. In some examples, the first power lead 42 can be a single-layer trace located in the first source / drain metal layer, a single-layer trace located in the second source / drain metal layer, or a double-layer trace located in both the first source / drain metal layer and the second source / drain metal layer.

[0129] In some examples, the second power lead 431 can be located on one side of the first power lead 42 in the opposite direction of the second direction X, and the second power lead 432 can be located on one side of the first power lead 42 in the second direction X. The second power lead 431 can be connected to the first group of second power meandering lines 331 and the third group of second power meandering lines 333 to achieve electrical connection with the second peripheral power lines 231 in the first sub-region B11; the second power lead 432 can be connected to the second group of second power lead 332 and the fourth group of second power lead 334 to achieve electrical connection with the second peripheral power lines 232 in the first sub-region B11. For example, the second power lead 431 and the second power lead 432 can be substantially symmetrical about the third centerline O3. In some examples, the second power lead lines 431 and 432 can be single-layer lines located in the first source-drain metal layer, or can be single-layer lines located in the second source-drain metal layer, or can be double-layer lines located in the first source-drain metal layer and the second source-drain metal layer.

[0130] In some examples, the first power lead 42 is configured to transmit a first voltage signal, and the second power lead 431 and 432 are configured to transmit a second voltage signal. The first voltage signal is different from the second voltage signal. For example, the first voltage signal can be greater than the second voltage signal. The first voltage signal can be configured to be provided to the pixel circuit of the sub-pixel in the display area, and the second voltage signal can be configured to be provided to the cathode of the light-emitting element of the sub-pixel in the display area. This embodiment is not limited to this.

[0131] In some examples, the first group of control lead lines 441 can be connected to the first group of control meandering lines 341 to achieve electrical connection with the first group of peripheral control lines 241 within the first sub-region B11; the second group of control lead lines 442 can be connected to the second group of control meandering lines 342 to achieve electrical connection with the second group of peripheral control lines 242 within the first sub-region B11. The multiple control lead lines can include: lines that provide signals (such as start signals, clock signals, voltage signals, etc.) to the gate drive circuit, lines that transmit panel test signals, etc.

[0132] The signal bending lines of the bending area B12 of this example can be symmetrically arranged about the third center line O3, and the third center line O3 can coincide with the second center line O2. The first edge distance a and the second edge distance b are roughly the same, which can ensure the density of the routing and the consistency of the film layer of the bending area B12 in the area on both sides of the second center line O2, so as to ensure the bending performance. This example can ensure the load consistency of the signals transmitted by the first group of control bending lines 341 and the second group of control bending lines 342, avoiding display problems caused by inconsistent signal loads on both sides. This example can also ensure the transmission load consistency of the first voltage signal and the second voltage signal on both sides of the second center line. This example can also ensure that the space of the first border area is maximized. Regarding the remaining structures of the first border area of ​​this example, reference can be made to the description of the aforementioned embodiment, so they will not be repeated here.

[0133] Figure 7 FIG. 1 is another partial schematic diagram of the first border area of ​​at least one embodiment of the present disclosure. Figure 7 As shown, the bending area B12 can be provided with: four groups of data bending lines (for example, a first group of data bending lines 311, a second group of data bending lines 312, a third group of data bending lines 313 and a fourth group of data bending lines 314), three groups of first power bending lines (for example, a first group of first power bending lines 321, a second group of first power bending lines 322, a third group of first power bending lines 323), two groups of second power bending lines (for example, a first group of second power bending lines 331 and a second group of second power bending lines 332) and two groups of control bending lines (for example, a first group of control bending lines 341 and a second group of control bending lines 342).

[0134] In some examples, the first group of control bending lines 341, the first group of second power bending lines 331, the third group of data bending lines 313, the second group of first power bending lines 322, the first group of data bending lines 311, the first group of first power bending lines 321, the second group of data bending lines 312, the third group of first power bending lines 323, the fourth group of data bending lines 314, the second group of second power bending lines 332 and the second group of control bending lines 342 can be arranged in sequence along the second direction X.

[0135] In some examples, the first group of data bending lines 311 and the second group of data bending lines 312 can be symmetrically arranged about the third center line O3, the second group of data bending lines 313 and the fourth group of data bending lines 314 can be symmetrically arranged about the third center line O3, the first group of first power bending lines 321 can be symmetrically arranged about the third center line O3, the second group of first power bending lines 322 and the third group of first power bending lines 323 can be symmetrically arranged about the third center line O3, the first group of second power bending lines 331 and the second group of second power bending lines 332 can be symmetrically arranged about the third center line O3, and the first group of control bending lines 341 and the second group of control bending lines 342 can be symmetrically arranged about the third center line O3.

[0136] In some examples, the fourth centerline O4 coincides with the third centerline O3. The third centerline O3 may coincide with the second centerline O2. The first edge distance a and the second edge distance b may be substantially the same. In this example, by arranging a set of signal bending lines in the bending area B12 symmetrically about the second centerline O2, and by making the first edge distance a and the second edge distance b substantially the same, wiring differences within the lower left and right borders can be reduced, thereby facilitating reduced transmission load differences for the same signal within the lower left and right borders.

[0137] The rest of the description about the first border area of ​​this example can refer to the description of the aforementioned embodiment, so it will not be repeated here.

[0138] Figure 8 This is another partial schematic diagram of the first border area of ​​at least one embodiment of the present disclosure. Figure 9 for Figure 8 A partial enlarged schematic diagram of the middle region S2. In some examples, such as Figure 8 and Figure 9 As shown, the multiple signal bending lines in the bending area B12 may include: four groups of data bending lines (for example, including a first group of data bending lines 311, a second group of data bending lines 312, a third group of data bending lines 313 and a fourth group of data bending lines 314), five groups of first power bending lines (for example, including a first group of first power bending lines 321, a second group of first power bending lines 322, a third group of first power bending lines 323, a fourth group of first power bending lines 324 and a fifth group of first power bending lines 325), two groups of second power bending lines (for example, including a first group of second power bending lines 331, a second group of second power bending lines 332), and two groups of control bending lines (for example, including a first group of control bending lines 341 and a second group of control bending lines 342).

[0139] In some examples, such as Figure 8As shown, the first group of control bending lines 342, the first group of second power bending lines 331, the fourth group of first power bending lines 324, the third group of data bending lines 313, the second group of first power bending lines 322, the first group of data bending lines 311, the first group of first power bending lines 321, the second group of data bending lines 313, the third group of first power bending lines 323, the fourth group of data bending lines 314, the fifth group of first power bending lines 325, the second group of second power bending lines 332 and the second group of control bending lines 342 can be arranged in sequence along the second direction X.

[0140] In some examples, the multiple signal meander lines in the bend region B12 may have a fourth centerline O4 extending along the first direction Y, and the fourth centerline O4 may coincide with the third centerline O3. For example, the multiple signal meander lines may be symmetrically arranged about the third centerline O3. The orthographic projection of the lines in the bend region B12 onto the substrate may have a first line edge B121 and a second line edge B122 extending along the first direction Y. The first line edge B121 may be the left edge of the line, and the second line edge B122 may be the right edge of the line. The distance between the third centerline O3 and the first line edge B121 and the distance between the third centerline O3 and the second line edge B122 may be the same.

[0141] In some examples, the distance between the third centerline O3 and the second centerline O2 in the second direction X may be greater than zero. The third centerline O3 and the second centerline O2 may not overlap. For example, the third centerline O3 may be located between the second centerline O2 and the first centerline O1. The distance between the third centerline O3 and the first centerline O1 may be the same as or different from the distance between the third centerline O3 and the second centerline O2. The first centerline O1 may be located on one side of the second centerline O2 in the second direction X. However, this embodiment is not limited to this. In other examples, the third centerline O3 may overlap with the first centerline O1.

[0142] In some examples, the minimum distance between the first trace edge B121 and the first frame edge B101 is a first edge distance a, and the minimum distance between the second trace edge and the second frame edge B102 is a second edge distance b. The first edge distance a can be different from the second edge distance b. For example, the ratio of the first edge distance a to the second edge distance b can be greater than 1. In other words, the first edge distance a can be greater than the second edge distance b. The first edge distance a can be greater than or equal to 0.4 mm, and the second edge distance b can be greater than or equal to 0.4 mm.

[0143] In some examples, such as Figure 9As shown, the first sub-area B11 may be provided with a plurality of first data fan-out lines. The plurality of first data fan-out lines may include a first group of first data fan-out lines 211 and a second group of first data fan-out lines 212. The first group of first data fan-out lines 211 may be connected to the first group of data lines DLa, and the second group of first data fan-out lines 212 may be connected to the second group of data lines DLb. The first group of first data fan-out lines 211 may include a plurality of first data fan-out lines 21a, and the plurality of first data fan-out lines 21a may be electrically connected to the plurality of data lines in the first group of data lines DLa in a one-to-one correspondence. The second group of first data fan-out lines 212 may include a plurality of first data fan-out lines 21b, and the plurality of second data fan-out lines 21b may be electrically connected to the plurality of data lines in the second group of data lines DLb in a one-to-one correspondence.

[0144] In some examples, the first data fan-out line 21a may include a first data extension segment 21-1a and a second data extension segment 21-2a connected to each other. The second data extension segment 21-2a may be connected to at least one data bend line within a set of data bend lines (e.g., the first set of data bend lines 311). The first data extension segment 21-1a may be located on a side of the second data extension segment 21-2a closer to the display area AA. The second data extension segment 21-2a may be a straight line segment extending along the first direction Y. The extension direction of the first data extension segment 21-1a may intersect the first direction Y. For example, the first data extension segment 21-1a may be an oblique line segment whose extension direction intersects both the first direction Y and the second direction X.

[0145] In some examples, the first data fan-out line 21b may include a first data extension segment 21-1b and a second data extension segment 21-2b connected to each other. The second data extension segment 21-2b may be connected to at least one data bend line within a set of data bend lines (e.g., the second set of data bend lines 312). The first data extension segment 21-1b may be located on a side of the second data extension segment 21-2b closer to the display area AA. The second data extension segment 21-2b may be a straight line segment extending along the first direction Y. The extension direction of the first data extension segment 21-1b may intersect the first direction Y. For example, the first data extension segment 21-1b may be an oblique line segment whose extension direction intersects both the first direction Y and the second direction X.

[0146] In some examples, the length of the first data extension segment 21-1a of at least one first data fan-out line 21a near the first center line O1 may be greater than the length of the first data extension line 21-1b of at least one first data fan-out line 21b near the first center line O1. In this example, the ratio of the length of the first data extension segment 21-1a of the first data fan-out line 21a to the length of the first data extension segment 21-b of the first data fan-out line 21b may be less than Figure 4The length ratio of the first data extension segment 21-1a of the first data fan-out line 21a to the first data extension segment 21-b of the first data fan-out line 21b in the illustrated embodiment can reduce the load difference between the first data fan-out lines on both sides of the first center line O1.

[0147] In this example, the routing of the bending area B12 can be arranged roughly symmetrically about the third center line O3. By adjusting the first edge distance a and the second edge distance b (for example, the first edge distance a is greater than the second edge distance b), the third center line O3 can be located between the second center line O2 and the first center line O1, reducing the load difference between the first data fan-out lines in the first sub-area B11, thereby facilitating the compensation of the data signal and helping to achieve load consistency of the data signal. This example can reduce the wiring differences within the lower left and lower right borders, which is beneficial to reducing the transmission load differences of the same signal within the lower left and lower right borders. The remaining description of this example can refer to the description of the aforementioned embodiment, so it will not be repeated here.

[0148] Figure 10 This is another partial schematic diagram of the first border area of ​​at least one embodiment of the present disclosure. Figure 11 for Figure 10 A partial enlarged schematic diagram of the middle region S3. In some examples, such as Figure 10 and Figure 11 As shown, the first distance L1 can be greater than the second distance L2, and the first centerline O2 can be located on one side of the first centerline O1 in the second direction X. The left and right sides of the third centerline O3 within the bending area B12 can be arranged roughly symmetrically. The third centerline O3 can be located between the first centerline O1 and the second centerline O2. The fourth centerline O4 can coincide with the third centerline O3.

[0149] In some examples, a ratio of the second edge distance b to the first edge distance a may be greater than 1. In other words, the second edge distance b may be greater than the first edge distance a.

[0150] In some examples, the length of the first data extension segment 21-1a of the at least one first data fan-out line 21a near the first center line O1 may be shorter than the length of the first data extension line 21-1b of the at least one first data fan-out line 21b near the first center line O1. The length of the second data extension segment 21-2a of the at least one first data fan-out line 21a near the first center line O1 may be longer than the length of the second data extension line 21-2b of the at least one first data fan-out line 21b near the first center line O1.

[0151] In this example, the routing of the bending area B12 can be arranged roughly symmetrically about the third center line O3. By adjusting the first edge distance a and the second edge distance b (for example, the second edge distance b is greater than the first edge distance a), the third center line O3 can be located between the second center line O2 and the first center line O1 (or coincide with the first center line O1), reducing the load difference between the first data fan-out lines in the first sub-area B11, thereby facilitating the compensation of the data signal, and can be beneficial to achieving load consistency of the data signal. This example can reduce the wiring differences within the lower left frame and the lower right frame, which is beneficial to reducing the transmission load difference of the same signal within the lower left frame and the lower right frame. The remaining description of this example can refer to the description of the aforementioned embodiment, so it will not be repeated here.

[0152] Figure 12 This is another partial schematic diagram of the first border area of ​​at least one embodiment of the present disclosure. Figure 13 for Figure 12 A partial enlarged schematic diagram of the middle region S4. In some examples, such as Figure 12 and Figure 13 As shown, the first center line O1 may be located on one side of the second center line O2 in the second direction X. The multiple signal bending lines in the bending area B12 may include: four groups of data bending lines (e.g., a first group of data bending lines 311, a second group of data bending lines 312, a third group of data bending lines 313, and a fourth group of data bending lines 314), five groups of first power bending lines (e.g., a first group of first power bending lines 321, a second group of first power bending lines 322, a third group of first power bending lines 323, a fourth group of first power bending lines 324, and a fifth group of first power bending lines 325), two groups of second power bending lines (e.g., a first group of second power bending lines 331 and a second group of second power bending lines 332), and two groups of control bending lines (e.g., a first group of control bending lines 341 and a second group of control bending lines 342). The first group of control bending lines 342, the first group of second power bending lines 331, the fourth group of first power bending lines 324, the third group of data bending lines 313, the second group of first power bending lines 322, the first group of data bending lines 311, the first group of first power bending lines 321, the second group of data bending lines 313, the third group of first power bending lines 323, the fourth group of data bending lines 314, the fifth group of first power bending lines 325, the second group of second power bending lines 332 and the second group of control bending lines 342 can be arranged in sequence along the second direction X.

[0153] In some examples, the total length of the first group of first power bending lines 321 along the second direction X may be less than Figure 8In the illustrated embodiment, the total length of the first group of first power supply meander lines along the second direction X can be reduced. For example, the total length along the second direction X can be reduced by reducing the number of first power supply meander lines in the first group of first power supply meander lines, or by reducing the spacing between adjacent first power supply meander lines in the first group of first power supply meander lines, or by reducing the line width and spacing of the first power supply meander lines in the first group of first power supply meander lines. This embodiment is not limited to this.

[0154] In some examples, the multiple signal bending lines in the bending region may have a fourth centerline O4 extending along the first direction Y. The multiple signal bending lines may be symmetrically arranged about the fourth centerline O4. The fourth centerline O4 may coincide with the third centerline O3, and the third centerline O3 may coincide with the first centerline O1. The multiple first data fan-out lines within the first sub-region B11 may be symmetrically arranged about the first centerline O1. For example, the multiple first data fan-out lines 21a and the multiple first data fan-out lines 21b may be symmetrically arranged about the first centerline O1. The first group of data lead lines 411 and the second group of data lead lines 412 may be symmetrically arranged about the first centerline O1.

[0155] In this example, by overall shifting the routing within the bending region B12 along the second direction X and reducing the length of the first group of first power bending lines along the second direction, combined with adjustments to the first edge distance a and the second edge distance b, the third centerline O3 can be made to coincide with the first centerline O1. This example allows the multiple first data fan-out lines within the first sub-region B11 to be roughly symmetrical about the first centerline O1, thereby ensuring data signal load consistency within the first sub-region. The symmetrical arrangement of the group of signal bending lines in this example about the first centerline O1 can help reduce wiring differences within the lower left and right borders, and thus help reduce differences in transmission load for the same signal within the lower left and right borders. The remaining description of this example can be found in the description of the aforementioned embodiment, and will not be repeated here.

[0156] Figure 14 FIG. 1 is another partial schematic diagram of the first border area of ​​at least one embodiment of the present disclosure. Figure 14As shown, the first center line O1 may be located on one side of the second center line O2 in the second direction X. The multiple signal bending lines in the bending area B12 may include: four groups of data bending lines (e.g., a first group of data bending lines 311, a second group of data bending lines 312, a third group of data bending lines 313, and a fourth group of data bending lines 314), five groups of first power bending lines (e.g., a first group of first power bending lines 321, a second group of first power bending lines 322, a third group of first power bending lines 323, a fourth group of first power bending lines 324, and a fifth group of first power bending lines 325), two groups of second power bending lines (e.g., a first group of second power bending lines 331 and a second group of second power bending lines 332), and two groups of control bending lines (e.g., a first group of control bending lines 341 and a second group of control bending lines 342). The first group of control bending lines 342, the first group of second power bending lines 331, the fourth group of first power bending lines 324, the third group of data bending lines 313, the second group of first power bending lines 322, the first group of data bending lines 311, the first group of first power bending lines 321, the second group of data bending lines 313, the third group of first power bending lines 323, the fourth group of data bending lines 314, the fifth group of first power bending lines 325, the second group of second power bending lines 332 and the second group of control bending lines 342 can be arranged in sequence along the second direction X.

[0157] In some examples, the length of the orthographic projection of the fourth group of first power bending lines 324 on the substrate along the second direction X may be greater than the length of the orthographic projection of the first group of first power bending lines 321 on the substrate along the second direction X; the length of the orthographic projection of the first group of first power bending lines 321 on the substrate along the second direction X may be greater than the length of the orthographic projection of the second group of first power bending lines 322, the third group of first power bending lines 323, and the fifth group of first power bending lines 325 on the substrate along the second direction X.

[0158] In some examples, the total length of the fourth group of first power supply bending lines 324 along the second direction X can be increased by at least one of the following methods: increasing the number of first power supply bending lines in the fourth group of first power supply bending lines 324, increasing the spacing between adjacent first power supply bending lines in the fourth group of first power supply bending lines 324, or increasing the width of the first power supply bending lines in the fourth group of first inner power supply bending lines 324. However, this embodiment is not limited to this.

[0159] In this example, the multiple power bending lines in the bending region may include: multiple first power bending lines and multiple second power bending lines. The first group of power bending lines located on one side of the third centerline O3 may include: a second group of first power bending lines 322, a fourth group of first power bending lines 324, half of the first group of first power bending lines 321, and a first group of second power bending lines 331. The second group of power bending lines located on the other side of the third centerline O3 may include: a third group of first power bending lines 323, a fifth group of first power bending lines 325, half of the first group of first power bending lines 321, and a second group of second power bending lines 332. By increasing the length of the fourth group of first power bending lines 324 along the second direction X, the length of the first group of power bending lines along the second direction X is increased to be greater than the length of the second group of power bending lines along the second direction X. However, this embodiment is not limited to this. In other examples, the length of the first group of second power bending lines 331 along the second direction X may be increased so that the length of the first group of second power bending lines along the second direction X is greater than the length of the second group of power bending lines along the second direction X.

[0160] In some examples, multiple data bending lines among the multiple signal bending lines may be symmetrically arranged about the third centerline O3. The multiple signal bending lines may have a fourth centerline O4 extending along the first direction Y. The fourth centerline O4 may be located on a side of the third centerline O3 closer to the second centerline O2. For example, the fourth centerline O4 may coincide with the second centerline O2. The multiple signal bending lines may be asymmetrically arranged about the fourth centerline O4.

[0161] In some examples, the third centerline O3 is a line of symmetry for multiple sets of data bending lines. The third centerline O3 may coincide with the first centerline O1. For example, the first set of data bending lines 311 and the second set of data bending lines 312 may be substantially symmetrical about the first centerline O1, and the third set of data bending lines 313 and the fourth set of data bending lines 314 may be substantially symmetrical about the first centerline O1. In this way, the multiple data fan-out lines within the first sub-area B11 can be symmetrically arranged about the first centerline O1, thereby reducing load differences between the first data fan-out lines on both sides of the first centerline O1 within the first sub-area B11, thereby facilitating load consistency for data signals.

[0162] In some examples, the first group of control bending lines 341 and the second group of control bending lines 342 are not symmetrically arranged about the third centerline O3, and the first group of second power bending lines 331 and the second group of second power bending lines 332 are not symmetrically arranged about the third centerline O3. For example, the first group of control bending lines 341 and the second group of control bending lines 342 can be symmetrically arranged about the second centerline O2, and the first group of second power bending lines 331 and the second group of second power bending lines 332 can be symmetrically arranged about the second centerline O2. The ratio of the first edge distance a to the second edge distance b can be 0.9 to 1.1. For example, the first edge distance a and the second edge distance b can be substantially the same. This can help improve the routing uniformity within the bending area and ensure the bending effect.

[0163] In this example, by increasing the length of the fourth group of first power meander lines 324 along the second direction X, multiple groups of data meander lines can be arranged symmetrically about the first center line O1, which can facilitate achieving data signal load consistency. Furthermore, the first edge distance and the second edge distance can be made substantially equal, thereby reducing wiring differences within the lower left and right frames, and facilitating reducing transmission load differences for the same signal within the lower left and right frames. The remaining description of this example can be found in the description of the previous embodiment, and will not be repeated here.

[0164] In other examples, the lengths of the fourth group of first power bending lines and the first group of second power bending lines along the second direction can be increased so that the multiple groups of data bending lines are symmetrically arranged about the first center line and the first edge distance and the second edge distance are approximately the same.

[0165] In other examples, the multiple groups of data bending lines can be symmetrically arranged about the first center line and the first edge distance and the second edge distance can be approximately the same by reducing the length of at least one of the fifth group of first power bending lines and the second group of second power bending lines along the second direction.

[0166] In other examples, by increasing the length of at least one of the fourth group of first power bend lines and the first group of second power bend lines along the second direction, and by reducing the length of at least one of the fifth group of first power bend lines and the second group of second power bend lines along the second direction, multiple groups of data bend lines can be symmetrically arranged about the first center line, and the first edge distance and the second edge distance can be approximately the same.

[0167] Figure 15 is another schematic diagram of a display substrate according to at least one embodiment of the present disclosure. Figure 15As shown, the display area AA can be provided with multiple data lines DL and multiple data transfer lines 25. At least one data line DL can be connected to the first data fan-out line of the first sub-area B11 through the data transfer line 25. The data transfer line 25 may include a first transfer section 251 extending along the second direction X and a second transfer section 252 extending along the first direction Y. The first transfer section 251 can be connected to the data line DL and the second transfer section 252, and the second transfer section 252 can be connected to the first data fan-out line. The second transfer section 252 can be located on the side of the connected data line DL away from the edge of the display substrate. In some examples, the first transfer section 251 and the second transfer section 252 can be located in the third source-drain metal layer, and the data line DL can be located in the second source-drain metal layer. However, this embodiment is not limited to this. The structural description of the first border area of ​​the display substrate of this example can refer to the description of the aforementioned embodiment, so it will not be repeated here.

[0168] This embodiment also provides a display substrate, comprising: a display area and a first frame area located on one side of the display area along a first direction. The first frame area comprises a bending area and a first sub-area located between the bending area and the display area. The display area has a first centerline extending along the first direction, and the first frame area has a second centerline extending along the first direction, with a distance between the first centerline and the second centerline being greater than zero. The display substrate comprises: a substrate, a plurality of sub-pixels and a plurality of data lines disposed on one side of the substrate and located in the display area, a plurality of first data fan-out lines located in the first sub-area, and a plurality of signal bending lines located in the bending area. The plurality of data lines are electrically connected to the plurality of sub-pixels and configured to provide data signals to the plurality of sub-pixels. The plurality of first data fan-out lines are connected to the plurality of data lines. The plurality of signal bending lines are located on the same conductive layer. The plurality of signal bending lines include at least a plurality of data bending lines connected to the plurality of first data fan-out lines, and the plurality of data bending lines are symmetrically arranged about a third centerline. The plurality of signal meander lines have a fourth centerline extending along the first direction, the fourth centerline coinciding with the third centerline or being located on a side of the third centerline closer to the second centerline. The first centerline, the second centerline, the third centerline, and the fourth centerline may extend in the same direction.

[0169] In this embodiment, in response to the situation where the first center line of the display area and the second center line of the first frame area are not on the same straight line, the multiple data bending lines in the bending area are symmetrically arranged according to the third center line, and the fourth center line of the multiple signal bending lines in the bending area coincides with the third center line, or is located on the side of the third center line close to the second center line. This can ensure the density of the data bending lines in the bending area and the consistency of the film layer, facilitate the bending effect, and improve the problem caused by the signal routing differences caused by the asymmetric shape of the display substrate.

[0170] In some exemplary embodiments, the multiple signal bending lines can be symmetrically arranged about the fourth center line; the third center line and the fourth center line coincide with the second center line. The first frame area has a first frame edge and a second frame edge extending along the first direction, and the first frame edge and the second frame edge are located on both sides of the signal bending line of the bending area along the second direction, and the second direction intersects the first direction. For example, the second direction can be perpendicular to the first direction. The minimum distance between the signal bending line of the bending area and the first frame edge is the first edge distance, and the minimum distance between the signal bending line of the bending area and the second frame edge is the second edge distance, and the ratio of the first edge distance to the second edge distance is 0.9 to 1.1. For example, the first edge distance can be equal to the second edge distance. This example can ensure the consistency of the distance between the wiring of the bending area and the two side edges of the display panel, which is beneficial to the wiring arrangement of the bending area and the bending effect.

[0171] In some exemplary embodiments, the multiple signal bend lines can be symmetrically arranged about the fourth center line. The third center line coincides with the fourth center line and is located between the first center line and the second center line; or, the third center line and the fourth center line coincide with the first center line. The first border area has a first border edge and a second border edge extending along the first direction, and the first border edge and the second border edge are located on both sides of the signal bend line of the bend area along the second direction. The minimum distance between the signal bend line of the bend area and the first border edge is the first edge distance, and the minimum distance between the signal bend line of the bend area and the second border edge is the second edge distance. The ratio of the first edge distance to the second edge distance is greater than 1, or the ratio of the second edge distance to the first edge distance is greater than 1. In other words, the first edge distance is different from the second edge distance. This example helps to ensure the symmetrical arrangement of the routing of the bend area by adjusting the difference between the first edge distance and the second edge distance, thereby reducing the difference between the signals in the first border area.

[0172] In some exemplary embodiments, multiple signal bending lines can be asymmetrically arranged about a fourth center line, the fourth center line can coincide with the second center line, and the third center line can coincide with the first center line. The first frame area can have a first frame edge and a second frame edge extending along the first direction, and the first frame edge and the second frame edge are located on both sides of the signal bending line of the bending area along the second direction. The minimum distance between the signal bending line of the bending area and the first frame edge is the first edge distance, and the minimum distance between the signal bending line of the bending area and the second frame edge is the second edge distance, and the ratio of the first edge distance to the second edge distance is 0.9 to 1.1. For example, the first edge distance can be equal to the second edge distance. This example can ensure the consistency of the distance between the wiring of the bending area and the two side edges of the display panel, which is beneficial to the wiring arrangement of the bending area and to ensure the bending effect.

[0173] The rest of the description of the display substrate of this embodiment can refer to the description of the aforementioned embodiment, and thus will not be repeated here.

[0174] Figure 16 is a schematic diagram of a display device according to at least one embodiment of the present disclosure. Figure 16 As shown, the display device 91 may include a display substrate 910. The display substrate 910 may be an OLED display substrate. The display device 91 may be any product or component with a display function, such as an OLED display device, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a foldable display screen, an in-vehicle display device, or a navigation system. However, this embodiment is not limited thereto.

[0175] In the description of this specification, the reference terms "one embodiment", "some embodiments", "example" or "some examples" and the like mean that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification and features of different embodiments or examples, unless they are mutually inconsistent.

[0176] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the present application. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A display substrate, characterized in that: include: a display area and a first frame area located on one side of the display area along a first direction; The first border region includes: a bending region and a first sub-region located between the bending region and the display region; the display region has a first centerline extending along the first direction, and the first border region has a second centerline extending along the first direction; a distance between the first centerline and the second centerline is greater than 0; The display substrate comprises: substrate; A plurality of sub-pixels are arranged on one side of the substrate and located in the display area; a plurality of data lines located in the display area, the plurality of data lines being electrically connected to the plurality of sub-pixels, and the plurality of data lines being configured to provide data signals to the plurality of sub-pixels; a plurality of first data fan-out lines, located in the first sub-area and connected to the plurality of data lines; A plurality of data bending lines are located in the bending area and connected to the plurality of first data fan-out lines, and the plurality of data bending lines are symmetrically arranged about a third center line; the third center line coincides with the first center line, or coincides with the second center line, or is located between the first center line and the second center line.

2. The display substrate according to claim 1, wherein: The display substrate further includes: a plurality of first power bending lines located in the bending region and extending along the first direction, the plurality of first power bending lines and the plurality of data bending lines being spaced apart along a second direction, the second direction intersecting the first direction; The first frame region further includes: a second sub-region located on a side of the bending region away from the first sub-region; The display substrate also includes: a first peripheral power line located in the first sub-area and a first power lead line located in the second sub-area, the first peripheral power line and the first power lead line are connected through the multiple first power bending lines; the multiple first power bending lines are symmetrically arranged about the third center line.

3. The display substrate according to claim 2, wherein: The plurality of data bending lines include: a first group of data bending lines, a second group of data bending lines, a third group of data bending lines and a fourth group of data bending lines; The plurality of first power bending lines at least include: a first group of first power bending lines, a second group of first power bending lines and a third group of first power bending lines; The third group of data bending lines, the second group of first power bending lines, the first group of data bending lines, the first group of first power bending lines, the second group of data bending lines, the third group of first power bending lines, and the fourth group of data bending lines are sequentially arranged along the second direction; The first group of data bending lines and the second group of data bending lines are symmetrically arranged about the third center line, and the third group of data bending lines and the fourth group of data bending lines are symmetrically arranged about the third center line; the second group of first power bending lines and the third group of first power bending lines are symmetrically arranged about the third center line, and the first group of first power bending lines are symmetrically arranged about the third center line.

4. The display substrate according to claim 3, wherein: The total length of the first group of first power bending lines along the second direction is greater than or equal to the total length of the second group of first power bending lines along the second direction, and greater than or equal to the total length of the third group of first power bending lines along the second direction.

5. The display substrate according to claim 3, wherein: The multiple first power bending lines also include: a fourth group of first power bending lines and a fifth group of first power bending lines, the fourth group of first power bending lines is located on a side of the third group of data bending lines away from the second group of first power bending lines, and the fifth group of first power bending lines is located on a side of the fourth group of data bending lines away from the third group of first power bending lines; the fourth group of first power bending lines and the fifth group of first power bending lines are symmetrically arranged about the third center line.

6. The display substrate according to claim 2, wherein: The display substrate further includes: a plurality of second power bending lines located in the bending area and extending along the first direction, the plurality of second power bending lines being located on both sides of the plurality of data bending lines along the second direction; The display substrate also includes: a second peripheral power line located in the first sub-area and a second power lead-out line located in the second sub-area, the second peripheral power line and the second power lead-out line are connected through the multiple second power bending lines, and the second voltage signal transmitted by the second peripheral power line is different from the first voltage signal transmitted by the first peripheral power line; the multiple second power bending lines are symmetrically arranged about the third center line.

7. The display substrate according to claim 6, wherein: The display substrate further includes: a plurality of control bending lines located in the bending area and extending along the first direction, the plurality of control bending lines being located on both sides of the plurality of second power bending lines along the second direction; the plurality of control bending lines being symmetrically arranged about the third center line.

8. The display substrate according to any one of claims 1 to 7, characterized in that: The third center line coincides with the second center line; The first frame area has a first frame edge and a second frame edge extending along the first direction, the first frame edge and the second frame edge are located on both sides of the alignment of the bending area along the second direction, and the second direction intersects the first direction; The minimum distance between the alignment of the bending area and the edge of the first frame is the first edge distance, the minimum distance between the alignment of the bending area and the edge of the second frame is the second edge distance, and the ratio of the first edge distance to the second edge distance is 0.9 to 1.

1.

9. The display substrate according to any one of claims 1 to 7, wherein: The third center line is located between the first center line and the second center line, or the third center line coincides with the first center line; The first frame area has a first frame edge and a second frame edge extending along the first direction, the first frame edge and the second frame edge are located on both sides of the alignment of the bending area along the second direction, and the second direction intersects the first direction; The minimum distance between the routing of the bending area and the edge of the first frame is the first edge distance, the minimum distance between the routing of the bending area and the edge of the second frame is the second edge distance, the ratio of the first edge distance to the second edge distance is greater than 1, or the ratio of the second edge distance to the first edge distance is greater than 1.

10. The display substrate according to claim 1, wherein At least one first data fan-out line among the plurality of first data fan-out lines comprises: a first data extension segment and a second data extension segment connected to each other, the second data extension segment being connected to at least one data bending line among the plurality of data bending lines, and the second data extension segment being a straight line segment extending along the first direction, and an extending direction of the first data extension segment intersecting the first direction; The second center line is located on a first side of the first center line in a second direction, and the second direction intersects the first direction; the third center line does not overlap with the first center line; A length of a first data extension segment of at least one first data fan-out line close to the first center line and located on a first side of the first center line is greater than a length of a first data extension segment of at least one first data fan-out line close to the first center line and located on a second side of the first center line.

11. The display substrate according to claim 1, wherein The third center line coincides with the first center line, and the plurality of first data fan-out lines are symmetrically arranged about the third center line.

12. The display substrate according to claim 11, wherein: The first frame region further includes: a second sub-region located on a side of the bending region away from the first sub-region; The display substrate further includes: a plurality of data lead lines located in the second sub-region, the plurality of data lead lines being connected to the plurality of data bending lines; the plurality of data lead lines being symmetrically arranged about the third center line.

13. The display substrate according to claim 1, wherein The display substrate further comprises: a plurality of power bending lines located in the bending region, the plurality of power bending lines and the plurality of data bending lines being spaced apart along a second direction, the second direction intersecting the first direction; The plurality of power bending lines include: a first group of power bending lines and a second group of power bending lines located on both sides of the third center line; A total length of the first group of power meandering lines along the second direction is different from a total length of the second group of power meandering lines along the second direction.

14. The display substrate according to claim 13, wherein: The third center line coincides with the first center line; The first frame area has a first frame edge and a second frame edge extending along the first direction, and the first frame edge and the second frame edge are located on both sides of the alignment of the bending area along the second direction; The minimum distance between the alignment of the bending area and the edge of the first frame is the first edge distance, the minimum distance between the alignment of the bending area and the edge of the second frame is the second edge distance, and the ratio of the first edge distance to the second edge distance is 0.9 to 1.

1.

15. The display substrate according to claim 13 or 14, characterized in that: The third center line coincides with the first center line, the second center line and the first group of power bending lines are located on the same side of the first center line; the total length of the first group of power bending lines along the second direction is greater than the total length of the second group of power bending lines along the second direction.

16. A display device, characterized in that: The display substrate comprises the display substrate according to any one of claims 1 to 15.

17. A display substrate, characterized in that: include: a display area and a first frame area located on one side of the display area along a first direction, the first frame area comprising: a bending area and a first sub-area located between the bending area and the display area; the display area having a first centerline extending along the first direction, the first frame area having a second centerline extending along the first direction, and a distance between the first centerline and the second centerline being greater than zero; The display substrate comprises: substrate; A plurality of sub-pixels are arranged on one side of the substrate and located in the display area; a plurality of data lines located in the display area, the plurality of data lines being electrically connected to the plurality of sub-pixels, and the plurality of data lines being configured to provide data signals to the plurality of sub-pixels; a plurality of first data fan-out lines, located in the first sub-area and connected to the plurality of data lines; a plurality of signal bending lines located in the bending region and in the same conductive layer; the plurality of signal bending lines at least comprising: a plurality of data bending lines, the plurality of data bending lines being connected to the plurality of first data fan-out lines, the plurality of data bending lines being symmetrically arranged about a third center line; The plurality of signal bending lines have a fourth center line extending along the first direction. The fourth center line coincides with the third center line, or is located on a side of the third center line close to the second center line.

18. The display substrate according to claim 17, wherein: The plurality of signal bending lines are symmetrically arranged about the fourth center line; the third center line and the fourth center line coincide with the second center line; The first frame area has a first frame edge and a second frame edge extending along the first direction, the first frame edge and the second frame edge are located on both sides of the signal bending line of the bending area along the second direction, and the second direction intersects the first direction; The minimum distance between the signal bending line of the bending area and the edge of the first frame is the first edge distance, the minimum distance between the signal bending line of the bending area and the edge of the second frame is the second edge distance, and the ratio of the first edge distance to the second edge distance is 0.9 to 1.

1.

19. The display substrate according to claim 17, wherein: The plurality of signal bending lines are symmetrically arranged about the fourth center line; the third center line coincides with the fourth center line and is located between the first center line and the second center line, or the third center line and the fourth center line coincide with the first center line; The first frame area has a first frame edge and a second frame edge extending along the first direction, the first frame edge and the second frame edge are located on both sides of the signal bending line of the bending area along the second direction, and the second direction intersects the first direction; The minimum distance between the signal bending line of the bending area and the edge of the first frame is the first edge distance, the minimum distance between the signal bending line of the bending area and the edge of the second frame is the second edge distance, the ratio of the first edge distance to the second edge distance is greater than 1, or the ratio of the second edge distance to the first edge distance is greater than 1.

20. The display substrate according to claim 17, wherein The plurality of signal bending lines are asymmetrically arranged about the fourth center line, the fourth center line coincides with the second center line, and the third center line coincides with the first center line; The first frame region has a first frame edge and a second frame edge extending along the first direction, the first frame edge and the second frame edge being located on both sides of a signal bending line of the bending region along the second direction; the second direction intersects the first direction; The minimum distance between the signal bending line of the bending area and the edge of the first frame is the first edge distance, the minimum distance between the signal bending line of the bending area and the edge of the second frame is the second edge distance, and the ratio of the first edge distance to the second edge distance is 0.9 to 1.1.

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