Plasma processing apparatus, power supply system, and etching method

Abstract

Provided is a technique for improving etching controllability. The plasma processing apparatus includes a source radio frequency generation section and a bias radio frequency generation section. The source radio frequency signal has a first source power level during the first deposition advantage period and the second deposition advantage period, and has a second source power level lower than the first source power level during the first etching advantage period and the second etching advantage period. The first deposition preponderant period is shorter than the second deposition preponderant period, and the first etch preponderant period is longer than the second etch preponderant period. The bias radio frequency signal has a first bias power level during the first deposition advantage period and the second deposition advantage period, and has a second bias power level higher than the first bias power level during the first etching advantage period and the second etching advantage period.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application is related to Japanese Patent Application No. 2022-93071 and Japanese Patent Application No. 2022-93119 filed on June 8, 2022, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Exemplary embodiments of the present disclosure relate to a plasma processing apparatus, a power supply system, and an etching method. Background Art

[0004] As a technology for improving etching processing performance in a plasma processing apparatus, there is a technology described in Patent Document 1.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Laid-Open No. 2021-182620 Summary of the Invention

[0008] The present disclosure provides a technique for improving etching controllability.

[0009] In an exemplary embodiment of the present disclosure, a plasma processing apparatus is provided, comprising: a chamber; a substrate support portion disposed in the chamber and including a lower electrode; a gas supply portion configured to supply a dual-mode gas into the chamber, the dual-mode gas including an etching gas and a deposition gas; a source RF generation portion configured to generate a source RF signal to generate plasma from the dual-mode gas in the chamber, the source RF signal having a first source power level during a first deposition-dominant period and a second deposition-dominant period, and having a second source power level lower than the first source power level during a first etching-dominant period and a second etching-dominant period, the first deposition-dominant period and the first etching-dominant period being included in the first deposition-dominant period. In each of a plurality of first sub-cycles in a sequence, a second deposition dominant period and a second etching dominant period are included in each of a plurality of second sub-cycles in a second sequence, the first sequence and the second sequence are included in the main cycle, the first deposition dominant period is shorter than the second deposition dominant period, and the first etching dominant period is longer than the second etching dominant period; and a bias RF generating unit, electrically connected to the lower electrode, configured to generate a bias RF signal, the bias RF signal having a first bias power level during the first deposition dominant period and the second deposition dominant period, and having a second bias power level higher than the first bias power level during the first etching dominant period and the second etching dominant period.

[0010] Effects of the Invention

[0011] According to an exemplary embodiment of the present disclosure, a technique for improving etching controllability may be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 It is a diagram for explaining an example of the configuration of a plasma processing apparatus.

[0013] Figure 2 This is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus.

[0014] Figure 3 : is a flowchart showing this processing method.

[0015] Figure 4 1 is a diagram showing an example of a cross-sectional structure of a substrate W provided in step ST1 .

[0016] Figure 5 This is a flowchart showing an example of step ST2.

[0017] Figure 6 1 is a diagram showing an example of supply of a source RF signal, a bias signal, and a process gas in cycle CY.

[0018] Figure 7A This is a diagram for explaining an example of a phenomenon occurring in step ST22.

[0019] Figure 7B This is a diagram for explaining an example of a phenomenon occurring in step 23.

[0020] Figure 8A This is a diagram for explaining an example of a phenomenon occurring in step ST26.

[0021] Figure 8B This is a diagram for explaining an example of a phenomenon occurring in step ST27.

[0022] Figure 9A 1 and 2 show other examples of the source RF signal and the bias signal supplied in the cycle CY.

[0023] Figure 9B 1 and 2 show other examples of the source RF signal and the bias signal supplied in the cycle CY.

[0024] Figure 10 FIG. 4 is a diagram showing another supply example of the source RF signal, the bias signal, and the process gas in the cycle CY.

[0025] Figure 11 FIG. 4 is a diagram showing another supply example of the source RF signal, the bias signal, and the process gas in the cycle CY.

[0026] Figure 12FIG. 4 is a diagram showing another supply example of the source RF signal, the bias signal, and the process gas in the cycle CY.

[0027] Figure 13 is a flowchart illustrating method MT.

[0028] Figure 14A 1 is a diagram showing an example of a cross-sectional structure of the substrate W prepared in step ST100 .

[0029] Figure 14B 3 is a diagram showing an example of a cross-sectional structure of the substrate W after processing in step ST300 .

[0030] Figure 14C 1 is a diagram showing an example of a cross-sectional structure of the substrate W after processing in step ST400 .

[0031] Figure 14D 1 is a diagram showing an example of a cross-sectional structure of the substrate W after processing in step ST600 .

[0032] Description of Reference Numerals

[0033] 1…plasma processing device; 2…control unit; 10…plasma processing chamber; 10s…plasma processing space; 11…substrate support unit; 13…shower head; 20…gas supply unit; 30…power supply; 31…RF power supply; 31a…first RF generating unit; 31b…second RF generating unit; 32…DC power supply; 32a…first DC generating unit; 32b…second DC generating unit; CY…cycle; cy1…first cycle; cy2…second cycle; DP1, DP2…deposition; EF…film, dielectric film; MK…mask; OP…opening; RC…recess; UF…base film; W…substrate. DETAILED DESCRIPTION

[0034] Hereinafter, each embodiment of the present disclosure will be described.

[0035] In an exemplary embodiment, a plasma processing apparatus is provided, comprising: a chamber; a substrate support portion disposed in the chamber and including a lower electrode; a gas supply portion configured to supply a dual-mode gas into the chamber, the dual-mode gas including an etching gas and a deposition gas; a source RF generation portion configured to generate a source RF signal to generate plasma from the dual-mode gas in the chamber, the source RF signal having a first source power level during a first deposition-dominant period and a second deposition-dominant period, and having a second source power level lower than the first source power level during a first etching-dominant period and the second etching-dominant period, the first deposition-dominant period and the first etching-dominant period being included in a first sequence period. In each of the multiple first sub-cycles in the column, the second deposition dominant period and the second etching dominant period are included in each of the multiple second sub-cycles in the second sequence, the first sequence and the second sequence are included in the main cycle, the first deposition dominant period is shorter than the second deposition dominant period, and the first etching dominant period is longer than the second etching dominant period; and a bias RF generating part, electrically connected to the lower electrode, is configured to generate a bias RF signal, the bias RF signal has a first bias power level during the first deposition dominant period and the second deposition dominant period, and has a second bias power level higher than the first bias power level during the first etching dominant period and the second etching dominant period.

[0036] In one exemplary embodiment, the first bias power level is a zero voltage level.

[0037] In an exemplary embodiment, a plasma processing apparatus is provided, comprising: a chamber; a substrate support portion disposed in the chamber and including a lower electrode; a gas supply portion configured to supply a bimodal gas into the chamber, the bimodal gas including an etching gas and a deposition gas; and a radio frequency (RF) generation portion configured to generate a radio frequency (RF) signal to generate plasma from the bimodal gas in the chamber, the RF signal having a first power level during a first deposition-dominant period and a second deposition-dominant period, and having a second power level lower than the first power level during a first etching-dominant period and the second etching-dominant period, wherein the first deposition-dominant period and the first etching-dominant period are included in each of a plurality of first sub-cycles in a first sequence. In the sub-cycle, the second deposition dominant period and the second etching dominant period are included in each sub-cycle of multiple second sub-cycles in the second sequence, the first sequence and the second sequence are included in the main cycle, the first deposition dominant period is shorter than the second deposition dominant period, and the first etching dominant period is longer than the second etching dominant period; and a voltage pulse generating unit is electrically connected to the lower electrode and is configured to generate a voltage pulse signal, the voltage pulse signal has a first voltage level during the first deposition dominant period and the second deposition dominant period, and has a voltage pulse train during the first etching dominant period and the second etching dominant period, the voltage pulse train has a second voltage level, and the absolute value of the second voltage level is higher than the absolute value of the first voltage level.

[0038] In one exemplary embodiment, the second voltage level has a negative polarity.

[0039] In one exemplary embodiment, the first voltage level is a zero voltage level.

[0040] In an exemplary embodiment, a power supply system is provided, comprising: a first RF generation unit, configured to generate a first RF signal, the first RF signal having a first power level in a first period and a second period, and having a second power level lower than the first power level in a third period and a fourth period, the first period and the third period being included in each of a plurality of first sub-cycles in a first sequence, the second period and the fourth period being included in each of a plurality of second sub-cycles in a second sequence, the first sequence and the second sequence being included in a main cycle, the first period being shorter than the second period, and the third period being longer than the fourth period; and a second RF generation unit, configured to generate a second RF signal, the second RF signal having a third power level in the first period and the second period, and having a fourth power level higher than the third power level in the third period and the fourth period.

[0041] In an exemplary embodiment, a power supply system is provided, comprising: a radio frequency generation unit configured to generate a radio frequency signal, the radio frequency signal having a first power level in a first period and a second period, and a second power level lower than the first power level in a third period and a fourth period, the first period and the third period being included in each of a plurality of first sub-cycles in a first sequence, the second period and the fourth period being included in each of a plurality of second sub-cycles in a second sequence, the first sequence and the second sequence being included in a main cycle, the first period being shorter than the second period, and the third period being longer than the fourth period; and a voltage pulse generation unit configured to generate a voltage pulse signal, the voltage pulse signal having a first voltage level in the first period and the second period, and a voltage pulse train in the third period and the fourth period, the voltage pulse train having a second voltage level, and the absolute value of the second voltage level being higher than the absolute value of the first voltage level.

[0042] In an exemplary embodiment, an etching method is provided, comprising: (a) preparing a substrate having a film and a mask on the film in a chamber of a plasma processing apparatus; and (b) an etching step, which is a step of etching the film, comprising supplying a cycle of pulses of a source radio frequency signal and pulses of a bias signal, the cycle comprising a first period, a second period, a third period, and a fourth period, wherein during the first period, a first deposit is formed on the substrate by a first plasma generated from a first processing gas, during the second period, at least a pulse of the bias signal is supplied to the chamber, and the film is etched by the first plasma, during the third period, a second deposit is formed on the substrate by a second plasma generated from a second processing gas, during the fourth period, at least a pulse of the bias signal is supplied to the chamber, and the film is etched by the second plasma, and the ratio of the length of the first period to the length of the second period is different from the ratio of the length of the third period to the length of the fourth period.

[0043] In one exemplary embodiment, the cycle includes a first ignition period in which a first process gas is supplied to the chamber and a pulse of a source RF signal is supplied to generate a plasma from the first process gas before or at the beginning of the first period.

[0044] In one exemplary embodiment, the cycle includes a second ignition period that supplies a second process gas to the chamber and pulses a source RF signal to generate a plasma from the second process gas before or at the beginning of the third period.

[0045] In one exemplary embodiment, the power level of the source RF signal supplied to the chamber in a cycle is highest during the first ignition period or the second ignition period.

[0046] In one exemplary embodiment, pulses of the source RF signal are supplied to the chamber during the first period and the third period.

[0047] In an exemplary embodiment, the power level of the source RF signal during the first period is different from the power level of the source RF signal during the third period.

[0048] In an exemplary embodiment, the power level of the bias signal during the second period is different from the power level of the bias signal during the fourth period.

[0049] In one exemplary embodiment, the power level of the bias signal supplied to the chamber in the cycle is highest during the second period or the fourth period.

[0050] In one exemplary embodiment, the first process gas is different from the second process gas.

[0051] In one exemplary embodiment, the first process gas is the same as the second process gas.

[0052] In one exemplary embodiment, the flow rate of the first process gas is different from the flow rate of the second process gas.

[0053] In one exemplary embodiment, the flow rate of the first process gas is the same as the flow rate of the second process gas.

[0054] In one exemplary embodiment, after a first cycle including a first period and a second period is repeated one or more times in a cycle, a second cycle including a third period and a fourth period is repeated one or more times.

[0055] In one exemplary embodiment, the length of a period during which the first cycle is repeated is different from the length of a period during which the second cycle is repeated.

[0056] In one exemplary embodiment, the length of the period during which the first cycle is repeated is the same as the length of the period during which the second cycle is repeated.

[0057] In an exemplary embodiment, an etching method is provided, comprising: (a) preparing a substrate having a film and a mask on the film in a chamber of a plasma processing apparatus; and (b) etching the film, comprising a cycle of supplying pulses of a source RF signal and pulses of a bias signal, the cycle comprising a first period, a second period, a third period, and a fourth period, wherein during the first period, at least pulses of the source RF signal are supplied to the chamber, and a first deposit is formed on the substrate by a first plasma generated from a first process gas; during the second period, at least pulses of the bias signal are supplied to the chamber, and the film is etched by the first plasma; during the third period, at least pulses of the source RF signal are supplied to the chamber, and a second deposit is formed on the substrate by a second plasma generated from a second process gas; and during the fourth period, at least pulses of the bias signal are supplied to the chamber, and the film is etched by the second plasma, wherein the power level of the source RF signal supplied during the first period is different from the power level of the source RF signal supplied during the third period, or the power level of the bias signal supplied during the second period is different from the power level of the bias signal supplied during the fourth period.

[0058] In an exemplary embodiment, an etching method is provided, comprising: (a) preparing a substrate having a film and a mask on the film in a chamber of a plasma processing apparatus; and (b) an etching step, which is a step of etching the film, comprising supplying a cycle of pulses of a source radio frequency signal and pulses of a bias signal, the cycle comprising a first period, a second period, a third period, and a fourth period, wherein during the first period, a first deposit is formed on the substrate by a first plasma generated from a first process gas, during the second period, at least a pulse of the bias signal is supplied to the chamber, and the film is etched by the first plasma generated from the first process gas, during the third period, a second deposit is formed on the substrate by a second plasma generated from a second process gas, during the fourth period, at least a pulse of the bias signal is supplied to the chamber, and the film is etched by the plasma generated from the second process gas, wherein a flow rate of the first process gas supplied during the first period is different from a flow rate of the second process gas supplied during the third period, or a flow rate of the first process gas supplied during the second period is different from a flow rate of the second process gas supplied during the fourth period.

[0059] Below, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Identical or similar elements are denoted by the same reference numerals in the various drawings, and repeated descriptions are omitted. Unless otherwise specified, positional relationships, such as up, down, left, and right, are described based on the positional relationships shown in the drawings. The dimensional ratios in the drawings do not represent actual proportions, and actual proportions are not limited to those shown in the drawings.

[0060] <Configuration Example of Plasma Processing Apparatus>

[0061] Figure 1 1 is a diagram for illustrating an example of the structure of a plasma processing apparatus. In one embodiment, a plasma processing apparatus 1 is an example of a substrate processing apparatus. The plasma processing apparatus 1 includes a control unit 2, a plasma processing chamber 10, a substrate support unit 11, and a plasma generating unit 12. The plasma processing chamber 10 has a plasma processing space. In addition, the plasma processing chamber 10 has at least one gas supply port for supplying at least one processing gas to the plasma processing space and at least one gas exhaust port for exhausting gas from the plasma processing space. The gas supply port is connected to the gas supply unit 20 described later, and the gas exhaust port is connected to the exhaust system 40 described later. The substrate support unit 11 is arranged in the plasma processing space and has a substrate supporting surface for supporting a substrate.

[0062] The plasma generating section 12 is configured to generate plasma from at least one processing gas supplied into the plasma processing space. The plasma formed in the plasma processing space may be a capacitively coupled plasma (CCP: Capacitively Coupled Plasma), an inductively coupled plasma (ICP: Inductively Coupled Plasma), an ECR plasma (Electron-Cyclotron-Resonance Plasma), a helicon wave excited plasma (HWP: Helicon Wave Plasma) or a surface wave plasma (SWP: Surface Wave Plasma), etc. In addition, various types of plasma generating sections including an alternating current plasma generating section and a direct current plasma generating section may also be used. In one embodiment, the alternating current signal (AC power) used in the alternating current plasma generating section has a frequency in the range of 100kHz to 10GHz. Therefore, the alternating current signal includes a radio frequency (RF) signal and a microwave signal. In one embodiment, the RF signal has a frequency in the range of 100kHz to 150MHz.

[0063] The control unit 2 processes computer-executable instructions that cause the plasma processing device 1 to perform the various processes described in the present disclosure. The control unit 2 can be configured to control the various elements of the plasma processing device 1 to perform the various processes described herein. In one embodiment, part or all of the controller 2 can be configured as an external system of the plasma processing device 1. The control unit 2 can also include a processing unit 2a1, a storage unit 2a2, and a communication interface 2a3. The control unit 2 is implemented, for example, by a computer 2a. The processing unit 2a1 can be configured to perform various control operations by reading a program from the storage unit 2a2 and executing the read program. The program can be pre-stored in the storage unit 2a2 or obtained via a medium when necessary. The obtained program is stored in the storage unit 2a2 and read and executed from the storage unit 2a2 by the processing unit 2a1. The medium can be various storage media readable by the computer 2a, and can be a communication line connected to the communication interface 2a3. The processing unit 2a1 can also be a CPU (Central Processing Unit). The storage unit 2a2 may include RAM (Random Access Memory), ROM (Read Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or a combination thereof. The communication interface 2a3 may also communicate with various components of the plasma processing apparatus 1 via a communication line such as a LAN (Local Area Network).

[0064] Hereinafter, a configuration example of a capacitive coupling type plasma processing apparatus will be described as an example of the plasma processing apparatus 1 . Figure 2 This is a diagram for explaining a configuration example of a capacitively coupled plasma processing apparatus.

[0065] The capacitively coupled plasma processing apparatus 1 includes a control unit 2, a plasma processing chamber 10, a gas supply unit 20, a power supply 30, and an exhaust system 40. In addition, the substrate processing apparatus 1 includes a substrate support unit 11 and a gas inlet unit. The gas inlet unit is configured to introduce at least one processing gas into the plasma processing chamber 10. The gas inlet unit includes a shower head 13. The substrate support unit 11 is disposed in the plasma processing chamber 10. The shower head 13 is disposed above the substrate support unit 11. In one embodiment, the shower head 13 constitutes at least a portion of the ceiling of the plasma processing chamber 10. The plasma processing chamber 10 has a plasma processing space 10s defined by the shower head 13, the sidewall 10a of the plasma processing chamber 10, and the substrate support unit 11. The plasma processing chamber 10 is grounded. The shower head 13 and the substrate support unit 11 are electrically insulated from the frame of the plasma processing chamber 10.

[0066] The substrate support portion 11 includes a main body 111 and a ring assembly 112. The main body 111 has a central area 111a for supporting a substrate W and an annular area 111b for supporting the ring assembly 112. A wafer is an example of a substrate W. The annular area 111b of the main body 111 surrounds the central area 111a of the main body 111 when viewed from above. The substrate W is arranged on the central area 111a of the main body 111, and the ring assembly 112 is arranged on the annular area 111b of the main body 111 so as to surround the substrate W on the central area 111a of the main body 111. Therefore, the central area 111a is also referred to as a substrate supporting surface for supporting the substrate W, and the annular area 111b is also referred to as a ring supporting surface for supporting the ring assembly 112.

[0067] In one embodiment, the main body 111 includes a base 1110 and an electrostatic chuck 1111. The base 1110 includes a conductive component. The conductive component of the base 1110 can function as a lower electrode. The electrostatic chuck 1111 is arranged on the base 1110. The electrostatic chuck 1111 includes a ceramic component 1111a and an electrostatic electrode 1111b arranged in the ceramic component 1111a. The ceramic component 1111a has a central area 111a. In one embodiment, the ceramic component 1111a also includes an annular area 111b. In addition, other components surrounding the electrostatic chuck 1111, such as an annular electrostatic chuck or an annular insulating component, may also have an annular area 111b. In this case, the ring assembly 112 can be arranged on the annular electrostatic chuck or the annular insulating component, and can be arranged on both the electrostatic chuck 1111 and the annular insulating component. In addition, at least one RF / DC electrode connected to the RF power supply 31 and / or DC power supply 32 described later may also be arranged in the ceramic component 1111a. In this case, at least one RF / DC electrode functions as a lower electrode. When the bias RF signal and / or DC signal described later is supplied to at least one RF / DC electrode, the RF / DC electrode is also referred to as a bias electrode. Furthermore, the conductive components of the base 1110 and at least one RF / DC electrode may also function as multiple lower electrodes. Furthermore, the electrostatic electrode 1111b may also function as a lower electrode. Therefore, the substrate support portion 11 includes at least one lower electrode.

[0068] The ring assembly 112 includes one or more ring components. In one embodiment, the one or more ring components include one or more edge rings and at least one cover ring. The edge ring is formed of a conductive material or an insulating material, and the cover ring is formed of an insulating material.

[0069] In addition, the substrate support portion 11 may also include a temperature control module, which is configured to adjust at least one of the electrostatic chuck 1111, the ring assembly 112 and the substrate to a target temperature. The temperature control module may include a heater, a heat transfer medium, a flow path 1110a or a combination thereof. A heat transfer fluid such as brine or gas flows through the flow path 1110a. In one embodiment, the flow path 1110a is formed in the base 1110, and one or more heaters are provided in the ceramic component 1111a of the electrostatic chuck 1111. In addition, the substrate support portion 11 may also include a heat transfer gas supply portion, which is configured to supply heat transfer gas to the gap between the back side of the substrate W and the central area 111a.

[0070] The showerhead 13 is configured to introduce at least one processing gas from the gas supply unit 20 into the plasma processing space 10s. The showerhead 13 has at least one gas supply port 13a, at least one gas diffusion chamber 13b, and a plurality of gas inlet ports 13c. The processing gas supplied to the gas supply port 13a is introduced into the plasma processing space 10s from the plurality of gas inlet ports 13c through the gas diffusion chamber 13b. In addition, the showerhead 13 includes at least one upper electrode. In addition, the gas inlet portion may include, in addition to the showerhead 13, one or more side gas injection units (SGIs) installed in one or more openings formed on the side wall 10a.

[0071] The gas supply unit 20 may include at least one gas source 21 and at least one flow controller 22. In one embodiment, the gas supply unit 20 is configured to supply at least one process gas from each corresponding gas source 21 via each corresponding flow controller 22 to the showerhead 13. Each flow controller 22 may, for example, include a mass flow controller or a pressure-controlled flow controller. Furthermore, the gas supply unit 20 may include one or more flow modulation devices for modulating or pulsing the flow of the at least one process gas.

[0072] The power supply 30 includes an RF power supply 31, which is coupled to the plasma processing chamber 10 via at least one impedance matching circuit. The RF power supply 31 is configured to provide at least one RF signal (RF power) to at least one lower electrode and / or at least one upper electrode. This generates a plasma from at least one process gas supplied to the plasma processing space 10s. Therefore, the RF power supply 31 can function as at least a portion of the plasma generating unit 12. Furthermore, by supplying a bias RF signal to the at least one lower electrode, a bias potential is generated on the substrate W, enabling the introduction of ions from the generated plasma onto the substrate W.

[0073] In one embodiment, the RF power supply 31 includes a first RF generation unit 31a (source RF generation unit) and a second RF generation unit 31b (bias RF generation unit). The first RF generation unit 31a is configured to couple with at least one lower electrode and / or at least one upper electrode via at least one impedance matching circuit to generate a source RF signal (source RF power) for plasma generation. In one embodiment, the source RF signal has a frequency in the range of 10 MHz to 150 MHz. In one embodiment, the first RF generation unit 31a can also be configured to generate a plurality of source RF signals with different frequencies. The generated one or more source RF signals are supplied to at least one lower electrode and / or at least one upper electrode.

[0074] The second RF generating unit 31b is configured to couple with at least one lower electrode via at least one impedance matching circuit to generate a bias RF signal (bias RF power). The frequency of the bias RF signal may be the same as or different from the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency lower than the frequency of the source RF signal. In one embodiment, the bias RF signal has a frequency in the range of 100kHz to 60MHz. In one embodiment, the second RF generating unit 31b may also be configured to generate a plurality of bias RF signals with different frequencies. The generated one or more bias RF signals are supplied to at least one lower electrode. In addition, in various embodiments, at least one of the source RF signal and the bias RF signal may be pulsed.

[0075] The power supply 30 may also include a DC power supply 32 coupled to the plasma processing chamber 10. The DC power supply 32 includes a first DC generator 32a and a second DC generator 32b. In one embodiment, the first DC generator 32a is connected to at least one lower electrode and generates a first DC signal. The generated first DC signal is applied to the at least one lower electrode. In one embodiment, the second DC generator 32b is connected to at least one upper electrode and generates a second DC signal. The generated second DC signal is applied to the at least one upper electrode.

[0076] In various embodiments, the first and second DC signals can be pulsed. In this case, a sequence of voltage pulses is applied to at least one lower electrode and / or at least one upper electrode. The voltage pulses can have a rectangular, trapezoidal, triangular, or a combination thereof pulse waveform. In one embodiment, a waveform generator for generating a sequence of voltage pulses from a DC signal is connected between the first DC generator 32a and the at least one lower electrode. Thus, the first DC generator 32a and the waveform generator constitute a voltage pulse generator. In the case where the second DC generator 32b and the waveform generator constitute a voltage pulse generator, the voltage pulse generator is connected to the at least one upper electrode. The voltage pulses can have either positive or negative polarity. Furthermore, the sequence of voltage pulses can include one or more positive polarity voltage pulses and one or more negative polarity voltage pulses within a cycle. Furthermore, the first and second DC generators 32a, 32b can be provided in addition to the RF power supply 31, or the first DC generator 32a can be provided in place of the second RF generator 31b.

[0077] The exhaust system 40 can be connected to the gas exhaust port 10e provided at the bottom of the plasma processing chamber 10, for example. The exhaust system 40 can include a pressure regulating valve and a vacuum pump. The pressure in the plasma processing space 10s is regulated by the pressure regulating valve. The vacuum pump can include a turbomolecular pump, a dry pump, or a combination thereof.

[0078] <An Example of Plasma Treatment Method>

[0079] Figure 3 FIG. 1 is a flow chart showing an etching method according to an exemplary embodiment (hereinafter also referred to as “the present processing method”). Figure 3 As shown in FIG. 1 , the present processing method includes a process ST1 for preparing a substrate and a process ST2 for etching a film. The processing in each process can be performed by the plasma processing apparatus 1 described above. Figure 2 ) parts, and the case where the present processing method is performed on a substrate W is described as an example.

[0080] (Step ST1: Preparing a Substrate)

[0081] In step ST1, a substrate W is prepared in the plasma processing space 10s of the plasma processing apparatus 1. The substrate W is carried into the chamber 10 by a transfer arm and placed on the central area 111a of the substrate support 11. The substrate W is held by the electrostatic chuck 1111 on the substrate support 11.

[0082] Figure 4This figure shows an example of a cross-sectional structure of a substrate W prepared in step ST1. The substrate W includes a film EF and a mask MK. The substrate W may also include an underfilm UF. The substrate W can be used to manufacture semiconductor devices. Semiconductor devices include, for example, semiconductor memory devices such as DRAM and 3D-NAND flash memory.

[0083] In one example, the underfilm (UF) can be a silicon wafer or an organic film, a dielectric film, a metal film, a semiconductor film, or a stacked film thereof formed on the silicon wafer. In one embodiment, the underfilm (UF) includes at least one selected from the group consisting of a silicon-containing film, a carbon-containing film, and a metal-containing film.

[0084] Film EF is a film that is etched in the present processing method. Film EF may consist of one film or may be composed of a plurality of films stacked together. In one embodiment, film EF is an organic film, a dielectric film, a semiconductor film, a metal film or a stacked film thereof. For example, film EF may be composed of one or more films such as a silicon-containing film, a carbon-containing film, a spin-on glass (SOG) film, and a Si-containing anti-reflective film (SiARC). In one embodiment, film EF is a silicon-containing film. In one example, the silicon-containing film is composed of a silicon oxide film and a silicon nitride film alternately stacked together. In one example, the silicon-containing film is composed of a silicon oxide film and a polysilicon film alternately stacked together. In one example, the silicon-containing film is a stacked film comprising a silicon nitride film, a silicon oxide film and a polysilicon film. In one example, the silicon-containing film comprises a silicon carbonitride film.

[0085] The mask MK has a pattern that is transferred to the film EF by etching. Figure 4 As shown, the mask MK defines at least one opening OP on the mask MK. The opening OP is a space on the mask MK and is surrounded by the sidewalls of the mask MK. That is, the top surface of the film EF has an area covered by the mask MK and an area exposed at the bottom of the opening OP.

[0086] When looking down at the substrate W, that is, from Figure 4 When viewing the substrate W from top to bottom, the opening OP can have any shape. This shape can be, for example, a circle, an ellipse, a rectangle, a line, or a combination of one or more thereof. The mask MK can have multiple sidewalls, each of which defines a plurality of openings OP. The multiple openings OP can each have a linear shape or be arranged at regular intervals to form a pattern of lines and spaces. Furthermore, the multiple openings OP can each have a hole shape or form an array pattern.

[0087] The mask MK can be formed of a material whose etching rate for the plasma generated in step ST2 is lower than that of the film EF. In one embodiment, the mask MK is an organic film mask. In one example, the mask MK is an amorphous carbon film, a photoresist film, or a spin-on carbon (SOC) film. In one example, the photoresist film can contain a metal such as tin. In one embodiment, the mask MK is a metal-containing mask. In one example, the mask MK can be a metal-containing film containing at least one metal selected from the group consisting of tin, tungsten, molybdenum, and titanium. The mask MK can be a single-layer mask consisting of one layer, or a multilayer mask consisting of two or more layers.

[0088] Each film constituting the substrate W (base film UF, film EF or mask MK) can be formed by a CVD method, an ALD method, a spin coating method, or the like. The mask MK can also be formed by etching the mask MK to form the opening OP of the mask MK, or by photolithography. Each film can be a flat film or a film with concave and convex surfaces. The substrate W can also have other films under the base film UF. In this case, a recessed portion having a shape corresponding to the opening OP can also be formed on the film EF and the base film UF to be used as a mask for etching the other film.

[0089] At least a portion of the process for forming the various films on the substrate W can be performed within the plasma processing chamber 10. In one example, the step of etching the mask MK to form the opening OP can be performed within the plasma processing chamber 10. That is, the opening OP and the etching of the film EF in step ST2 described later can be performed continuously within the same chamber. Alternatively, after all the films on the substrate W have been formed by a device or chamber external to the plasma processing apparatus 1, the substrate W can be brought into the plasma processing space 10s of the plasma processing apparatus 1 and positioned in the central region 111a of the substrate support 11 to prepare the substrate W.

[0090] In one embodiment, after the substrate W is provided to the central area 111a of the substrate support part 11, the temperature of the substrate support part 11 is adjusted to a set temperature by a temperature control module. In one example, adjusting or maintaining the temperature of the substrate support part 11 includes making the temperature of the heat transfer fluid flowing through the flow path 1110a or the temperature of the heater be the set temperature, or making it a temperature different from the set temperature. In addition, the timing of starting the flow of the heat transfer fluid to the flow path 1110a may be before or after the substrate W is placed on the substrate support part 11, or at the same time. In addition, the temperature of the substrate support part 11 may be adjusted to the set temperature before step ST11. That is, the substrate W may be provided to the substrate support part 11 after the temperature of the substrate support part 11 is adjusted to the set temperature. In one embodiment, the temperature of the substrate support part 11 may be maintained at the set temperature in subsequent steps, or may be changed to the set temperature.

[0091] (Process ST2)

[0092] Figure 5 FIG. 1 is a flow chart showing an example of step ST2. In step ST2, the film EF is etched. Figure 5 As shown, in step ST2, loop CY (steps ST21 to ST28) is repeated until its stop condition is met (step ST29: Yes). One loop CY includes a first loop cy1 (steps ST21 to ST24) and a second loop cy2 (steps ST25 to ST28). In loop CY, the first loop cy1 is repeated until its stop condition is met (step ST24: Yes), and then the second loop cy2 is repeated until its stop condition is met (step ST28: Yes).

[0093] Figure 6 is a diagram showing an example of supplying a source RF signal, a bias signal, and a process gas in cycle CY. In one embodiment, the bias signal is a bias RF signal supplied by the second RF generator 31b. In one embodiment, the bias signal is a bias DC signal supplied by the DC generator 32a. Figure 6 , the horizontal axis is time. Figure 6 The vertical axis "RF" represents the power level of the source RF signal. In one embodiment, the power level of the source RF signal is the effective value of the power of the source RF signal. Figure 6 The vertical axis "EB" represents the power level of the bias signal. In one embodiment, the power level of the bias signal is the effective value of the power of the bias RF signal. In one embodiment, the power level of the bias signal is the absolute value of the voltage of the bias DC signal. Figure 6 The vertical axis "GQ" represents the flow rate of the process gas (the first process gas or the second process gas). Figure 6 As shown, the source RF signal and the bias signal are pulsed. In addition, in the case where the bias signal is a bias DC signal, the bias DC signal may have a rectangular, trapezoidal, triangular or a combination thereof waveform. Figure 6 In , the relationship LR1>LR2>LR3>0 holds. In addition, the relationship LE1>0 holds. Figure 6 In the first cycle cy1, "PA1" to "PA3" correspond to Figure 5 The second cycle cy2 "PB1" to "PB3" correspond to the steps ST21 to ST23. Figure 5 In one embodiment, one cycle of the cycle CY is 1 to 30 seconds.

[0094] Figure 7A and Figure 7B They are diagrams for explaining an example of the phenomenon occurring in step ST22 and step ST23. Figure 8Aand Figure 8B These are diagrams for explaining examples of phenomena occurring in step ST26 and step ST27, respectively.

[0095] Below, refer to Figure 5 Figure 8 illustrates the various steps of cycle CY. Figure 5 and Figure 6 As shown, in the cycle CY, the first cycle cy1 (steps ST21 to ST24) is repeatedly executed until its stop condition is satisfied, and then the second cycle cy2 (steps ST25 to ST28) is repeatedly executed until its stop condition is satisfied.

[0096] First, the first cycle cy1 is described. First, a first plasma is generated in step ST21. Specifically, the first processing gas is supplied to the plasma processing space 10s by the gas supply unit 20. In addition, a source RF signal is supplied to the lower electrode of the substrate support unit 11 and / or the upper electrode of the nozzle 13. Thus, a first plasma is generated in the plasma processing chamber 10, and active species such as free radicals or ions are generated from the gas components of the first processing gas. Figure 6 As shown in "PA1" of FIG, the power level of the source RF signal supplied in step ST21 is LR1. In one embodiment, the power level LR1 is the highest among the power levels of the source RF signal supplied in cycle CY. In addition, the power level of the bias signal in step ST21 is zero (i.e., no bias signal is supplied). During the execution of step ST21 ( Figure 6 The length of the period indicated by "Ta" (hereinafter also referred to as "first ignition period Ta") can be appropriately set, and in one example is 10 μs to 1 ms.

[0097] The first processing gas includes a gas with deposition properties. In one embodiment, the gas with deposition properties includes a fluorine-containing gas. The fluorine-containing gas may include a gas component containing fluorine and carbon. The gas component may be a fluorocarbon gas such as C4F8 gas. That is, the fluorine-containing gas may be a fluorocarbon gas. The gas component may include a hydrofluorocarbon gas in addition to or instead of the fluorocarbon gas. The first processing gas may also include one or more of nitrogen, an oxygen-containing gas (such as oxygen) and a rare gas (such as Ar gas). As Figure 6 As shown in "PA1" in FIG, the flow rate of the first process gas supplied in step ST21 is Q1. In one embodiment, the first process gas includes a bimodal gas. The bimodal gas includes an etching gas and a deposition gas. The etching gas is, for example, CF4 gas. The deposition gas is, for example, C4F8 gas. The bimodal gas may further include nitrogen, an oxygen-containing gas (e.g., oxygen), and a rare gas (e.g., Ar).

[0098] Next, in step ST22, a deposit is formed on the substrate W. Similar to step ST21, the first process gas is supplied to the plasma processing space 10s at a flow rate Q1, and a source RF signal is supplied to the lower electrode of the substrate support 11 and / or the upper electrode of the shower head 13. Figure 6 As shown in "PA2" of FIG, the power level of the source RF signal in step ST22 is LR2 (<LR1). In addition, the power level of the bias signal in step ST22 is zero (i.e., no bias signal is supplied). Figure 7A As shown, a portion of the active species in the plasma is deposited on the substrate W to form a deposit DP1. In one embodiment, the deposit DP1 is selectively deposited on the mask MK. The deposit DP1 can be used as a protective film for the mask MK against etching. During the execution of step ST22 ( Figure 6 The length of the period indicated by “T1” (hereinafter also referred to as “first period T1”) can be appropriately set, and in one example, is 10 μs to 10 ms.

[0099] Next, in step ST23, the film EF is etched. As in step ST21, the first process gas is supplied to the plasma processing space 10s at a flow rate Q1, and a source RF signal is supplied to the lower electrode of the substrate support 11 and / or the upper electrode of the shower head 13. In step ST23, a bias signal is further supplied to the lower electrode. Figure 6 As shown in "PA3" of FIG, the power level of the source RF signal in step ST23 is LR3 (<LR2). In addition, the power level of the bias signal is LE1 (>0). As a result, a bias potential is generated between the plasma and the substrate W, as shown in FIG. Figure 7B As shown, the ions in the plasma are attracted to the substrate W. As a result, the portion of the film EF not covered by the mask MK (the portion exposed in the opening OP) is etched in the depth direction to form the recess RC. During the execution of step ST23 ( Figure 6 The length of the period indicated by “T2” (hereinafter also referred to as “second period T2”) can be appropriately set, and in one example is 10 μs to 10 ms.

[0100] exist Figure 6 In the example shown, in the first cycle cy1, the second period T2 during which the film EF is etched is longer than the first period T1 during which the deposit DP1 is formed. That is, in this example, the first cycle cy1 is a process where etching is dominant compared to the second cycle cy2 described later.

[0101] Next, in process ST24, it is determined whether the stop condition of the first cycle cy1 is met. If the stop condition is met, the first cycle cy1 is ended, and process ST25 is entered to execute the second cycle cy2. If the stop condition is not met, the process returns to process ST21 and repeats the first cycle cy1 again. For example, the stop condition can be set based on the number of cycles or time. For example, the number of times or time the first cycle cy1 is executed can be counted, and whether the stop condition is met can be determined based on whether the number or time reaches a predetermined number of cycles or time. In addition, process ST21 may not be executed in the first cycle cy1 after the second time. The frequency of the first cycle cy1 can be appropriately set, and in one example it is 0.01kHz to 100kHz. The length of the period for repeating the first cycle cy1 ( Figure 6 The time represented by "TA" in the figure can be appropriately set, and in one example is 0.1 seconds to 30 seconds.

[0102] Next, the second cycle cy2 is described. First, in step ST25, a second plasma is generated by a second processing gas. Step ST25 can be performed in the same manner as step ST21. The second processing gas, like the first processing gas, includes a gas having deposition properties. Figure 6 As shown in "PB1" of FIG, the power level of the source RF signal supplied in step ST25 may be LR1, which is the same as that in step ST21. In addition, as in step ST21, the power level of the bias signal may be zero (that is, the bias signal may not be supplied). In addition, the flow rate of the second process gas may be Q1, which is the same as that of the first process gas. In addition, the type of gas or the partial pressure of each gas constituting the second process gas may be the same as that of the first process gas, or may be partially or completely different. During the execution of step ST25 ( Figure 6 The length of the period indicated by "Tb" (hereinafter also referred to as the "second ignition period Tb") may be the same as or different from the length of the first ignition period Ta. In one embodiment, the second processing gas includes a bimodal gas. The bimodal gas includes an etching gas and a deposition gas. The etching gas is, for example, CF4 gas. The deposition gas is, for example, C4F8 gas. The bimodal gas may also include nitrogen, an oxygen-containing gas (e.g., oxygen), and a rare gas (e.g., Ar gas).

[0103] Next, in step ST26, a deposit is formed on the substrate W. Step ST26 can be performed in the same manner as step ST22. Figure 6 As shown in "PB2" of FIG, the power level of the source RF signal in step ST26 may be LR2 (<LR1) as in step ST22. In addition, the power level of the bias signal may be zero (i.e., no bias signal may be supplied). Figure 8AAs shown, a portion of the active species in the plasma is deposited on the substrate W to form a deposit DP2. In one embodiment, the deposit DP2 is selectively deposited on the mask MK. The deposit DP2 can be used as a protective film for the mask MK against etching. During the execution of step ST26 ( Figure 6 The length of the period indicated by “T3” (hereinafter also referred to as “third period T3”) can be appropriately set, and in one example is 10 μs to 10 ms.

[0104] Next, in step ST27, the film EF is etched. Step ST27 can be performed in the same manner as step ST23. Figure 6 As shown in "PB3" of FIG, the power level of the source RF signal in step ST27 is the same as that in step ST23, which can be LR3 (<LR2), and the power level of the bias signal can be "LE1" (>0). As a result, a bias potential is generated between the plasma and the substrate W. Figure 8B As shown in FIG. 1 , the film EF is further etched, and the depth of the recess RC becomes larger. During the execution of step ST27 ( Figure 6 The length of the period indicated by “T4” (hereinafter also referred to as “fourth period T4”) can be appropriately set, and in one example is 10 μs to 10 ms.

[0105] exist Figure 6 In the example shown, in the second cycle cy2, the third period T3 during which the deposit DP2 is formed is longer than the fourth period T4 during which the film EF is etched. That is, in this example, the second cycle cy2 is a process in which deposit formation is more dominant than the first cycle cy1.

[0106] Next, in process ST28, it is determined whether the stop condition of the second cycle cy2 is met. If the stop condition is not met, return to process ST25 and repeat the second cycle cy2 again. The stop condition can be appropriately set in the same way as process ST24, for example, it can be set based on the number of cycles or time. In addition, process ST25 may not be executed in the second cycle cy2 after the second time. The frequency of the second cycle cy2 can be appropriately set, and in one example it is 0.01kHz to 100kHz. The frequency of the second cycle cy2 may be the same as or different from the frequency of the first cycle cy1. The length of the period for repeating the second cycle cy2 ( Figure 6 The time (denoted by "TB" in the figure) can be set appropriately, and in one example is 0.1 seconds to 30 seconds.

[0107] If the stop condition is met in step ST28, the second cycle cy2 ends and step ST29 is executed. Then, in step ST29, it is determined whether the stop condition for cycle CY is met. If the stop condition for cycle CY is not met, the current cycle CY ends and the process returns to step ST21 to start the next cycle CY.

[0108] The stopping condition for cycle CY can be set based on, for example, the number of cycles or the time. For example, the number of times or the time of executing cycle CY can be counted, and whether the stopping condition is satisfied can be determined based on whether the number of times or the time reaches a predetermined number of cycles or the time. Alternatively, the stopping condition for cycle CY can be related to the size of the recess RC formed in the film EF by etching. That is, in step ST29, whether the stopping condition is satisfied can be determined by determining whether the depth or bottom width of the recess RC formed in the film EF reaches a predetermined value or range. If the stopping condition is satisfied, step ST2 ends.

[0109] In one embodiment, the ratio of the length of the first period T1 to the length of the second period T2 of the first cycle cy1 (hereinafter also referred to as "T2 / T1") is different from the ratio of the length of the third period T3 to the length of the fourth period T4 of the second cycle cy2 (hereinafter also referred to as "T4 / T3"). T2 / T1 and T4 / T3 are the ratios of the deposition time to the etching time. Due to the difference between T2 / T1 and T4 / T3, the balance between deposition formation and etching is different in the first cycle cy1 and the second cycle cy2. For example, Figure 6 In the example shown, T2 / T1>T4 / T3, so when comparing the first cycle cy1 and the second cycle cy2, the former is a process biased towards etching, and the latter is a process biased towards deposit formation.

[0110] In one embodiment, the plasma processing apparatus 1 includes a source RF generator 31a and a bias RF generator 31b. The source RF generator 31a is configured to generate a source RF signal in the chamber 10 to generate plasma from the dual-mode gas. The bias RF generator 31b is electrically connected to the lower electrode and is configured to generate a bias RF signal. Figure 6In the illustrated example, the source RF signal RF has a first source power level LR2 during the first deposition-dominant period T1 and the second deposition-dominant period T3, and has a second source power level LR3 during the first etching-dominant period T2 and the second etching-dominant period T4. The second source power level LR3 is lower than the first source power level LR2. The bias RF signal EB has a first bias power level during the first deposition-dominant period T1 and the second deposition-dominant period T3, and has a second bias power level LE1 during the first etching-dominant period T2 and the second etching-dominant period T4. The second bias power level LE1 is higher than the first bias power level. In one embodiment, the first bias power level is a zero voltage level. In one embodiment, the first bias power level is a voltage level greater than zero. Furthermore, the first deposition-dominant period T1 and the first etching-dominant period T2 are included in each sub-cycle cy1 of the plurality of first sub-cycles cy1 in the first sequence TA. The second deposition-dominant period T3 and the second etching-dominant period T4 are included in each sub-cycle cy2 of the plurality of second sub-cycles cy2 in the second sequence TB. In one embodiment, the main cycle CY is repeated. In one embodiment, the main cycle CY includes one or more sequences, each of which includes a plurality of sub-cycles. That is, the sub-cycles are repeated in a sequence. In one embodiment, one or more sequences include a first sequence TA and a second sequence TB, the first sequence TA includes a plurality of first sub-cycles cy1, and the second sequence TB includes a plurality of second sub-cycles cy2. In one embodiment, the main cycle CY includes a first sequence TA and a second sequence TB. In one embodiment, the first sequence TA and the second sequence TB are repeated alternately. In one embodiment, the first deposition advantage period T1 is shorter than the second deposition advantage period T3, and the first etching advantage period T3 is longer than the second etching advantage period T4. In one embodiment, the main cycle CY includes first to Nth sequences (N is a natural number greater than 2), and the ratio of the length of the etching advantage period to the length of the deposition advantage period is adjusted between each sequence and its next sequence.

[0111] In one embodiment, the plasma processing apparatus 1 includes a source RF generator 31a and a voltage pulse generator. The RF generator 31a is configured to generate a RF signal in the chamber 10 to generate plasma from the dual-mode gas. The voltage pulse generator is electrically connected to the lower electrode and is configured to generate a voltage pulse signal. Figure 6In the example shown, the radio frequency signal RF has a first power level LR2 during the first deposition-dominant period T1 and the second deposition-dominant period T3, and has a second power level LR3 during the first etching-dominant period T2 and the second etching-dominant period T4. The second power level LR3 is lower than the first power level LR2. The voltage pulse signal EB has a first voltage level during the first deposition-dominant period T1 and the second deposition-dominant period T3, and has a voltage pulse train (sequence) having a second voltage level LE1 during the first etching-dominant period T2 and the second etching-dominant period T4. The absolute value of the second voltage level LE1 is higher than the absolute value of the first voltage level. In one embodiment, the second voltage level LE1 has a negative polarity. In one embodiment, the first voltage level is a zero voltage level. In one embodiment, the first voltage level may have a voltage level greater than zero. In one embodiment, the voltage pulse signal EB has a voltage pulse train (sequence) having a first voltage level during the first deposition-dominant period T1 and the second deposition-dominant period T3. In this case, the absolute value of the first voltage level is lower than the absolute value of the second voltage level LE1. Furthermore, the first deposition dominant period T1 and the first etching dominant period T2 are included in each sub-cycle cy1 of the plurality of first sub-cycles cy1 in the first sequence TA. The second deposition dominant period T3 and the second etching dominant period T4 are included in each sub-cycle cy2 of the plurality of second sub-cycles cy2 in the second sequence TB. In one embodiment, the main cycle CY is repeated. In one embodiment, the main cycle CY includes one or more sequences, each sequence including multiple sub-cycles. That is, the sub-cycles are repeated in a sequence. In one embodiment, the one or more sequences include a first sequence TA and a second sequence TB, the first sequence TA including multiple first sub-cycles cy1, and the second sequence TB including multiple second sub-cycles cy2. In one embodiment, the main cycle CY includes the first sequence TA and the second sequence TB. In one embodiment, the first sequence TA and the second sequence TB are repeated alternately. In one embodiment, the first deposition dominant period T1 is shorter than the second deposition dominant period T3, and the first etching dominant period T2 is longer than the second etching dominant period T4. In one embodiment, the main cycle CY includes first to Nth sequences (N is a natural number greater than 2), and the ratio of the etching dominant period length to the deposition dominant period length is adjusted between each sequence and the next sequence.

[0112] In one embodiment, the power supply system includes a first RF generating unit 31a and a second RF generating unit 31b. The first RF generating unit 31a is configured to generate a first RF signal. The second RF generating unit 31b is configured to generate a second RF signal. Figure 6In the example shown, the first radio frequency signal RF has a first power level LR2 during the first and second periods T1 and T3, and a second power level LR3 during the third and fourth periods T4. The second power level LR3 is lower than the first power level LR2. The second radio frequency signal EB has a third power level during the first and second periods T1 and T3, and a fourth power level LE1 during the third and fourth periods T2 and T4. The fourth power level LE1 is higher than the third power level. In one embodiment, the third power level is a zero voltage level. In one embodiment, the third power level is a voltage level greater than zero. The first and third periods T1 and T2 are included in each of the multiple first sub-cycles cy1 in the first sequence TA. The second and fourth periods T3 and T4 are included in each of the multiple second sub-cycles cy2 in the second sequence TB. In one embodiment, the main cycle CY is repeated. In one embodiment, the main cycle CY includes one or more sequences, each of which includes multiple sub-cycles. That is, the sub-cycles are repeated in the sequence. In one embodiment, one or more sequences include a first sequence TA and a second sequence TB, the first sequence TA includes a plurality of first sub-cycles cy1, and the second sequence TB includes a plurality of second sub-cycles cy2. In one embodiment, the main cycle CY includes the first sequence TA and the second sequence TB. In one embodiment, the first sequence TA and the second sequence TB are repeated alternately. In one embodiment, the first period T1 is shorter than the second period T3, and the third period T3 is longer than the fourth period T4. In one embodiment, the main cycle CY includes the first to Nth sequences (N is a natural number greater than 2), and the ratio of the length of the etching advantage period to the length of the deposition advantage period is adjusted between each sequence and the next sequence.

[0113] In one embodiment, the power supply system includes a radio frequency generating unit 31a and a voltage pulse generating unit. The radio frequency generating unit 31a is configured to generate a radio frequency signal. The voltage pulse generating unit is configured to generate a voltage pulse signal. Figure 6In the example shown, the RF signal has a first power level LR2 during the first and second periods T1 and T3, and a second power level LR3 during the third and fourth periods T2 and T4. The second power level LR3 is lower than the first power level LR2. The voltage pulse signal EB has a first voltage level during the first and second periods T1 and T3, and a voltage pulse train (sequence) having a second voltage level LE1 during the third and fourth periods T2 and T4. The absolute value of the second voltage level LE1 is higher than the absolute value of the first voltage level. In one embodiment, the second voltage level LE1 has a negative polarity. In one embodiment, the first voltage level is a zero voltage level. In one embodiment, the first voltage level may have a voltage level greater than zero. In one embodiment, the voltage pulse signal EB has a voltage pulse train (sequence) having a first voltage level during the first and second periods T1 and T3. In this case, the absolute value of the first voltage level is lower than the absolute value of the second voltage level LE1. The first and third periods T1 and T2 are included in each sub-cycle cy1 of the plurality of first sub-cycles cy1 in the first sequence TA. The second period T3 and the fourth period T4 are included in each sub-cycle cy2 of the multiple second sub-cycles cy2 in the second sequence TB. In one embodiment, the main cycle CY is repeated. In one embodiment, the main cycle CY includes one or more sequences, each sequence including multiple sub-cycles. That is, the sub-cycles are repeated in the sequence. In one embodiment, the one or more sequences include a first sequence TA and a second sequence TB, the first sequence TA includes multiple first sub-cycles cy1, and the second sequence TB includes multiple second sub-cycles cy2. In one embodiment, the main cycle CY includes a first sequence TA and a second sequence TB. In one embodiment, the first sequence TA and the second sequence TB are repeated alternately. In one embodiment, the first period T1 is shorter than the second period T3, and the third period T2 is longer than the fourth period T4. In one embodiment, the main cycle CY includes the first to Nth sequences (N is a natural number greater than 2), and the ratio of the length of the etching advantage period to the length of the deposition advantage period is adjusted between each sequence and its next sequence.

[0114] According to this processing method, etching controllability can be improved. Etching according to this processing method can obtain a desired etching shape (bowing suppression and penetration) while suppressing a decrease in the selectivity ratio with respect to the mask.

[0115] The source RF signal, bias signal and process gas supplied in cycle CY can be in various ways, not limited to Figure 6 Example shown.

[0116] Figure 9A and 9B1 is a diagram showing another example of the source RF signal and the bias signal supplied in the cycle CY. Figure 9A is an example of the source RF signal and bias signal supplied in the first cycle cy1, Figure 9B is an example of the source RF signal and bias signal supplied in the second cycle cy2. Figure 6 same.

[0117] In this example, the lengths of the third period T3 and the fourth period T4 of the second cycle cy2 are the same as the lengths of the first period T1 and the second period T2 of the first cycle cy1, respectively. That is, T2 / T1 and T4 / T3 are the same. Meanwhile, in this example, the power levels of the source RF signal and bias signal supplied in the second cycle cy2 are different from those supplied in the first cycle cy1.

[0118] That is, Figure 9A As shown in "PA2" of FIG, the power level of the source RF signal supplied in the first period T1 (step ST22) of the first cycle cy1 is LR2. Figure 9B As shown in "PB2" of FIG, the power level of the source RF signal supplied during the third period T3 (step ST26) of the second cycle cy2 is LR2' (>LR2). Figure 9A As shown in "PA3" of FIG, the power levels of the source RF signal and the bias signal supplied during the second period T2 (step ST23) of the first cycle cy1 are LR2 and LE1 respectively. Figure 9B As shown in "PB3", the power levels of the source RF signal and bias signal supplied during the second period T2 (step ST27) of the first cycle cy1 are LR3' (<LR3) and LE1' (<LE1), respectively. Therefore, in the second cycle cy2, the amount of deposit formation increases and the amount of etching decreases compared to the first cycle cy1. That is, T2 / T1 and T4 / T3 are the same, but the balance between deposit formation and etching is different in the first cycle cy1 and the second cycle cy2. Therefore, in Figure 9A and Figure 9B In the example shown, etching controllability can also be improved.

[0119] In one embodiment, the power levels of the source RF signal are different during the first period T1 (step ST22) and the third period T3 (step ST26). The source RF signal may not be supplied during the first period T1 (step ST22) and / or the third period T3 (step ST26). In one embodiment, a bias signal may be supplied during the first period T1 (step ST22) and / or the third period T3 (step ST26). In this case, the power level of the bias signal may be lower than LE1. When the source RF signal is supplied during the first period T1 (step ST22) and the third period T3 (step ST26), the power levels of the two may be the same or different.

[0120] In one embodiment, the power levels of the source RF signal are different during the second period T2 (step ST23) and the fourth period T4 (step ST27). In one embodiment, the source RF signal may not be supplied during the second period T2 (step ST23) and / or the fourth period T4 (step ST27) (i.e., the power level LR3 of the source RF signal may be zero).

[0121] The magnitude relationship between the power levels of the source RF signal in the first ignition period (step ST21), the first period T1 (step ST22), and the second period T2 of the first cycle cy1 is not limited to Figure 6 The example shown can be set appropriately. For example, the power level of the source RF signal can be highest during the first period T1 (step ST22) and / or the second period T2. Alternatively, the power level of the source RF signal during the first ignition period and the first period T1 can be the same. The power level of the source RF signal supplied during the second cycle cy2 can also be set appropriately.

[0122] Figure 10 FIG. 4 is a diagram showing another supply example of the source RF signal, the bias signal, and the process gas in the cycle CY. Figure 10 The vertical and horizontal axes are Figure 6 same. Figure 10 The power levels of the source RF signal and bias signal are shown as Figure 6 Similarly, the flow rate of the process gas is Figure 6 In this example, the flow rate (Q2) of the second process gas supplied in the second cycle cy2 is smaller than the flow rate (Q1) of the first process gas supplied in the first cycle cy1. This allows the balance between deposit formation and etching to differ between the first cycle cy1 and the second cycle cy2.

[0123] In one embodiment, the flow rate of the first processing gas supplied during the first period T1 (process ST22) is different from the flow rate of the second processing gas supplied during the third period T3 (process ST26). In this case, T2 / T1 and T4 / T3 may be the same or different. Thus, the balance between deposit formation and etching can be made different in the first cycle cy1 and the second cycle cy2. In one embodiment, the flow rate of the first processing gas supplied during the second period T2 (process ST23) is different from the flow rate of the second processing gas supplied during the fourth period T4 (process ST27). In this case, T2 / T1 and T4 / T3 may be the same or different. Thus, the balance between deposit formation and etching can be made different in the first cycle cy1 and the second cycle cy2.

[0124] In one embodiment, the flow rate of the first process gas supplied during the first period T1 (step ST22) is different from the flow rate of the first process gas supplied during the second period T2 (step ST23). In this case, T2 / T1 and T4 / T3 may be the same or different. In one embodiment, the flow rate of the second process gas supplied during the third period T3 (step ST26) is different from the flow rate of the second process gas supplied during the fourth period T4 (step ST27). In this case, T2 / T1 and T4 / T3 may be the same or different.

[0125] In one embodiment, instead of performing steps ST21 and ST25 in step ST2 , plasma ignition may be performed at the beginning of steps ST22 and ST26 . That is, the first ignition period and the second ignition period may be included in the first period T1 and the third period T3 , respectively.

[0126] In one embodiment, in at least one of step ST22, step ST23, step ST26, and step ST27 of step ST2, a second DC signal may be supplied to the upper electrode by the second DC generating unit 32b at a negative voltage. By supplying the second DC signal to the upper electrode, in one embodiment, any one or more of the following effects (I) to (V) may be obtained. (I) Increasing the self-bias voltage of the upper electrode to increase the sputtering effect on the surface of the upper electrode. (II) Reducing the plasma by expanding the plasma sheath in the upper electrode. (III) Irradiating the substrate W with electrons generated at the upper electrode. (IV) Controlling the plasma potential. (V) Increasing the electron density of the plasma.

[0127] In one embodiment, the power levels of the source RF signal and the bias signal may be changed during the first period T1 (step ST22) and / or the third period (step ST26) of the cycle cy1. Figure 11 and 12As shown, the power levels of the source RF signal and the bias signal can be changed.

[0128] Figure 11 FIG. 4 is a diagram showing another supply example of the source RF signal, the bias signal, and the process gas in the cycle CY. Figure 11 The vertical and horizontal axes are Figure 6 Same. Figure 11 In the example shown, the first period T1 of the first cycle cy1 (step ST22 ) is composed of two periods T1a and T1b , and the period T3 of the second cycle cy2 (step ST26 ) is composed of two periods T3a and T3b .

[0129] During period T1a, the power level of the source RF signal is LR2, and the power level of the bias signal is zero. During period T1b, the power level of the source RF signal is LR3 (<LR2), and the power level of the bias signal is LE2. Here, LE2 is a value greater than zero and less than LE3. That is, comparing period T1a and period T1b, period T1a is a period in which the power level of the source RF signal is high and the power level of the bias signal is low. In addition, period T1b is a period in which the power level of the source RF signal is low and the power level of the bias signal is high. Thus, the energy of the ions supplied to the deposit DP1 during period T1b is higher than the energy of the ions supplied to the deposit DP1 during period T1a. During period T1b, relatively high-energy ions are supplied to the deposit DP1 and unnecessary elements (such as fluorine) are removed from the deposit DP1. Therefore, in the deposit DP1 obtained during period T1b, many bonds with high bond energy (such as carbon-carbon bonds) can be formed.

[0130] The power levels of the source RF signal during periods T3a and T3b are the same as those during periods T1a and T1b, respectively. That is, the energy of the ions supplied to the deposit DP2 during period T3b is higher than the energy of the ions supplied to the deposit DP2 during period T3a. Consequently, a higher number of high-energy bonds (e.g., carbon-carbon bonds) are formed in the deposit DP2 obtained during period T3b.

[0131] In addition, Figure 11 In the example shown, Figure 6 In the example shown, the relationship T2 / T1>T4 / T3 holds true. That is, comparing the first cycle cy1 and the second cycle cy2, the first cycle cy1 is a process dominated by etching, while the second cycle cy2 is a process dominated by deposit formation.

[0132] Figure 12 1 is a diagram showing another supply example of the source RF signal and the bias signal in cycle cy1. Figure 12 The vertical and horizontal axes are Figure 9AIn this example, the first period T1 of the first cycle cy1 (step ST22) is formed by repeating the cycle of period T1a and period T1b multiple times. The power levels of the source RF signal and the bias signal in period T1a and period T1b are the same as Figure 11 The same as described in [ 1 ]. In this example, in the deposit DP1 obtained during period T1b, a large number of bonds with high bond energy (e.g., carbon-carbon bonds) can be formed. Furthermore, in the third period T3 (step ST26) of the second cycle cy2, the cycle of periods T3a and T3b can also be repeated multiple times.

[0133] Figure 13 FIG. 1 is a flow chart illustrating an etching method (hereinafter also referred to as “method MT”) according to another exemplary embodiment. Figure 13 As shown, method MT includes a step ST100 of preparing a substrate, a step ST200 of etching a silicon-containing film, a step ST300 of etching an organic film, a step ST400 of etching a dielectric film, a step ST500 of removing the organic film, and a step ST600 of etching a dielectric film. Figures 14A to 14D 1 is a diagram showing an example of a cross-sectional structure of a substrate W involved in steps ST100, ST300, ST400, and ST600 of method MT. Figure 1 or Figure 2 The plasma processing apparatus 1 shown is used for the following. Figure 13 and Figures 14A to 14D , explaining how the control unit 2 controls the capacitive coupling type plasma processing apparatus 1 (refer to Figure 2 ) parts, and the situation of executing this processing method on the substrate W.

[0134] (Process ST100)

[0135] First, in step ST100, a substrate W is prepared in the plasma processing space 10s of the plasma processing apparatus 1. The substrate W is carried into the chamber 10 by a transfer arm and placed on the central area 111a of the substrate support 11. The substrate W is held by the electrostatic chuck 1111 by suction on the substrate support 11.

[0136] Figure 14A 1 is a diagram showing an example of a cross-sectional structure of a substrate W prepared in step ST100. Figure 14A As shown, the substrate W includes a base film UR, a dielectric film EF, a metal-containing mask MHM, a silicon oxide film OXM, an organic film OF, a silicon-containing film ARF, and a resist mask PR. In one embodiment, the dielectric film EF may have a stacked structure including a low dielectric constant film LKF and a silicon oxide film OXF. The low dielectric constant film LKF may be, for example, a SiOCH film.

[0137] A metal-containing mask MHM is disposed on the dielectric film EF. The metal-containing mask MHM has a pattern that is transferred to the dielectric film EF by etching. The metal-containing mask MHM provides one or more openings. In one embodiment, the metal-containing mask MHM comprises at least one metal selected from the group consisting of tin, tungsten, molybdenum, and titanium. For example, the metal-containing mask MHM is formed of titanium nitride.

[0138] A silicon oxide film OXM is disposed on top of the metal-containing mask MHM. An organic film OF is disposed so as to cover the silicon oxide film OXM, the metal-containing film MHM, and the film EF. A silicon-containing film ARF is disposed on the organic film OF. In one embodiment, the silicon-containing film ARF is an anti-reflective film. A resist mask PR is disposed on the silicon-containing film ARF. The resist mask PR is patterned using photolithography techniques. The resist mask PR provides one or more openings OP to form recesses (e.g., trenches or holes) in the film EF at portions exposed from the metal-containing mask MHM.

[0139] (Process ST200)

[0140] Next, in step ST200, the silicon-containing film ARF is etched. A processing gas is supplied into the plasma processing chamber 10. The processing gas includes, for example, a fluorocarbon gas and a rare gas (e.g., Ar gas). In addition, a source RF signal is supplied to the lower electrode of the substrate support portion 11 and / or the upper electrode of the showerhead 13. At this time, a bias signal may also be supplied to the lower electrode. Plasma is generated by the processing gas, and the portion of the silicon-containing film ARF that is not covered by the resist mask PR is etched in the depth direction. As a result, the pattern of the resist mask PR is transferred to the silicon-containing film ARF.

[0141] (Process ST300)

[0142] Next, in step ST300, the organic film OF is etched. A processing gas is supplied to the plasma processing chamber 10. The processing gas includes, for example, an oxygen-containing gas (e.g., oxygen). The processing gas may include nitrogen and hydrogen. In addition, a source RF signal is supplied to the lower electrode of the substrate support 11 and / or the upper electrode of the nozzle 13. At this time, a bias signal may also be supplied to the lower electrode. Plasma is generated by the processing gas, and the portion of the organic film OF that is not covered by the silicon-containing film ARF is etched in the depth direction. Thus, as Figure 14B As shown, the pattern of the silicon-containing film ARF is transferred onto the organic film OF.

[0143] (Process ST400)

[0144] Next, in step ST400, the dielectric film EF is etched. In step ST400, step ST2 of the present processing method can be performed. That is, the above cycle CY can be repeated. Figure 14CAs shown, the pattern of the organic film OF is transferred to the dielectric film EF, and the recessed portion RC is formed in the dielectric film EF.

[0145] (Process ST500)

[0146] Next, in step ST500, the organic film OF is removed. A process gas is supplied into the plasma processing chamber 10. The process gas includes, for example, an oxygen-containing gas (e.g., oxygen and / or CO). A source RF signal is supplied to the lower electrode of the substrate support 11 and / or the upper electrode of the showerhead 13. A bias signal may also be supplied to the lower electrode. Plasma is generated from the process gas, and the organic film OF is removed (ashed).

[0147] (Process ST600)

[0148] Next, in step ST600, the dielectric film EF is further etched. In step ST600, step ST2 of the present processing method can be performed. That is, the above cycle CY can be repeated. Figure 14D As shown, the recess RC is further etched deeper.

[0149] <Example>

[0150] Next, examples of the present treatment method will be described. The present disclosure is not limited in any way by the following examples.

[0151] (Example 1)

[0152] In Example 1, a plasma treatment apparatus 1 is used and the present treatment method is applied to Figure 3 The substrate W shown has the same structure as the substrate to be etched. The mask MK of the substrate W is a metal-containing film composed of titanium nitride, and the film EF is an insulating film containing silicon.

[0153] In step ST2, the Figure 6 The first cycle cy1 is identical to the cycle CY shown. The lengths of the first ignition period, first period T1, and second period T2 of the first cycle cy1 are 400 μs, 600 μs, and 4000 μs, respectively. During the source period CY supplied to the first ignition period Ta, first period T1, and second period T2, the first cycle cy1 is executed at a frequency of 0.2 kHz for 2 seconds. The first process gas includes CF4 gas, C4F8 gas, H2 gas, N2 gas, and Ar gas.

[0154] In step ST2, the second ignition period, third period T3, and fourth period T4 of the second cycle cy2 are 400 μs, 4400 μs, and 200 μs, respectively. In cycle CY, the second cycle cy2 is executed for 8 seconds at a frequency of 0.2 kHz. The second process gas used is the same as the first process gas. Etching in step ST2 is performed for 40 seconds.

[0155] (Example 2)

[0156] In Example 2, substrate W was etched under the same conditions as in Example 1, except for the following points. In Example 2, a first cycle cy1, in which the first ignition period, first period T1, and second period T2 have lengths of 400 μs, 400 μs, and 200 μs, respectively, was executed at 1.0 kHz for 2 seconds. Furthermore, a second cycle cy2, similar to that in Example 1, was executed at 0.2 kHz for 5 seconds. Etching was performed in step ST2 for 49 seconds.

[0157] In Reference Example 1, cycle CYa was repeated for 17 seconds to etch the substrate W. Cycle CYa included only the first cycle cy1 of Example 1 and did not include the second cycle cy2. The remaining conditions were the same as in Example 1.

[0158] In Reference Example 2, cycle CYb was repeated for 25 seconds to etch substrate W. Cycle CYb was a cycle cy1′ that had the lengths of the first ignition period, first period T1, and second period T2 of the first cycle cy1 of Example 1, which were 400 μs, 2600 μs, and 2000 μs, respectively, excluding the second cycle cy2. The remaining conditions were the same as in Example 1.

[0159] In Reference Example 3, the cycle CYc was repeated for 120 seconds to etch the substrate W. The cycle CYc included only the second cycle cy2 of Example 1 and did not include the first cycle cy1.

[0160] In Reference Example 4, the cycle CYd was repeated for 20 seconds to etch the substrate W. The cycle CYd included only the first cycle cy1 of Example 2 and did not include the second cycle cy2.

[0161] Table 1 shows the etching results for Examples 1 and 2, and Reference Examples 1 to 4. In Table 1, "Selectivity" indicates the selectivity of the film EF relative to the mask MK. "Recess Depth" indicates the depth of the recess RC formed by etching. A larger value indicates greater penetration. "Bowing" indicates the presence or absence of bowing in the recess RC (a barrel-shaped cross-section where a portion of the recess RC widens).

[0162] Table 1

[0163] Example 1 Example 2 Reference Example 1 Reference Example 2 Reference Example 3 Reference Example 4 Select Ratio 20.7 19.8 16.3 18.6 11.9 18.2 Depth of recess (nm) 90.5 101 89 84.7 63.8 90.7 bowed bend inhibition inhibition produce produce inhibition produce

[0164] As shown in Table 1, in the etching performed in Examples 1 and 2, the selectivity and etching depth (penetration) were improved, and bowing was suppressed, compared to Reference Examples 1 to 4. In contrast, in Reference Examples 1 to 4, improving the selectivity, ensuring penetration, and suppressing bowing were in a trade-off relationship, and not all of them were satisfied.

[0165] The embodiments of the present disclosure also include the following aspects.

[0166] (Note 1)

[0167] A plasma processing device comprising:

[0168] chamber;

[0169] a substrate support portion, disposed in the chamber and comprising a lower electrode;

[0170] a gas supply unit configured to supply a bimodal gas into the chamber, the bimodal gas including an etching gas and a deposition gas;

[0171] a source RF generating unit configured to generate a source RF signal to generate a plasma from the dual-mode gas in the chamber, the source RF signal having a first source power level during a first deposition-dominant period and a second deposition-dominant period, and having a second source power level lower than the first source power level during a first etching-dominant period and a second etching-dominant period, the first deposition-dominant period and the first etching-dominant period being included in each of a plurality of first sub-cycles in a first sequence, the second deposition-dominant period and the second etching-dominant period being included in each of a plurality of second sub-cycles in a second sequence, the first sequence and the second sequence being included in a main cycle, the first deposition-dominant period being shorter than the second deposition-dominant period, and the first etching-dominant period being longer than the second etching-dominant period; and

[0172] A bias RF generating unit is electrically connected to the lower electrode and is configured to generate a bias RF signal having a first bias power level during the first deposition dominant period and the second deposition dominant period, and having a second bias power level higher than the first bias power level during the first etching dominant period and the second etching dominant period.

[0173] (Note 2)

[0174] The plasma processing apparatus according to Supplementary Note 1, wherein the first bias power level is a zero voltage level.

[0175] (Note 3)

[0176] A plasma processing device comprising:

[0177] chamber;

[0178] a substrate support portion, disposed in the chamber and comprising a lower electrode;

[0179] a gas supply unit configured to supply a bimodal gas into the chamber, the bimodal gas including an etching gas and a deposition gas;

[0180] a radio frequency generation unit configured to generate a radio frequency signal to generate a plasma from the bimodal gas in the chamber, the radio frequency signal having a first power level during a first deposition dominant period and a second deposition dominant period, and having a second power level lower than the first power level during a first etching dominant period and a second etching dominant period, the first deposition dominant period and the first etching dominant period being included in each of a plurality of first sub-cycles in a first sequence, the second deposition dominant period and the second etching dominant period being included in each of a plurality of second sub-cycles in a second sequence, the first sequence and the second sequence being included in a main cycle, the first deposition dominant period being shorter than the second deposition dominant period, and the first etching dominant period being longer than the second etching dominant period; and

[0181] A voltage pulse generating unit is electrically connected to the lower electrode and is configured to generate a voltage pulse signal, wherein the voltage pulse signal has a first voltage level during the first deposition dominance period and the second deposition dominance period, and has a voltage pulse train during the first etching dominance period and the second etching dominance period, wherein the voltage pulse train has a second voltage level, and the absolute value of the second voltage level is higher than the absolute value of the first voltage level.

[0182] (Note 4)

[0183] The plasma processing apparatus according to Supplementary Note 3, wherein the second voltage level has a negative polarity.

[0184] (Note 5)

[0185] The plasma processing apparatus according to Supplementary Note 3 or Supplementary Note 4, wherein the first voltage level is a zero voltage level.

[0186] (Note 6)

[0187] A power supply system comprising:

[0188] a first RF generation unit configured to generate a first RF signal, wherein the first RF signal has a first power level in a first period and a second period, and has a second power level lower than the first power level in a third period and a fourth period, the first period and the third period being included in each of a plurality of first sub-cycles in a first sequence, the second period and the fourth period being included in each of a plurality of second sub-cycles in a second sequence, the first sequence and the second sequence being included in a main cycle, the first period being shorter than the second period, and the third period being longer than the fourth period; and

[0189] The second RF generation unit is configured to generate a second RF signal having a third power level in the first and second periods and a fourth power level higher than the third power level in the third and fourth periods.

[0190] (Note 7)

[0191] A power supply system comprising:

[0192] a radio frequency generation unit configured to generate a radio frequency signal, wherein the radio frequency signal has a first power level in a first period and a second period, and has a second power level lower than the first power level in a third period and a fourth period, wherein the first period and the third period are included in each of a plurality of first sub-cycles in a first sequence, the second period and the fourth period are included in each of a plurality of second sub-cycles in a second sequence, the first sequence and the second sequence are included in a main cycle, the first period is shorter than the second period, and the third period is longer than the fourth period; and

[0193] A voltage pulse generating unit is configured to generate a voltage pulse signal, wherein the voltage pulse signal has a first voltage level in the first period and the second period, and has a voltage pulse train in the third period and the fourth period, wherein the voltage pulse train has a second voltage level, and the absolute value of the second voltage level is higher than the absolute value of the first voltage level.

[0194] (Note 8)

[0195] An etching method, comprising:

[0196] (a) preparing a substrate having a film and a mask on the film in a chamber of a plasma processing apparatus; and

[0197] (b) an etching step, which is a step of etching the film, comprising supplying a cycle of pulses of a source RF signal and pulses of a bias signal, wherein the cycle includes a first period, a second period, a third period, and a fourth period;

[0198] During the first period, a first deposit is formed on the substrate by a first plasma generated by a first process gas.

[0199] During the second period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the first plasma.

[0200] During the third period, a second deposit is formed on the substrate by a second plasma generated from a second process gas.

[0201] During the fourth period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the second plasma.

[0202] A ratio of the length of the first period to the length of the second period is different from a ratio of the length of the third period to the length of the fourth period.

[0203] (Note 10)

[0204] An etching method according to Note 9, wherein the cycle includes a first ignition period, wherein the first processing gas is supplied to the chamber and a pulse of a source RF signal is supplied before or at the beginning of the first period to generate plasma from the first processing gas.

[0205] (Note 11)

[0206] An etching method according to Note 10, wherein the cycle includes a second ignition period, wherein the second processing gas is supplied to the chamber and a pulse of a source RF signal is supplied before or at the beginning of the third period to generate plasma from the second processing gas.

[0207] (Note 12)

[0208] The etching method according to Supplementary Note 11, wherein the power level of the source RF signal supplied to the chamber in the cycle is highest during the first ignition period or the second ignition period.

[0209] (Note 13)

[0210] The etching method according to any one of Supplementary Notes 9 to 12, wherein a pulse of a source radio frequency signal is supplied to the chamber during the first period and the third period.

[0211] (Note 14)

[0212] The etching method according to Supplementary Note 13, wherein a power level of the source RF signal in the first period is different from a power level of the source RF signal in the third period.

[0213] (Note 15)

[0214] The etching method according to any one of Supplementary Notes 9 to 14, wherein a power level of the bias signal in the second period is different from a power level of the bias signal in the fourth period.

[0215] (Note 16)

[0216] The etching method according to any one of Supplementary Notes 9 to 15, wherein the power level of the bias signal supplied to the chamber in the cycle is highest during the second period or the fourth period.

[0217] (Note 17)

[0218] The etching method according to any one of Supplementary Notes 9 to 16, wherein the first processing gas is different from the second processing gas.

[0219] (Note 18)

[0220] The etching method according to any one of Supplementary Notes 9 to 16, wherein the first processing gas is the same as the second processing gas.

[0221] (Note 19)

[0222] The etching method according to any one of Supplementary Notes 9 to 18, wherein a flow rate of the first processing gas is different from a flow rate of the second processing gas.

[0223] (Note 20)

[0224] The etching method according to any one of Supplementary Notes 9 to 18, wherein a flow rate of the first processing gas is the same as a flow rate of the second processing gas.

[0225] (Note 21)

[0226] The etching method according to any one of Supplementary Notes 9 to 20, wherein, in the cycle, after a first cycle including the first period and the second period is repeated one or more times, a second cycle including the third period and the fourth period is repeated one or more times.

[0227] (Note 22)

[0228] The etching method according to Supplementary Note 21, wherein a length of a period during which the first cycle is repeated is different from a length of a period during which the second cycle is repeated.

[0229] (Note 23)

[0230] The etching method according to Supplementary Note 21, wherein a length of a period during which the first cycle is repeated is the same as a length of a period during which the second cycle is repeated.

[0231] (Note 24)

[0232] An etching method, comprising:

[0233] (a) preparing a substrate having a film and a mask on the film in a chamber of a plasma processing apparatus; and

[0234] (b) an etching step, which is a step of etching the film, comprising supplying a cycle of pulses of a source RF signal and pulses of a bias signal, wherein the cycle includes a first period, a second period, a third period, and a fourth period;

[0235] During the first period, at least a pulse of a source radio frequency signal is supplied to the chamber, and a first deposit is formed on the substrate by a first plasma generated from a first process gas.

[0236] During the second period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the first plasma.

[0237] During the third period, at least a pulse of a source radio frequency signal is supplied to the chamber, and a second deposit is formed on the substrate by a second plasma generated from a second process gas.

[0238] During the fourth period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the second plasma.

[0239] The power level of the source RF signal supplied during the first period is different from the power level of the source RF signal supplied during the third period, or the power level of the bias signal supplied during the second period is different from the power level of the bias signal supplied during the fourth period.

[0240] (Note 25)

[0241] An etching method, comprising:

[0242] (a) preparing a substrate having a film and a mask on the film in a chamber of a plasma processing apparatus; and

[0243] (b) an etching step, which is a step of etching the film, comprising supplying a cycle of pulses of a source RF signal and pulses of a bias signal, wherein the cycle includes a first period, a second period, a third period, and a fourth period;

[0244] During the first period, a first deposit is formed on the substrate by a first plasma generated by a first process gas.

[0245] During the second period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the first plasma generated from the first process gas.

[0246] During the third period, a second deposit is formed on the substrate by a second plasma generated from a second process gas.

[0247] During the fourth period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by plasma generated from the second process gas.

[0248] The flow rate of the first process gas supplied during the first period is different from the flow rate of the second process gas supplied during the third period, or the flow rate of the first process gas supplied during the second period is different from the flow rate of the second process gas supplied during the fourth period.

[0249] (Note 26)

[0250] A plasma processing device comprises a chamber and a control unit.

[0251] The control unit performs the following control:

[0252] (a) controlling the preparation of a substrate including a film and a mask on the film in a chamber of a plasma processing apparatus; and

[0253] (b) etching control, which is control of etching the film, includes supplying a cycle of pulses of a source RF signal and pulses of a bias signal, wherein the cycle includes a first period, a second period, a third period, and a fourth period;

[0254] During the first period, a first deposit is formed on the substrate by a first plasma generated by a first process gas.

[0255] During the second period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the first plasma.

[0256] During the third period, a second deposit is formed on the substrate by a second plasma generated from a second process gas.

[0257] During the fourth period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the second plasma.

[0258] A ratio of the length of the first period to the length of the second period is different from a ratio of the length of the third period to the length of the fourth period.

[0259] (Note 27)

[0260] A plasma processing device comprises a chamber and a control unit.

[0261] The control unit performs the following control:

[0262] (a) controlling the preparation of a substrate including a film and a mask on the film in a chamber of a plasma processing apparatus; and

[0263] (b) etching control, which is control of etching the film, includes supplying a cycle of pulses of a source RF signal and pulses of a bias signal, wherein the cycle includes a first period, a second period, a third period, and a fourth period;

[0264] During the first period, at least a pulse of a source radio frequency signal is supplied to the chamber, and a first deposit is formed on the substrate by a first plasma generated from a first process gas.

[0265] During the second period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the first plasma.

[0266] During the third period, at least a pulse of a source radio frequency signal is supplied to the chamber, and a second deposit is formed on the substrate by a second plasma generated from a second process gas.

[0267] During the fourth period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the second plasma.

[0268] The power level of the source RF signal supplied during the first period is different from the power level of the source RF signal supplied during the third period, or the power level of the bias signal supplied during the second period is different from the power level of the bias signal supplied during the fourth period.

[0269] (Note 28)

[0270] A plasma processing device comprises a chamber and a control unit.

[0271] The control unit performs the following control:

[0272] (a) controlling the preparation of a substrate including a film and a mask on the film in a chamber of a plasma processing apparatus; and

[0273] (b) etching control, which is control of etching the film, includes supplying a cycle of pulses of a source RF signal and pulses of a bias signal, wherein the cycle includes a first period, a second period, a third period, and a fourth period;

[0274] During the first period, a first deposit is formed on the substrate by a first plasma generated by a first process gas.

[0275] During the second period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the first plasma generated from the first process gas.

[0276] During the third period, a second deposit is formed on the substrate by a second plasma generated from a second process gas.

[0277] During the fourth period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by plasma generated from the second process gas.

[0278] The flow rate of the first process gas supplied during the first period is different from the flow rate of the second process gas supplied during the third period, or the flow rate of the first process gas supplied during the second period is different from the flow rate of the second process gas supplied during the fourth period.

[0279] The above embodiments are described for the purpose of illustration and are not intended to limit the scope of the present disclosure. Various modifications may be made to the embodiments without departing from the scope and spirit of the present disclosure. For example, some of the components in a certain embodiment may be added to other embodiments. In addition, some of the components in a certain embodiment may be replaced with corresponding components in other embodiments.

Claims

1. A plasma processing apparatus comprising: chamber; a substrate support portion, disposed in the chamber and comprising a lower electrode; a gas supply unit configured to supply a bimodal gas into the chamber, the bimodal gas including an etching gas and a deposition gas; a source RF generating unit configured to generate a source RF signal to generate a plasma from the dual-mode gas in the chamber, the source RF signal having a first source power level during a first deposition-dominant period and a second deposition-dominant period, and having a second source power level lower than the first source power level during a first etching-dominant period and a second etching-dominant period, the first deposition-dominant period and the first etching-dominant period being included in each first sub-cycle of a plurality of first sub-cycles in a first sequence, the second deposition-dominant period and the second etching-dominant period being included in each second sub-cycle of a plurality of second sub-cycles in a second sequence, the first sequence and the second sequence being included in a main cycle, the first deposition-dominant period being shorter than the second deposition-dominant period, and the first etching-dominant period being longer than the second etching-dominant period; and A bias RF generating unit is electrically connected to the lower electrode and is configured to generate a bias RF signal having a first bias power level during the first deposition dominant period and the second deposition dominant period, and having a second bias power level higher than the first bias power level during the first etching dominant period and the second etching dominant period.

2. The plasma processing apparatus according to claim 1, wherein The first bias power level is a zero voltage level.

3. A plasma processing apparatus comprising: chamber; a substrate support portion, disposed in the chamber and comprising a lower electrode; a gas supply unit configured to supply a bimodal gas into the chamber, the bimodal gas including an etching gas and a deposition gas; a radio frequency generation unit configured to generate a radio frequency signal to generate a plasma from the bimodal gas in the chamber, the radio frequency signal having a first power level during a first deposition dominant period and a second deposition dominant period, and having a second power level lower than the first power level during a first etching dominant period and a second etching dominant period, the first deposition dominant period and the first etching dominant period being included in each first sub-cycle of a plurality of first sub-cycles in a first sequence, the second deposition dominant period and the second etching dominant period being included in each second sub-cycle of a plurality of second sub-cycles in a second sequence, the first sequence and the second sequence being included in a main cycle, the first deposition dominant period being shorter than the second deposition dominant period, and the first etching dominant period being longer than the second etching dominant period; and A voltage pulse generating unit is electrically connected to the lower electrode and is configured to generate a voltage pulse signal, wherein the voltage pulse signal has a first voltage level during the first deposition dominance period and the second deposition dominance period, and has a voltage pulse train during the first etching dominance period and the second etching dominance period, wherein the voltage pulse train has a second voltage level, and the absolute value of the second voltage level is higher than the absolute value of the first voltage level.

4. The plasma processing apparatus according to claim 3, wherein: The second voltage level has a negative polarity.

5. The plasma processing apparatus according to claim 4, wherein: The first voltage level is a zero voltage level.

6. A power supply system comprising: a first RF generation unit configured to generate a first RF signal, wherein the first RF signal has a first power level in a first period and a second period, and has a second power level lower than the first power level in a third period and a fourth period, the first period and the third period being included in each first sub-cycle of a plurality of first sub-cycles in a first sequence, the second period and the fourth period being included in each second sub-cycle of a plurality of second sub-cycles in a second sequence, the first sequence and the second sequence being included in a main cycle, the first period being shorter than the second period, and the third period being longer than the fourth period; and The second RF generation unit is configured to generate a second RF signal having a third power level in the first and second periods and a fourth power level higher than the third power level in the third and fourth periods.

7. A power supply system comprising: a radio frequency generation unit configured to generate a radio frequency signal, wherein the radio frequency signal has a first power level in a first period and a second period, and has a second power level lower than the first power level in a third period and a fourth period, wherein the first period and the third period are included in each first sub-cycle of a plurality of first sub-cycles in a first sequence, the second period and the fourth period are included in each second sub-cycle of a plurality of second sub-cycles in a second sequence, the first sequence and the second sequence are included in a main cycle, the first period is shorter than the second period, and the third period is longer than the fourth period; and A voltage pulse generating unit is configured to generate a voltage pulse signal, wherein the voltage pulse signal has a first voltage level in the first period and the second period, and has a voltage pulse train in the third period and the fourth period, wherein the voltage pulse train has a second voltage level, and the absolute value of the second voltage level is higher than the absolute value of the first voltage level.

8. An etching method comprising: (a) preparing a substrate having a film and a mask on the film in a chamber of a plasma processing apparatus; and (b) an etching step, which is a step of etching the film, comprising supplying a cycle of pulses of a source RF signal and pulses of a bias signal, wherein the cycle includes a first period, a second period, a third period, and a fourth period; During the first period, a first deposit is formed on the substrate by a first plasma generated by a first process gas. During the second period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the first plasma. During the third period, a second deposit is formed on the substrate by a second plasma generated from a second process gas. During the fourth period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the second plasma. A ratio of the length of the first period to the length of the second period is different from a ratio of the length of the third period to the length of the fourth period.

9. The etching method according to claim 8, wherein: The cycle includes a first ignition period in which the first process gas is supplied to the chamber and a pulse of a source RF signal is supplied before or at the beginning of the first period to generate plasma from the first process gas.

10. The etching method according to claim 9, wherein: The cycle includes a second ignition period in which the second process gas is supplied to the chamber and a pulse of a source RF signal is supplied before or at the beginning of the third period to generate plasma from the second process gas.

11. The etching method according to claim 10, wherein: The power level of the source RF signal supplied to the chamber in the cycle is highest during the first ignition period or the second ignition period.

12. The etching method according to claim 8, wherein: During the first period and the third period, a pulse of a source radio frequency signal is supplied to the chamber.

13. The etching method according to claim 12, wherein: The power level of the source RF signal during the first period is different from the power level of the source RF signal during the third period.

14. The etching method according to claim 8, wherein: A power level of the bias signal during the second period is different from a power level of the bias signal during the fourth period.

15. The etching method according to claim 8, wherein: The power level of the bias signal supplied to the chamber in the cycle is highest during the second period or the fourth period.

16. The etching method according to claim 8, wherein: The first process gas is different from the second process gas.

17. The etching method according to claim 8, wherein: The first process gas is the same as the second process gas.

18. The etching method according to claim 8, wherein: A flow rate of the first process gas is different from a flow rate of the second process gas.

19. The etching method according to claim 8, wherein: The flow rate of the first process gas is the same as the flow rate of the second process gas.

20. The etching method according to any one of claims 8 to 19, wherein: In the cycle, after a first cycle including the first period and the second period is repeated one or more times, a second cycle including the third period and the fourth period is repeated one or more times.

21. The etching method according to claim 20, wherein: The length of a period during which the first cycle is repeated is different from the length of a period during which the second cycle is repeated.

22. The etching method according to claim 20, wherein: The length of a period during which the first cycle is repeated is the same as the length of a period during which the second cycle is repeated.

23. An etching method comprising: (a) preparing a substrate having a film and a mask on the film in a chamber of a plasma processing apparatus; and (b) an etching step, which is a step of etching the film, comprising supplying a cycle of pulses of a source RF signal and pulses of a bias signal, wherein the cycle includes a first period, a second period, a third period, and a fourth period; During the first period, at least a pulse of a source radio frequency signal is supplied to the chamber, and a first deposit is formed on the substrate by a first plasma generated from a first process gas. During the second period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the first plasma. During the third period, at least a pulse of a source radio frequency signal is supplied to the chamber, and a second deposit is formed on the substrate by a second plasma generated from a second process gas. During the fourth period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the second plasma. The power level of the source RF signal supplied during the first period is different from the power level of the source RF signal supplied during the third period, or the power level of the bias signal supplied during the second period is different from the power level of the bias signal supplied during the fourth period.

24. An etching method comprising: (a) preparing a substrate having a film and a mask on the film in a chamber of a plasma processing apparatus; and (b) an etching step, which is a step of etching the film, comprising supplying a cycle of pulses of a source RF signal and pulses of a bias signal, wherein the cycle includes a first period, a second period, a third period, and a fourth period; During the first period, a first deposit is formed on the substrate by a first plasma generated by a first process gas. During the second period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by the first plasma generated from the first process gas. During the third period, a second deposit is formed on the substrate by a second plasma generated from a second process gas. During the fourth period, at least a pulse of a bias signal is supplied to the chamber, and the film is etched by plasma generated from the second process gas. The flow rate of the first process gas supplied during the first period is different from the flow rate of the second process gas supplied during the third period, or the flow rate of the first process gas supplied during the second period is different from the flow rate of the second process gas supplied during the fourth period.

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