Method for releasing DMA buffer area, electronic equipment, readable storage medium and program product

Abstract

The embodiment of the invention discloses a method for releasing a DMA buffer area, electronic equipment, a readable storage medium and a program product. After the electronic equipment detects that the first application is switched to the background to run and the first application does not render the image any more, the DMA buffer area of the first application in the RAM can be released, so that the DMA buffer area in the memory space is released for other components to use, and data in the DMA buffer area can be swapped out to a non-RAM storage area to be stored before release, so that the data storage efficiency is improved. And the DMA buffer area of the first application can be conveniently and quickly reconstructed in the RAM subsequently, so that the response rate of the first application in the electronic equipment is improved. According to the method, the RAM space in the electronic equipment can be efficiently managed.

Description

Technical Field

[0001] The present application relates to the field of memory management technology, and in particular to a method for releasing a DMA buffer, an electronic device, a readable storage medium, and a program product. Background Art

[0002] A direct memory access buffer (DMA-BUF) is a mechanism for sharing memory buffers in computer systems. Primarily used in graphics processing and multimedia, it allows different peripherals (such as graphics processing units (GPUs), cameras, network cards, and so on) and processes to efficiently share the same memory buffer, avoiding unnecessary data copies. DMA-BUF relies on DMA technology, which allows peripherals and processes to directly read and write data to and from the memory buffer, improving data transfer efficiency. Summary of the Invention

[0003] The embodiments of the present application provide a method for releasing a DMA buffer, an electronic device, a readable storage medium, and a program product, which can efficiently manage the RAM space in the electronic device.

[0004] In a first aspect, a method for releasing a DMA buffer is provided, which may include: detecting that a first application switches to background operation and detects that the first application no longer renders an image; copying data in the first DMA buffer to a first storage area in a non-RAM storage area, where the first DMA buffer is a DMA buffer located in RAM allocated for the first application; and releasing the first DMA buffer.

[0005] Through the method of the first aspect, after the electronic device detects that the first application has switched to the background and the first application is no longer rendering images, it can not only release the DMA buffer of the first application in the RAM, thereby releasing the DMA buffer in the memory space for use by other components (such as peripherals, drivers, operating system modules, processes, etc.), but also swap out the data of the DMA buffer to a non-RAM storage area before release, so as to facilitate the subsequent faster reconstruction of the DMA buffer of the first application in the RAM, thereby improving the response rate of the first application in the electronic device. Moreover, after the electronic device detects that the first application has switched to the background and the first application is no longer rendering images, it can be considered that the first application is likely to no longer use the data in the first DMA buffer in a short period of time. At this time, executing the swap-out action can ensure the effectiveness of the swap-out action, and avoid the situation where the first application needs to swap in the data of the first DMA buffer again in a short period of time, thereby making the swap-out action invalid. This method can efficiently manage the RAM space in the electronic device.

[0006] The first DMA buffer area may be a physically continuous area in the RAM, or a physically discontinuous area in the RAM. The number of the first DMA buffer area may be one or more.

[0007] Non-RAM storage area refers to the storage area in electronic devices other than RAM. It can be ROM, cache memory or register other than RAM in internal memory, or HDD, SSD, optical disk, tape, USB flash drive, flash memory, disk, etc. in external storage.

[0008] In conjunction with the first aspect, in some embodiments, before copying the data in the first DMA buffer to the non-RAM storage area, the method may further include: freezing the first application after detecting that it has switched to background operation. This can avoid releasing the data in the first DMA buffer when the first application is performing off-screen rendering, thereby preventing rendering errors.

[0009] In combination with the first aspect and any embodiment of the first aspect, in some embodiments, the method is applied to an electronic device running a first operating system, and the electronic device can specifically release the first DMA buffer through the first operating system. In this way, there is no need for the first application to release the first DMA buffer. The operating system releases the first DMA buffer without the need for the first application to perceive it, so the program code of the first application may not include the program code for releasing the DMA buffer. As a result, there is no need for the developer of the first application to embed the program code for releasing the DMA buffer when developing the first application, which reduces the implementation cost of the method for releasing the DMA buffer provided in the embodiment of the present application, and the operating system performing the above-mentioned actions can also ensure the release of the first DMA buffer, thereby saving RAM space.

[0010] Specifically, the operating system may release the first DMA buffer by calling a function interface provided by the electronic device.

[0011] In conjunction with the first aspect and any embodiment of the first aspect, in some embodiments, the non-RAM storage area to which the data in the first DMA buffer is copied belongs to external memory. The external memory may include, for example, a storage medium such as an HDD, an SDD, an optical disk, a magnetic tape, a USB flash drive, a flash memory, or a magnetic disk.

[0012] In conjunction with the previous embodiment, in some embodiments, before copying the data in the first DMA buffer to the first storage area in the non-RAM storage area, the method may further include: assigning a swap partition identifier to the first storage area in the non-RAM storage area. In this way, the electronic device can allocate an area in the external memory of the non-RAM storage area as a swap partition for the RAM.

[0013] In combination with the first aspect and any implementation manner of the first aspect, in some implementation manners, the electronic device may further retain a structure of the first application, wherein the structure of the first application includes the size of the first DMA buffer.

[0014] In combination with the first aspect and any embodiment of the first aspect, in some embodiments, after releasing the first DMA buffer, the method may further include: detecting that the first application switches to the foreground, or detecting that the first application is unfrozen, or detecting that the first application renders an image; allocating a second DMA buffer for the first application in RAM; and copying the data in the first storage area to the second DMA buffer. In this way, as long as the first application needs to use the data in the DMA buffer again, the data in the DMA buffer of the first application can be rebuilt, thereby ensuring the use of the first application. Moreover, the electronic device can complete the reconstruction of the data by copying the data in the first storage area to the second DMA buffer. The time required for data copying is shorter, so the data required by the first application can be rebuilt in the RAM more quickly, thereby improving the response rate of the first application in the electronic device and giving the user a better user experience.

[0015] The second DMA buffer may be a physically continuous area in the RAM or a physically discontinuous area in the RAM. The number of second DMA buffers may be one or more. The second DMA buffer and the first DMA buffer may be in the same physical area or in different physical areas.

[0016] In conjunction with the previous embodiment, in some embodiments, before allocating the second DMA buffer in RAM for the first application, the method may further include: querying the DMA-BUF structure of the first application, where the DMA-BUF structure includes the size of the first DMA buffer. The electronic device may allocate a second DMA buffer of the same size as the first DMA buffer in RAM for the first application. In this way, by querying the DMA-BUF structure of the first application, the electronic device may reconstruct a second DMA buffer of the same size as the first DMA buffer.

[0017] In combination with any of the two embodiments described above, in some embodiments, the method is applied to an electronic device running a first operating system, and the electronic device can allocate a second DMA buffer in RAM for the first application through the first operating system. In this way, there is no need for the first application to allocate the second DMA buffer, and the operating system allocates the second DMA buffer without the need for the first application to perceive it. Therefore, the program code of the first application may not include program code for allocating a DMA buffer. As a result, there is no need for the developer of the first application to embed the program code for allocating a DMA buffer when developing the first application, which reduces the implementation cost of the method for releasing the DMA buffer provided in the embodiment of the present application, and the operating system performing the above actions can also ensure the allocation of the second DMA buffer, thereby ensuring the use of the second application.

[0018] Specifically, the operating system may complete the allocation of the second DMA buffer by calling a function interface provided by the electronic device.

[0019] In combination with any of the three embodiments described above, in some embodiments, the method may further include: backing up a first table entry, wherein the first table entry records a mapping relationship between the physical address of the first DMA buffer and the first virtual address. After allocating a second DMA buffer in RAM for the first application, the method may further include: establishing a mapping relationship between the physical address of the second DMA buffer and the first virtual address based on the first table entry. In this way, it is equivalent to replacing the physical address of the first DMA buffer in the mapping relationship with the physical address of the second DMA buffer, that is, in the reconstructed mapping relationship, only the physical address of the DMA buffer changes, while the first virtual address does not change, thereby reducing the actions required for mapping.

[0020] In some implementations, the electronic device may further create a second discrete aggregation table, where the second discrete aggregation table is used to describe the second DMA buffer.

[0021] The first virtual address may include one or more of the following: a virtual address of a CPU, a virtual address of a GPU, or a virtual address of a peripheral device (such as a network card or a camera of an electronic device). Establishing a mapping relationship between the physical address of the second DMA buffer and the first virtual address may specifically include recording the mapping relationship between the physical address of the second DMA buffer and the first virtual address in a page table entry of a page table.

[0022] In some embodiments, after allocating the second DMA buffer for the first application in the RAM, the method may further include: creating a second discrete aggregation table, where the second discrete aggregation table is used to describe the second DMA buffer.

[0023] In some embodiments, after copying the data in the first storage area to the second DMA buffer, the method may further include: releasing the first storage area, thereby returning the non-RAM storage area space occupied by the first storage area to the system for use by other components.

[0024] In conjunction with the first aspect and any implementation manner of the first aspect, in some implementation manners, the method may further include one or more of the following: removing the mapping relationship between the physical address and the first virtual address of the first DMA buffer; and deleting a first discrete aggregation table, the first discrete aggregation table being used to describe the first DMABUF buffer. This is equivalent to releasing resources related to the first DMA buffer.

[0025] Specifically, releasing the mapping relationship between the physical address of the first DMA buffer and the first virtual address may include deleting or marking as invalid a page table entry in the page table that records the mapping relationship between the physical address of the first DMA buffer and the first virtual address.

[0026] In some embodiments, the electronic device may first release the mapping relationship between the physical address and the first virtual address of the first DMA buffer, and then copy the data in the first DMA buffer to the first storage area in the non-RAM storage area. This is equivalent to first severing the connection between the physical address and the first virtual address of the first DMA buffer, isolating the first DMA buffer, and then copying the data. This can prevent the first DMA buffer from being accessed and changed by some applications or devices during the data copy process, thereby avoiding the problem of data inconsistency during the copy process.

[0027] In conjunction with the previous embodiment, in some embodiments, the non-RAM storage area is external memory. After releasing the first storage area, the method may further include: clearing the swap partition identifier assigned to the first storage area. In this way, the electronic device can reclaim the storage area used as a RAM swap partition in the external memory of the non-RAM storage area.

[0028] In combination with the first aspect and any implementation manner of the first aspect, in some implementation manners, the data stored in the first DMA buffer includes one or more of the following: graphics data, surface data, web page data, and video frame data.

[0029] In a second aspect, an electronic device is provided, comprising a memory, a processor, and a computer program stored in the memory, wherein the memory comprises a RAM and a non-RAM storage area, and the processor executes the computer program to implement a method as in the first aspect or any one of the embodiments of the first aspect.

[0030] In a third aspect, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the method of the first aspect or any one of the embodiments of the first aspect is implemented.

[0031] In a fourth aspect, a computer program product is provided. The computer program product includes a computer program. When the computer program is executed by a processor, it implements the method of the first aspect or any one of the embodiments of the first aspect.

[0032] In a fifth aspect, a chip system is provided, which includes a processing circuit and an interface circuit. The interface circuit is used to receive computer instructions and transmit them to the processing circuit. The processing circuit is used to run the computer instructions to implement a method as described in the first aspect or any one of the embodiments of the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 Schematic diagram of the working principle of DMA-BUF provided in the embodiment of the present application;

[0034] Figure 2 A flowchart of a method for releasing a DMA buffer provided in an embodiment of the present application;

[0035] Figure 3 A schematic diagram of data migration involved in the method for releasing a DMA buffer provided in an embodiment of the present application;

[0036] Figure 4 A hardware structure diagram of an electronic device provided in an embodiment of the present application;

[0037] Figure 5 A software structure diagram of the electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] The technical solutions in the embodiments of the present application will be described clearly and in detail below with reference to the accompanying drawings.

[0039] DMA-BUF

[0040] DMA-BUF is a shared memory buffer mechanism and framework that can be applied to Linux, HarmonyOS, and Android. TM , IOS and other operating systems.

[0041] The core data structure of a DMA-BUF is the DMA-BUF structure (struct dma_buf), which contains the properties of the DMA buffer. The properties of a DMA buffer may include the following information: the size of the DMA buffer, the file object associated with the DMA buffer, a linked list of devices that use the DMA buffer (attachments), and a set of operations on the DMA buffer (such as mapping, unmapping, attaching, and detaching).

[0042] A DMA buffer is a physical area located in the random access memory (RAM) of an electronic device's memory.

[0043] Memory is a hardware resource used to store data and programs in a computer system. It is a storage device that directly communicates with the central processing unit (CPU) in a computer system and typically has a fast access speed. Memory can mainly include random access memory (RAM), read-only memory (ROM), cache memory, and registers.

[0044] RAM is a volatile storage medium; data on it is lost upon power failure. RAM supports random access, boasts fast read and write speeds, and can communicate directly with the CPU, serving as a DMA buffer. RAM specifically includes static random-access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and double data rate synchronous dynamic random access memory (DDR SDRAM, for example, the fifth generation of DDR SDRAM is generally referred to as DDR5 SDRAM).

[0045] ROM stands for non-volatile memory (NVM). Data stored in it persists after a power outage and is generally unmodifiable. ROM can include masked read-only memory (MASK ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), and electrically erasable programmable read-only memory (EEPROM).

[0046] Cache memory is a layer of fast memory located between the CPU and main memory (such as RAM). It reduces the number of accesses to the main memory (RAM) by storing the data and instructions recently accessed by the CPU, thereby improving the CPU's operating efficiency.

[0047] Registers are a group of memory units located inside the CPU, used to temporarily store intermediate results and instruction information during the calculation process.

[0048] In contrast to internal memory is external storage, which is used for long-term data storage and typically has a larger capacity but a slower access speed. Examples of auxiliary storage include hard disk drives (HDDs), solid state drives (SSDs), optical discs, tapes, universal serial bus flash drives (USB flash drives), flash memory, and magnetic disks. Flash memory can be categorized by its operating principle into NOR flash memory, NAND flash memory, and 3D NAND flash memory. It can be categorized by the number of memory cell potential levels into single-level cells (SLC), multi-level cells (MLC), triple-level cells (TLC), and quad-level cells (QLC). It can be categorized by storage specifications into universal flash storage (UFS) and embedded multi-media cards (eMMC).

[0049] Main memory supports random access and has fast read and write speeds, but its capacity is limited. External memory has a large capacity and is volatile, but its access speed is relatively slow. Therefore, data in external memory must be loaded into main memory before the CPU can access it. Generally, the storage space of external memory is larger than that of main memory. When main memory is insufficient, the operating system can swap some data to external memory, using it as an expansion space for main memory.

[0050] Among the storage resources of electronic devices, RAM in the memory supports random access and fast read and write speeds. It also supports direct communication with the CPU and can be used as a DMA buffer. Storage areas other than RAM in electronic devices, such as ROM, cache memory, registers, HDD, SSD, optical disk, tape, USB flash drive, flash memory, etc., can be called non-RAM memory.

[0051] A DMA buffer can be a physically contiguous or discontiguous area of ​​RAM. It is used to temporarily store data for efficient data transfer and processing between different components. These components can include peripherals (such as GPUs, network cards, and cameras), drivers, operating system modules (such as the memory management unit (MMU) and file systems), or processes in electronic devices.

[0052] Figure 1 The working principle of DMA-BUF is shown in Figure 2. Figure 1 As shown, taking application A as an example, the process of application A applying for a DMA buffer in DMA-BUF may include the following steps:

[0053] 1. If application A (located in user space) wants to share its own data, the driver of application A (located in kernel space) can act as an exporter and apply for a DMA buffer in the RAM of the electronic device.

[0054] 2. After the driver of application A applies for the DMA buffer, it returns the DMA buffer to application A in the form of a file descriptor (fd).

[0055] The fd is a process-level identifier for the DMA buffer, valid only within the process that created it (e.g., Application A). The fd describes the relationship between a process and an open file. Application A can fill the allocated DMA buffer with data it wants to share. Application A can also pass the fd to other components (e.g., processes) so that they can reference the DMA buffer through the fd when accessing it.

[0056] When the electronic device allocates a DMA buffer for application A, it also creates a DMA-BUF structure corresponding to the DMA buffer to record some attribute information of the DMA buffer.

[0057] The information of the DMA buffer can be recorded in a scatter-gather table (sg_table). The scatter-gather table can include multiple scatter list entries (scatter lists). A scatter list entry is used to describe a physically continuous buffer allocated in RAM. A scatter list entry can specifically contain the physical address and length of the corresponding physically continuous buffer. In other words, the scatter-gather table can be used to describe and manage physically discontinuous RAM blocks, linking physically discontinuous RAM to form a logically continuous RAM area to facilitate the transmission of data in the DMA buffer. The number of scatter list entries in sg_table is related to the size of the DMA buffer.

[0058] 3. Map the physical address of the DMA buffer to a virtual address.

[0059] exist Figure 1 In the process shown, to achieve RAM isolation, RAM security, and efficient data transfer, DMA-BUF provides a mechanism to map the physical address of the DMA buffer to a virtual address, which makes it easier for various components in the electronic device to access the DMA buffer. The mapping in DMA-BUF can include the following categories:

[0060] (1) The kernel driver and CPU hardware map the physical address of the DMA buffer to the CPU's virtual address space so that the CPU can access these DMA buffers. This type of mapping can be divided into Figure 1 The user space mapping shown in 3.1 and Figure 1 The kernel space mapping is shown in 3.2. Figure 1 As shown by the two double arrows on the right side of the figure, kernel space mapping refers to mapping the physical address of the DMA-BUF buffer to the virtual address of the kernel space so that the kernel code can directly access the DMA buffer; while user space mapping refers to mapping the physical address of the DMA-BUF buffer to the virtual address space of the user space so that the application in the user space can directly access the DMA buffer.

[0061] (2) The GPU driver and GPU hardware map the physical address of the DMA buffer to the GPU's virtual address space so that the GPU can access the DMA buffer in graphics rendering and computing tasks. Figure 1 Not reflected in.

[0062] (3) The input-output memory management unit (IOMMU) in electronic devices maps the physical address of the DMA buffer to the virtual address space of each peripheral (such as GPU, network card, camera, etc.), allowing the peripheral to access the DMA buffer of the physical memory through the virtual address when transmitting DMA data, and providing memory protection and address isolation functions. Figure 1 Not reflected in.

[0063] When a DMA buffer needs to be mapped to a virtual address space, the electronic device can call the dma_buf_vmap function or a similar function to establish an internal mapping relationship so that the virtual address space can be mapped to the physical address where the DMA buffer is located. This mapping relationship is maintained and managed by the kernel's memory management process.

[0064] The mapping relationship in the DMA-BUF can be recorded in a page table by the memory management process. The page table can include multiple page table entries, each of which describes the mapping relationship between a virtual page in the virtual address space and a physical page. A page is the unit of memory management, a virtual page is a fixed-size block in the virtual address space, and a physical page is a fixed-size block in physical memory. In other words, a page table entry describes the mapping relationship between a virtual address and a physical address. As mentioned in the previous paragraphs, if the DMA-BUF contains multiple types of mapping relationships, multiple page tables can be created in the electronic device, with one page table used to describe each type of mapping relationship, and different page tables used to describe different types of mapping relationships. When the CPU, GPU, or peripheral device accesses a virtual address, it can use the page table to look up the corresponding physical address and access the actual physical address.

[0065] A page table is a data structure in an electronic device that maintains the mapping relationship between the memory space of the entire machine. It is not limited to the mapping relationship between the physical address and the virtual address of the DMA buffer described above. The page table can also contain more page table entries to record other memory space mapping relationships. After the electronic device allocates a DMA buffer for an application or device, it creates a DMA-BUF structure, establishes a mapping relationship between the physical address and the virtual address of the DMA buffer, and records the mapping relationship in the corresponding table entry of the page table. The mapping relationship mentioned in the subsequent embodiments of this application mainly refers to the mapping relationship between the physical address and the virtual address of the DMA buffer.

[0066] Electronic devices have limited RAM space. When data in a DMA buffer is not being used, releasing the DMA buffer can effectively manage RAM space and maximize RAM utilization. Releasing a DMA buffer can also be called reclaiming a DMA buffer. Releasing a DMA buffer clears the data in the buffer and returns the RAM area occupied by the buffer to the system for use by other components.

[0067] When releasing a DMA buffer, some associated resources will also be released. For example, the electronic device will release the mapping relationship between the physical address and the virtual address of the DMA buffer. The mapping relationship here can be referred to in the previous text. Removing the mapping relationship may specifically include marking the page table entry corresponding to the mapping relationship between the physical address and the virtual address of the DMA buffer in the page table that records the mapping relationship as invalid or directly clearing it. The physical address after the mapping relationship is removed is no longer accessible to the devices in the linked list recorded in the DMA-BUF structure. Neither the application nor the device can access the physical address of the DMA buffer through the virtual address in the mapping relationship. For another example, the electronic device will clean up the data structure related to the DMA buffer, such as cleaning the DMA-BUF structure and cleaning the sg_table. Not limited to this, the electronic device can also close the file descriptor associated with the DMA buffer, release the private resources allocated by the exporter when creating the DMA buffer, and so on. The specific related resources that will be released when releasing the DMA buffer depend on the purpose of the DMA buffer and the needs of the exporter, etc., and the embodiments of the present application do not specifically limit this.

[0068] The method for releasing a DMA buffer provided by the embodiment of the present application

[0069] In order to effectively manage the RAM space in an electronic device, an embodiment of the present application provides a method for releasing a DMA buffer. This method can not only release the DMA buffer in the RAM, thereby freeing up the DMA buffer in the memory space for use by other components, but also swap out the data in the DMA buffer to a non-RAM storage area before release, facilitating the subsequent faster reconstruction of the DMA buffer of the first application in the RAM, thereby improving the response rate of the first application in the electronic device. This method can efficiently manage the RAM space in the electronic device.

[0070] Figure 2 Flowchart of the method for releasing DMA buffer provided by the embodiment of the present application. The method can be executed by an electronic device supporting DMA-BUF. Figure 2 As shown, the method may include the following steps:

[0071] S101: The electronic device allocates a first DMA buffer zone for a first application in a RAM.

[0072] The first application may be an application installed in the electronic device, which may be a third-party application or a system application.

[0073] exist Figure 2 In the method shown, the first application is in a running state. The electronic device can allocate a DMA buffer for the running first application. When the first application running in the electronic device wants to share its own data, the first application can act as an exporter and apply for a physical area in the RAM of the electronic device as its own DMA buffer to fill the data of the first application. The electronic device can allocate a physical area in the RAM to the first application in response to the application. The DMA buffer allocated to the first application can be referred to as a first DMA buffer. The first DMA buffer can be a physically continuous area in the RAM or a physically discontinuous area in the RAM.

[0074] The first application may store one or more of the following data in the first DMA buffer: graphics data (eg, pixelmap representing pixel data), surface data (eg, drawing surface type data), web page data (web data), video frame data, etc.

[0075] For example, when an application needs to display graphics on an electronic device's display, it can request a DMA buffer to store its graphics data (e.g., a pixelmap representing pixel data). The CPU can then access the DMA buffer to pre-process the image data, and the GPU and render service (RS) can access the DMA buffer to render the pre-processed image data. The IOMMU also ensures the security of the GPU and other devices accessing the DMA buffer. The RS is the software module in the electronic device that renders images for each application.

[0076] In the embodiment of the present application, the number of first DMA buffers allocated by the electronic device to the first application can be one or more, depending on the specific application scenario and requirements. For example, in an image rendering scenario, the first application may request two DMA buffers, one DMA buffer for components such as the GPU and RS to render images, and the other DMA buffer for displaying content on the display.

[0077] refer to Figure 1The working principle of DMA-BUF introduced above is that when the electronic device allocates the first DMA buffer to the first application, it will also execute the creation of a corresponding DMA-BUF structure for the first application, create sg_table, and establish a mapping relationship between the physical address of the first DMA buffer and the virtual address, such as creating a table entry in the page table to record the mapping relationship. For details, please refer to the above introduction. The virtual address can be the virtual address of the CPU, GPU or other peripherals, and please refer to the relevant description above. The number of virtual addresses can be one or more, and the virtual address can be referred to as the first virtual address in subsequent embodiments.

[0078] S102: The electronic device detects that the first application is switched to background operation.

[0079] When the first application switches to background operation, the electronic device does not close the first application, and the first application still occupies a certain amount of memory and CPU resources in the background. The electronic device can determine whether the first application switches to background operation by detecting the activity running status of the first application, obtaining the background running time of the first application, or observing the life cycle of the first application.

[0080] When the first application is switched to the background, it is highly likely that the first application will no longer use the data in the first DMA buffer in a short period of time.

[0081] In some embodiments, S102 can be replaced by detecting that the first application has been switched to the background for a first duration. This will increase the likelihood that the user will not use the first application again within a short period of time, thereby avoiding the user frequently switching the first application between the foreground and background, thereby ensuring the effectiveness of the subsequent switching actions in S105-S106. The first duration can be set as needed and is not specifically limited here.

[0082] S103: The electronic device detects that the first application is switched to the background and then frozen.

[0083] Freezing a first application means that the state of the first application is preserved but execution is suspended. The first application's process is not scheduled on the CPU, thus conserving CPU resources. The frozen state can be considered a dormant state for the first application in the background. When the first application returns to the background and has no background tasks, the electronic device may freeze the first application to conserve resources.

[0084] When the first application is switched to the background and then frozen, the first application is likely to no longer use the data in the first DMA buffer for a short period of time. The electronic device can determine whether the first application is frozen by detecting the active running state of the first application and observing the life cycle of the first application.

[0085] In the embodiment of the present application, S103 is an optional operation.

[0086] S104: The electronic device detects that the first application no longer renders images.

[0087] The first application can use the data in the first DMA buffer to render an image, and the rendered image can be displayed on the display screen, so that the display screen of the electronic device can display the graphical interface of the first application. When the first application no longer renders an image, it means that the first application no longer needs to use the data in the first DMA buffer to render the image, and components such as the GPU and RS no longer need to access the data in the first DMA buffer, and the graphical interface of the first application will no longer be displayed on the display screen.

[0088] In some embodiments, when the electronic device detects that the first application no longer uses RS, it can be considered that the first application is no longer rendering images. The first application no longer using RS can also be considered as the first application's render tree descending from RS. The render tree is a data structure in the field of graphics rendering that describes the visible content on a page. It contains node information and layout information, which is used by RS to render and draw the page content and then present it on the display.

[0089] Figure 2 The execution order of the steps shown is only an example and does not constitute a limitation of the present application. The embodiment of the present application does not impose any specific restrictions on the order of S102 and S104. S102 can be executed before S104, S102 can also be executed after S104, or S102 can also be executed simultaneously with S104, depending on the actual operation of the electronic device. The embodiment of the present application does not impose any specific restrictions on the order of S103 and S104. S103 can be executed before S104, S103 can also be executed after S104, or S103 can also be executed simultaneously with S104, depending on the actual operation of the electronic device.

[0090] Subsequent steps S105-S106 introduce operations of swapping out the data in the first DMA buffer to the non-RAM storage area and releasing the first DMA buffer. Steps S105-S106 may be triggered in any of the following ways:

[0091] 1. In some embodiments, the electronic device may execute S104-S105 in response to detecting in S102 that the first application has switched to background operation and detecting in S104 that the first application is no longer rendering images. When the first application switches to background operation and no longer renders images, the first application will most likely not use the data in the first DMA buffer for a short period of time. Executing S104-S105 at this time can free up the physical space occupied by the first DMA buffer in RAM and ensure the effectiveness of the swap-out action, thereby avoiding a situation where the first application needs to swap in data in the first DMA buffer again in a short period of time, thereby invalidating the swap-out action.

[0092] 2. In some embodiments, the electronic device may execute S104-S105 in response to detecting in S102 that the first application switches to background operation, detecting in S103 that the first application is frozen and detecting in S104 that the first application is no longer rendering images. The technical effects of this method can refer to the technical effects of the above-mentioned first method. In addition, the conditions for triggering S105-S106 in the second method add the freezing of the first application in S103 compared to the first method, which can avoid releasing the data in the first DMA buffer in the scenario of off-screen rendering of the first application, thereby causing rendering errors. Off-screen rendering means that the first application retreats to the background but is still rendering images. At this time, the first application still has the need to use the data in the first DMA buffer.

[0093] Compared with the method of triggering S105-S106 in which the electronic device releases the DMA buffer of the first application after the process of the first application ends, the method of triggering S105-S106 introduced above can release the DMA buffer in time when the first application does not need to use the DMA buffer data, thereby releasing the corresponding RAM for use by other components in need, thereby improving RAM utilization.

[0094] S105 , the electronic device queries a first DMA buffer allocated to the first application.

[0095] The electronic device first searches for the first DMA buffer area requested by the first application in the RAM, and then performs the release and swap-out operations in S106 on the first DMA buffer area.

[0096] In a specific implementation, when applying for the first DMA buffer zone, the first application can save the identifier of the first DMA buffer zone, which can be, for example, an index node (inode). Inode is a system-level concept, which is valid for all processes in the electronic device system. Inode is used to help the operating system manage files. When executing S105, the first application can pass the identifier of the first DMA buffer zone to the driver in the electronic device through a functional interface (such as an input / output control (ioctl) interface), and then the driver in the electronic device finds the first DMA buffer zone in the RAM according to the identifier. Among them, the ioctl interface is an interface for communication between user space and kernel space. The driver in the electronic device is a software module in the DMA-BUF mechanism, which is used to manage the allocation and management of the DMA buffer zone, and process the transmission of DMA data.

[0097] S106 , the electronic device copies the data in the first DMA buffer to a first storage area in the non-RAM storage area, and releases the first DMA buffer.

[0098] The electronic device copies the data in the first DMA buffer to the first storage area in the non-RAM storage area, which is equivalent to writing the data in the first DMA buffer to the first storage area, that is, the disk write process of the first DMA buffer.

[0099] The non-RAM storage area to which the electronic device copies data is a storage area other than RAM in the electronic device. This can be a ROM, cache memory, or register other than RAM in the internal memory, or a HDD, SSD, optical disk, magnetic tape, USB flash drive, flash memory, magnetic disk, etc. in the external memory. If the non-RAM storage area is a non-volatile storage area, then S106 ensures that the data in the first buffer area will not be lost even if the electronic device loses power or experiences a system failure after the data is copied to the first storage area.

[0100] If the non-RAM storage area belongs to external memory, the electronic device can first divide an area in the non-RAM storage area as a swap partition (swap partition) for expanding RAM. Specifically, a fixed identifier can be assigned to the area (for example, the assigned extended identifier extid is 82) to indicate that the area is set as a swap partition, and the storage space of the area is greater than or equal to the storage space of the first DMA buffer. The storage space size of the first DMA buffer can be queried by the electronic device from the DMA-BUF structure of the first application. After determining the swap partition in the non-RAM storage area, the electronic device can copy the data in the first DMA buffer to the area in the non-RAM storage area.

[0101] If the non-RAM storage area belongs to the internal memory, the memory management process of the electronic device can directly copy the data in the first DMA buffer to the non-RAM storage area.

[0102] The area in the non-RAM storage area to which the electronic device copies the data in the first DMA buffer can be referred to as the first storage area. The first storage area can be located in one or more of the following: ROM, cache memory, register, HDD, SSD, optical disk, tape, USB flash drive, flash memory, or disk. The first storage area can be a physically continuous area or a physically discontinuous area, and the embodiments of the present application are not limited to this.

[0103] The action of the electronic device releasing the first DMA buffer can be referred to above Figure 1 The introduction of the DMA-BUF mechanism can specifically clear the data in the first DMA buffer and return the RAM area occupied by the first DMA buffer to the system for use by other components.

[0104] In some embodiments, reference Figure 1 As described in the introduction, the electronic device may further release resources related to the first DMA buffer, such as releasing the mapping relationship between the physical address and the first virtual address of the first DMA buffer (for example, deleting the entry in the page table (pagetable) that records the mapping relationship between the physical address and the first virtual address of the first DMA buffer or marking the entry as invalid), and / or deleting the first discrete aggregation table (sg-table), etc. The first discrete aggregation table is used to describe the first DMA buffer. In some embodiments, the electronic device may first release the mapping relationship between the physical address and the first virtual address of the first DMA buffer, and then copy the data in the first DMA buffer to the first storage area in the non-RAM storage area. This is equivalent to first severing the connection between the physical address and the first virtual address of the first DMA buffer, isolating the first DMA buffer, and then copying the data. This can prevent the first DMA buffer from being accessed and modified by some applications or devices during the data copying process, thereby avoiding the problem of data inconsistency during the copying process.

[0105] In some embodiments, the electronic device may retain the DMA-BUF structure of the first application created in S101. Furthermore, before removing the mapping relationship between the physical address of the first DMA buffer and the first virtual address, the electronic device may also back up the entry in the page table (page table) that records the mapping relationship, as described in S101, to facilitate subsequent rapid reconstruction of data required by the first application. The data reconstruction process may refer to subsequent step S108.

[0106] In an embodiment of the present application, the operating system of the electronic device (specifically, the kernel space) provides a functional interface for releasing DMA buffers and related resources (such as clearing sg_table, releasing mapping relationships, etc.), and this functional interface can be referred to as a first functional interface. The first functional interface can specifically be one or more APIs. An API may include one or more functions, and may also define the calling method of the functions it contains. When these functions are called in this way, the functions of the corresponding API can be realized. The functions involved in the first functional interface provided in the embodiment of the present application may, for example, include a dma_free_coherent function for releasing RAM resources and releasing the mapping relationship between physical addresses and virtual address spaces, a dma_unmap_single function and a dma_unmap_sg function for releasing the DMA device's access rights to the DMA buffer, and an sg_free_table function for clearing the sg_table, etc. Execution Figure 2 The operating system running in the electronic device of the method shown can be called a first operating system, and the first operating system can be Linux, HarmonyOS, Android TM , IOS and other operating systems.

[0107] In an embodiment of the present application, the operating system of the electronic device can release the first DMA buffer and related resources (such as clearing sg_table, releasing the mapping relationship, etc.) by calling the first functional interface, without the need for the first application to call the first functional interface provided by the operating system. In a specific implementation, the operating system can detect the conditions for triggering S105-S106 described above, and call the first functional interface in response to the conditions. In this way, the action of releasing the first DMA buffer and related resources (such as clearing sg_table, releasing the mapping relationship, etc.) is completed by the operating system without the need for the first application to perceive it, so the program code of the first application may not include the program code for calling the first functional interface. As a result, there is no need for the developer of the first application to embed the program code for calling the first functional interface when developing the first application, which reduces the implementation cost of the method for releasing the DMA buffer provided in the embodiment of the present application, and the operating system calling the first functional interface can also ensure the release of the first DMA buffer, thereby saving RAM space.

[0108] In an embodiment of the present application, the memory management process in the electronic device has the ability to schedule the first functional interface. In S106, the first functional interface can be specifically scheduled by the memory management process running in the operating system, thereby releasing the first DMA buffer and some related resources.

[0109] Through S106, the electronic device can swap out the data of the temporarily unused first DMA buffer in the RAM to a non-RAM storage area for storage, thereby releasing the space occupied by the DMA buffer for use by other components, and more efficiently utilizing and managing the RAM space.

[0110] In some embodiments, Figure 2 The method flow shown may further include steps S107 - S108 .

[0111] S107: The electronic device detects that the first application is switched to the foreground, or detects that the first application is thawed, or detects that the first application is rendering an image.

[0112] When the first application switches to the foreground, the first application needs to use the data in the DMA buffer it has applied for. The electronic device can determine whether the first application has switched to the foreground by detecting the active running status of the first application, obtaining the foreground running time of the first application, observing the life cycle of the first application, etc.

[0113] When the first application is unfrozen, the first application may need to use the data in the DMA buffer area applied by itself. The electronic device can determine whether the first application is unfrozen by detecting the active running state of the first application and observing the life cycle of the first application.

[0114] When the first application renders an image, the first application needs to use the data in the DMA buffer it has applied for, and components such as the GPU and RS also need to access the data in the DMA buffer. In some embodiments, when the electronic device detects that the first application uses RS, it can be considered that the first application is currently rendering an image.

[0115] It can be seen that each of the three conditions provided in S107 indicates that the current first application needs to use the data in the DMA buffer again. Triggering S108 through S107 can ensure that the data in the DMA buffer of the first application has been rebuilt before the DMA buffer of the first application is accessed each time, thereby ensuring the use of the first application.

[0116] S108 , the electronic device allocates a second DMA buffer for the first application in the RAM, and copies the data in the first storage area to the second DMA buffer.

[0117] When the running first application needs to use the data in the DMA buffer again, the electronic device needs to rebuild the data. That is, the electronic device can execute S108 in response to S107.

[0118] Specifically, the first application in the electronic device can call a functional interface (such as an ioctl interface) to notify the driver in the electronic device to swap in the DMA buffer data of the first application. After that, the driver in the electronic device can perform the swap-in operation in response to the notification, that is, rebuild the data required by the first application. The process of the electronic device rebuilding these data may specifically include: the driver in the electronic device first queries the information of the DMA buffer of the first application from the retained DMA-BUF structure of the first application created in S101, such as the size, etc., and then applies for a physical area in the RAM as the DMA buffer of the first application. The storage space size of the physical area can be greater than or equal to the size queried by the electronic device from the DMA-BUF structure of the first application; thereafter, the data of the first storage area in the non-RAM storage area is copied to the physical area in the RAM. The physical area in the RAM can be called a second DMA buffer. The second DMA buffer can be a physically continuous area in the RAM, or a physically discontinuous area in the RAM.

[0119] Since the first DMA buffer has been released in S106 and may have been provided to other components for use, the second DMA buffer allocated by the electronic device to the first application in S108 may not be in the same physical area as the first DMA buffer. Of course, if the first DMA buffer is still in an idle state, the second DMA buffer and the first DMA buffer may also be in the same physical area.

[0120] Similar to the first DMA buffer, the number of the second DMA buffer may also be one or more.

[0121] Figure 3 Schematic diagram of data migration involved in the method for releasing DMA buffer provided in the embodiment of the present application. Figure 3 As shown, in S101, the electronic device allocates a first DMA buffer in the RAM for the first application, in S106, the electronic device copies the data in the first DMA buffer to the first storage area of ​​the non-RAM storage area, and in S108, the electronic device allocates a second DMA buffer in the RAM for the first application, and copies the data in the first storage area to the second DMA buffer.

[0122] In some embodiments, reference Figure 1 As introduced, after the electronic device allocates a second DMA buffer in the RAM for the first application, it can also perform a series of related actions, such as establishing a mapping relationship between the physical address of the second DMA buffer and the first virtual address, creating a second discrete aggregation table, etc., one or more of the above, and the second discrete aggregation table is used to describe the second DMA buffer.

[0123] Among them, when establishing the mapping relationship between the physical address of the second DMA buffer and the first virtual address, the electronic device can first read the table entry of the first application backed up by the electronic device introduced in S106, which records the mapping relationship between the first DMA buffer and the first virtual address, and establish the mapping relationship between the physical address of the second DMA buffer and the virtual address in the backup table entry based on the mapping relationship. Specifically, the electronic device can create a new table entry in the page table that records the mapping relationship between the physical address of the second DMA buffer and the first virtual address in the backup table entry, and delete the backed up page table that records the mapping relationship between the physical address of the first DMA buffer and the first virtual address, or directly replace the physical address of the first DMA buffer in the original backup table entry with the physical address of the second DMA buffer. In this way, it is equivalent to replacing the physical address of the first DMA buffer in the mapping relationship with the physical address of the second DMA buffer, that is, only the physical address of the DMA buffer changes in the reconstructed mapping relationship, and the first virtual address does not change, reducing the actions required for mapping.

[0124] In an embodiment of the present application, the operating system of the electronic device (specifically the kernel space) provides a functional interface for allocating DMA buffers and related tasks (such as creating sg_table, establishing mapping relationships, etc.), which can be referred to as a second functional interface. The second functional interface can specifically be one or more application program interfaces (APIs). An API may include one or more functions, and may also define the calling method of the functions it contains. When these functions are called in this way, the functions of the corresponding API can be realized. The functions involved in the second functional interface provided in the embodiment of the present application may, for example, include a dma_alloc_coherent function for allocating RAM resources and mapping physical addresses to virtual address spaces, a dma_map_single function and a dma_map_sg function for establishing DMA device access rights to DMA buffers, an sg_alloc_table function for creating an sg_table, and the like.

[0125] In an embodiment of the present application, the operating system of the electronic device can allocate a second DMA buffer and perform related work (such as creating sg_table, establishing a mapping relationship, etc.) by calling the second functional interface, without the need for the first application to call the second functional interface provided by the operating system. In a specific implementation, the operating system can detect the trigger condition introduced in S107 and call the second functional interface in response to S107. In this way, the allocation of the second DMA buffer and related actions are completed by the operating system without the need for the first application to perceive, so the program code of the first application may not include the program code for calling the second functional interface. As a result, there is no need for the developer of the first application to embed the program code for calling the second functional interface when developing the first application, which reduces the implementation cost of the method for releasing the DMA buffer provided in the embodiment of the present application, and the operating system calling the second functional interface can also ensure the allocation of the second DMA buffer.

[0126] In an embodiment of the present application, the memory management process in the electronic device has the ability to schedule the second functional interface. In S108, the second functional interface can be specifically scheduled by the memory management process running in the operating system, thereby allocating a second DMA buffer and performing related tasks (such as creating sg_table, establishing a mapping relationship, etc.).

[0127] Since the electronic device swaps out the temporarily unused DMA buffer data in the RAM to the non-RAM storage area for storage in S106, when the first application needs to use its own data again, the electronic device can directly copy the data in the non-RAM storage area to the RAM in S108 to complete the data reconstruction.

[0128] Typically, if the electronic device does not have a data cache for the first application, it must perform decoding, calculations, and other operations based on the source data of the first application to obtain the data required to be placed in the DMA buffer, and then place the data in the DMA buffer to complete the reconstruction. This reconstruction process has a large overhead (including time overhead and computing resource overhead). In contrast, S108 only needs to copy the data in the first storage area to the second DMA buffer to complete the data reconstruction. The data copying time is shorter, so the data required by the first application can be rebuilt in the RAM more quickly, thereby improving the response rate of the first application in the electronic device and providing users with a better user experience.

[0129] In some embodiments, Figure 2 The method shown may further include step S109.

[0130] S109: The electronic device releases the first storage area.

[0131] The electronic device can first release the non-RAM storage area resources of the first storage area, that is, clear the data in the first storage area and return the non-RAM storage area space occupied by the first storage area to the system for use by other components. Afterwards, the electronic device can also clear the swap partition identifier allocated to the first storage area, indicating that the first storage area is no longer used as a swap partition.

[0132] Through S109, the electronic device can release the first storage area for use by other components, thereby more efficiently utilizing and managing the non-RAM storage area space. Furthermore, releasing the first storage area can also ensure the consistency of the first application data, thereby preventing data inconsistency caused by having the first application data stored in two locations in the electronic device.

[0133] Figure 4 This is a hardware structure diagram of the electronic device provided in an embodiment of the present application.

[0134] Figure 4 The electronic device 100 shown can be used to execute the method for reclaiming a DMABUF buffer zone provided in an embodiment of the present application.

[0135] like Figure 4 As shown, the electronic device 100 may include: the electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a charging management module 140, a power management module 141, a battery 142, an antenna 1, an antenna 2, a mobile communication module 150, a wireless communication module 160, a display screen 194, etc.

[0136] It should be understood that the structures illustrated in the embodiments of the present application do not constitute a specific limitation on the electronic device 100. In other embodiments of the present application, the electronic device 100 may include more or fewer components than shown, or may combine or separate certain components, or arrange the components differently. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0137] The processor 110 may include one or more processing units. For example, the processor 110 may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural-network processing unit (NPU). The different processing units may be independent devices or integrated into one or more processors.

[0138] The controller can generate operation control signals according to the instruction operation code and timing signal to complete the control of instruction fetching and execution.

[0139] Processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in processor 110 is a buffer memory. This memory can store instructions or data that have just been used or are being recycled by processor 110. If processor 110 needs to use the instruction or data again, it can directly call it from the memory. This avoids repeated accesses, reduces the waiting time of processor 110, and thus improves system efficiency.

[0140] The charging management module 140 is configured to receive charging input from a charger. The charger can be either a wireless charger or a wired charger. In some wired charging embodiments, the charging management module 140 can receive charging input from the wired charger via the USB interface 130. In some wireless charging embodiments, the charging management module 140 can receive wireless charging input via the wireless charging coil of the electronic device 100. While charging the battery 142, the charging management module 140 can also provide power to the electronic device via the power management module 141.

[0141] The power management module 141 is used to connect the battery 142, the charging management module 140, and the processor 110. The power management module 141 receives input from the battery 142 and / or the charging management module 140 and provides power to the processor 110, the internal memory 121, the display 194, the camera, and the wireless communication module 160. The power management module 141 can also be used to monitor parameters such as battery capacity, battery cycle count, and battery health status (leakage, impedance). In some other embodiments, the power management module 141 can also be set in the processor 110. In other embodiments, the power management module 141 and the charging management module 140 can also be set in the same device.

[0142] The wireless communication function of the electronic device 100 can be implemented through the antenna 1, the antenna 2, the mobile communication module 150, the wireless communication module 160, the modem processor and the baseband processor.

[0143] Electronic device 100 implements display functionality through a GPU, display screen 194, and an application processor. A GPU is a microprocessor for image processing that connects display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations for graphics rendering. Processor 110 may include one or more GPUs that execute program instructions to generate or modify display information.

[0144] Display screen 194 is used to display images, videos, etc. Display screen 194 includes a display panel. The display panel can be a liquid crystal display (LCD). The display panel can also be made of an organic light-emitting diode (OLED), an active-matrix organic light-emitting diode or an active-matrix organic light-emitting diode (AMOLED), a flexible light-emitting diode (FLED), a mini-LED, a micro-LED, a micro-OLED, a quantum dot light-emitting diode (QLED), etc. In some embodiments, the electronic device can include one or N display screens 194, where N is a positive integer greater than one.

[0145] The internal memory 121 can refer to the memory mentioned above. In the embodiment of the present application, the internal memory 121 can be used to store some data involved in the process of implementing the method for releasing the DMA buffer provided in the embodiment of the present application, such as the DMA-BUF structure, the table entry in the page table (pagetable) that records the mapping relationship between the physical address and virtual address of the DMA buffer, the discrete aggregation table (sg-table), etc.

[0146] The external memory interface 120 can be used to connect to external memory to expand the storage capacity of the electronic device 100. The external non-volatile memory communicates with the processor 110 through the external memory interface 120 to implement data storage functions. For example, files such as music and videos can be stored in the external non-volatile memory.

[0147] In the method provided in the embodiment of the present application, the memory (internal memory or external memory) of the electronic device 100 stores a computer program for implementing the method for releasing the DMA buffer provided in the embodiment of the present application, and the processor 110 can be used to execute the computer program to implement the method provided in the embodiment of the present application. When the processor 110 executes the method provided in the embodiment of the present application, it may involve interaction with software modules such as the internal memory, external memory, and memory management process in the electronic device 100. For details, please refer to Figure 2 The relevant description will not be expanded here.

[0148] The electronic device provided in the embodiment of the present application can run an operating system (OS), which can be various operating systems used in the industry, such as an operating system developed based on OpenHarmony, such as HarmonyOS; or other operating systems such as Android TM , the iOS mobile operating system; various open source operating systems or their derivatives, such as Linux OS and other embedded operating systems; or new operating systems of the future, such as artificial intelligence-based AI operating systems. An operating system is a set of interrelated system software programs that manage and control the operation of electronic devices, utilize and run hardware and software resources, and provide public services to organize user interactions. In electronic devices, the operating system connects to the physical hardware layer downward and provides an operating environment for application software upward.

[0149] An operating system typically includes: a kernel layer, a middleware layer, and an application layer. The application layer includes application programs, which may include system applications and third-party applications. The middleware layer includes a series of software that provides various services to application developers, or a framework for providing various services such as databases, multimedia, and graphics, or providing various capabilities such as distributed scheduling and system expansion. For example, the middleware layer may include a framework layer and / or a system service layer. The framework layer provides an application programming interface (API) and a programming framework for applications in the application layer. The system service layer includes a set of core capabilities of the system and provides services to applications through the framework layer. The kernel layer is the layer between hardware and software. The kernel layer may include hardware drivers and the operating system kernel. In addition to providing hardware drivers, the kernel layer also supports functions such as memory management and system process management.

[0150] The types and forms of electronic devices we use in our daily lives are different, and the scenarios in which electronic devices are used are also very wide. Therefore, based on the forms and functions of different electronic devices, different application scenarios and different user needs, the operating systems used in electronic devices may also be different. The basic functions implemented by the electronic devices provided in this application can be implemented by a general operating system or by a dedicated operating system. In order to more clearly introduce the implementation of the embodiments of this application under a specific operating system, Figure 5 The architecture of HarmonyOS is shown, and those skilled in the art can deduce the implementation of the embodiment of the present application under other specific operating systems based on this, such as Android TM Implementation under other operating systems.

[0151] like Figure 5 As shown, the software architecture of an electronic device can be divided into several layers. In some embodiments, from bottom to top, they are: kernel layer, system service layer, framework layer, and application layer. Layers communicate with each other via software interfaces. System functions can be tailored, added, or combined at the subsystem level in different device deployment scenarios. Within each subsystem, functions can be tailored, added, or combined at the functional level.

[0152] The kernel layer includes the following modules:

[0153] The Kernel Abstraction Layer (KAL) shields multi-kernel differences and provides basic kernel capabilities to upper layers, including but not limited to process / thread management, memory management, file system management, network management, and peripheral management. Memory management is responsible for managing the memory space in electronic devices, primarily allocating RAM areas to required applications as DMA buffers and releasing DMA buffers.

[0154] Kernel subsystem: supports the selection of appropriate OS kernels for different resource-constrained devices, including but not limited to the Linux kernel, Hongmeng kernel, LiteOS (Lite Operating System), etc.

[0155] Driver subsystem: The driver framework is the foundation for the system's hardware ecosystem to be open, providing unified peripheral access capabilities and a driver development and management framework. The driver framework includes: display drivers, camera drivers, audio drivers, Bluetooth drivers, sensor drivers, etc.

[0156] The system service layer includes the core capabilities of the system and provides services to applications through the framework layer. This layer includes a set of subsystems, but is not limited to the following:

[0157] System basic capability subsystem set: provides basic capabilities for the operation, scheduling, migration and other operations of distributed applications on multiple devices; the system basic capability subsystem set can include distributed soft bus, distributed data management, distributed task scheduling, Ark multi-language runtime; it also includes multi-modal input subsystem, graphics subsystem, security subsystem, AI subsystem, etc.

[0158] Basic software service subsystem set: provides public and general software services; the basic software service subsystem set may include event notification subsystem, telephone service subsystem, multimedia subsystem, etc.

[0159] Enhanced software service subsystem set: provides differentiated capability-enhanced software services for different devices; the enhanced software service subsystem set may include smart screen-specific business subsystems, wearable-specific business subsystems, IoT-specific business subsystems, etc.

[0160] Hardware service subsystem set: provides hardware services; the hardware service subsystem set may include location service subsystem, user IAM (Identity and Access Management) subsystem, wearable proprietary hardware service subsystem, biometric recognition, IoT proprietary hardware service subsystem, etc.

[0161] Distributed task scheduling can realize distributed service management (discovery, synchronization, registration, and calling), and supports remote startup, remote calling, remote connection, and migration of applications across devices.

[0162] Distributed data management can realize data synchronization, data storage, data sharing and data access functions across all scenarios and devices.

[0163] The distributed soft bus provides communication-related capabilities for seamless interconnection between multiple devices, including: WLAN service capabilities, Bluetooth service capabilities, soft bus, inter-process communication RPC (Remote Procedure Call), Star Flash and other communication capabilities.

[0164] The Ark multi-language runtime is a unified compilation and runtime platform designed to support the joint compilation and operation of multiple programming languages ​​and multiple chip platforms.

[0165] The framework layer provides application programming interfaces (APIs) and programming frameworks for applications in the application layer. This layer includes the ArkUI framework (which provides a complete infrastructure for UI development for system applications, including UI features such as components, layouts, animations, interactive events, and real-time interface preview tools), the user program framework, and the Ability framework (an Ability is a lightweight application that schedules and manages its operation and lifecycle). Different devices may run different operating systems, and the APIs they support may also vary.

[0166] The HarmonyOS API provides a series of open capabilities to support HarmonyOS application development. The HarmonyOS API can be set up at the framework level or independently of the framework level. The HarmonyOS API includes the Audio API (audio service), the Push API (push service), the Account API (account service), and more.

[0167] The application layer includes applications. Applications can include system applications and extension applications / third-party applications. System applications can include the desktop, control bar, settings, contacts, phone, camera, etc. Extension applications / third-party applications can include social applications, travel applications, etc. The application layer in the embodiment of the present application may include the first application mentioned above.

[0168] The input management module is used to manage the system's input, such as touchscreen input. After receiving input events, input devices such as display screens distribute the input events to appropriate target modules, such as application windows. In one embodiment, the input management module can be the multi-modal input subsystem in HarmonyOS. The multi-modal input subsystem integrates inputs from multiple dimensions. Specifically, the multi-modal input subsystem receives device input events based on the kernel subsystem and driver framework, such as input events from keyboards, mice, touchscreens, touchpads, and other devices. It normalizes and standardizes the input events and distributes them to the ArkUI framework. The ArkUI framework encapsulates the events and forwards them to the application, or distributes the events to the application through other interfaces.

[0169] The graphics subsystem primarily includes modules such as UI components, layout, animation, fonts, input events, window management, and rendering and drawing. The graphics service provides graphics rendering and display output capabilities, and internally, through the rational use of system hardware resources, provides a smooth and efficient display experience for the system. In embodiments of the present application, the graphics subsystem can provide content displayed on the display screen, such as the content displayed by the first application on the display screen.

[0170] It should be understood that each step in the above method embodiment can be completed by hardware integrated logic circuits in a processor or by software instructions. The method steps disclosed in the embodiments of the present application can be directly embodied as being executed by a hardware processor, or by a combination of hardware and software modules in a processor.

[0171] The present application also provides an electronic device, which may include a memory, a processor, and a computer program stored in the memory, and the processor executes the computer program to implement the method performed by the electronic device in any of the above embodiments.

[0172] The present application also provides a chip system, including a processing circuit and an interface circuit, wherein the interface circuit is used to receive computer instructions and transmit them to the processing circuit, and the processing circuit is used to execute the computer instructions to implement a method executed by an electronic device as in any of the above embodiments.

[0173] The present application also provides a chip system, which includes at least one processor for implementing the method executed by the electronic device in any of the above embodiments. In one possible design, the chip system also includes a memory for storing program instructions and data, and the memory is located within or outside the processor.

[0174] A chip system can be composed of chips or include chips and other discrete devices.

[0175] Optionally, there may be one or more processors in the chip system. The processor may be implemented in hardware or software. When implemented in hardware, the processor may be a logic circuit, an integrated circuit, etc. When implemented in software, the processor may be a general-purpose processor implemented by reading software code stored in a memory.

[0176] Optionally, the memory in the chip system may be one or more. The memory may be integrated with the processor or may be provided separately from the processor, which is not limited in the embodiments of the present application. For example, the memory may be a non-transient processor, such as a read-only memory (ROM), which may be integrated with the processor on the same chip or provided on different chips. The embodiments of the present application do not specifically limit the type of memory or the configuration of the memory and the processor.

[0177] Exemplarily, the chip system can be a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), a system on chip (SoC), a central processor unit (CPU), a network processor (NP), a digital signal processor (DSP), a microcontroller unit (MCU), a programmable logic device (PLD) or other integrated chips.

[0178] The present application also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the method executed by the electronic device in any one of the above embodiments is implemented.

[0179] The present application also provides a computer program product, including a computer program, which implements the method executed by the electronic device in any of the above embodiments when the computer program is executed by a processor.

[0180] The various implementation modes of this application can be combined arbitrarily to achieve different technical effects.

[0181] In the above embodiments, all or part of the embodiments may be implemented by software, hardware, firmware, or any combination thereof. When implemented using software, all or part of the embodiments may be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described herein are generated. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) method. The computer-readable storage medium may be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more available media integrated therein. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive (SSD)).

[0182] Those skilled in the art will appreciate that all or part of the process steps in the above-described method embodiments can be implemented by a computer program instructing the relevant hardware. The program can be stored in a computer-readable storage medium, and when executed, the program can include the process steps in the above-described method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as ROM or random access memory (RAM), magnetic disks, or optical disks.

[0183] In the description of the embodiments of the present application, unless otherwise specified, “ / ” means or, for example, A / B can mean A or B; “and / or” in the text is merely a description of the association relationship of associated objects, indicating that three relationships may exist, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present application, “multiple” refers to two or more than two.

[0184] The terms "first" and "second" are used for descriptive purposes only and should not be understood to imply or suggest relative importance or implicitly indicate the number of the technical features indicated. Therefore, features defined as "first" or "second" may explicitly or implicitly include one or more of such features. In the description of the embodiments of this application, unless otherwise specified, "plurality" means two or more.

[0185] In short, the above description is only an embodiment of the technical solution of this application and is not intended to limit the scope of protection of this application. Any modifications, equivalent replacements, improvements, etc. made based on the disclosure of this application should be included in the scope of protection of this application.

Claims

1. A method for releasing a DMA buffer, characterized in that: The method comprises: Detecting that the first application is switched to background operation and that the first application is no longer rendering images; Copying data in a first DMA buffer to a first storage area in a non-RAM storage area, wherein the first DMA buffer is a DMA buffer in the RAM allocated for the first application; Release the first DMA buffer.

2. The method according to claim 1, characterized in that Before copying the data in the first DMA buffer to the non-RAM storage area, the method further includes: It is detected that the first application is frozen after switching to background operation.

3. The method according to claim 1 or 2, characterized in that The method is applied to an electronic device running a first operating system, wherein releasing the first DMA buffer specifically includes: The first DMA buffer is released by the first operating system.

4. The method according to any one of claims 1 to 3, characterized in that The non-RAM storage area belongs to external memory.

5. The method according to any one of claims 1 to 4, characterized in that The method further comprises: The DMA-BUF structure of the first application is retained.

6. The method according to any one of claims 1 to 5, characterized in that After releasing the first DMA buffer, the method further includes: detecting that the first application is switched to the foreground, or detecting that the first application is thawed, or detecting that the first application is rendering an image; Allocating a second DMA buffer in the RAM for the first application; The data in the first storage area is copied to the second DMA buffer.

7. The method according to claim 6, characterized in that Before allocating a second DMA buffer for the first application in the RAM, the method further includes: Querying a DMA-BUF structure of the first application, where the DMA-BUF structure includes a size of the first DMA buffer; Allocating a second DMA buffer for the first application in the RAM specifically includes: allocating a second DMA buffer of the same size as the first DMA buffer for the first application in the RAM.

8. The method according to claim 6 or 7, characterized in that The method is applied to an electronic device running a first operating system, and allocates a second DMA buffer for the first application in the RAM, specifically comprising: A second DMA buffer is allocated in the RAM for the first application through the first operating system.

9. The method according to any one of claims 6 to 8, characterized in that: The method further comprises: Backing up a first table entry, where the first table entry records a mapping relationship between a physical address of the first DMA buffer and a first virtual address; After allocating a second DMA buffer for the first application in the RAM, the method further includes: A mapping relationship between the physical address of the second DMA buffer and the first virtual address is established according to the first table entry.

10. The method according to any one of claims 6 to 9, characterized in that: After copying the data in the first storage area to the second DMA buffer, the method further includes: The first storage area is released.

11. The method according to any one of claims 1 to 10, characterized in that The method may further comprise one or more of the following: Release the mapping relationship between the physical address and the first virtual address of the first DMA buffer; A first discrete aggregation table is deleted, where the first discrete aggregation table is used to describe the first DMABUF buffer.

12. An electronic device, characterized in that: include: A memory, a processor, and a computer program stored in the memory, wherein the memory includes a RAM and a non-RAM storage area, and the processor executes the computer program to implement the method according to any one of claims 1 to 11.

13. A computer-readable storage medium, characterized in that A computer program is stored thereon, and when the computer program is executed by a processor, the method according to any one of claims 1 to 11 is implemented.

14. A computer program product, characterized in that The computer program product comprises a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 11 is implemented.

15. A chip system, comprising a processing circuit and an interface circuit, wherein the interface circuit is used to receive computer instructions and transmit them to the processing circuit, and the processing circuit is used to execute the computer instructions to implement the method according to any one of claims 1 to 11.

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