Data refreshing method and electronic equipment

By monitoring NAND Flash temperature and querying the mapping table, the retention time is determined and data is refreshed when necessary. This solves the problem of inaccurate data retention in NAND Flash and ensures data reliability.

CN120673813AActive Publication Date: 2025-09-19INSPUR SUZHOU INTELLIGENT TECH CO LTD
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Patent Information

Application Number
CN202511173021.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-08-21
Publication Date
2025-09-19
Estimated Expiration
2045-08-21

AI Technical Summary

Technical Problem

In the existing technology, the retention record of data in NAND Flash is inaccurate, making it difficult to ensure data reliability.

Method used

By monitoring the temperature of NAND Flash, a mapping table between temperature and retention time is established. The mapping parameters are used to determine the retention time of the target data, and the data is refreshed when the remaining retention time falls below the update threshold.

Benefits of technology

It achieves accurate recording and management of data retention time, ensuring data reliability in NAND Flash and avoiding data loss.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses a data refreshing method and electronic equipment, relates to the technical field of storage, and aims to solve the problem that bit inversion of stored data in a non-flash memory causes threshold voltage drift, and the threshold voltage drift is closely related to charge leakage, in particular to the charge leakage amount. The charge leakage amount is related to the time and the temperature, so that a mapping table of the temperature and the retention time can be established in advance. And under the condition that the target data is written into the NAND flash memory, performing temperature monitoring on the NAND flash memory to obtain a temperature sequence. And then, querying mapping parameters of different temperatures in the temperature sequence from a mapping table of the temperatures and the retention time, and determining the retention time of the target data by utilizing the plurality of mapping parameters. Therefore, the remaining retention time can be determined by using the retention time and the storage timing of the target data. And finally, refreshing the target data under the condition that the remaining retention time is lower than the updating threshold value. The method has the technical effects that the data can be prevented from being lost, and the reliability is ensured.
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Description

Technical Field

[0001] The present application relates to the field of storage technology, and in particular to a data refresh method and electronic device. Background Art

[0002] After writing data to NAND Flash, bit inversion occurs. As the write time increases, a specific offset voltage is required for successful decoding. Data retention refers to the length of time that data remains correctly readable in NAND Flash.

[0003] In related technologies, data retention recording and calculation are often inaccurate. Accurate data retention is crucial for maintaining data reliability. Therefore, accurately determining the retention time of data stored in and outside flash memory is a pressing technical challenge for those skilled in the art. Summary of the Invention

[0004] The present application provides a data refresh method and electronic device, which can obtain the data retention time corresponding to data stored in a non-flash memory, and can effectively maintain the reliability of the data based on the data retention time.

[0005] This application provides a data refresh method, including: When target data is written into a NAND flash memory, temperature monitoring is performed on the NAND flash memory to obtain a temperature sequence; Querying mapping parameters of different temperatures in the temperature sequence from a mapping table of temperature and retention time, and determining the retention time of the target data using a plurality of the mapping parameters; Determining a remaining retention time using the retention time and the storage timing of the target data; When the remaining retention time is lower than an update threshold, the target data is refreshed.

[0006] The present application also provides a data refreshing device, comprising: A temperature sequence acquisition module is used to monitor the temperature of the NAND flash memory and obtain a temperature sequence when target data is written into the NAND flash memory; a retention time determination module, configured to query mapping parameters of different temperatures in the temperature sequence from a mapping table of temperature and retention time, and determine the retention time of the target data using a plurality of the mapping parameters; A remaining retention time determination module, configured to determine the remaining retention time by using the retention time and the storage timing of the target data; The data refresh module is used to refresh the target data when the remaining retention time is lower than the update threshold.

[0007] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any of the above-mentioned data refresh methods when executing the computer program.

[0008] The present application also provides a computer-readable storage medium, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned data refresh methods are implemented.

[0009] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned data refresh methods when executed by a processor.

[0010] In the present application, bit inversion of data stored in the NAND flash memory causes the threshold voltage to drift, and the threshold voltage drift is closely related to charge leakage, especially the amount of charge leakage. The amount of charge leakage is related to both time and temperature. Therefore, in the present application, a mapping table between temperature and retention time can be pre-established. When the target data is written to the NAND flash memory, the temperature of the NAND flash memory is monitored to obtain a temperature sequence. Then, the mapping parameters for different temperatures in the temperature sequence are queried from the mapping table between temperature and retention time, and the retention time of the target data is determined using several mapping parameters. In this way, the remaining retention time can be determined using the retention time and the storage timing of the target data. Finally, when the remaining retention time is lower than the update threshold, the target data is refreshed.

[0011] In other words, in this application, when determining whether to refresh the target data, the remaining retention time is not determined based on a fixed retention time and storage timer. Instead, after the data is written, the temperature of the NAND flash memory is monitored to obtain a temperature sequence. Then, based on the mapping relationship between temperature and retention time, mapping parameters corresponding to the temperature values ​​in this temperature sequence are obtained, and the retention time of the target data is determined based on these mapping parameters. In other words, the retention time will change with changes in temperature, so that the retention time matches the actual charge leakage accumulation. In this way, the target data can be refreshed based on the calculated remaining retention time, ensuring that the data is not lost and its reliability is guaranteed. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0013] Figure 1 A flowchart of a data refresh method provided in an embodiment of the present application; Figure 2 A schematic diagram of constructing a mapping table between retention time and temperature provided in an embodiment of the present application; Figure 3 A schematic diagram of a retention time compensation process combined with offline time provided in an embodiment of the present application; Figure 4 A flow chart of a data refresh method combined with a wear factor provided in an embodiment of the present application; Figure 5 A schematic diagram of a data refresh device provided in an embodiment of the present application; Figure 6 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application; Figure 7 A schematic diagram of the specific structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0014] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0015] It should be noted that, in the description of this application, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or apparatus comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or apparatus.

[0016] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below with reference to the accompanying drawings and specific implementation methods.

[0017] Please refer to Figure 1 The data refresh method provided in the embodiment of the present application includes the following steps.

[0018] S101 : When target data is written into a NAND flash memory, temperature of the NAND flash memory is monitored to obtain a temperature sequence.

[0019] In this embodiment, there is no limitation on the target data itself, that is, the target data can be images, videos, texts, log data, and other data whose storage reliability needs to be guaranteed.

[0020] After the target data is written into the NAND flash memory, the ambient temperature of the NAND flash memory may be monitored to obtain a temperature sequence.

[0021] Specifically, a temperature collection time interval may be set to collect a temperature value every certain period of time, thereby obtaining a temperature sequence including several temperature values.

[0022] S102 : Query mapping parameters of different temperatures in the temperature sequence from a mapping table of temperature and retention time, and determine the retention time of the target data using a plurality of mapping parameters.

[0023] Since bit inversion of data stored in non-flash memory causes threshold voltage drift, and threshold voltage drift is closely related to charge leakage, especially the amount of charge leakage. Since the amount of charge leakage is related to both time and temperature, a mapping table between temperature and retention time can be pre-established in the embodiment of the present application.

[0024] The mapping table can store mapping parameters for different temperatures and retention times. Of course, the temperature and retention time can also be recorded in the mapping table.

[0025] After obtaining the temperature sequence, the mapping table can be queried based on the temperature to obtain the corresponding mapping parameters. The target data retention time can then be calculated based on these mapping parameters. For example, a piecewise integration approach can be used to determine the target data retention time.

[0026] In one specific embodiment of the present application, when determining the retention time, the retention time of the last record and its corresponding timestamp, or the remaining retention time of the last record and its corresponding timestamp, can be obtained. If the retention time and timestamp of the last record are obtained, then only the retention difference corresponding to the time difference between the last record and the current temperature acquisition can be calculated. The retention difference can be calculated by looking up a table to obtain a mapping parameter between the current temperature and the retention time, and then multiplying the temperature by the mapping parameter to obtain the retention difference. Based on the retention time of the last record and the currently calculated retention difference, the retention time of the matching temperature sequence can be obtained. If the last record was the remaining retention time, the remaining retention time can be corrected based on the newly calculated retention difference to obtain the latest remaining retention time. In other words, by recording the timestamp and the retention time or the remaining retention time, the retention time or the remaining retention time can be updated by only looking up the mapping table once based on the latest temperature value.

[0027] In a specific embodiment of the present application, the temperature of the NAND flash memory is monitored to obtain a temperature sequence, including: using an independent real-time clock module with a power supply for timing; using a temperature sensor in the real-time clock module to regularly collect the temperature of the NAND flash memory to obtain a temperature sequence.

[0028] Considering that conventional timekeeping becomes ineffective after the NAND flash memory loses power, in this embodiment, an independent real-time clock module with a power supply can be used for timekeeping. The temperature sensor in this real-time clock module periodically samples the temperature of the NAND flash memory to obtain a temperature sequence. For example, for a solid-state drive with NAND flash memory, an independent real-time clock (RTC) module with a backup power supply can be provided. This RTC module maintains timekeeping regardless of whether the SSD is powered on or offline. When the SSD is offline, the RTC continuously records time and maintains temperature collection. In other words, the temperature sequence can include temperature values ​​in the offline state. In this way, when determining the retention time based on the temperature sequence, charge leakage in the offline state is also taken into account, making the retention time more accurate.

[0029] In one specific embodiment of the present application, periodically collecting the temperature of the non-flash memory to obtain a temperature sequence includes: obtaining data accuracy when the non-flash memory is offline; and collecting the temperature of the non-flash memory according to a collection period corresponding to the data accuracy to obtain a temperature sequence. Because different scenarios require different retention time accuracy, when collecting temperature in an offline state, temperature collection can be performed according to a collection period corresponding to the data accuracy. For example, a single temperature can be used to represent the temperature conditions during the entire offline phase, or temperatures collected at multiple time points can be used to represent the temperature conditions during the entire offline phase.

[0030] In a specific embodiment of the present application, creating a mapping table includes: writing test data into a NAND flash memory at different test environment temperatures, and collecting the charge leakage amount and threshold voltage of the storage unit, and the threshold voltage drift limit amount corresponding to the uncorrectable error of the test data; using the test environment temperature, charge leakage amount and threshold voltage, and combining the quantitative relationship between the reaction rate constant and temperature, determining the mapping relationship between the charge leakage rate and the temperature; based on the threshold voltage drift limit amount, the mapping relationship, and the proportional coefficient of the threshold voltage drift amount and the charge leakage amount, determining the mapping parameters of different temperatures and retention times; and establishing a mapping table based on the mapping parameters.

[0031] Writing test data into the NAND flash memory at different test environment temperatures includes writing test data of a specified pattern into a plurality of NAND flash memories of the same model placed in different constant temperature environments.

[0032] A temperature-dependent retention time model can be established first. For example, based on the Arrhenius equation (i.e., the quantitative relationship between the reaction rate constant and temperature), a model can be established for the relationship between temperature and the charge leakage rate in NAND Flash. The Arrhenius equation is expressed as: , where k is the reaction rate constant (specifically the charge leakage rate in this example), A is the pre-factor, Ea is the activation energy, and k B is the Boltzmann constant, and T is the absolute temperature. We can experimentally obtain charge leakage data for NAND Flash memory cells at different temperatures and fit the A and Ea values ​​for a specific NAND Flash model to determine the specific functional relationship k(T) between the charge leakage rate k and temperature T.

[0033] Considering the data retention time (t retention ) is related to the threshold voltage drift caused by charge leakage. Assuming that the threshold voltage drift ΔV t is proportional to the charge leakage, and when ΔV t Reaching a certain threshold ΔV t-threshold When the test data has an uncorrectable error, it reaches Retention failure. Assume that the initial charge of the storage unit is Q0, the charge leakage per unit time is q=k(T)Q0, and after time t, the charge leakage Q leak =qt=k(T)Q0t, the corresponding threshold voltage drift ΔV t =αQ leak (α is the proportional coefficient). When ΔV t =ΔV t-threshold When t retention Functional relationship with temperature T (i.e. quantitative relationship between reaction rate constant and temperature): .

[0034] For details, please refer to Figure 2 ,The implementation steps for establishing the temperature dependent Retention time model are as follows.

[0035] Step 1: Prepare a batch of NAND Flash storage chip samples of the same model and place them in different constant temperature environments. The temperature range covers the temperature range that SSDs may encounter in actual applications, such as -20°C to 85°C. Set a temperature point at a certain temperature interval (for example, 5°C, but other values ​​are also possible and can be set and adjusted according to actual accuracy requirements, such as 10°C, 1°C, etc.).

[0036] Step 2: Perform data writing operations on the NAND Flash samples at each temperature point, writing test data of a specified pattern (such as all 0s, all 1s, random data, etc.). Then, use a charge measurement device and a threshold voltage detection instrument to regularly measure the charge leakage and threshold voltage changes of the storage cells, and record the changes in data over time.

[0037] Step 3: Substitute the measured data into the Arrhenius equation , using nonlinear fitting algorithms (such as least squares method), fit each NAND Flash sample to obtain A and E a Perform statistical analysis on multiple groups of sample data and take the average, median or mode as the A and E of the NAND Flash model. a Parameter value, thereby determining the functional relationship k(T) of the charge leakage rate k and the temperature T.

[0038] Step 4: Determine the threshold voltage drift ΔV when an uncorrectable error occurs in the data through experiments t-threshold , and the threshold voltage drift ΔV t The proportional coefficient α to the charge leakage. Combined with the previously obtained k(T), the data retention time at different temperatures is calculated: The data is stored in a lookup table for quick query and calculation. For example, the data can be stored in a lookup table (LUT) inside the SSD's main control chip.

[0039] The retention time refers to the maximum length of time that the target data can be saved after it is stored in the current location while ensuring data reliability.

[0040] S103: Determine the remaining retention time by using the retention time and the storage timing of the target data.

[0041] In this embodiment, after the target data is written, the storage timing for the target data may be started, that is, how long the target data has been written to the current location is recorded.

[0042] The remaining retention time can be determined by subtracting the retention time from the storage time. It should be noted that the remaining retention time refers to the length of time that the target data can continue to be stored at the current location while ensuring that the data can be accurately read.

[0043] S104: When the remaining retention time is lower than the update threshold, refresh the target data.

[0044] In order to ensure the security and reliability of data, an update threshold can be set in this embodiment. When the remaining retention time is lower than the update threshold, the target data can be refreshed to ensure that the data is not lost.

[0045] Refreshing data can directly read the target data and rewrite it to the original address, or read the target data and write it to a new address (ie, migrate the target data).

[0046] In a specific embodiment of the present application, the remaining retention time is determined using the retention time and the storage timing of the target data, including: obtaining the online timing after the target data is stored in a non-flash memory; obtaining the offline timing after the target data is stored in a non-flash memory; calculating the retention difference in the offline state based on a mapping table; updating the retention time to the difference between the retention time and the retention difference; and determining the remaining retention time based on the updated retention time, online timing, and offline timing.

[0047] In this embodiment, different states can be timed separately: online timing for online states and offline timing for offline states. After storing target data, timing can be performed based on different situations, resulting in online and offline timing. Charge leakage also occurs continuously in the offline state. Therefore, once the retention time is determined, the offline retention difference can be calculated based on a mapping table. The retention time is then updated as the difference between the retention time and the retention difference. The remaining retention time can then be calculated for both online and offline timings based on the updated retention time.

[0048] For example, before power failure, the latest determined retention time can be recorded, and based on the offline timing and mapping table, the corresponding retention time difference in the offline state can be determined. Then, the retention time difference is subtracted from the last recorded retention time before power failure, and then the online time and offline time are subtracted to obtain the remaining retention time.

[0049] Alternatively, before power failure, the latest determined remaining retention time can be recorded, and based on the offline timing and mapping table, the corresponding retention time difference in the offline state can be determined. Then, the remaining retention time last recorded before power failure is subtracted from the retention time difference, and then subtracted from the offline time to obtain the current latest remaining retention time.

[0050] In a specific implementation of the present application, it includes: determining the offline time when the solid-state hard disk belonging to the non-flash memory is powered on; obtaining the historical retention time last saved before the solid-state hard disk is offline; obtaining the offline temperature sequence corresponding to the offline time; querying the mapping parameters of different temperatures in the offline temperature sequence, and using several mapping parameters to determine the retention difference within the offline time; calculating the difference between the historical retention time and the retention difference; determining the difference as the retention time; and using the retention time to manage data storage on the solid-state hard disk.

[0051] In this embodiment, the uncertainty of the offline retention time and temperature can be comprehensively considered. Specifically, an independent real-time clock (RTC) module with a backup power supply is set in the SSD. Regardless of whether the SSD is powered on or offline, the RTC module always keeps time. When the SSD is offline, the RTC continues to record time. Assume that the offline time of the SSD is t offline After the SSD is powered on again, the main control chip reads the offline time information recorded by the RTC.

[0052] Each time the SSD is powered on, the internal temperature sensor is used to obtain the current ambient temperature T current , combined with the temperature-related Retention time model t established above retention (T), calculate the corresponding temperature T during the offline period current The reduction in retention time (i.e., retention difference) of the following data: , where t retention-remaining The remaining retention time calculated based on the last power-on time.

[0053] It can be assumed that the temperature is constant during the offline period. current If more accurate calculation is required, a temperature recording function can be added to the RTC module to record the temperature at regular intervals and then calculate it by integration. : , where t1 and t2 are the start and end time of offline operation respectively, T(t) is the temperature function that changes with time, and t retention-remaining (t) is the remaining retention time function that changes with time.

[0054] For details, please refer to Figure 3 ,In actual applications, offline retention time compensation can be ,achieved by executing the following steps.

[0055] Step 1: Integrate an independent real-time clock (RTC) module into the SSD hardware design, along with a backup power source (such as a coin cell battery) to ensure continued operation during SSD power outages. The RTC is connected to the SSD's main control chip via a communication interface such as I2C or SPI, allowing the main control chip to read the time information recorded by the RTC.

[0056] Step 2: Every time the SSD is powered on, the main control chip first reads the current time t recorded by the RTC current-rtc and the RTC time recorded at the last power-on last-rtc Compare and calculate the offline time:

[0057] t offline =tcurrent-rtc -t last-rtc。

[0058] Step 3: At the same time, the main control chip obtains the current ambient temperature T through the internal integrated temperature sensor current , according to the temperature-related Retention time model t established earlier retention (T), query t from LUT retention (T current ).

[0059] Step 4: Assume that the remaining retention time of the data calculated at the last power-on is t retention-remaining-last , then the reduction in data retention time during offline period is Δt retention-offline The calculation is as follows.

[0060] If a simplified assumption is adopted (the temperature is constant at Tcurrent during the offline period), then: .

[0061] If a more accurate calculation is used (taking into account the temperature change during offline period), the RTC module records the temperature T at a certain time interval (such as 1 minute). i (i=1,2,⋯,n, n is the number of temperature points recorded during the offline period), then: , where Δt i is the time interval between two adjacent temperature records, t retention-remaining (t i ) is the corresponding time point t i The remaining retention time (which can be estimated by methods such as linear interpolation).

[0062] Step 5: The main control chip calculates the retained difference Δt retention-offline , update the remaining retention time t of the current data retention-remaining =t retention-remaining-last -Δt retention-offline , and the new remaining Retention time (remaining retention time, t retention-remaining ) and the current RTC time are recorded for calculation at the next power-on.

[0063] In a specific embodiment of the present application, when the remaining retention time is lower than the update threshold, the target data is refreshed, including: obtaining the number of programming and erasing times of the non-flash memory; determining the wear correction factor using the programming and erasing times; correcting the remaining retention time using the wear correction factor; and refreshing the target data when the corrected remaining retention time is lower than the update threshold.

[0064] The wear correction factor is determined by using the number of programming and erasing times, including: calculating the degree of wear corresponding to the number of programming and erasing times using a wear function obtained by fitting experimental data; and multiplying the degree of wear by a preset correction coefficient to obtain the wear correction factor.

[0065] That is, when considering the impact of NAND Flash wear on retention time, the relationship between the degree of NAND Flash wear and the number of P / E cycles can be established. Let the number of P / E cycles be N, and define a wear function W(N). This function can be obtained by fitting experimental data, for example: , (where a, b, and c are fitting coefficients), the larger the W(N) value, the higher the degree of wear.

[0066] The wear correction factor f(W) is introduced to adjust the data retention time. Assuming that the higher the wear level, the more obvious the shortening of data retention time, we can define (β is the correction coefficient).

[0067] Accordingly, considering the actual data retention time t after wear retention-actual for: ,Right now .

[0068] Please refer to Figure 4 ,In practical applications, the implementation steps of considering the ,NAND Flash wear correction factor include the following steps.

[0069] Step 1. Set a counter in the SSD's main control chip to record the number of NAND Flash P / E cycles, N. The counter value increases by 1 after each complete Program (program) and Erase (erase) operation on the NAND Flash.

[0070] Step 2: Based on the wear function established previously ,The main control chip calculates the current wear degree W(N) regularly (for example, every certain number of P / E cycles, such as 100 times).

[0071] Step 3: According to the definition of wear correction factor , calculate the current wear correction factor f(W). The β value can be tested experimentally. By comparing the actual retention time under different wear levels with the calculated value without considering wear, an appropriate β value can be found so that the calculated value after considering wear correction is closest to the actual value.

[0072] Step 4: When the actual data retention time needs to be calculated, the main control chip first queries the LUT based on the current ambient temperature Tcurrent to obtain tretention(Tcurrent). Then, combined with the calculated wear correction factor f(W), it calculates the actual data retention time after comprehensive consideration of wear: tretention-actual = tretention(Tcurrent) × f(W).

[0073] Step 5: The main control chip adjusts the SSD's data storage management policy based on the calculated tretention-actual. For example, when tretention-actual falls below a certain threshold, it triggers a data refresh or migration operation in advance to ensure data reliability.

[0074] Bit inversion of data stored in NAND flash memory causes threshold voltage drift, which is closely related to charge leakage, particularly the amount of charge leakage. Charge leakage is related to both time and temperature. Therefore, in this application, a mapping table between temperature and retention time can be pre-established. When writing target data to the NAND flash memory, the temperature of the NAND flash memory is monitored to obtain a temperature sequence. Then, the mapping parameters for different temperatures in the temperature sequence are queried from the temperature-retention time mapping table, and the retention time of the target data is determined using these mapping parameters. In this way, the remaining retention time can be determined using the retention time and the storage timing of the target data. Finally, if the remaining retention time falls below the update threshold, the target data is refreshed.

[0075] In other words, in this application, when determining whether to refresh the target data, the remaining retention time is not determined based on a fixed retention time and storage timer. Instead, after the data is written, the temperature of the NAND flash memory is monitored to obtain a temperature sequence. Then, based on the mapping relationship between temperature and retention time, mapping parameters corresponding to the temperature values ​​in this temperature sequence are obtained, and the retention time of the target data is determined based on these mapping parameters. In other words, the retention time will change with changes in temperature, so that the retention time matches the actual charge leakage accumulation. In this way, the target data can be refreshed based on the calculated remaining retention time, ensuring that the data is not lost and its reliability is guaranteed.

[0076] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method.

[0077] Please refer to Figure 5, an embodiment of the present application further provides a data refreshing device, the device comprising: The temperature sequence acquisition module 101 is used to monitor the temperature of the NAND flash memory and obtain a temperature sequence when the target data is written into the NAND flash memory; The retention time determination module 102 is used to query mapping parameters of different temperatures in the temperature sequence from a mapping table of temperature and retention time, and determine the retention time of the target data using the mapping parameters; The remaining retention time determination module 103 is used to determine the remaining retention time by using the retention time and the storage timing of the target data; The data refresh module 104 is configured to refresh target data when the remaining retention time is lower than an update threshold.

[0078] By using the device provided in the embodiment of the present application, the bit inversion of the data stored in the non-flash memory causes the threshold voltage to drift, and the threshold voltage drift is closely related to charge leakage, especially the amount of charge leakage. The amount of charge leakage is related to both time and temperature. Therefore, in the present application, a mapping table of temperature and retention time can be pre-established. When the target data is written to the non-flash memory, the temperature of the non-flash memory is monitored to obtain a temperature sequence. Then, from the mapping table of temperature and retention time, the mapping parameters of different temperatures in the temperature sequence are queried, and the retention time of the target data is determined using several mapping parameters. In this way, the remaining retention time can be determined using the retention time and the storage timing of the target data. Finally, when the remaining retention time is lower than the update threshold, the target data is refreshed.

[0079] In other words, in this application, when determining whether to refresh the target data, the remaining retention time is not determined based on a fixed retention time and storage timer. Instead, after the data is written, the temperature of the NAND flash memory is monitored to obtain a temperature sequence. Then, based on the mapping relationship between temperature and retention time, mapping parameters corresponding to the temperature values ​​in this temperature sequence are obtained, and the retention time of the target data is determined based on these mapping parameters. In other words, the retention time will change with changes in temperature, so that the retention time matches the actual charge leakage accumulation. In this way, the target data can be refreshed based on the calculated remaining retention time, ensuring that the data is not lost and its reliability is guaranteed.

[0080] In a specific embodiment of the present application, a mapping table creation module is used to create a mapping table, including: writing test data into a NAND flash memory at different test environment temperatures, and collecting the charge leakage and threshold voltage of the storage unit, and the threshold voltage drift limit corresponding to the uncorrectable error of the test data; using the test environment temperature, charge leakage and threshold voltage, and combining the quantitative relationship between the reaction rate constant and temperature, determining the mapping relationship between the charge leakage rate and the temperature; based on the threshold voltage drift limit, the mapping relationship, and the proportional coefficient of the threshold voltage drift and the charge leakage, determining the mapping parameters of different temperatures and retention times; and establishing a mapping table based on the mapping parameters.

[0081] In a specific implementation of the present application, the mapping table creation module is specifically used to write test data of a specified pattern into a plurality of NAND flash memories of the same model placed in different constant temperature environments.

[0082] In a specific embodiment of the present application, the temperature sequence acquisition module is specifically used to use an independent real-time clock module with a power supply for timing; and uses the temperature sensor in the real-time clock module to regularly collect the temperature of the non-flash memory to obtain a temperature sequence.

[0083] In a specific embodiment of the present application, the temperature sequence acquisition module is specifically used to obtain data accuracy when the non-flash memory is in an offline state; according to the acquisition period corresponding to the data accuracy, the temperature of the non-flash memory is collected to obtain a temperature sequence.

[0084] In a specific embodiment of the present application, the remaining retention time determination module is specifically used to obtain the online timing after the target data is stored in the non-flash memory; obtain the offline timing after the target data is stored in the non-flash memory; calculate the retention difference in the offline state based on the mapping table; update the retention time to the difference between the retention time and the retention difference; and determine the remaining retention time based on the updated retention time, online timing, and offline timing.

[0085] In a specific embodiment of the present application, the data refresh module is specifically used to obtain the number of programming and erasure times of the non-flash memory; determine the wear correction factor using the programming and erasure times; correct the remaining retention time using the wear correction factor; and refresh the target data when the corrected remaining retention time is lower than the update threshold.

[0086] In a specific embodiment of the present application, the data refresh module is specifically used to calculate the degree of wear corresponding to the number of programming and erasing times using a wear function obtained by fitting based on experimental data; and multiply the degree of wear by a preset correction coefficient to obtain a wear correction factor.

[0087] In a specific embodiment of the present application, it also includes: a hard disk power-on module, which is used to determine the offline time when the solid-state hard disk belonging to the non-flash memory is powered on; obtain the historical retention time last saved before the solid-state hard disk is offline; obtain the offline temperature sequence corresponding to the offline time; query the mapping parameters of different temperatures in the offline temperature sequence, and use several mapping parameters to determine the retention difference within the offline time; calculate the difference between the historical retention time and the retention difference; determine the difference as the retention time; and use the retention time to manage data storage on the solid-state hard disk.

[0088] The description of the features in the embodiment corresponding to the data refreshing device can refer to the relevant description of the embodiment corresponding to the data refreshing method, and will not be repeated here.

[0089] Corresponding to the above method embodiment, an embodiment of the present application further provides an electronic device. The electronic device described below and the data refresh method described above can refer to each other.

[0090] See also Figure 6 As shown, the electronic device includes: Memory 332, for storing computer programs; The processor 322 is configured to implement the steps of the data refreshing method of the above method embodiment when executing a computer program.

[0091] For details, please refer to Figure 7 , Figure 7 This is a schematic diagram of the specific structure of an electronic device provided in this embodiment. This electronic device may vary significantly due to different configurations or performance. It may include one or more central processing units (CPUs) (for example, one or more processors) and memory 332. The memory 332 stores one or more computer programs 342 or data 344. The memory 332 may be temporary storage or permanent storage. The program stored in the memory 332 may include one or more modules (not shown), each of which may include a series of instruction operations in the data processing device. Furthermore, the processor 322 may be configured to communicate with the memory 332 to execute the series of instruction operations in the memory 332 on the electronic device 301.

[0092] The electronic device 301 may further include one or more power supplies 326 , one or more wired or wireless network interfaces 350 , one or more input / output interfaces 358 , and / or one or more operating systems 341 .

[0093] The steps in the data refresh method described above can be implemented by the structure of an electronic device.

[0094] Specifically, in an electronic device, the steps that can be implemented include: when the target data is written into the NAND flash memory, monitoring the temperature of the NAND flash memory to obtain a temperature sequence; querying the mapping parameters of different temperatures in the temperature sequence from a mapping table of temperature and retention time, and determining the retention time of the target data using several mapping parameters; determining the remaining retention time using the retention time and the storage timing of the target data; and refreshing the target data when the remaining retention time is lower than the update threshold.

[0095] In a specific embodiment of the present application, creating a mapping table includes: writing test data into a NAND flash memory at different test environment temperatures, and collecting the charge leakage amount and threshold voltage of the storage unit, and the threshold voltage drift limit amount corresponding to the uncorrectable error of the test data; using the test environment temperature, charge leakage amount and threshold voltage, and combining the quantitative relationship between the reaction rate constant and temperature, determining the mapping relationship between the charge leakage rate and the temperature; based on the threshold voltage drift limit amount, the mapping relationship, and the proportional coefficient of the threshold voltage drift amount and the charge leakage amount, determining the mapping parameters of different temperatures and retention times; and establishing a mapping table based on the mapping parameters.

[0096] In a specific embodiment of the present application, writing test data into a NAND flash memory at different test environment temperatures includes: writing test data of a specified pattern into multiple NAND flash memories of the same model placed in different constant temperature environments.

[0097] In a specific embodiment of the present application, the temperature of the NAND flash memory is monitored to obtain a temperature sequence, including: using an independent real-time clock module with a power supply for timing; using a temperature sensor in the real-time clock module to regularly collect the temperature of the NAND flash memory to obtain a temperature sequence.

[0098] In a specific embodiment of the present application, the temperature of the non-flash memory is regularly collected to obtain a temperature sequence, including: obtaining data accuracy when the non-flash memory is in an offline state; and collecting the temperature of the non-flash memory according to a collection period corresponding to the data accuracy to obtain a temperature sequence.

[0099] In a specific embodiment of the present application, the remaining retention time is determined using the retention time and the storage timing of the target data, including: obtaining the online timing after the target data is stored in a non-flash memory; obtaining the offline timing after the target data is stored in a non-flash memory; calculating the retention difference in the offline state based on a mapping table; updating the retention time to the difference between the retention time and the retention difference; and determining the remaining retention time based on the updated retention time, online timing, and offline timing.

[0100] In a specific embodiment of the present application, when the remaining retention time is lower than the update threshold, the target data is refreshed, including: obtaining the number of programming and erasing times of the non-flash memory; determining the wear correction factor using the programming and erasing times; correcting the remaining retention time using the wear correction factor; and refreshing the target data when the corrected remaining retention time is lower than the update threshold.

[0101] In a specific embodiment of the present application, the wear correction factor is determined using the number of programming and erasing times, including: using a wear function obtained by fitting based on experimental data to calculate the degree of wear corresponding to the number of programming and erasing times; multiplying the degree of wear by a preset correction coefficient to obtain the wear correction factor.

[0102] In a specific implementation of the present application, it also includes: determining the offline time when the solid-state hard disk to which the non-flash memory belongs is powered on; obtaining the historical retention time last saved before the solid-state hard disk is offline; obtaining the offline temperature sequence corresponding to the offline time; querying the mapping parameters of different temperatures in the offline temperature sequence, and using several mapping parameters to determine the retention difference within the offline time; calculating the difference between the historical retention time and the retention difference; determining the difference as the retention time; and using the retention time to manage data storage on the solid-state hard disk.

[0103] Corresponding to the above method embodiments, embodiments of the present application further provide a readable storage medium. The readable storage medium described below and the data refresh method described above can be referenced in correspondence with each other. Embodiments of the present application further provide a computer-readable storage medium having a computer program stored therein, wherein the computer program is configured to execute the steps of any of the above data refresh method embodiments when executed.

[0104] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0105] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any of the above data refresh method embodiments are implemented.

[0106] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above-mentioned data refresh method embodiments are implemented.

[0107] Those skilled in the art may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the above description has generally described the composition and steps of each example according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0108] This document uses specific examples to illustrate the principles and implementation methods of this application. The description of the above examples is only intended to help understand the method and core ideas of this application. It should be noted that those skilled in the art may make several improvements and modifications to this application without departing from the principles of this application, and such improvements and modifications also fall within the scope of protection of this application.

Claims

1. A data refresh method, characterized in that: include: When target data is written into a NAND flash memory, temperature monitoring is performed on the NAND flash memory to obtain a temperature sequence; Querying mapping parameters of different temperatures in the temperature sequence from a mapping table of temperature and retention time, and determining the retention time of the target data using a plurality of the mapping parameters; Determining a remaining retention time using the retention time and the storage timing of the target data; When the remaining retention time is lower than an update threshold, the target data is refreshed.

2. The method according to claim 1, characterized in that Creating the mapping table includes: Under different test environment temperatures, writing test data into the NAND flash memory and collecting charge leakage and threshold voltage of the storage unit, wherein the test data is at a threshold voltage drift limit corresponding to an uncorrectable error; Determining a mapping relationship between charge leakage rate and temperature using the test environment temperature, the charge leakage amount, and the threshold voltage in combination with a quantitative relationship between a reaction rate constant and temperature; Determining mapping parameters for different temperatures and retention times based on the threshold voltage drift limit, the mapping relationship, and a proportional coefficient between the threshold voltage drift and the charge leakage; The mapping table is established based on the mapping parameters.

3. The method according to claim 2, characterized in that Write test data to the NAND flash memory at different test ambient temperatures, including: Write test data of a specified pattern into multiple NAND flash memories of the same model placed in different constant temperature environments.

4. The method according to claim 1, wherein Performing temperature monitoring on the NAND flash memory to obtain a temperature sequence includes: Use an independent real-time clock module with power supply for timing; The temperature sensor in the real-time clock module is used to periodically collect the temperature of the NAND flash memory to obtain the temperature sequence.

5. The method according to claim 4, characterized in that Periodically collecting the temperature of the NAND flash memory to obtain the temperature sequence, including: When the AND / OR flash memory is in an offline state, obtaining data accuracy; The temperature of the NAND flash memory is collected according to a collection period corresponding to the data precision to obtain the temperature sequence.

6. The method according to claim 1, characterized in that Determining a remaining retention time using the retention time and the storage timing of the target data includes: Obtaining online timing after the target data is stored in the NAND flash memory; Obtaining an offline timing after the target data is stored in the NAND flash memory; Calculating the offline retention difference based on the mapping table; Updating the retention time to the difference between the retention time and the retention difference; The remaining retention time is determined by combining the updated retention time, the online timer, and the offline timer.

7. The method according to claim 1, characterized in that When the remaining retention time is lower than an update threshold, refreshing the target data includes: Obtaining the number of programming and erasing times of the NAND flash memory; Determining a wear correction factor using the number of programming and erasing times; Correcting the remaining retention time using the wear correction factor; When the corrected remaining retention time is lower than the update threshold, the target data is refreshed.

8. The method according to claim 7, characterized in that Determining a wear correction factor using the number of programming and erasing times includes: Calculating the degree of wear corresponding to the number of programming and erasing times using a wear function obtained by fitting based on experimental data; The wear degree is multiplied by a preset correction coefficient to obtain the wear correction factor.

9. The method according to any one of claims 1 to 8, characterized in that Also includes: When the solid-state hard disk to which the non-flash memory belongs is powered on, determining an offline time; Obtain the last saved historical retention time before the solid-state drive goes offline; Obtaining an offline temperature sequence corresponding to the offline time; querying mapping parameters of different temperatures in the offline temperature sequence, and determining a retention difference during the offline time using a plurality of the mapping parameters; Calculating the difference between the historical retention time and the retention difference; determining the difference as the retention time; The retention time is used to manage data storage on the solid state drive.

10. An electronic device, characterized in that: include: memory for storing computer programs; A processor, configured to implement the steps of the data refresh method according to any one of claims 1 to 9 when executing the computer program.

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