Image sensor module

Abstract

The invention relates to the technical field of image sensors, and discloses an image sensor module. The invention provides an image sensor module. The image sensor module comprises an integrated circuit substrate; the image sensing chip is arranged on the upper surface of the integrated circuit substrate and comprises an image sensing area and a non-image sensing area; the cover plate is arranged at a position above the image sensing area and the non-image sensing area of the image sensing chip; the dam is arranged between the lower surface of the cover plate and the non-image sensing area of the upper surface of the image sensing chip; the packaging material covers the periphery of the image sensing chip, the periphery of the dam, a part of the upper surface of the integrated circuit substrate and a periphery of the cover plate; the dam is of a multi-layer structure and comprises an upper layer, a middle layer and a lower layer. The problems of delamination of the dam and the cover plate and fracture of the dam are solved.

Description

Technical Field

[0001] The present application relates to the technical field of image sensors, and in particular to the structural design of image sensor modules. Background Art

[0002] An image sensor is a device used to convert light signals into analog signals. The image sensor outputs the analog signal and transmits it to an image processor, which then converts the analog signal into a digital signal and performs other image processing (such as color correction) to obtain digital image information. Currently, the most common types of image processors are charge-coupled devices (CCDs) or complementary metal-oxide-semiconductors (CMOSs).

[0003] A complementary metal oxide semiconductor (CMOS) image sensor (CIS) is an image sensor based on a complementary metal oxide semiconductor (CMOS) process. The market for CMOS image sensors is expanding in various fields, including automotive, security, medical, and manufacturing. Examples of practical applications for CMOS image sensors include surveillance cameras, in-vehicle cameras, and endoscope cameras.

[0004] Furthermore, in the automotive electronics sector, image sensors seeking to enter the Tier 1 supply chain must meet not only zero-failure quality requirements but also the AEC-Q1000 specification. However, existing image sensors, with their cover plate and image sensor chip, experience delamination and cracking during approximately 1000-cycle reliability testing at -55 to 125°C due to the push and pull stresses generated by varying temperatures. Consequently, these sensors fail the 2000-cycle test. Summary of the Invention

[0005] Therefore, one objective of this application is to address issues such as separation and dam cracking between the dam and cover plate in complementary metal-oxide-semiconductor image sensors. Furthermore, this application unexpectedly discovered that reducing the dam's coefficient of thermal expansion (CTE) and Young's modulus reduces the stress generated. Furthermore, currently available materials struggle to achieve both of these properties.

[0006] To solve the above problems, the present application provides an image sensor module, comprising:

[0007] integrated circuit substrates;

[0008] An image sensing chip is disposed on the upper surface of the integrated circuit substrate and includes an image sensing area and a non-image sensing area;

[0009] A cover plate is disposed above the image sensing area and the non-image sensing area of ​​the image sensing chip;

[0010] a dam disposed between the lower surface of the cover plate and a non-image sensing area of ​​the upper surface of the image sensing chip; and

[0011] a packaging material covering the periphery of the image sensor chip, the periphery of the dam, a portion of the upper surface of the integrated circuit substrate, and the periphery of the cover plate;

[0012] The dam has a multi-layer structure, including an upper layer, a middle layer and a lower layer.

[0013] In one embodiment of the present application, the thickness of the upper layer and the thickness of the lower layer are both lower than the thickness of the middle layer.

[0014] In one embodiment of the present application, the thermal expansion coefficient of the upper layer and the thermal expansion coefficient of the lower layer are higher than the thermal expansion coefficient of the middle layer.

[0015] In one embodiment of the present application, the Young's modulus of the upper layer and the Young's modulus of the lower layer are both in the range of 0.05 GPa to 0.5 GPa, and the Young's modulus of the middle layer is in the range of 1 GPa to 5 GPa.

[0016] In one embodiment of the present application, the width of the middle layer is greater than the width of the upper layer, and the width of the middle layer is smaller than the width of the lower layer.

[0017] In one embodiment of the present application, the filler content of the upper layer and the filler content of the lower layer are both in the range of 0 weight % to 10 weight %, and the filler content of the middle layer is in the range of 20 weight % to 80 weight %.

[0018] In one embodiment of the present application, the thickness, thermal expansion coefficient, Young's modulus or filler content of the upper layer and the lower layer are the same.

[0019] In one embodiment of the present application, the material of the upper layer and the material of the lower layer both include at least one of silicone resin, acrylic resin, and epoxy resin.

[0020] In one embodiment of the present application, the material of the middle layer includes an inorganic film material and an adhesive tape having the inorganic film material.

[0021] Through the above, the present application solves the problem of separation between the dam and the cover plate and the problem of dam rupture in a complementary metal-oxide-semiconductor image sensor. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1FIG. 1 is a schematic diagram of an image sensor module according to an embodiment of the present application.

[0023] Figure 2 It is a cross-sectional schematic diagram of a dam in one embodiment of the present application.

[0024] Figure 3 It is a cross-sectional schematic diagram of a dam in another embodiment of the present application.

[0025] Description of reference numerals:

[0026] 1. Image sensor module;

[0027] 2. Integrated circuit substrates;

[0028] 3. Image sensing chip;

[0029] 4. Metal wire;

[0030] 5. Cover plate;

[0031] 6. Dam;

[0032] 7. Packaging materials;

[0033] 8. Adhesive layer;

[0034] 20. Pin pad;

[0035] 22. Conductive components;

[0036] 30. Solder pad;

[0037] 60, upper level;

[0038] 62. Middle level;

[0039] 64, lower level;

[0040] ISA, image sensing area;

[0041] NISA, non-imaging sensing area;

[0042] t1, t2, t3, thickness;

[0043] w1, w2, w3, width. DETAILED DESCRIPTION

[0044] In order to make it easier for people with general knowledge in the technical field to which this application belongs to understand the content of this application, the application is further described below in combination with embodiments and drawings. Each embodiment is only used to illustrate the technical features of this application, and the mentioned content does not limit this application.

[0045] References throughout this specification to "one embodiment" indicate that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Therefore, references to "one embodiment" in various places throughout this specification do not necessarily refer to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any manner in one or more embodiments.

[0046] See also Figure 1 The present application provides an image sensor module 1, which includes an integrated circuit substrate 2, an image sensing chip 3, multiple metal wires 4, a cover plate 5, a dam 6, and a packaging material 7. The image sensing chip 3 is disposed on the upper surface of the integrated circuit substrate 2 and includes an image sensing area ISA and a non-image sensing area NISA. A plurality of pin pads 20 are disposed on the upper surface of the integrated circuit substrate 2, and a plurality of bonding pads 30 are disposed on the image sensing chip 3. The plurality of pin pads 20 and the plurality of bonding pads 30 are connected via multiple metal wires 4. The cover plate 5 is disposed above the image sensing area ISA and the non-image sensing area NISA of the image sensing chip 3. The dam 6 is disposed between the lower surface of the cover plate 5 and the non-image sensing area NISA on the upper surface of the image sensing chip 3. The packaging material 7 covers the periphery of the image sensing chip 3, the periphery of the dam 6, a portion of the upper surface of the integrated circuit substrate 3, and the periphery of the cover plate 5.

[0047] See also Figures 1 to 3 , the dam 6 provided between the cover plate 5 and the image sensing chip 3 can form a gap between the cover plate 5 and the image sensing chip 3, thereby preventing the image sensing area ISA of the image sensing chip 3 from being compressed by the cover plate 5. In one embodiment of the present application, the cover plate 5 and the image sensing chip 3 are parallel to each other. In another embodiment of the present application, the dam 6 has at least a three-layer structure, and the dam 6 includes an upper layer 60, a middle layer 62 and a lower layer 64, but the present application is not limited thereto. The upper layer 60 and the lower layer 64 are buffer layers, which can reduce the influence of stress caused by expansion and contraction. The middle layer 62 is a supporting layer, which can also reduce the influence of stress caused by expansion and contraction to avoid tilting of the cover plate 5 and compression of the metal wire 4. In other embodiments of the present application, the dam 6 may have a four-layer, five-layer or six-layer structure.

[0048] See also Figure 2 and Figure 3 . Figure 2 In one embodiment of the present application, the thickness t1 of the upper layer 60 and the thickness t3 of the lower layer 64 are both lower than the thickness t2 of the middle layer 62, and the width w2 of the middle layer 62 is greater than the width w1 of the upper layer 60, and the width w2 of the middle layer 62 is smaller than the width w3 of the lower layer 64. For example, the thickness t1 of the upper layer 60 and the thickness t3 of the lower layer 64 are both 30 microns, while the thickness t2 of the middle layer 62 is 70 microns. Figure 3In another embodiment of the present application, the thickness t1 of the upper layer 60 and the thickness t3 of the lower layer 64 are both smaller than the thickness t2 of the middle layer 62, and the width w1 of the upper layer 60 and the width w3 of the lower layer 64 are both larger than the width w2 of the middle layer 62. Figure 2 as well as Figure 3 This is only an exemplary embodiment, and the relationship between the thickness and width of each layer of the present application is not limited thereto.

[0049] In a further embodiment of the present application, the thermal expansion coefficients of the upper layer 60 and the lower layer 64 are both higher than the thermal expansion coefficient of the middle layer 62. For example, when the thermal expansion coefficients of the upper layer 60 and the Young's modulus of the lower layer 64 are both within a range of about 60 ppm / C to about 100 ppm / C, the thermal expansion coefficient of the middle layer 62 is within a range of about 30 ppm / C to about 59 ppm / C. Alternatively, when the thermal expansion coefficients of the upper layer 60 and the lower layer 64 are both within a range of about 150 ppm / C to about 250 ppm / C, the thermal expansion coefficient of the middle layer 62 is within a range of about 100 ppm / C to about 149 ppm / C. In another further embodiment of the present invention, the Young's modulus of the upper layer 60 and the Young's modulus of the lower layer 64 are smaller than the Young's modulus of the middle layer 62, the Young's modulus of the upper layer 60 and the Young's modulus of the lower layer 64 are both in the range of 0.05GPa to 0.5GPa, and the Young's modulus of the middle layer 62 is in the range of 1GPa to 5GPa.

[0050] In further embodiments of the present application, the filler content of the upper layer 60 and the filler content of the lower layer 64 are both within a range of 0% to 10% by weight, and the filler content of the middle layer 62 is both within a range of 20% to 80% by weight. In other embodiments of the present application, the thickness, thermal expansion coefficient, Young's modulus, and / or filler content of the upper layer 60 and the lower layer 64 are identical. Furthermore, in one embodiment of the present application, the material of the upper layer 60 and the material of the lower layer 64 both include at least one of a silicone resin, an acrylic resin, and an epoxy resin. Epoxy resins include, for example, bisphenol A epoxy resin, bisphenol F epoxy resin, phenol novolac epoxy resin, cresol novolac epoxy resin, and aliphatic epoxy resin. In embodiments of the present application, the material of the upper layer 60 and the material of the lower layer 64 are not limited to single-component types and may also be two-component types. In another embodiment of the present application, the material of the middle layer 62 includes an inorganic film material and an adhesive tape having the inorganic film material, but the present application is not limited thereto.

[0051] See also Figures 1 to 3 In one embodiment of the present application, the lower layer 64, the middle layer 62, and the upper layer 60 are sequentially applied through the processes of scribing, laminating, and scribing, thereby forming the dam 6. Furthermore, in another embodiment of the present application, the lower layer 64, the middle layer 62, and the upper layer 60 are sequentially applied through the processes of scribing, laminating, and screen printing, thereby forming the dam 6. The application methods of the lower layer 64, the middle layer 62, and the upper layer 60 of the present application are not limited to these.

[0052] Please refer to Figure 1 The integrated circuit substrate 2 is used to carry the image sensor chip 3 and is provided with metal circuits. In one embodiment of the present application, the integrated circuit substrate 2 is an FR-4 substrate, but the present application is not limited thereto. The integrated circuit substrate 2 may also be a substrate provided with metal circuits, such as a bismaleimide triazine (BT) substrate, an Ajinomoto build-up film (ABF) substrate, or a molded interconnect substrate (MIS) substrate.

[0053] See also Figure 1The lower surface of the integrated circuit substrate 2 is connected to a plurality of conductive components 22. In one embodiment of the present application, the integrated circuit substrate 2 utilizes a ball grid array (BGA) package, and thus the conductive components 22 are solder balls. However, the present application is not limited thereto. The integrated circuit substrate 2 may also utilize other packaging methods, such as a land grid array (LGA) package, in which case the conductive components 22 are LGA pads.

[0054] See also Figure 1 The image sensor chip 3 is used to convert received optical signals into electronic signals. In one embodiment of the present application, the image sensing area ISA of the image sensor chip 3 is provided with a light-gathering layer, a color filter layer, and a photoelectric conversion layer. The color filter layer is disposed on the upper surface of the photoelectric conversion layer, and the light-gathering layer is disposed on the upper surface of the color filter layer. The light-gathering layer is composed of multiple microlenses and is used to focus light to increase the sensitivity of the image sensor. The color filter layer is a color filter, which includes multiple sub-pixels. The sub-pixels are divided into red, green, and blue sub-pixels. Each microlens corresponds to a sub-pixel. Therefore, when light is focused by the microlenses and passes through the color filter layer, it can provide red, green, and blue color information, respectively, depending on the sub-pixel type. The light-gathering layer is composed of multiple complementary metal oxide semiconductors and is used to receive color information and sense light intensity to form brightness and darkness information. It then converts the color and brightness information into electronic signals to record as an image. The image sensor chip 3 is fixed to the upper surface of the image sensor module 1 via an adhesive layer 8. In this embodiment, the material of the adhesive layer 8 is a heat-curing adhesive, such as LOCTITE ABLESTIK 2053S, a heat-curing adhesive purchased from Henkel.

[0055] See also Figure 1 The metal wire 4 is used to connect the image sensing chip 3 and the integrated circuit substrate 2. In one embodiment of the present application, the metal wire 4 is a gold wire, but the present application is not limited to this. The metal wire 4 can also be silver, copper, aluminum, molybdenum, titanium or other metal conductive wires. In addition, the metal wire 4 is not limited to a single metal material, and can also be an alloy material formed by the aforementioned materials. The metal wire 4 connects the pin pad 20 and the bonding pad 30, thereby serving as a path between the pin pad 20 and the bonding pad 30 to transmit electronic signals. Therefore, after the image sensing chip 3 converts the optical signal into an electronic signal, the bonding pad 30 can transmit the electronic signal to the pin pad 20 of the integrated circuit substrate 2 via the metal wire 4, and the pin pad 20 then transmits the electronic signal to the conductive component 22 via the metal line arranged on the integrated circuit substrate 2.

[0056] See also Figure 1The cover plate 5 is used to protect the image sensing chip 3 and prevent the image sensing chip 3 from being directly damaged by external forces, such as impact or scratches. In one embodiment of the present application, the cover plate 5 is made of glass, sapphire glass, polycarbonate, polymethyl methacrylate or other transparent plates. The glass is transparent glass such as soda-lime glass, aluminosilicate glass, borosilicate glass, alkali-free glass, crystal glass or quartz glass. In one embodiment of the present application, the cover plate 5 is arranged directly above the image sensing area ISA and the non-image sensing area NISA of the image sensing chip 3. Since the cover plate 5 is transparent and the packaging material 7 covers the periphery of the cover plate 5, the image sensing chip 3 can receive light and convert it into corresponding electronic signals.

[0057] See also Figure 1 The packaging material 7 is used to fix the cover plate 5, as well as to protect and fix the image sensor chip 3, multiple pin pads 20, multiple bonding pads 30, multiple metal wires 4, and the metal circuits on the integrated circuit substrate 2. In one embodiment of the present application, the packaging material 7 may be an epoxy resin, such as bisphenol A epoxy resin, bisphenol F epoxy resin, phenol novolac epoxy resin, cresol novolac epoxy resin, aliphatic epoxy resin, etc., but the present application is not limited thereto. The packaging material 7 may also be a polysiloxane resin, an acrylic resin, a polyimide, or a combination thereof. In addition, the packaging material 7 is not limited to a single-component type, but may also be a two-component type. An example of the packaging material is the epoxy resin encapsulation compound product EME-G311QF purchased from Sumitomo Bakelite Co., Ltd.

[0058] The present application obtains a dam with a small thermal expansion coefficient and Young's modulus by having upper, middle and lower layers with different thermal expansion coefficients, Young's moduli and sizes. The push-pull stress generated is small, which can effectively solve the problems of separation and dam rupture between the dam and the cover plate of the complementary metal-oxide-semiconductor image sensor.

[0059] The embodiments are only used to illustrate the content of this application and are not intended to limit the scope of implementation of this application. Therefore, equivalent changes and modifications made within the scope of the claims of this application should still fall within the scope of this application.

Claims

1. An image sensor module, characterized in that: include: integrated circuit substrates; An image sensing chip is disposed on the upper surface of the integrated circuit substrate and includes an image sensing area and a non-image sensing area; a cover plate disposed above the image sensing area and the non-image sensing area of ​​the image sensing chip; a dam disposed between the lower surface of the cover plate and the non-image sensing area of ​​the upper surface of the image sensing chip; as well as a packaging material covering a periphery of the image sensor chip, a periphery of the dam, a portion of the upper surface of the integrated circuit substrate, and a periphery of the cover plate; The dam has a multi-layer structure, including an upper layer, a middle layer and a lower layer.

2. The image sensor module according to claim 1, wherein: The thickness of the upper layer and the thickness of the lower layer are both lower than the thickness of the middle layer.

3. The image sensor module according to claim 1, wherein: The thermal expansion coefficient of the upper layer and the thermal expansion coefficient of the lower layer are both higher than the thermal expansion coefficient of the middle layer.

4. The image sensor module according to claim 1, wherein: The Young's modulus of the upper layer and the Young's modulus of the lower layer are both in the range of 0.05 GPa to 0.5 GPa, and the Young's modulus of the middle layer is in the range of 1 GPa to 5 GPa.

5. The image sensor module according to claim 1, wherein: The width of the middle layer is greater than the width of the upper layer, and the width of the middle layer is smaller than the width of the lower layer.

6. The image sensor module according to claim 1, wherein: The filler content of the upper layer and the filler content of the lower layer are both in the range of 0 wt % to 10 wt %, and the filler content of the middle layer is in the range of 20 wt % to 80 wt %.

7. The image sensor module according to claim 1, wherein: The upper layer and the lower layer have the same thickness, thermal expansion coefficient, Young's modulus or filler content.

8. The image sensor module according to claim 1, wherein: The material of the upper layer and the material of the lower layer both include at least one of silicone resin, acrylic resin and epoxy resin.

9. The image sensor module according to claim 1, wherein: The material of the middle layer includes an inorganic film material and an adhesive tape having the inorganic film material.

Images