An optical frequency conversion chip, a preparation method thereof and a reflective optical frequency conversion system

Abstract

The application discloses an optical frequency conversion chip and a preparation method and a reflection type optical frequency conversion system thereof, and relates to the technical field of semiconductors.The optical frequency conversion chip comprises a silicon substrate and a plurality of pixel units arranged in an array on the surface;each pixel unit comprises a support structure and an absorbing radiation layer;the support structure comprises a contact layer and two support legs;the absorbing radiation layer is located on the surface of the side of the contact layer away from the silicon substrate;the projection of the contact layer on the silicon substrate completely covers the projection of the absorbing radiation layer on the silicon substrate;there is a spacing space between the contact layer and the silicon substrate;the contact layer is connected with the support legs;the support legs are located on the first surface of the silicon substrate and on the side of the opposite top corners of the contact layer;the pixel unit is S-shaped.The application solves the problem that the chip resolution is low, the heat dissipation surface of the pixel is large, and the apparent temperature is reduced due to the difficulty in heating, can improve the heating speed of the pixel unit, reduce the thermal crosstalk between adjacent pixels, and improve the refresh frequency, resolution and apparent temperature of the image.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, specifically to an optical frequency conversion chip and its fabrication method, and a reflective optical frequency conversion system. Background Technology

[0002] Optical frequency conversion chips typically feature a pixel array with high absorptivity / emissivity, which is related to the resolution of the image to be simulated. During operation, the conversion chip needs to be fixed in a vacuum environment by a metal clamp to reduce the impact of thermal convection. Based on the optical frequency down-conversion method, when a high-resolution visible light image is used to heat a thin film through a visible light window, the pixels, due to their high visible light absorptivity and wide-band infrared emissivity, can quickly absorb light heat and heat up, then emit infrared radiation a second time. This radiation passes through the infrared window, is received by the infrared optical system, and projected onto the entrance pupil of the detector's optical system under test.

[0003] In related technologies, to achieve rapid heating while reducing lateral heat diffusion, the optical frequency conversion chip needs to be very thin, typically in the sub-micron size, resulting in poor mechanical properties. Because the pixel array is located in a two-dimensional plane, lateral thermal crosstalk still reduces the spatial resolution of the simulated image. Therefore, it is necessary to increase the heating rate of individual pixels and reduce lateral thermal crosstalk between adjacent pixels. Furthermore, during dynamic frame switching, since the thin film relies solely on radiation for heat dissipation and lacks efficient heat conduction channels, the thin film accumulates heat, increasing the background temperature of the simulated image environment. This ultimately results in a lower dynamic range for high frame rate scene simulations. Related research has proposed a "silicon-based microcavity" structure, which suspends each pixel by etching a microcavity array on a silicon substrate to improve heat dissipation. However, in this method, all four wide edges of each pixel are in contact with the silicon substrate, resulting in a large heat dissipation surface area and difficulty in heating. Moreover, the wide border occupies a large area of ​​the pixel, sacrificing the pixel's radiation area, resulting in a smaller fill factor and ultimately lowering the apparent temperature detected by the detector.

[0004] Therefore, a solution is needed to reduce the deposition heat of the optical frequency conversion chip, increase the heating rate of individual pixels, reduce crosstalk between adjacent pixels, and improve the resolution and frame rate of infrared images. Summary of the Invention

[0005] In view of this, this application provides an optical frequency conversion chip and its fabrication method, and a reflective optical frequency conversion system, to at least solve the problems in the related art, such as the low spatial resolution of simulated images due to lateral thermal crosstalk between pixels of the optical frequency conversion chip, the low dynamic range of images when simulating high frame rate scenes due to excessive deposition heat, and the reduced apparent temperature of the detector due to the large heat dissipation surface of the pixels making it difficult to heat up.

[0006] In a first aspect, this application provides an optical frequency conversion chip, which includes:

[0007] A silicon substrate, comprising opposing first and second surfaces;

[0008] Multiple pixel units arranged in an array are located on the first surface of a silicon substrate;

[0009] Each pixel unit includes a stacked support structure and an absorbing radiation layer; the absorbing radiation layer is located on the side of the support structure facing away from the silicon substrate; the support structure includes a contact layer and two support legs; the absorbing radiation layer is located on the side surface of the contact layer facing away from the silicon substrate, the projection of the contact layer on the silicon substrate completely covers the projection of the absorbing radiation layer on the silicon substrate, and there is a gap between the contact layer and the silicon substrate; the contact layer is connected to the support legs, the support legs are located on the first surface of the silicon substrate, and are located on the side of the opposite apex corner of the contact layer;

[0010] The top view of the pixel unit is S-shaped, including a central region and edge regions located on opposite sides of the central region; the edge regions are spaced apart from the sides of the adjacent central regions, and the edge regions are connected to one end of the side of the adjacent central regions through transition regions; one end of each edge region is connected to the transition region, and the other end is connected to a support leg.

[0011] Secondly, this application also provides a method for fabricating an optical frequency conversion chip, used to fabricate the optical frequency conversion chip described in the first aspect, the method comprising:

[0012] A silicon substrate is provided, including opposing first and second surfaces;

[0013] Multiple arrayed support structures are formed on the first surface of a silicon substrate; the support structure includes a contact layer and two support legs; there is a gap between the contact layer and the silicon substrate; the contact layer is connected to the support legs; the support legs are located on the first surface of the silicon substrate and on the side of the opposite apex corner of the contact layer;

[0014] An absorbing radiation layer is formed on the side of each support structure facing away from the silicon substrate. The absorbing radiation layer is located on the surface of the contact layer facing away from the silicon substrate. The projection of the contact layer on the silicon substrate completely covers the projection of the absorbing radiation layer on the silicon substrate.

[0015] Each support structure and its corresponding radiation-absorbing layer form a pixel unit, and multiple arrayed support structures form multiple arrayed pixel units.

[0016] The top view of the pixel unit is S-shaped, including a central region and edge regions located on opposite sides of the central region; the edge regions are spaced apart from the sides of the adjacent central regions, and the edge regions are connected to one end of the side of the adjacent central regions through transition regions; one end of each edge region is connected to the transition region, and the other end is connected to a support leg.

[0017] Thirdly, this application also provides an optical frequency conversion system, which includes the optical frequency conversion chip described in the first aspect;

[0018] The reflective optical frequency conversion system includes:

[0019] A vacuum chamber is provided, in which the optical frequency conversion chip is located; a dual-band light-transmitting window is provided on one side of the vacuum chamber, and the radiation-absorbing layer of the optical frequency conversion chip is positioned opposite the dual-band light-transmitting window; a coating is provided on the inner wall of the vacuum chamber, and the infrared emissivity of the coating is greater than 0.8;

[0020] A cemented prism is provided on the outside of the dual-band light transmission window; the cemented prism includes two cemented triangular prisms; the interface surface of the two triangular prisms is coated with a visible light reflecting and infrared anti-reflection film; the included angle between the interface and the dual-band light transmission window is 45°.

[0021] Cemented prisms are suitable for refracting visible light images emitted by visible light projection devices onto the surface of optical frequency conversion chips within a dual-band transparent window through visible light reflection and infrared anti-reflection films;

[0022] The optical frequency conversion chip is suitable for converting visible light images into infrared images and emitting them from a dual-band light-transmitting window;

[0023] Cemented prisms are also suitable for transmitting infrared images emitted by optical frequency conversion chips through dual-band light-transmitting windows via visible light reflection and infrared anti-reflection films.

[0024] The optical frequency conversion chip provided by this invention has two advantages. First, due to the high thermal conductivity of the silicon substrate and the low thermal conductivity of the support structure, when the radiation-absorbing layer is heated, the support structure can reduce the heat dissipation rate of the radiation-absorbing film, which helps to accumulate heat and simulate high-temperature targets. When the radiation-absorbing layer is not heated, the heat will be rapidly transferred downwards along the contact layer and support legs to the silicon substrate. This achieves the goal of reducing the heat dissipation rate of a single pixel unit and increasing the heating rate, while simultaneously reducing the heat deposition of the radiation-absorbing layer through heat dissipation via the silicon substrate, thus improving the reliability of the chip. This allows the optical frequency conversion chip to heat up and dissipate heat quickly, improving the resolution and frame rate of infrared images. Second, the support structure includes a contact layer and two support legs. The entire pixel unit is supported only by two diagonally opposite support legs and connected to the high thermal conductivity silicon substrate. Each pixel unit has only two support legs in contact with the silicon substrate, which greatly reduces the contact area between the support structure and the silicon substrate, reduces the heat conduction rate from the radiation-absorbing film to the pixel, further improves the heating rate of the pixel unit, and reduces thermal crosstalk between adjacent pixels. Therefore, the optical frequency conversion chip provided by this invention solves the problems of image resolution and dynamic range caused by insufficient lateral heat diffusion and heat dissipation channels in the prior art. It can effectively improve the heating rate of the pixel unit, reduce thermal crosstalk between adjacent pixels, and at the same time, it can dissipate heat from the chip as a whole through a silicon substrate with high thermal conductivity, thereby improving the image refresh rate, resolution and apparent temperature, and realizing high resolution and high dynamic range performance of infrared images in high frame rate dynamic scenes. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the specific embodiments or related technologies of the present invention, the drawings used in the description of the specific embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0026] Figure 1 This is a schematic front view of the structure of a pixel unit in an optical frequency conversion chip according to an embodiment of the present invention;

[0027] Figure 2A This is a top view schematic diagram of the structure of the optical frequency conversion chip in Example 1 of the present invention;

[0028] Figure 2B yes Figure 2A Cross-sectional view of surface AA;

[0029] Figure 3A This is a top view schematic diagram of the structure of the optical frequency conversion chip in Example 2 of the present invention;

[0030] Figure 3B yes Figure 3A Cross-sectional view of surface AA;

[0031] Figure 4 This is a front view schematic diagram of the structure of a pixel unit array in an optical frequency conversion chip according to an embodiment of the present invention;

[0032] Figure 5 This is a top view schematic diagram of the structure of the pixel unit array in Example 1 of the present invention;

[0033] Figure 6 This is a top view schematic diagram of the structure of the pixel unit array in Example 2 of the present invention;

[0034] Figure 7 This is a front view schematic diagram of the support leg of an optical frequency conversion chip according to an embodiment of the present invention, which is a cylindrical support structure.

[0035] Figure 8 This is a front view schematic diagram of the heat sink structure in an optical frequency conversion chip according to an embodiment of the present invention;

[0036] Figure 9 This is a front view schematic diagram of the adhesive layer structure in an optical frequency conversion chip according to an embodiment of the present invention;

[0037] Figure 10 This is a schematic flowchart of a method for fabricating an optical frequency conversion chip according to an embodiment of the present invention;

[0038] Figure 11 This is a schematic diagram of a specific process for fabricating an optical frequency conversion chip according to an embodiment of the present invention;

[0039] Figure 12 This is a schematic diagram of the structure for forming the initial sacrificial layer in a method for fabricating an optical frequency conversion chip according to an embodiment of the present invention;

[0040] Figure 13 In a method for fabricating an optical frequency conversion chip according to an embodiment of the present invention, Figure 12 A schematic diagram of the structure of the first patterned photoresist based on this;

[0041] Figure 14 In a method for fabricating an optical frequency conversion chip according to an embodiment of the present invention, Figure 13 A schematic diagram of the structure forming the sacrificial layer on the basis;

[0042] Figure 15 In a method for fabricating an optical frequency conversion chip according to an embodiment of the present invention, Figure 14 A schematic diagram of the structure on which the initial support layer is formed;

[0043] Figure 16In a method for fabricating an optical frequency conversion chip according to an embodiment of the present invention, Figure 15 A schematic diagram of the structure on which the initial adhesion layer is formed;

[0044] Figure 17 In a method for fabricating an optical frequency conversion chip according to an embodiment of the present invention, Figure 16 A schematic diagram of the structure on which a second patterned photoresist is formed;

[0045] Figure 18 In a method for fabricating an optical frequency conversion chip according to an embodiment of the present invention, Figure 17 A schematic diagram of the structure on which the adhesion layer is formed;

[0046] Figure 19 In a method for fabricating an optical frequency conversion chip according to an embodiment of the present invention, Figure 18 A structural diagram illustrating the supporting structure built upon this foundation;

[0047] Figure 20 In a method for fabricating an optical frequency conversion chip according to an embodiment of the present invention, Figure 19 A structural diagram showing the removal of at least the adhesive layer at the corresponding location of the support.

[0048] Figure 21 In a method for fabricating an optical frequency conversion chip according to an embodiment of the present invention, Figure 20 A schematic diagram of a structure formed by removing the sacrificial layer to create a space.

[0049] Figure 22 In a method for fabricating an optical frequency conversion chip according to an embodiment of the present invention, Figure 21 A schematic diagram of a structure that forms a radiation-absorbing layer on top of the existing structure;

[0050] Figure 23 This is a schematic diagram of the structure of an optical frequency conversion system according to an embodiment of the present invention.

[0051] Figure label:

[0052] 10. Silicon substrate; 11. Initial support layer; 20. Support structure; 21. Support leg; 22. Contact layer; 30. Radiation-absorbing layer; 40. Spacing space; 50. Initial sacrificial layer; 51. Sacrificial layer; 60. Adhesion layer; 61. Initial adhesion layer; 91. First patterned photoresist; 92. Second patterned photoresist; 70. Heat sink; 81. Coolant inlet; 82. Coolant outlet; 100. Pixel unit; 101. Central region; 102. Edge region; 103. Transition region; 200. Vacuum chamber; 300. Dual-band light transmission window; 400. Triangular prism; 401. Interface; L1. Visible light image; L2. Infrared image. Detailed Implementation

[0053] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application. It should also be noted that, for ease of description, only the parts related to the present invention are shown in the accompanying drawings, not all structures.

[0054] In the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concepts of the present invention. Various structural schematic diagrams according to embodiments of the present invention are shown in the accompanying drawings. These drawings are not to scale, and some details are enlarged for clarity, and some details may be omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate in practice due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed. In the context of the present invention, when a layer / element is referred to as being "on" another layer / element, the layer / element may be directly on the other layer / element, or there may be an intermediate layer / element between them. Additionally, if a layer / element is "on" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element.

[0055] In indoor environment testing for hardware-in-the-loop simulation and autonomous driving, developers can provide real-time image sources such as laser, infrared, and multimode composite images to the detector under test to simulate the optical characteristics of moving targets and backgrounds in real environments. Infrared light, due to its low frequency and long transmission distance, is particularly suitable for use as a detection wavelength in harsh weather conditions. Currently, the research community has various technologies for simulating infrared images, which can be divided into two categories based on their working principles: direct radiation and radiation modulation. Direct radiation technology refers to devices directly generating infrared images through their own electro-optic, electro-thermal-optic, and optical-thermal-optical conversions. Typical direct radiation devices include resistor arrays, conversion chips, and infrared diode arrays. Radiation modulation technology modulates the intensity distribution of infrared radiation irradiated onto the working surface of the device by changing the device's reflection or transmission characteristics. Typical radiation modulation devices include digital micromirror devices and silicon-based liquid crystal spatial light modulators. Currently, the mainstream technologies in China are resistor arrays based on electro-thermal-optical conversion, digital micromirror devices with reflective spatial light modulation, and conversion chips based on optical-thermal-optical conversion.

[0056] However, resistive arrays are limited by complex CMOS-MEMS processes, making it difficult to scale the pixel array size. Digital micromirror devices suffer from low contrast in long-wavelength images due to long-wavelength diffraction. With the continuous development of microelectromechanical systems (MEMS) technology, conversion chip technology can meet the simulation requirements of most current infrared scenes in terms of array size, simulation temperature, and spectral width. However, its main advantage lies in static images, and its heat dissipation structure limits its ability to meet the simulation requirements of high-frame-rate dynamic videos.

[0057] Traditional optical-to-frequency conversion chips are typically designed as self-suspended composite thin films with a diameter of 3 inches. The film surface is etched with a high-absorptivity / emissivity pixel array, which is related to the resolution of the image to be simulated. During operation, the conversion chip needs to be fixed in a vacuum environment by a metal clamp to reduce the impact of thermal convection. Based on the optical-to-frequency down-conversion method, when a high-resolution visible light image is used to heat the thin film through a visible light window, the pixels, due to their high visible light absorptivity and wide-band infrared emissivity, can quickly absorb light heat and heat up, then emit infrared radiation a second time. This radiation passes through the infrared window, is received by the infrared optical system, and projected onto the entrance pupil of the detector's optical system under test.

[0058] In related technologies, to achieve rapid heating while reducing lateral heat diffusion, the conversion chip needs to be very thin, typically in the submicron dimension, resulting in poor mechanical properties. Because the pixel array is located in a two-dimensional plane, lateral thermal crosstalk still reduces the spatial resolution of the simulated image. Therefore, it is necessary to increase the heating rate of individual pixels and reduce lateral thermal crosstalk between adjacent pixels. Furthermore, during dynamic frame switching, the thin film relies solely on radiation for heat dissipation, lacking efficient heat conduction channels. This leads to deposition heat in the thin film, increasing the background temperature of the simulated image environment, ultimately resulting in a lower dynamic range in high frame rate scene simulations. Related research has proposed a "silicon-based microcavity" structure, which suspends each pixel by etching a microcavity array on a silicon substrate to improve heat dissipation. However, in this method, all four wide edges of each pixel are in contact with the silicon substrate, resulting in a large heat dissipation surface area and difficulty in heating. Moreover, the wide border occupies a large area of ​​the pixel, sacrificing the pixel's radiation area, resulting in a smaller fill factor and ultimately lowering the apparent temperature detected by the detector.

[0059] Therefore, a solution is needed to reduce the deposition heat of the optical frequency conversion chip, increase the heating rate of individual pixels, reduce crosstalk between adjacent pixels, and improve the resolution and frame rate of infrared images.

[0060] like Figure 1 As shown, this embodiment provides an optical frequency conversion chip, which includes:

[0061] A silicon substrate 10 includes opposing first and second surfaces;

[0062] Multiple pixel units 100 arranged in an array are located on the first surface of the silicon substrate 10;

[0063] Each pixel unit 100 includes a stacked support structure 20 and a radiation-absorbing layer 30; the radiation-absorbing layer 30 is located on the side of the support structure 20 facing away from the silicon substrate 10; the support structure 20 includes a contact layer 22 and two support legs 21; the radiation-absorbing layer 30 is located on the surface of the contact layer 22 facing away from the silicon substrate 10, the projection of the contact layer 22 on the silicon substrate 10 completely covers the projection of the radiation-absorbing layer 30 on the silicon substrate 10, and there is a gap space 40 between the contact layer 22 and the silicon substrate 10; the contact layer 22 is connected to the support legs 21, the support legs 21 are located on the first surface of the silicon substrate 10, and are located on the side of the opposite apex corner of the contact layer 22; the thermal conductivity of the support structure 20 is less than that of the silicon substrate;

[0064] The top view of the pixel unit 100 is S-shaped, including a central region 101 and edge regions 102 located on opposite sides of the central region 101; the edge regions 102 are spaced apart from the sides of the adjacent central region 101, and the edge regions 102 are connected to one end of the side of the adjacent central region 101 through a transition region 103; one end of each edge region 102 is connected to the transition region 103, and the other end is connected to a support leg 21.

[0065] In specific implementation, each pixel unit 100 in the pixel array is an independent and unconnected suspended structure. The top view shape of the pixel unit 100 is S-shaped, with a rectangular central region 101 and an elongated edge region 102. The area of ​​the central region 101 is larger than that of the edge region 102. From top to bottom, the central region 101 consists of an absorbing radiation layer 30, a contact layer 22, and a spacing space 40. The structure of the edge region 102 and the transition region includes at least the contact layer 22. Support legs 21 are located at one end of the edge region 102 and extend from the contact layer 22 corresponding to the edge region 102 to the first surface of the silicon substrate 10. The two support legs 21 are located at opposite apex corners of the contact layer 22. The support legs 21 and the contact layer 22 are made of a low thermal conductivity, flexible, and heat-resistant polymer film to support the absorbing radiation layer 30. The absorbing radiation layer 30 is made of a sparsely porous metallic black film to absorb visible light and radiate infrared light. The radiation-absorbing layer 30 is located at least in the central region 101 of the rectangle. This rectangular design increases the pixel fill factor, thereby improving the apparent temperature detectable by the detector. The edge region 102 is designed as an elongated strip, connecting the support leg 21 to the central region 101 for support. Simultaneously, by controlling the length of the edge region 102, the thermal resistance can be altered, thus selectively controlling the pixel end-face temperature and thermal response time. The size of a single pixel unit 100 is designed according to the image resolution requirements.

[0066] Specifically, the top view shape of the pixel unit 100 is S-shaped, mainly because the top view shape of the contact layer 22 is S-shaped, including a central region 101 and edge regions 102 located on opposite sides of the central region 101; the edge regions 102 are spaced apart from the sides of the adjacent central region 101, and the edge regions 102 are connected to one end of the side of the adjacent central region 101 through a transition region 103; one end of each edge region 102 is connected to the transition region 103, and the other end is connected to a support leg 21. The support legs 21 are located at the two opposite apex sides of the edge regions 102 of the contact layer 22, and the radiation-absorbing layer 30 at least partially covers the contact layer 22.

[0067] The optical frequency conversion chip provided in this embodiment has several advantages. First, due to the high thermal conductivity of the silicon substrate and the low thermal conductivity of the support structure, when the radiation-absorbing layer is heated, the support structure can reduce the heat dissipation rate of the radiation-absorbing film, which helps to accumulate heat and simulate high-temperature targets. When the radiation-absorbing layer is not heated, the heat will be rapidly transferred downwards along the contact layer and support legs to the silicon substrate. This reduces the heat dissipation rate of a single pixel unit and increases the heating rate, while simultaneously reducing the heat deposition of the radiation-absorbing layer through heat dissipation via the silicon substrate, thus improving the chip's reliability. This allows the optical frequency conversion chip to heat up and dissipate heat quickly, improving the resolution and frame rate of infrared images. Second, the support structure includes a contact layer and two support legs. The entire pixel unit is supported only by two diagonally opposite support legs and connected to the high thermal conductivity silicon substrate. Each pixel unit has only two support legs in contact with the silicon substrate, greatly reducing the contact area between the support structure and the silicon substrate. This reduces the heat conduction rate from the radiation-absorbing film to the silicon substrate, further increasing the heating rate of the pixel unit and reducing thermal crosstalk between adjacent pixels. Therefore, the optical frequency conversion chip provided in this embodiment solves the problems of image resolution and dynamic range caused by insufficient lateral heat diffusion and heat dissipation channels in the prior art. It can effectively improve the heating rate of the pixel unit, reduce thermal crosstalk between adjacent pixels, and dissipate heat from the chip as a whole through a silicon substrate with high thermal conductivity, thereby improving the image refresh rate, resolution and apparent temperature, and realizing high resolution and high dynamic range performance of infrared images in high frame rate dynamic scenes.

[0068] In some alternative implementations, such as Figure 2A and Figure 3A As shown, the contact layer 22 is located in the central region 101, the edge region 102, and the transition region 103; the projection of the contact layer 22 onto the silicon substrate 10 is S-shaped.

[0069] The radiation-absorbing layer 30 is located at least in the central region 101.

[0070] In specific implementation, the contact layer 22 has an S-shaped top view and is located in the central region 101, the edge region 102, and the transition region 103. One end of the contact layer 22 in each edge region 102 is connected to the contact layer 22 in the transition region 103, and the other end is connected to a support leg 21. The radiation-absorbing layer 30 is located at least in the central region 101, which is rectangular. The rectangular design of the radiation-absorbing layer 30 increases the fill factor of the pixel, thereby improving the apparent temperature that the chip detector can detect. The edge regions of the contact layer are used to transfer the heat generated by the radiation-absorbing layer in the central region to the support leg, and then to the silicon substrate. By setting the edge regions, the thermal resistance of the heat conduction path can be increased, reducing the heat conduction speed from the radiation-absorbing film in the central region to the silicon substrate. Generally, the edge regions are set to be elongated to further increase the thermal resistance, thereby reducing the heat conduction speed from the radiation-absorbing film to the silicon substrate, thus increasing the heating rate of the pixel unit and reducing thermal crosstalk between adjacent pixels.

[0071] In some alternative implementations, such as Figure 2A and Figure 2B As shown, in Example 1, the radiation-absorbing layer 30 is located only in the central region 101; the projection of the radiation-absorbing layer 30 onto the silicon substrate 10 is rectangular.

[0072] Specifically, when the radiation-absorbing layer 30 is located only in the central region 101, the contact layer in the edge region is only used for support and heat conduction. The thermal resistance is relatively large, which means that the heat generated by the radiation-absorbing layer 30 in the central region 101 needs to be transferred to the silicon substrate through the edge region and support legs, further reducing the heat conduction speed. This can increase the heating rate of the pixel unit and reduce thermal crosstalk between adjacent pixels.

[0073] In some alternative implementations, such as Figure 3A and Figure 3B As shown, in Example 2, the radiation-absorbing layer 30 is located in the central region 101, the edge region 102, and the transition region 103; the projection of the radiation-absorbing layer 30 onto the silicon substrate 10 is S-shaped.

[0074] Specifically, the radiation-absorbing layer 30 is located in the central region 101, the edge region 102, and the transition region 103, which can further increase the fill factor of the radiation-absorbing layer, thereby improving the apparent temperature and light conversion efficiency that the chip detector can recognize.

[0075] In some alternative embodiments, the projection of the support leg 21 onto the silicon substrate 10 does not overlap with the projection of the radiation-absorbing layer 30 onto the silicon substrate 10.

[0076] The optical frequency conversion chip provided in this embodiment has a non-overlapping projection of the support leg on the silicon substrate and the radiation absorption layer on the silicon substrate. This avoids direct heat conduction to the radiation absorption layer, reduces the interference of the heat conduction path on the performance of the radiation absorption layer, further improves the heating rate of the radiation absorption layer, and improves the resolution and accuracy of the image.

[0077] In some alternative implementations, a plurality of pixel units 100 are arranged in an m×n array on the first surface of the silicon substrate 10.

[0078] In some alternative embodiments, a plurality of pixel units 100 are arranged in a 3×3 array on the first surface of the silicon substrate 10, such as Figure 4 , Figure 5 and Figure 6 As shown. Figure 4 As can be seen from the front view, the close arrangement of multiple pixels can improve the chip's integration, increase the fill factor of the pixel unit 100, and thus improve the chip's identifiable surface temperature.

[0079] In some optional implementations, the radiation-absorbing layers 30 between adjacent pixel units 100 have a certain spacing, which can avoid interference between adjacent pixels, reduce thermal crosstalk and thermal diffusion between adjacent pixel units 100, ensure the thermal isolation effect between pixel units 100, and thus improve the resolution of the image.

[0080] In some alternative implementations, such as Figure 5 and Figure 6 As shown, no two adjacent pixel units 100 are in contact.

[0081] The optical frequency conversion chip provided in this embodiment does not allow any two adjacent pixel units to contact each other, which can reduce thermal crosstalk and mechanical stress transmission between adjacent pixel units, while reducing the impact of heat diffusion on adjacent pixel units, ensuring the thermal isolation effect between pixel units, and thus improving the resolution of the image.

[0082] In some alternative embodiments, the support structure 20 includes a contact layer 22 and two support legs 21. The projection of the contact layer 22 onto the silicon substrate 10 completely covers the projection of the radiation-absorbing layer 30 onto the silicon substrate 10, and a gap 40 exists between the contact layer 22 and the silicon substrate 10. The support legs 21 are located at opposite apical sides of the contact layer 22 and extend to the first surface of the silicon substrate 10. The top view of the contact layer 22 is S-shaped, including a central region 101 and edge regions 102 located on both sides of the central region 101. The edge regions 102 maintain a certain distance from the sides of the adjacent central regions 101 and are connected by a transition region 103. One end of each edge region 102 is connected to the transition region 103, and the other end is connected to a support leg 21. Through the design of the contact layer 22 and the support legs 21, good support can be provided for the radiation-absorbing layer 30, improving the mechanical strength of the support structure 20. At the same time, the contact area between the pixel and the silicon substrate 10 can be reduced, the heat conduction speed can be reduced, thereby improving the spatial resolution of the infrared image and the apparent temperature performance that the chip can recognize.

[0083] In some alternative implementations, such as Figure 7 As shown, the support leg 21 is a columnar support structure that extends vertically from the first surface of the silicon substrate 10 and connects to the side of the contact layer 22.

[0084] In practical implementation, the columnar support structure can improve the stability of the support leg 21, thereby improving the mechanical stability of the support structure. At the same time, the small contact area between the columnar support structure and the silicon substrate can reduce the heat conduction speed of the support leg 21 while stabilizing the support, further reducing the heat conduction speed of the support structure, effectively increasing the heating rate of the pixel unit 100, preventing thermal crosstalk between adjacent pixels, improving image resolution, and increasing the visible light apparent temperature that the chip can recognize.

[0085] In some alternative implementations, such as Figure 1 As shown, the support leg 21 is an arc-shaped support structure that extends obliquely in an arc from the first surface of the silicon substrate 10 to connect to the contact layer 22.

[0086] In the manufacturing process, the natural flow of the colloid often produces an arc shape, resulting in the support leg 21 having an arc-shaped support structure, such as... Figure 1 As shown. The arc-shaped support structure can also support the pixel unit. At the same time, the arc-shaped support structure can further reduce the volume of the support leg 21 while ensuring the contact area with the silicon wafer, thereby reducing the heat conduction speed of the support leg 21 while providing stable support.

[0087] In some alternative implementations, such as Figure 8 As shown, the optical frequency conversion chip also includes:

[0088] Heat sink 70 is located on the second surface of silicon substrate 10; heat sink 70 is used to dissipate heat from silicon substrate 10.

[0089] In some alternative implementations, the heat sink 70 is provided with liquid cooling pipes inside;

[0090] The heat sink 70 has a coolant inlet 81 and a coolant outlet 82 on the side facing away from the silicon substrate 10;

[0091] The coolant inlet 81 and coolant outlet 82 are located at both ends of the liquid cooling pipe.

[0092] In practice, the optical frequency conversion chip is placed vertically. When placed vertically, the heat sink 70 and the pixel unit are located on the left and right sides of the silicon substrate, respectively. The coolant inlet 81 is located at the lower part of the heat sink, and the coolant outlet 82 is located at the upper part of the heat sink.

[0093] The optical frequency conversion chip provided in this embodiment dissipates heat from the silicon substrate by setting a heat sink on the second surface of the silicon substrate, thereby improving the overall heat dissipation capacity of the chip. Heat is transferred along the support legs to the silicon substrate and then to the heat sink, achieving a high frame rate. Simultaneously, by incorporating liquid cooling pipes within the heat sink and connecting them to an external liquid cooler, the heat sink can quickly remove the heat accumulated on the silicon substrate, improving heat dissipation efficiency and reducing the impact of deposited heat on the background temperature of the analog image. Therefore, the optical frequency conversion chip significantly improves the image refresh rate, resolution, and apparent temperature.

[0094] In some alternative implementations, such as Figure 9 As shown, each pixel unit 100 also includes:

[0095] An adhesive layer 60 is located between the radiation-absorbing layer 30 and the contact layer 22, and is used to bond the radiation-absorbing layer 30 and the contact layer 22.

[0096] The material selection of the adhesive layer 60 is related to the materials of the radiation-absorbing layer 30 and the contact layer 22. The adhesive layer 60 can increase the bonding strength between the radiation-absorbing layer 30 and the contact layer 22.

[0097] In some optional embodiments, the radiation-absorbing layer 30 is a metallic black film, and the material of the adhesion layer 60 is metal; optionally, the material of the adhesion layer 60 is chromium.

[0098] In some alternative implementations, the thermal conductivity of the support structure 20 is less than 0.2 W / (m·K).

[0099] In some alternative embodiments, the material of the support structure 20 is a polymer; the thermal conductivity of the support structure 20 is 0.15 W / (m·K) to 0.2 W / (m·K).

[0100] In practice, both the contact layer 22 and the support leg 21 are made of the same polymer material with low thermal conductivity. The support structure 20 is made of a polymer with low thermal conductivity, which can achieve efficient thermal insulation, reduce the heat conduction rate of the radiation-absorbing layer 30 to the silicon substrate 10, thereby reducing the heat dissipation rate of the radiation-absorbing layer of a single pixel unit, and allowing the radiation-absorbing layer 30 to heat up quickly.

[0101] In some alternative embodiments, the radiation-absorbing layer 30 is a metallic black thin film.

[0102] In practice, the radiation-absorbing layer 30 is made of a metallic black thin film, which has a high light absorption and conversion efficiency.

[0103] In some alternative embodiments, the material of the support structure 20 is polyimide;

[0104] The radiation-absorbing layer 30 is an aluminum black film, a gold black film, or a tungsten black film.

[0105] In some alternative implementations, the width of the pixel unit is 15μm to 100μm, such as 15μm, 30μm, 50μm, 70μm, 80μm, 90μm or 100μm.

[0106] In some alternative embodiments, the thickness of the radiation-absorbing layer 30 is 0.1 μm to 1 μm, such as 0.1 μm, 0.2 μm, 0.5 μm, 0.6 μm, 0.8 μm or 1 μm.

[0107] In some optional embodiments, the thickness of the radiation-absorbing layer 30 is greater than or equal to 0.6 μm, and the thickness of the radiation-absorbing layer 30 is 0.6 μm to 1 μm; this can ensure high light absorption and conversion efficiency, while improving the mechanical properties and reliability of the radiation-absorbing layer 30, and can improve the optical frequency conversion performance of the chip.

[0108] In some optional embodiments, the maximum width of the support leg 21 is 1μm to 5μm, such as 1μm, 2μm, 3μm, 4μm or 5μm; the height of the support leg 21 is 1μm to 5μm, such as 1μm, 2μm, 3μm, 4μm or 5μm.

[0109] In practical implementation, to reduce the heat dissipation rate of the radiation-absorbing layer, the contact area between the support leg 21 and the silicon substrate needs to be minimized. The maximum width of the support leg 21 is 1μm~5μm, which can reduce the heat conduction rate of the support structure while providing stable support, allowing the pixel unit to have a higher heating rate. This enables the radiation-absorbing layer to achieve a higher temperature rise with less visible light heating. The height of the support leg is 1μm~5μm, which can improve the stability of the support leg and thus improve the mechanical stability of the support structure. In practice, other height values ​​can also be set according to the size of the pixel. The height of the support leg has almost no impact on temperature and frame rate. In one example, the width of the support leg is 3μm and the height is 2μm.

[0110] In some alternative implementations, the width of the edge region 102 is the same as the width of the support leg 21, which is 1μm to 5μm, such as 1μm, 2μm, 3μm, 4μm or 5μm.

[0111] Specifically, the edge region needs to be elongated to increase thermal resistance. The length of the edge region is set according to the width of the pixel. The width of the edge region 102 is 1μm~5μm. If it is too wide, the temperature rise from absorbed radiation will be too low, and the heat conduction rate of the pixel unit will be too fast. If it is too narrow, it may also affect the temperature rise and frame rate. Therefore, setting it to 1μm~5μm can effectively increase thermal resistance, reduce the heat conduction rate, and improve the chip's temperature rise rate. Specifically, it can be designed according to actual performance requirements and process precision.

[0112] In some alternative implementations, the distance between the edge region 102 and the side of the adjacent center region 101 is less than or equal to 3 μm, such as 3 μm, 2 μm or 1 μm.

[0113] Specifically, the smaller the spacing between the edge region 102 and the side of the adjacent central region 101, the better. This mainly depends on the process precision. The smaller the spacing, the larger the fill factor of the pixel, which improves the absorption efficiency of the pixel.

[0114] In some alternative embodiments, the thickness of the contact layer 22 is 0.1 μm to 1 μm.

[0115] In practical implementation, while ensuring mechanical strength, the thinner the contact layer 22, the better. A smaller contact layer 22 results in a smaller pixel thermal mass, making it easier to heat up and cool down. The height of the spacing space 40 is the difference between the support leg height and the contact layer thickness. Through the material and size design of the contact layer 22 and the support structure 20, the impact of heat diffusion on the pixel unit 100 is effectively reduced, while the heat conduction path is optimized, improving the thermal insulation effect and mechanical stability of the pixel unit 100. Optionally, provided the process allows, the width of the edge region 102 can be further reduced, reserving a larger central region 101.

[0116] In some optional embodiments, the radiation-absorbing layer is an aluminum black thin film with a thickness of 0.6 μm. To ensure a visible light absorption rate greater than 95% and an emissivity of 0.8, a larger thickness of the radiation-absorbing layer is better; however, from a time-dependent perspective, a thinner thickness is better. Calculations show that 0.6 μm is the optimal thickness for aluminum black material.

[0117] In some alternative implementations, the width of the edge region 102 and the width of the support leg are 3 μm, and the height of the support leg is 2 μm; the distance between each edge region 102 and the center region 101 is 2 μm. The thickness of the contact layer is less than or equal to 0.5 μm. In one example, the thickness of the contact layer is 0.5 μm, then the height of the spacing space is 1.5 μm.

[0118] like Figure 10 As shown, this embodiment provides a method for fabricating an optical frequency conversion chip, which includes, but is not limited to, steps S101 to S103.

[0119] Step S101, a silicon substrate 10 is provided, including a first surface and a second surface opposite to each other.

[0120] In step S102, multiple arrayed support structures 20 are formed on the first surface of the silicon substrate 10. The support structure 20 includes a contact layer 22 and two support legs 21. There is a gap space 40 between the contact layer 22 and the silicon substrate 10. The contact layer 22 is connected to the support legs 21. The support legs 21 are located on the first surface of the silicon substrate 10 and are located on the side of the opposite top corner of the contact layer 22.

[0121] In step S103, an absorbing radiation layer 30 is formed on the side of each support structure 20 facing away from the silicon substrate 10. The absorbing radiation layer 30 is located on the surface of the contact layer 22 facing away from the silicon substrate 10. The projection of the contact layer 22 on the silicon substrate 10 completely covers the projection of the absorbing radiation layer 30 on the silicon substrate 10. Each support structure 20 and its corresponding absorbing radiation layer 30 form a pixel unit 100. Multiple arrayed support structures 20 form multiple arrayed pixel units 100. The top view of the pixel unit 100 is S-shaped, including a central region 101 and edge regions 102 located on opposite sides of the central region 101. The edge regions 102 are spaced apart from the sides of the adjacent central region 101, and the edge regions 102 are connected to one end of the side of the adjacent central region 101 through a transition region 103. One end of each edge region 102 is connected to the transition region 103, and the other end is connected to a support leg 21.

[0122] The method for fabricating the optical frequency conversion chip provided in this embodiment involves, on the one hand, forming a support structure with low thermal conductivity on the first surface of a silicon substrate with high thermal conductivity, and forming an absorbing radiation layer on the surface of a contact layer with low thermal conductivity. When the absorbing radiation layer is heated, the support structure can reduce the heat dissipation rate of the absorbing radiation film, which helps to accumulate heat and simulate high-temperature targets. When the absorbing radiation layer is not heated, heat is rapidly transferred downwards along the contact layer and support legs to the silicon substrate. This achieves both reducing the heat dissipation rate and increasing the heating rate of a single pixel unit, while simultaneously dissipating heat through the silicon substrate. To reduce the deposition heat of the radiation-absorbing layer and improve chip reliability, the optical frequency conversion chip can heat up and dissipate heat quickly, improving the resolution and frame rate of infrared images. On the other hand, the support structure includes a contact layer and two support legs. The entire pixel unit is supported only by two diagonally opposite support legs and connected to a high thermal conductivity silicon substrate. Each pixel unit has only two support legs in contact with the silicon substrate, greatly reducing the contact area between the support structure and the silicon substrate, reducing the heat conduction speed from the radiation-absorbing film to the pixel, further improving the heating speed of the pixel unit, and reducing thermal crosstalk between adjacent pixels. Therefore, the optical frequency conversion chip fabrication method provided in this embodiment solves the image resolution and dynamic range problems caused by insufficient lateral heat diffusion and heat dissipation channels in the prior art. It can effectively improve the heating speed of the pixel unit, reduce thermal crosstalk between adjacent pixels, and at the same time, the high thermal conductivity silicon substrate provides overall heat dissipation for the chip, improving the image refresh rate, resolution, and apparent temperature, achieving high resolution and high dynamic range performance of infrared images in high frame rate dynamic scenes.

[0123] In some alternative embodiments, the step of forming a plurality of arrayed support structures 20 on the first surface of the silicon substrate 10 includes:

[0124] Multiple sacrificial layers 51 are formed in an array on the first surface of the silicon substrate 10; the shape of the sacrificial layers 51 is the shape of the spacer space 40.

[0125] A support structure 20 is formed on the side of the sacrificial layer 51 facing away from the silicon substrate 10;

[0126] Remove the sacrificial layer 51 to form a spacer 40 between the contact layer 22 and the first surface of the silicon substrate 10.

[0127] The method for fabricating an optical frequency conversion chip provided in this embodiment first forms multiple arrayed sacrificial layers on the first surface of a silicon substrate; the shape of the sacrificial layers is the shape of spaced spaces; secondly, a support structure is formed on the side of the sacrificial layers facing away from the silicon substrate; finally, the sacrificial layers are removed, and a spaced space is formed between the contact layer and the first surface of the silicon substrate; this allows the support structure to be integrally formed, improving the stability of the support structure, while also simplifying the process flow and improving the fabrication process efficiency.

[0128] In some alternative embodiments, the step of forming the support structure 20 on the side of the sacrificial layer 51 facing away from the silicon substrate 10 includes:

[0129] An initial support layer 11 is formed on the surface of the sacrificial layer 51 facing away from the silicon substrate 10;

[0130] An initial adhesion layer 61 is formed on the surface of the initial support layer 11 facing away from the silicon substrate 10;

[0131] The initial adhesive layer 61 and the initial support layer 11 are patterned to form the adhesive layer 60 and the support structure 20, respectively.

[0132] The step of forming the radiation-absorbing layer 30 includes:

[0133] An radiation-absorbing layer 30 is formed on the surface of the adhesion layer 60 facing away from the contact layer 22.

[0134] In some alternative embodiments, the step of forming the radiation-absorbing layer 30 on the surface of the adhesion layer 60 opposite to the contact layer 22 includes:

[0135] The radiation-absorbing layer 30 is formed using a resistance evaporation deposition process; the radiation-absorbing layer 30 is a metallic black thin film.

[0136] In the resistive evaporation coating process, the metal is heated in a protective gas environment, and the working gas pressure and evaporation rate are controlled to evaporate the radiation-absorbing layer 30 on the surface of the adhesion layer 60 facing away from the contact layer 22.

[0137] In some alternative embodiments, the material of the radiation-absorbing layer is an aluminum black film, a gold black film, or a tungsten black film; the metal is aluminum, gold, or tungsten.

[0138] The protective gas is helium, nitrogen, or argon.

[0139] In some optional embodiments, the material of the radiation-absorbing layer 30 is an aluminum black thin film; the metal is aluminum; the protective gas is helium; the working pressure is 850~950 Pa; and the evaporation rate is 13 nm / s~17 nm / s. In one example, the working pressure is 900 Pa; and the evaporation rate is 15 nm / s.

[0140] In some alternative embodiments, the material of the radiation-absorbing layer 30 is a gold-black thin film; the metal is gold; the protective gas is nitrogen or argon, and the working pressure and evaporation rate are set according to actual needs.

[0141] In some alternative embodiments, the material of the radiation-absorbing layer 30 is a tungsten black film; the metal is tungsten; the protective gas is helium, nitrogen or argon, and the working pressure and evaporation rate are set according to actual needs.

[0142] In some alternative embodiments, the sacrificial layer 51 is made of silicon dioxide;

[0143] The step of removing the sacrificial layer 51 includes:

[0144] The sacrificial layer 51 is subjected to multiple wet etching processes using hydrofluoric acid buffer to remove it, thereby forming a space 40 between the contact layer 22 and the first surface of the silicon substrate 10, making the support structure 20 a suspended structure.

[0145] like Figure 11 As shown, the present invention also provides a detailed flowchart of a method for fabricating an optical frequency conversion chip, including but not limited to steps S201 to S208.

[0146] Step S201, a silicon substrate 10 is provided, including a first surface and a second surface opposite to each other.

[0147] In practice, a single-sided polished silicon wafer is first selected for surface treatment to enhance adhesion. The process does not require specific parameters such as the silicon wafer's crystal plane or doping; the wafer serves only as a substrate for the fabrication process and as the final heat dissipation substrate. The polished surface of the silicon wafer is the first surface.

[0148] In step S202, a plurality of sacrificial layers 51 arranged in an array are formed on the first surface of the silicon substrate 10; the shape of the sacrificial layers 51 is the shape of the spacing space 40, such as... Figures 12-14 As shown.

[0149] In practice, the sacrificial layer 51 is made of silicon dioxide. First, an initial sacrificial layer 50 is prepared on the first surface of the silicon wafer using plasma-enhanced chemical vapor deposition (PECVD). The thickness of the initial sacrificial layer 50 is the same as the height of the spacing space 40, such as... Figure 12As shown. Next, a first patterned photoresist 91 is formed on the surface of the initial sacrificial layer 50, as shown... Figure 13 As shown. Then, using the first patterned photoresist 91 as a mask, the initial sacrificial layer 50 is etched to form a sacrificial layer 51 with a shape consistent with the spacer space 40, as shown. Figure 14 As shown.

[0150] In some specific examples, the first patterned photoresist 91 is formed through the following process: First, a silicon oxide wafer is heated on a baking stage at 150°C for 5-10 minutes to remove adhering water vapor and organic matter; then, a positive photoresist coating is prepared by spin coating, followed by spin coating at a low speed of 500 rpm for 10 seconds and a high speed of 4000 rpm for 60 seconds, and then cured on a baking stage at 115°C for 1 minute; finally, pattern exposure and development are performed using a UV exposure machine to transfer the pre-designed sacrificial layer 51 pattern on the photoresist coating, followed by hardening on a baking stage for 2 hours to form the first patterned photoresist 91. The etching parameters are g-line (436 nm), resolution 0.5 μm, and exposure dose 150 mJ / cm². 2 The developer concentration is 25%, and the main component of the developer is tetramethyl ammonium hydroxide (TMAH).

[0151] In some specific examples, using the first patterned photoresist 91 as a mask, a stepped wet etching process is performed on the exposed portion of the sacrificial layer 51 using hydrofluoric acid buffer (40% HF solution: deionized water = 3:7), i.e., etching-rinsing-hardening, repeated multiple times to avoid excessive lateral etching caused by prolonged etching. Finally, acetone is used to remove the photoresist, transferring the pattern of the sacrificial layer 51 onto the silicon dioxide sacrificial layer 51.

[0152] Step S203: An initial support layer 11 is formed on the surface of the sacrificial layer 51 facing away from the silicon substrate 10, such as... Figure 15 As shown.

[0153] In specific implementation, the initial support layer 11 is made of a polymer. First, the polymer initial support layer 11 is prepared using a spin-coating method. In some examples, the support structure 20 is made of polyimide (PI), wherein the precursor is a poly(amic acid) (PAA) solution with a specific gravity of 1.100, a viscosity of 300-400 cps (25°C), a solid content of 12-13%, a pH of 5, and N-methylpyrrolidone (NMP) as the solvent. When preparing the polyimide polymer, the pre-spindle speed is 800 r / min for 60 s; the high-spindle speed is 8000 r / min for 180 s. Then, the PAA is imidized using a high-temperature furnace with stepped heating at 100°C, 200°C, and 300°C for 1 hour each, while nitrogen is used as a protective atmosphere, ultimately producing a PI film.

[0154] Step S204: An initial adhesion layer 61 is formed on the surface of the initial support layer 11 facing away from the silicon substrate 10, as shown below. Figure 16 As shown.

[0155] In practice, an electron beam evaporation coating technique is used to prepare a 400nm chromium metal adhesion layer on the surface of the polymer film as the initial adhesion layer 61. This layer can serve as a hard mask and also as the adhesion layer 60 during the final absorption layer preparation.

[0156] Step S205: A patterning process is performed on the initial adhesion layer 61 and the initial support layer 11 to form an adhesion layer 60 and a support structure 20, respectively. The support structure 20 includes a contact layer 22 and two support legs 21. The contact layer 22 is connected to the support legs 21. The support legs 21 are located on the first surface of the silicon substrate 10 and on the side of the opposite apex corner of the contact layer 22, such as... Figure 19 As shown.

[0157] In specific implementation, a second patterned photoresist 92 is first formed on the surface of the initial adhesion layer 61. The formation process of the second patterned photoresist 92 is the same as that of the first patterned photoresist 91. The pattern of the second patterned photoresist 92 is a pixel pattern, that is, an S-shape, such as... Figure 17 As shown; secondly, using the second patterned photoresist 92 as a mask, a patterning process is performed on the initial adhesion layer 61 to form multiple arrayed adhesion layers 60. The pattern of the adhesion layers 60 is S-shaped, as shown. Figure 18 As shown; finally, using the adhesion layer 60 as a mask, the initial support layer 11 is patterned to form multiple arrayed support structures 20, as shown. Figure 19 As shown.

[0158] In some specific examples, the initial adhesion layer 61 is made of chromium. Using photoresist as a mask, a chromium etching solution is prepared using 25g of 99% pure cerium ammonium nitrate powder, 20mL of 36% glacial acetic acid, and 100mL of deionized water. This solution is used to etch the chromium adhesion layer, transferring the pixel pattern onto the chromium. Finally, acetone is used to remove the photoresist. Then, using the chromium metal adhesion layer 60 as a hard mask, reactive ion beam etching is used to etch the polymer film (initial support layer 11), transferring the pixel pattern onto the polymer film to form the support structure 20.

[0159] Step S206: At least the adhesive layer 60 at the corresponding position of the support leg 21 is removed, and the remaining adhesive layer 60 is located on the surface of the contact layer 22, such as... Figure 20 As shown.

[0160] In specific implementation, photolithography and wet etching processes are used to remove part of the adhesion layer 60. In Example 1, the adhesion layer 60 at the corresponding position of the support leg 21, as well as the adhesion layer 60 at the corresponding positions of the edge region 102 and transition region 103 of the contact layer 22, are removed, leaving only the chromium adhesion layer in the central region 101. In Example 2, only the adhesion layer 60 at the corresponding position of the support leg 21 is removed, leaving the chromium adhesion layers in the central region 101, edge region 102, and transition region 103.

[0161] Step S207: Remove the sacrificial layer 51 and form a spacer 40 between the contact layer 22 and the first surface of the silicon substrate 10, as shown below. Figure 21 As shown.

[0162] In practice, the sacrificial layer 51 is subjected to multiple wet etching processes using hydrofluoric acid buffer to remove the sacrificial layer 51, thereby forming a space 40 between the contact layer 22 and the first surface of the silicon substrate 10, making the support structure 20 a suspended structure.

[0163] In step S208, an absorbing radiation layer 30 is formed on the surface of the adhesion layer 60 facing away from the contact layer 22; the projection of the contact layer 22 onto the silicon substrate 10 completely covers the projection of the absorbing radiation layer 30 onto the silicon substrate 10; each support structure 20 and its corresponding absorbing radiation layer 30 form a pixel unit 100, and multiple arrayed support structures 20 form multiple arrayed pixel units 100, such as... Figure 22 As shown.

[0164] In practice, resistance evaporation deposition technology is used to prepare a metallic black thin film. In some examples, high-purity aluminum is selected as the raw material. The aluminum is heated in a helium atmosphere, the working gas pressure is adjusted to 900 Pa, and the evaporation rate is controlled to evaporate an aluminum black absorbing / radiating thin film of a predetermined thickness. In other examples, gold is selected as the raw material, and the protective gas can also be nitrogen, argon, etc. Different metals and protective gases have different requirements for vacuum pressure and evaporation rates.

[0165] In Example 1, the radiation-absorbing layer 30 is formed only in the central region 101; the projection of the radiation-absorbing layer 30 onto the silicon substrate 10 is rectangular. In Example 2, the radiation-absorbing layer 30 is formed simultaneously in the central region 101, the edge region 102, and the transition region 103; the projection of the radiation-absorbing layer 30 onto the silicon substrate 10 is S-shaped.

[0166] like Figure 23 As shown, the present invention also provides a reflective optical frequency conversion system, comprising the above-mentioned optical frequency conversion chip;

[0167] The reflective optical frequency conversion system includes:

[0168] A vacuum chamber 200 is provided, and the optical frequency conversion chip is located in the vacuum chamber 200. A dual-band light transmission window 300 is provided on one side of the vacuum chamber 200, and the radiation absorption layer 30 of the optical frequency conversion chip is provided opposite to the dual-band light transmission window 300. A coating is provided on the inner wall of the vacuum chamber, and the infrared emissivity of the coating is greater than 0.8.

[0169] A cemented prism is provided on the outside of the dual-band light transmission window 300; the cemented prism includes two cemented triangular prisms 400; the surface of the interface 401 of the two triangular prisms 400 is coated with a visible light reflecting and infrared transmitting film; the included angle between the interface 401 and the dual-band light transmission window 300 is 45°.

[0170] The cemented prism is suitable for reflecting the visible light image L1 emitted by the visible light projection device onto the surface of the optical frequency conversion chip within the dual-band light transmission window 300 through visible light reflection and infrared anti-reflection film;

[0171] The optical frequency conversion chip is suitable for converting the visible light image L1 into an infrared image L2 and emitting it from the dual-band light transmission window 300;

[0172] The cemented prism is also suitable for transmitting the infrared image L2 emitted by the optical frequency conversion chip through the dual-band light transmission window 300 via visible light reflection and infrared anti-reflection film.

[0173] In practical implementation, because the silicon substrate does not have the characteristic of transmitting visible light, it is impossible to achieve the path of heating through transmission of visible light, as is the case with traditional conversion chips. Therefore, a method such as... Figure 18 The reflective optical frequency conversion system shown allows visible light to enter the absorption radiation layer 30 of the optical frequency conversion chip via a reflection path. The optical frequency conversion chip then converts this light into infrared light, which is then transmitted as an infrared image. The dual-band transmission window 300 can serve as both a visible light transmission window and an infrared transmission window, i.e., a visible light / infrared dual-band window. A cemented prism is used for visible light reflection and infrared light projection. The visible light projection device is used to provide visible light images.

[0174] In some embodiments, the visible light reflecting film and the infrared transmitting film are stacked visible light reflecting film and infrared transmitting film. In some embodiments, the surface of the interface 401 between the two triangular prisms 400 is coated with a high-reflectivity visible light reflecting film with a thickness of 300nm to 800nm ​​and a high-transmitivity infrared transmitting film with a thickness of 3μm to 5μm or 8μm to 14μm.

[0175] The working principle of the optical frequency conversion chip is as follows: First, the high-power, high-resolution visible light image L1 is reflected by the interface 401 of the two triangular prisms 400 and shines on the surface of the pixel array (the surface of the radiation-absorbing layer 30) through the visible light / infrared dual-band window. The radiation-absorbing layer 30 of the pixel unit 100 can absorb the heat of the visible light and heat up rapidly, generating a secondary radiated infrared image L2 that shines through the visible light / infrared dual-band window and is transmitted out from the cemented prism to form an infrared image L2, thus realizing rapid optical frequency conversion.

[0176] In addition, the inner wall of the vacuum chamber 200 is coated with a high emissivity coating. The vacuum chamber 200 is typically made of copper or stainless steel. As a sealed chamber, the external environment has minimal impact on its interior. However, the optical frequency conversion chip inside the vacuum chamber 200 may generate high temperatures during operation. Therefore, by applying a high emissivity coating to the inner wall of the vacuum chamber 200, the radiative heat transfer efficiency between the low-temperature vacuum chamber and the thin film can be increased. Furthermore, it reduces the reflection of infrared images from the inner wall of the chamber, minimizing external interference and preventing internal wall radiation caused by high internal temperatures.

[0177] In some alternative implementations, the optical frequency conversion chip further includes:

[0178] Heat sink 70 is located on the second surface of silicon substrate 10; heat sink 70 is used to dissipate heat from silicon substrate 10; optical frequency conversion chip is vertically arranged in vacuum chamber, and heat sink and pixel unit are located on the left and right sides of silicon substrate respectively;

[0179] The heat sink 70 is equipped with liquid cooling pipes;

[0180] The heat sink 70 has a coolant inlet 81 and a coolant outlet 82 on the side facing away from the silicon substrate 10;

[0181] The coolant inlet 81 is located at the bottom of the liquid cooling pipe;

[0182] Coolant outlet 82 is located at the top of the liquid cooling pipe;

[0183] The chamber wall of the vacuum chamber 200 located on the opposite side of the dual-band light transmission window 300 is suitable for installing a heat sink 70; the side wall is provided with a first coolant opening and a second coolant opening, the first coolant opening is connected to the coolant inlet 81, and the second coolant opening is connected to the coolant outlet 82.

[0184] To ensure the low temperature of the silicon substrate, this embodiment designs a copper heat sink 70 to conduct heat to the silicon substrate. At the same time, the inner wall of the vacuum chamber is provided with a first coolant opening and a second coolant opening, which are used to set the coolant inlet 81 and the coolant inlet outlet 82, so that the coolant can be used as an exchange medium to remove the heat of the silicon substrate from the vacuum chamber 200.

[0185] In some alternative implementations, the angle between the interface 401 and the dual-band light-transmitting window 300 is 45°, which allows visible light to be better reflected into the dual-band light-transmitting window 300 and into the radiation-absorbing layer 30 of the pixel unit 100.

[0186] In some alternative implementations, a high-power light source is used as the heating source for the visible light image.

[0187] Because the optical frequency conversion chip has excellent heat dissipation performance, a high-power light source is used as the heating source for the visible light image. Traditional conversion chips typically use LCoS projectors based on LED light sources. In some embodiments, the reflective optical frequency conversion system provided in this embodiment uses DMD projection technology based on a high-power visible light laser.

[0188] In some embodiments, since the optical frequency conversion chip itself achieves optical frequency conversion based on the heat absorption effect, the incident light is not strictly required to be visible light. In some embodiments, when the absorbing radiation layer 30 can absorb short-wave infrared light (0.9μm~2.5μm), and the material of the absorbing radiation layer 30, the metallic black thin film, is a broadband absorbing material for both visible and short-wave infrared light, then a short-wave laser is used as the light source for the visible light pattern. At the same time, the transmission film and the reflection film of the mirror in the dual-band window selection of the vacuum chamber 200 can be adjusted accordingly to accommodate the 0.9μm~2.5μm band design.

[0189] In the description of this specification, the references to terms such as "this embodiment," "an embodiment," "some embodiments," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, those skilled in the art can combine and integrate the different embodiments or examples described in this specification and the features of different embodiments or examples without contradiction. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of the present invention, "a plurality of" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0190] The above description does not provide detailed explanations of the technical aspects of each layer's patterning, etching, etc. However, those skilled in the art should understand that various technical means can be used to form layers and regions of the desired shape. Furthermore, to form the same structure, those skilled in the art can also design methods that are not entirely identical to those described above. Additionally, although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination.

[0191] The above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described above, and various obvious changes, readjustments, combinations, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of protection of the present invention is determined by the scope of the appended claims.

Claims

1. An optical frequency conversion chip, characterized by, The chip comprises: a silicon substrate comprising a first surface and a second surface; a plurality of pixel units arranged in an array on the first surface of the silicon substrate; each pixel unit comprises a support structure and a radiation absorption layer; the radiation absorption layer is located on the side of the support structure away from the silicon substrate; the support structure comprises a contact layer and two support legs; the radiation absorption layer is located on the side surface of the contact layer away from the silicon substrate, the projection of the contact layer on the silicon substrate completely covers the projection of the radiation absorption layer on the silicon substrate, and there is a spacing between the contact layer and the silicon substrate; the contact layer is connected with the support legs, the support legs are located on the first surface of the silicon substrate and on the side of the contact layer opposite the top corner; the top view of the pixel unit is S-shaped, comprising a central region and edge regions located on the opposite sides of the central region; the edge region is spaced from the side of the adjacent central region, and the edge region is connected with one end of the side of the adjacent central region through a transition region; one end of each edge region is connected with the transition region, and the other end is connected with one support leg; the chip further comprises: a heat sink located on the second surface of the silicon substrate; the heat sink is used for dissipating heat from the silicon substrate; the heat sink is internally provided with a liquid cooling pipe; the heat sink is provided with a cooling liquid inlet and a cooling liquid outlet on the side away from the silicon substrate; the cooling liquid inlet and the cooling liquid outlet are respectively located at two ends of the liquid cooling pipe.

2. The chip according to claim 1, wherein: the contact layer is located in the central region, the edge region and the transition region; the projection of the contact layer on the silicon substrate is S-shaped; the radiation absorption layer is located in at least the central region.

3. The chip according to claim 2, wherein: the radiation absorption layer is located only in the central region; the projection of the radiation absorption layer on the silicon substrate is rectangular.

4. The chip according to claim 2, wherein: the radiation absorption layer is located in the central region, the edge region and the transition region; the projection of the radiation absorption layer on the silicon substrate is S-shaped.

5. The chip according to claim 1, wherein: the projection of the support leg on the silicon substrate does not overlap with the projection of the radiation absorption layer on the silicon substrate.

6. The chip according to claim 1, wherein: any two adjacent pixel units do not contact each other.

7. The chip according to claim 1, wherein: the support leg is a columnar support structure, which extends vertically from the first surface of the silicon substrate to connect the side of the contact layer.

8. The chip according to claim 1, wherein: each pixel unit further comprises: an adhesive layer located between the radiation absorption layer and the contact layer, used for bonding the radiation absorption layer and the contact layer.

9. The chip according to claim 1, wherein: The material of the support structure is polymer; the thermal conductivity of the support structure is 0.15 W / (m•K)~0.2 W / (m•K); The radiation absorption layer is a metal black film.

10. The optical frequency conversion chip of claim 9, wherein, The material of the support structure is polyimide; The radiation absorption layer is an aluminum black film, a gold black film or a tungsten black film.

11. The optical frequency conversion chip of claim 9, wherein, The width of the pixel unit is 15 μm~100 μm; The thickness of the radiation absorption layer is 0.1 μm~1 μm; The maximum width of the support leg is 1 μm~5 μm, and the height is 1 μm~5 μm; The width of the edge region is 1 μm~5 μm; The spacing between the edge region and the side edge of the adjacent central region is less than or equal to 3 μm; The thickness of the contact layer is 0.1 μm~1 μm.

12. A method for fabricating an optical frequency conversion chip, characterized in that, A method for preparing the optical frequency conversion chip of claim 1, comprising: providing a silicon substrate including opposite first and second surfaces; forming a plurality of arrayed support structures on the first surface of the silicon substrate; the support structure includes a contact layer and two support legs; there is a spacing between the contact layer and the silicon substrate; the contact layer is connected with the support leg; the support leg is located on the first surface of the silicon substrate and on the side of the opposite top corner of the contact layer; forming a radiation absorption layer on the side of each support structure away from the silicon substrate; the radiation absorption layer is located on the side surface of the contact layer away from the silicon substrate; the projection of the contact layer on the silicon substrate completely covers the projection of the radiation absorption layer on the silicon substrate; each support structure and the corresponding radiation absorption layer form a pixel unit, and a plurality of arrayed support structures form a plurality of arrayed pixel units; the top view shape of the pixel unit is S-shaped, including a central region and edge regions located on the opposite sides of the central region; the edge region is spaced from the side edge of the adjacent central region, and the edge region is connected with one end of the side edge of the adjacent central region through a transition region; one end of each edge region is connected with the transition region, and the other end is connected with one support leg.

13. The method for preparing the optical frequency conversion chip of claim 12, wherein, in the step of forming a plurality of arrayed support structures on the first surface of the silicon substrate, comprising: forming a plurality of arrayed sacrificial layers on the first surface of the silicon substrate; the shape of the sacrificial layer is the shape of the spacing; forming a support structure on the side of the sacrificial layer away from the silicon substrate; removing the sacrificial layer to form a spacing between the contact layer and the first surface of the silicon substrate.

14. The method for preparing the optical frequency conversion chip of claim 13, wherein, the step of forming a support structure on the side of the sacrificial layer away from the silicon substrate comprises: forming an initial support layer on the side surface of the sacrificial layer away from the silicon substrate; forming an initial adhesion layer on the side surface of the initial support layer away from the silicon substrate; The initial adhesion layer and the initial support layer are subjected to a patterning process to form an adhesion layer and a support structure, respectively; The step of forming the radiation-absorbing layer comprises: forming a radiation-absorbing layer on the surface of the adhesion layer opposite to the contact layer.

15. The method of claim 14, wherein the step of forming the radiation-absorbing layer on the surface of the adhesion layer opposite to the contact layer comprises: forming the radiation-absorbing layer by using a resistance evaporation coating process; in the resistance evaporation coating process, the metal is heated in a protective gas environment, and the working gas pressure and evaporation rate are controlled to evaporate the radiation-absorbing layer on the surface of the adhesion layer opposite to the contact layer; the material of the radiation-absorbing layer is an aluminum black film, a gold black film, or a tungsten black film; and the metal corresponds to aluminum, gold, or tungsten; the protective gas is helium, nitrogen, or argon.

16. The method of claim 13, wherein the material of the sacrificial layer is silicon dioxide; and the step of removing the sacrificial layer comprises: removing the sacrificial layer by using a hydrofluoric acid buffer for multiple times of wet etching, to form a spacing space between the contact layer and the first surface of the silicon substrate, so that the support structure becomes a suspended structure. The reflective optical frequency conversion system comprises: a vacuum chamber in which the optical frequency conversion chip is located; one side of the vacuum chamber is provided with a double-band light-transmitting window, and the side of the radiation-absorbing layer of the optical frequency conversion chip is arranged opposite to the double-band light-transmitting window; the inner wall of the vacuum chamber is provided with a coating layer, and the infrared emissivity of the coating layer is greater than 0.8; the outer side of the double-band light-transmitting window is provided with a cemented prism; the cemented prism comprises two triangular prisms which are cemented together; the interface surface of the two triangular prisms is coated with a visible light reflecting and infrared transmitting thin film; and the included angle between the interface and the double-band light-transmitting window is 45°; 17. A reflective optical frequency conversion system, characterized by, the cemented prism is adapted to reflect the visible light image emitted by a visible light projecting device to the surface of the optical frequency conversion chip in the double-band light-transmitting window through the visible light reflecting and infrared transmitting thin film; the optical frequency conversion chip is adapted to convert the visible light image into an infrared image and emit the infrared image from the double-band light-transmitting window; the cemented prism is also adapted to transmit the infrared image emitted by the optical frequency conversion chip through the double-band light-transmitting window through the visible light reflecting and infrared transmitting thin film.

18. The reflective optical frequency conversion system of claim 17, wherein the optical frequency conversion chip further comprises: a heat sink located on the second surface of the silicon substrate; the heat sink is used for dissipating heat of the silicon substrate; and the optical frequency conversion chip is vertically arranged in the vacuum chamber, and the heat sink and the pixel unit are respectively located on the left and right sides of the silicon substrate; the heat sink is internally provided with a liquid cooling pipeline; the heat sink is provided with a cooling liquid inlet and a cooling liquid outlet on the side opposite to the silicon substrate; the cooling liquid inlet is located at the bottom end of the liquid cooling pipeline; the cooling liquid outlet is located at the top end of the liquid cooling pipeline. ​ ​ ​ ​ ​ The vacuum chamber is located on the side of the double-waveband light-transmitting window, and a side wall of the chamber is suitable for arranging the heat sink; the side wall is provided with a first cooling liquid opening and a second cooling liquid opening, the first cooling liquid opening is in communication with the cooling liquid inlet, and the second cooling liquid opening is in communication with the cooling liquid outlet.

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