Universal control box and method based on programmable control logic library

Abstract

The invention discloses a universal control box and method based on a programmable control logic library, and the method is characterized in that the method comprises the steps: capturing an operation feature signal of controlled equipment in real time through a signal collection module, and extracting an equipment feature vector to construct an equipment digital fingerprint; performing matching degree calculation on the feature vector and a control module of a pre-stored logic library, selecting a target logic control module, and generating an expected control parameter in a virtual sandbox; driving equipment to run through the target module, acquiring running data in real time, and comparing the running data with expected parameters to generate a deviation report; aggregating historical data based on the deviation report, and performing parameter increment optimization on the target module to generate a versioned patch; fusing the patch and the equipment full-dimension log to construct a digital twinborn body, predicting the health state of the equipment based on twinborn data, and outputting a logic library iteration instruction; and flexible control is driven by a data closed loop, so that the problems of customized cables and non-standard mechanical trepanning caused by the difference of controlled equipment of the industrial control box are solved, and one box is universal.

Description

Technical Field

[0001] The present invention relates to the field of control technology, and in particular to a universal control box and method based on a programmable control logic library. Background Art

[0002] Industrial control boxes are widely used in building automation, fire protection systems, sewage pumping stations, and other scenarios. They must accommodate a diverse range of controlled equipment, including motors and pumps. These devices differ significantly: fire pumps, for example, require star-delta step-down starting, sewage pumps require level control, and variable-frequency fans require speed regulation logic. A single production line often requires the parallel production of dozens of customized control boxes to accommodate non-standard requirements, including voltage specifications (24V / 380V), signal types (analog / digital), and communication protocols. This leads to a highly fragmented production and operations system.

[0003] Traditional control boxes employ hardware-defined control logic: circuit boards, custom cable connectors, and non-standard enclosure cutouts are designed specifically for each controlled device. For example, adapting to a dual-speed motor requires adding contactors and creating dedicated cable holes; switching to a variable-frequency motor requires reconfiguring the enclosure and rerouting signal cables. This model tightly couples the physical interface with the device, rendering the control box a disposable product. Its core flaw lies in the inability to reuse hardware interfaces through software configuration. Any device change triggers mechanical and electrical modifications, increasing material costs and extending maintenance cycles.

[0004] In view of this, it is necessary to improve the control logic defined in the control box in the existing technology to solve the technical problems of customized cables and non-standard openings. Summary of the Invention

[0005] The purpose of the present invention is to provide a universal control box and method based on a programmable control logic library to solve the above technical problems.

[0006] To achieve this object, the present invention adopts the following technical solutions: A universal control method based on a programmable control logic library comprises the following steps: S1, acquires the operating characteristic signals of the controlled equipment in real time through the signal acquisition module, extracts the equipment feature vector and constructs the equipment digital fingerprint; S2, calculating a matching degree between the device feature vector and multiple logic control modules in a pre-stored logic library, selecting a target logic control module based on the matching result, and generating expected control parameters in a virtual sandbox; S3, driving the controlled device to operate through the target logic control module, collecting device operation data in real time, and comparing the actual operation data with the expected control parameters to generate a deviation report; S4, aggregating historical operating data according to the deviation report, performing parameter incremental optimization on the target logic control module, and generating a versioned logic module patch; S5, integrates the versioned logic module patch and the full-dimensional operation log of the device to build a digital twin, predicts the health status of the device based on the twin data and outputs the logic library iteration instructions.

[0007] Optionally, the step of acquiring the operating characteristic signal of the controlled device in real time through the signal acquisition module, extracting the device characteristic vector and constructing the device digital fingerprint specifically includes the following steps: S11, synchronously acquiring the voltage waveform, current waveform, and communication message of the controlled device under rated working conditions through a multi-source signal acquisition module to generate an original signal sequence; S12, performing a time-frequency domain joint analysis on the original signal sequence to extract steady-state operating point parameters, transient response characteristics, and protocol handshake characteristics to form an initial feature vector; S13, normalizing the initial feature vector based on the device model library, calculating a dynamic tolerance threshold in combination with working condition environment parameters, and generating a standard feature vector; S14, binding the standard feature vector to the physical identification code of the device and encapsulating them into a structured device digital fingerprint, wherein the device digital fingerprint includes a static parameter set, a dynamic response model, and a tolerance matrix.

[0008] Optionally, a matching degree calculation is performed between the device feature vector and multiple logic control modules in a pre-stored logic library, a target logic control module is selected based on the matching result, and expected control parameters are generated in a virtual sandbox, specifically including the following steps: S21, parsing the static parameter set, dynamic response model and tolerance matrix in the device digital fingerprint to generate a device feature vector; S22, screening candidate logic control module sets matching the device type labels from the pre-stored logic library, and loading input constraints and protocol rules of each module; S23 , calculating the protocol compatibility coefficient, timing fit, and power consumption adaptation index between the device feature vector and each candidate logic control module to generate a primary matching matrix.

[0009] Optionally, the protocol compatibility coefficient, timing compatibility, and power consumption adaptation index of the device feature vector and each candidate logic control module are calculated to generate a primary matching matrix, which may then include: S24, dynamically optimizing the weight of the primary matching matrix based on the equipment operating environment parameters, generating a weighted matching score, and ranking the scores; S25, selecting the candidate logic control module with the highest weighted matching score as the target logic control module, injecting the device dynamic response model into the virtual sandbox to perform multimodal simulation; S26 , generating an expected control parameter set according to the simulation results, wherein the expected control parameter set includes a driving timing, a signal threshold range, and a performance score.

[0010] Optionally, the target logic control module is used to drive the controlled device to operate, collect device operation data in real time, and compare the actual operation data with the expected control parameters to generate a deviation report, which specifically includes the following steps: S31, issuing a driving instruction to the controlled device through the target logic control module, and synchronously starting the multi-channel data acquisition unit; S32, real-time capture of equipment operation data streams, including electrical signals, mechanical vibrations, and protocol interaction messages, and dynamic timing calibration; S33, comparing the calibrated operating data stream with the expected control parameter set by time axis slices to identify drive timing deviations, signal overrun events, and protocol exception codes; S34, aggregate the slice comparison results to generate a structured deviation report, marking the deviation type, duration and root cause probability assessment.

[0011] Optionally, aggregating historical operating data according to the deviation report, performing incremental parameter optimization on the target logic control module, and generating a versioned logic module patch specifically includes the following steps: S41, analyzing the deviation type, duration, and root cause probability assessment in the deviation report, and extracting a key optimization parameter identification set; S42, retrieve the operating data segments of the same model equipment under similar working conditions from the historical operation database, build an optimized sample pool and perform spatiotemporal alignment; S43, training a multi-objective optimization model based on the optimized sample pool to solve the driving timing correction amount, signal threshold tolerance and gain coefficient adjustment amount; S44, injecting the solution result into the running copy of the target logic control module, performing Monte Carlo stability testing and generating a performance improvement score; Optionally, the method is characterized in that the step of injecting the solution result into the running copy of the target logic control module, performing a Monte Carlo stability test and generating a performance improvement score further comprises: S45, when the performance improvement score is ≥ the preset threshold, the package correction parameters are converted into logical patch units, and a version identifier and applicable working condition constraints are attached; S46 , differentially encode the logic patch unit and the baseline module to generate a lightweight versioned logic module patch.

[0012] Optionally, the versioned logic module patch and the full-dimensional operation log of the device are integrated to build a digital twin, predict the device health status based on the twin data, and output the logic library iteration instructions, which specifically includes the following steps: S51, loading the versioned logic module patch and the full-dimensional operation log of the device, integrating physical parameters, control logic version, and maintenance events according to the timeline, and building a dynamic digital twin; S52, injecting a set of operating condition disturbance factors into the digital twin, running a control efficiency attenuation model and a mechanical wear model, and generating multi-level health indicators; S53, predicting the evolution trajectory of the health indicator based on the long short-term memory network, and calculating the remaining effective life and the control logic degradation risk score; S54, when the control logic degradation risk score exceeds a threshold, output a logic library iteration instruction set, including a module elimination list, a parameter reset path, and an emergency maintenance alarm code.

[0013] The present invention also provides a universal control box based on a programmable control logic library, which uses the universal control method based on the programmable control logic library as described above to achieve control. The universal control box specifically includes a box assembly, the box assembly is provided with a standardized mounting hole assembly, the box assembly has a built-in control center, and the control center is provided with multiple logic control modules; The mounting hole assembly is provided with a connecting wire for electrically connecting to the controlled device, and one end of the connecting wire is connected to the signal acquisition module.

[0014] Compared with the existing technology, the present invention has the following beneficial effects: the operation characteristic signal of the controlled device is captured in real time through the signal acquisition module, and the device characteristic vector is extracted to construct the device digital fingerprint; the characteristic vector is matched with the control module of the pre-stored logic library, the target logic control module is selected and the expected control parameters are generated in the virtual sandbox; the device is driven to run through the target module, the operation data is collected in real time and compared with the expected parameters to generate a deviation report; based on the deviation report, historical data is aggregated, and the parameter increment of the target module is optimized to generate a versioned patch; the patch and the full-dimensional log of the device are integrated to build a digital twin, the health status of the device is predicted based on the twin data, and the logic library iteration instructions are output to form a "perception-decision-optimization-prediction" closed loop; this method drives flexible control with a data closed loop, and realizes cross-device rapid adaptation with zero hardware modification through software configurability, eliminates the problems of customized cables and non-standard mechanical openings in industrial control boxes due to differences in controlled equipment, migrates hardware adaptation to the software layer, and realizes one-box universality. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0016] The structures, proportions, sizes, etc. depicted in the drawings of this specification are only used to match the contents disclosed in the specification so as to facilitate understanding and reading by persons familiar with this technology. They are not intended to limit the conditions under which the present invention can be implemented and therefore have no substantive technical significance. Any structural modifications, changes in proportional relationships, or adjustments in size should still fall within the scope of the technical contents disclosed in the present invention without affecting the effects and objectives that can be achieved by the present invention.

[0017] Figure 1 Schematic diagram of the flow of the universal control method of the first embodiment; Figure 2 This is a schematic diagram of the box structure of the universal control box of the second embodiment; Figure 3 This is a schematic diagram of a specific control circuit of one of the logic control modules of the universal control box of the second embodiment. DETAILED DESCRIPTION

[0018] In order to make the purpose, features, and advantages of the present invention more obvious and easy to understand, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the embodiments described below are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0019] In the description of the present invention, it should be understood that the terms "upper," "lower," "top," "bottom," "inner," "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate the description of the present invention and simplify the description. They are not intended to indicate or imply that the devices or elements referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on the present invention. It should be noted that when a component is considered to be "connected" to another component, it may be directly connected to the other component or there may be a centrally located component.

[0020] The technical solution of the present invention will be further described below with reference to the accompanying drawings and through specific implementation methods.

[0021] Example 1: Combine Figure 1 and Figure 3 As shown, Figure 3 For a specific control circuit of a logic control module, an embodiment of the present invention provides a universal control method based on a programmable control logic library, comprising the following steps: S1, obtains the operating characteristic signals of the controlled equipment in real time through the signal acquisition module, extracts the equipment feature vector and constructs the equipment digital fingerprint.

[0022] The multi-source signal acquisition module acquires raw signals, such as voltage / current waveforms and communication messages, from the controlled device. Joint time-frequency domain analysis is performed on these signals to extract steady-state operating point parameters (such as current amplitude at rated voltage), transient response characteristics (such as waveform distortion rate during startup), and protocol handshake characteristics (such as the handshake timing of the communication protocol). These characteristics are then normalized using a device model library, and operating environment parameters (such as temperature and humidity) are incorporated to calculate dynamic tolerance thresholds (such as the allowable voltage fluctuation range). This ultimately generates a structured digital fingerprint consisting of a static parameter set, a dynamic response model, and a tolerance matrix. This digital fingerprint uniquely identifies the device and establishes a benchmark for compatibility between the device and the logic control module.

[0023] S2, calculate the matching degree between the device feature vector and multiple logic control modules in the pre-stored logic library, select the target logic control module based on the matching result, and generate the expected control parameters in the virtual sandbox.

[0024] Based on the feature vectors in the device's digital fingerprint, candidate logic control modules are screened from a pre-existing logic library for those that meet the requirements for protocol compatibility (e.g., Modbus or Profibus support), timing consistency (e.g., pulse frequency matching), and power adaptation index (e.g., maximum power threshold). After determining the optimal target module through dynamic weight optimization (e.g., reducing power consumption weight in high-temperature environments), the device's dynamic response model is injected into a virtual sandbox to simulate control effects under multimodal operating conditions (e.g., full load, no load, and sudden load changes). This generates expected control parameters, such as drive timing (e.g., phase delay for motor startup) and signal threshold ranges (e.g., trigger value for overcurrent protection). This process enables pre-verification of control logic by decoupling software and hardware, avoiding the trial-and-error costs of physical devices.

[0025] S3, drives the controlled equipment to operate through the target logic control module, collects equipment operation data in real time, compares the actual operation data with the expected control parameters to generate a deviation report.

[0026] After the target logic control module drives the device, it collects real-time data on the device's electrical signals (such as harmonic components), mechanical vibrations (such as bearing amplitude), and protocol interaction messages (such as communication retry counts). Dynamic timing calibration technology is used to eliminate errors caused by acquisition delays. Subsequently, actual operating data is compared with expected parameters on a time-sliced ​​basis to identify drive timing deviations (such as contactor closing lag), signal limit violations (such as transient current exceeding the limit), and protocol exception codes (such as CRC check failure). Deviation reports provide a structured annotation of fault type (such as insufficient transient response) and root cause probability, providing a quantitative basis for subsequent optimization.

[0027] S4, aggregates historical operation data based on the deviation report, performs incremental parameter optimization on the target logic control module, and generates versioned logic module patches.

[0028] Based on deviation reports, key parameters (such as the integral coefficient for PID control) are identified. Historical operating data is aggregated to construct an optimized sample pool (e.g., a dataset of the same pump model operating during rainy season). A multi-objective optimization model is then used to calculate parameter corrections (e.g., reducing start / stop delays by 10ms). The corrected logic modules are then subjected to Monte Carlo stability testing (e.g., randomly injecting voltage sag disturbances) in the running replica. After stability verification, a lightweight patch (a code snippet with only differential updates) is generated.

[0029] S5 integrates versioned logic module patches and full-dimensional device operation logs to build a digital twin, predicts the device health status based on the twin data, and outputs logic library iteration instructions.

[0030] By integrating logic patches with comprehensive device data (such as operation logs, maintenance records, and environmental parameters), a dynamic digital twin is constructed, reflecting the device's real-time status (e.g., bearing wear) and logic version compatibility (e.g., the performance improvement achieved by the patch). By injecting operating disturbance factors (e.g., simulating grid voltage fluctuations), the system runs control performance degradation models (e.g., logic parameter drift trends) and mechanical wear models (e.g., motor life prediction) to predict the device's remaining useful life and the risk of control logic degradation. When predicted indicators exceed thresholds, logic library iteration instructions (e.g., eliminating obsolete modules or resetting parameter baselines) are issued.

[0031] The working principle of the present invention is as follows: the operation characteristic signal of the controlled device is captured in real time through the signal acquisition module, and the device characteristic vector is extracted to construct the device digital fingerprint; the characteristic vector is matched with the control module of the pre-stored logic library, the target logic control module is selected and the expected control parameters are generated in the virtual sandbox; the device is driven to run through the target module, the operation data is collected in real time and compared with the expected parameters to generate a deviation report; based on the deviation report, historical data is aggregated, and the parameter increment of the target module is optimized to generate a versioned patch; the patch and the full-dimensional log of the device are integrated to build a digital twin, and the health status of the device is predicted based on the twin data and the logic library iteration instruction is output to form a "perception-decision-optimization-prediction" closed loop; this method drives flexible control with a data closed loop, and realizes cross-device rapid adaptation with zero hardware modification through software configurability, eliminates the problems of customized cables and non-standard mechanical openings in industrial control boxes due to differences in controlled equipment, migrates hardware adaptation to the software layer, and realizes one-box universality.

[0032] In this embodiment, it is specifically explained that step S1 specifically includes the following steps: S11, synchronously acquiring the voltage waveform, current waveform, and communication message of the controlled device under rated working conditions through a multi-source signal acquisition module to generate an original signal sequence; By integrating voltage / current sensors with a communication protocol parser, the system synchronously captures device operating signals under rated operating conditions. Voltage waveforms reflect power supply stability, current waveforms characterize load characteristics, and communication messages (such as Modbus register reads and writes) analyze device interaction protocols. Raw signal sequences are aligned with unified timestamps, forming a complete data foundation encompassing both electrical characteristics and communication behavior.

[0033] S12, performing a joint time-frequency domain analysis on the original signal sequence to extract steady-state operating point parameters, transient response characteristics, and protocol handshake characteristics to form an initial feature vector; The original signal is analyzed in the time domain (e.g., calculating the RMS value to extract steady-state parameters) and in the frequency domain (e.g., Fourier transform to identify harmonic components) to obtain steady-state operating point parameters (average current value at rated voltage), transient response characteristics (peak sudden change slope during startup), and protocol handshake characteristics (communication delay difference between master and slave devices). Multi-dimensional features are fused to form the initial feature vector, which characterizes the device's electrical behavior and protocol compatibility.

[0034] S13, normalizing the initial feature vector based on the equipment model library, calculating the dynamic tolerance threshold in combination with the working environment parameters, and generating a standard feature vector; Based on the parameter ranges of similar devices in the device model library (such as motor rated power levels), the initial eigenvectors are normalized (for example, current values ​​are converted to standard values). Environmental parameters (such as temperature and humidity) are introduced to dynamically compensate for the fluctuation range of the eigenvalues. Formulated tolerance thresholds are calculated (for example, allowable voltage deviation = base value + temperature coefficient × ΔT, where ΔT is the temperature change), generating standard eigenvectors adapted to the field environment.

[0035] S14: Bind the standard feature vector to the device's physical identification code and encapsulate it into a structured device digital fingerprint. The device digital fingerprint includes a static parameter set, a dynamic response model, and a tolerance matrix. Bind the standard feature vector to the device's physical identification code (such as a MAC address or QR code) and structure the digital fingerprint. The static parameter set records nameplate data (rated power / voltage), the dynamic response model describes the transfer function when the load changes suddenly, and the tolerance matrix defines the allowable dynamic deviation range of each feature parameter, forming the logical control basis for device adaptation.

[0036] In this embodiment, it is specifically explained that step S2 specifically includes the following steps: S21, parsing the static parameter set, dynamic response model and tolerance matrix in the device digital fingerprint to generate a device feature vector; The device's digital fingerprint is parsed to identify static parameters (such as rated voltage and power), dynamic response models (such as the start-stop step response transfer function), and tolerance matrices (allowable voltage fluctuation range) and convert them into numerical vectors of uniform dimensions. For example, the time-domain parameters (rise time and overshoot) and frequency-domain parameters (cutoff frequency) of the dynamic response model are quantized and combined with the static parameters to form a device feature vector, which serves as the input benchmark for logic module matching.

[0037] S22, screening candidate logic control module sets matching the device type labels from the pre-stored logic library, and loading input constraints and protocol rules of each module; Compatible logic control modules are retrieved from a pre-existing logic library based on device type tags (e.g., "variable frequency motor" or "sewage pump"). Input constraints (e.g., supported voltage range, maximum current threshold) and protocol rules for each module are loaded to ensure that the candidate modules meet the device's basic electrical and communication requirements.

[0038] S23 , calculating the protocol compatibility coefficient, timing fit, and power consumption adaptation index between the device feature vector and each candidate logic control module to generate a primary matching matrix.

[0039] Protocol compatibility coefficient: Calculates the matching degree between the device communication protocol (such as Profibus) and the candidate module protocol rules (total number of protocols / total number of protocols).

[0040] Timing fit: Calculates the percentage difference between the time constant of the device's dynamic response model (such as step response time T1) and the module's nominal response time T2.

[0041] Power Consumption Adaptation Index: This value evaluates the ratio of the device's peak power consumption (P_max) to the maximum power (P_module) supported by the module (i.e., P_max / P_module).

[0042] The three constitute the primary matching matrix, which reflects the software and hardware compatibility between the module and the device.

[0043] S24, dynamically optimizing the weight of the primary matching matrix based on the equipment operating environment parameters, generating a weighted matching score and ranking it; Adjust the matching weight according to the equipment working environment parameters. For example: High temperature environment: Improve power consumption adaptation and repeat core heat dissipation restrictions; High humidity environment: Increase the protocol compatibility weight to prevent communication interference.

[0044] The weighting formula is: Total score = w1 × protocol score + w2 × timing score + w3 × power consumption score, where w1 + w2 + w3 = 1 and the weights are dynamically assigned. Among them, w1 is the weight of the protocol compatibility coefficient (C_p); w2 is the weight of the timing fit (F_t); and w3 is the weight of the power adaptation index (A_p).

[0045] S25, selecting the candidate logic control module with the highest weighted matching score as the target logic control module, injecting the device dynamic response model into the virtual sandbox for multimodal simulation; Inject the device's dynamic response model (e.g., motor speed-torque curve) into the virtual sandbox and run the candidate module's control logic, simulating scenarios such as full load, no load, and sudden load changes. Use simulation results to verify whether the logic module can stably drive the device within tolerances and record key performance indicators (e.g., steady-state error and overshoot).

[0046] S26 , generating an expected control parameter set according to the simulation results, where the expected control parameter set includes a driving timing, a signal threshold range, and a performance score.

[0047] Generate configurable parameter sets based on simulation results: Drive timing: Optimize contact closure sequence based on response time (e.g., star-delta switching delay Δt); Signal threshold range: Set the protection threshold (e.g., overcurrent protection value I_threshold = 1.2×I_rated); Performance rating: The module adaptation performance level is calculated based on comprehensive stability (fluctuation standard deviation σ) and response speed (rise time t_r).

[0048] In this embodiment, it is specifically explained that step S3 specifically includes the following steps: S31, issuing a drive instruction to the controlled device through the target logic control module, and synchronously starting the multi-channel data acquisition unit; The target logic control module sends drive commands (such as starting a motor or adjusting frequency) to the controlled device, simultaneously triggering a multi-channel data acquisition unit. These acquisition units are deployed in the electrical circuit (current / voltage sensor), mechanical structure (vibration sensor), and communication bus (protocol analyzer) to ensure the time synchronization between command execution and data capture. For example, the motor start signal and vibration acquisition signal are aligned using a common clock source to prevent data drift.

[0049] S32, real-time capture of equipment operation data streams, including electrical signals, mechanical vibrations, and protocol interaction messages, and dynamic timing calibration; Capture multiple data streams from different sources (such as current waveforms, bearing vibration spectra, and Modbus communication messages) in real time and calibrate timestamp offsets between different sensors. Calibration methods include pre-set fixed delay compensation (such as a 10ms communication link delay) or dynamic adjustment based on a reference signal (such as aligning the phase zero point of the current waveform). The calibrated data streams are aligned along the time axis, forming comparable, temporally and spatially consistent datasets.

[0050] S33, comparing the calibrated operating data stream with the expected control parameter set by time axis slices to identify drive timing deviations, signal overrun events, and protocol exception codes; Slice the calibrated running data into fixed time windows (e.g. 100ms) and compare the expected parameters segment by segment: Drive timing deviation: Detects the difference between the actual contact closure time and the expected value (such as contactor delay Δt).

[0051] Signal Exceeding Limit Event: Determines whether the real-time current exceeds the threshold range (e.g. >110% rated current).

[0052] Protocol exception code: Counts error codes in communication messages (such as the number of CRC check failures). Identification results are marked as discrete events or continuous trends.

[0053] S34, aggregate the slice comparison results to generate a structured deviation report, marking the deviation type, duration and root cause probability assessment.

[0054] Comparison results for each time slice are integrated to generate a structured report categorized by type (electrical / mechanical / communication) and duration (transient / sustained). Correlation analysis is used to estimate the root cause probability. For example, when excessive motor vibration and current harmonic distortion occur simultaneously, the probability of flagging "mechanical eccentricity causing electrical anomaly" is 80%.

[0055] In this embodiment, it is specifically explained that step S4 specifically includes the following steps: S41: Analyze the deviation type, duration, and root cause probability assessment in the deviation report and extract the key optimization parameter identification set; Analyze the deviation type (such as timing delay, signal limit violation), duration (transient / continuous), and root cause probability assessment (such as the probability of current distortion caused by sudden mechanical load changes) in the deviation report to screen out the core parameters that need to be optimized. For example: Drive timing deviation occurs frequently → Optimization target is contact closing delay Δt; Protocol error rate > 10% → Communication protocol response gain K_p needs to be increased; The signal exceeds the limit for a long time → relax the voltage tolerance threshold ΔU.

[0056] S42, retrieve the operating data fragments of the same model equipment under similar working conditions from the historical operation database, build an optimized sample pool and perform spatiotemporal alignment; retrieve the operating data fragments of the same model equipment under similar working conditions (such as temperature 40°C, load 80%) from the historical database, and align key events (such as startup moment, load mutation point) along the timeline.

[0057] S43, training a multi-objective optimization model based on the optimized sample pool to solve the driving timing correction amount, signal threshold tolerance and gain coefficient adjustment amount; Establish an optimization objective function based on the sample pool: Goal 1: Minimize timing deviation Δt; Goal 2: Maximize protocol stability (reduce bit error rate); Goal 3: Reduce the probability of excessive power consumption.

[0058] The optimal solution set is solved through the Pareto Frontier to obtain the parameter correction amount (such as Δt=-5ms, ΔU=+2V, K_p=1.2).

[0059] S44, injecting the solution result into the running copy of the target logic control module, performing Monte Carlo stability testing and generating a performance improvement score; Inject the modified parameters into the module replicas to simulate random perturbations: Electrical disturbances: voltage sag (±15%), harmonic distortion (THD=8%); Mechanical disturbance: load step change (50%→110%); Protocol disturbance: message loss rate (1%~5%).

[0060] The parameter drift in the statistical test (such as the Δt fluctuation range of ±1ms) is calculated as the performance improvement score E = (deviation before optimization - deviation after optimization) / deviation before optimization.

[0061] S45: When the performance improvement score is ≥ the preset threshold, the correction parameters are packaged into a logical patch unit, with a version identifier and applicable working condition constraints attached. When the performance score E is ≥ the preset threshold (e.g., E ≥ 0.3), the correction parameters and metadata (e.g., applicable temperature range -10°C ~ 60°C, load rate ≤ 120%) are packaged into a logical patch unit, with a version identifier attached.

[0062] S46: Differentially encode the logic patch unit and the baseline module to generate a lightweight versioned logic module patch. Compare the parameter encoding differences between the baseline module and the patch unit, and only store the incremental differences (e.g., modifying the value of address 0xA1 from 0x12 to 0x15) to generate a lightweight patch file.

[0063] In this embodiment, it is specifically explained that step S5 specifically includes the following steps: S51 loads versioned logic module patches and full-dimensional device operation logs, integrates physical parameters, control logic versions, and maintenance events along the timeline, and builds a dynamic digital twin. This system integrates the device's versioned logic patches (including parameter revisions and applicable conditions), full-dimensional operation logs (e.g., current, vibration, and temperature), maintenance records (e.g., component replacement times), and historical control logic versions, aligning and correlating time series data along a unified timeline. By mapping physical parameters to logic versions, a dynamically updateable digital twin is constructed, reflecting the device's hardware and software status in real time (e.g., changes in motor vibration characteristics during the operation of logic patch V1.2).

[0064] S52, injecting the operating condition disturbance factor set into the digital twin, running the control effectiveness attenuation model and mechanical wear model, and generating multi-level health indicators; By injecting simulated disturbance factors (such as voltage fluctuations of ±15% and load step changes) into the digital twin, running control efficiency attenuation models (such as the impact of logic parameter drift on response speed) and mechanical wear models (such as the relationship between bearing vibration energy and life attenuation), we can generate multi-dimensional health indicators: Control efficiency: logic response delay, signal over-limit frequency; Machinery health: wear levels of key components, remaining life baseline.

[0065] S53, based on the long short-term memory network, predicts the evolution trajectory of health indicators and calculates the remaining useful life and control logic degradation risk score; Long Short-Term Memory (LSTM) networks are used to analyze the temporal evolution of historical health indicators to predict the remaining useful life of equipment (e.g., the remaining operating hours of a bearing) and the risk of control logic degradation (e.g., the probability of protocol compatibility degradation). Based on the deviation between the predicted results and actual data, a quantified logic degradation risk score (0-10) is assigned to assess the urgency of logic library iteration.

[0066] S54, when the control logic degradation risk score exceeds a threshold, output a logic library iteration instruction set, including a module elimination list, a parameter reset path, and an emergency maintenance alarm code.

[0067] When the logic degradation risk score exceeds the preset threshold (e.g., ≥7 points), the iterative instruction set is automatically triggered: Module elimination list: Identifies logic modules that have failed or whose performance has continuously degraded; Parameter reset path: fall back to the parameter configuration of the stable version logic; Emergency maintenance alarm: Generates fault handling priority based on root cause analysis (for example, a communication module abnormality has a higher priority than a mechanical alarm).

[0068] Example 2: Combine Figure 2 and Figure 3 As shown, the present invention also provides a universal control box based on a programmable control logic library, which uses the universal control method based on the programmable control logic library as in the first embodiment to achieve control. The universal control box specifically includes a box assembly 10, a standardized mounting hole assembly 20 is opened on the box assembly 10, and a control center is built in the box assembly 10. The control center is provided with multiple logic control modules 30; The mounting hole assembly 20 is provided with a connection line for electrically connecting to the controlled device, and one end of the connection line is connected to the signal acquisition module.

[0069] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that the technical solutions described in the above embodiments can still be modified, or some of the technical features thereof can be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A universal control method based on a programmable control logic library, characterized in that: The following steps are involved: S1, acquires the operating characteristic signals of the controlled equipment in real time through the signal acquisition module, extracts the equipment feature vector and constructs the equipment digital fingerprint; S2, calculating a matching degree between the device feature vector and multiple logic control modules in a pre-stored logic library, selecting a target logic control module based on the matching result, and generating expected control parameters in a virtual sandbox; S3, driving the controlled device to operate through the target logic control module, collecting device operation data in real time, and comparing the actual operation data with the expected control parameters to generate a deviation report; S4, aggregating historical operating data according to the deviation report, performing parameter incremental optimization on the target logic control module, and generating a versioned logic module patch; S5, integrates the versioned logic module patch and the full-dimensional operation log of the device to build a digital twin, predicts the health status of the device based on the twin data and outputs the logic library iteration instructions.

2. The universal control method based on programmable control logic library according to claim 1, characterized in that: The method of acquiring the operating characteristic signal of the controlled device in real time through the signal acquisition module, extracting the device characteristic vector and constructing the device digital fingerprint specifically includes the following steps: S11, synchronously acquiring the voltage waveform, current waveform, and communication message of the controlled device under rated working conditions through a multi-source signal acquisition module to generate an original signal sequence; S12, performing a time-frequency domain joint analysis on the original signal sequence to extract steady-state operating point parameters, transient response characteristics, and protocol handshake characteristics to form an initial feature vector; S13, normalizing the initial feature vector based on the device model library, calculating a dynamic tolerance threshold in combination with working condition environment parameters, and generating a standard feature vector; S14, binding the standard feature vector to the physical identification code of the device and encapsulating them into a structured device digital fingerprint, wherein the device digital fingerprint includes a static parameter set, a dynamic response model, and a tolerance matrix.

3. The universal control method based on programmable control logic library according to claim 1, characterized in that: The device feature vector is matched with multiple logic control modules in a pre-stored logic library, a target logic control module is selected based on the matching result, and expected control parameters are generated in a virtual sandbox, specifically including the following steps: S21, parsing the static parameter set, dynamic response model and tolerance matrix in the device digital fingerprint to generate a device feature vector; S22, screening candidate logic control module sets matching the device type labels from the pre-stored logic library, and loading input constraints and protocol rules of each module; S23 , calculating the protocol compatibility coefficient, timing fit, and power consumption adaptation index between the device feature vector and each candidate logic control module to generate a primary matching matrix.

4. The universal control method based on programmable control logic library according to claim 3, characterized in that: Calculating the protocol compatibility coefficient, timing compatibility, and power consumption adaptation index of the device feature vector and each candidate logic control module to generate a primary matching matrix, which then includes: S24, dynamically optimizing the weight of the primary matching matrix based on the equipment operating environment parameters, generating a weighted matching score, and ranking the scores; S25, selecting the candidate logic control module with the highest weighted matching score as the target logic control module, injecting the device dynamic response model into the virtual sandbox for multimodal simulation; S26 , generating an expected control parameter set according to the simulation results, wherein the expected control parameter set includes a driving timing, a signal threshold range, and a performance score.

5. The universal control method based on programmable control logic library according to claim 1, characterized in that: The target logic control module drives the controlled device to operate, collects device operation data in real time, and compares the actual operation data with the expected control parameters to generate a deviation report, specifically including the following steps: S31, issuing a driving instruction to the controlled device through the target logic control module, and synchronously starting the multi-channel data acquisition unit; S32, real-time capture of equipment operation data streams, including electrical signals, mechanical vibrations, and protocol interaction messages, and dynamic timing calibration; S33, comparing the calibrated operating data stream with the expected control parameter set by time axis slices to identify drive timing deviations, signal overrun events, and protocol exception codes; S34, aggregate the slice comparison results to generate a structured deviation report, marking the deviation type, duration and root cause probability assessment.

6. The universal control method based on programmable control logic library according to claim 1, characterized in that: Aggregating historical operating data based on the deviation report, performing incremental parameter optimization on the target logic control module, and generating a versioned logic module patch specifically include the following steps: S41, analyzing the deviation type, duration, and root cause probability assessment in the deviation report, and extracting a key optimization parameter identification set; S42, retrieve the operating data segments of the same model equipment under similar working conditions from the historical operation database, build an optimized sample pool and perform spatiotemporal alignment; S43, training a multi-objective optimization model based on the optimized sample pool to solve the driving timing correction amount, signal threshold tolerance and gain coefficient adjustment amount; S44, injecting the solution result into the running copy of the target logic control module, performing Monte Carlo stability test and generating performance improvement score.

7. The universal control method based on programmable control logic library according to claim 6, characterized in that: The method injects the solution results into the running copy of the target logic control module, performs Monte Carlo stability testing and generates a performance improvement score, and then includes: S45, when the performance improvement score is ≥ the preset threshold, the package correction parameters are converted into logical patch units, and a version identifier and applicable working condition constraints are attached; S46 , differentially encode the logic patch unit and the baseline module to generate a lightweight versioned logic module patch.

8. The universal control method based on programmable control logic library according to claim 1, characterized in that: The digital twin is constructed by integrating the versioned logic module patch and the full-dimensional operation log of the device. The device health status is predicted based on the twin data and the logic library iteration instructions are output. The specific steps include: S51, loading the versioned logic module patch and the full-dimensional operation log of the device, integrating physical parameters, control logic version, and maintenance events according to the timeline, and building a dynamic digital twin; S52, injecting a set of operating condition disturbance factors into the digital twin, running a control efficiency attenuation model and a mechanical wear model, and generating multi-level health indicators; S53, predicting the evolution trajectory of the health indicator based on the long short-term memory network, and calculating the remaining effective life and the control logic degradation risk score; S54, when the control logic degradation risk score exceeds a threshold, output a logic library iteration instruction set, including a module elimination list, a parameter reset path, and an emergency maintenance alarm code.

9. A universal control box based on a programmable control logic library, characterized in that: The control is implemented by adopting the universal control method based on the programmable control logic library according to any one of claims 1 to 8, wherein the universal control box specifically includes a box assembly, the box assembly is provided with a standardized mounting hole assembly, the box assembly has a built-in control center, and the control center is provided with multiple logic control modules; The mounting hole assembly is provided with a connecting wire for electrically connecting to the controlled device, and one end of the connecting wire is connected to the signal acquisition module.

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