Method for manufacturing semiconductor device

Abstract

This method for manufacturing a semiconductor device is provided with: a preparation step for preparing a substrate (2) on which a first semiconductor chip (3) is mounted, and an adhesive layer-equipped semiconductor chip (31) in which an adhesive layer (24) is laminated on a second semiconductor chip (4); and a forming step in which the semiconductor chip (31) with the adhesive layer is thermocompression bonded to the substrate (2) such that the adhesive layer (24) faces the substrate (2), an embedded portion (5) in which the first semiconductor chip (3) is embedded is formed between the substrate (2) and the second semiconductor chip (4), and in the forming step, a contact region (R) of the adhesive layer (24) that is in contact with the first semiconductor chip (3) is locally heated prior to the compression bonding.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a semiconductor device. Background Art

[0002] In recent years, stacked MCP (Multi Chip Package) has become popular, which realizes high capacity by stacking semiconductor chips in multiple layers. As an example of stacked MCP, a chip-embedded semiconductor package can be cited. The structure of a semiconductor package in which a semiconductor chip is embedded through an adhesive film is called FOD (Film Over Die). As an example of a semiconductor package using FOD, there is a semiconductor package with a structure in which a controller chip arranged on one side of a substrate is embedded between a substrate and a memory chip using an embedded portion of an adhesive film (for example, refer to Japanese Patent Gazette No. 2014-175459).

[0003] In the manufacture of semiconductor packages with a FOD structure, the semiconductor chip must be fully embedded in the embedded portion using an adhesive film (embedding performance). Regarding embedding performance, it is important to simultaneously suppress voids. Voids are the formation of gaps within the embedded portion between the substrate and the memory chip. The formation of voids in the embedded portion is believed to affect the reliability of the semiconductor package. Summary of the Invention

[0004] The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a method for manufacturing a semiconductor device capable of suppressing voids in an embedded portion.

[0005] The gist of the present invention is as follows.

[0006] [1] A method for manufacturing a semiconductor device, comprising: a preparation step of preparing a substrate on which a first semiconductor chip is mounted and a semiconductor chip with an adhesive layer stacked on a second semiconductor chip; and a forming step of hot-pressing the semiconductor chip with the adhesive layer to the substrate with the adhesive layer facing the substrate, thereby forming an embedded portion for embedding the first semiconductor chip between the substrate and the second semiconductor chip, and in the forming step, locally heating a contact area of ​​the adhesive layer that will contact the first semiconductor chip before pressing.

[0007] In this semiconductor device manufacturing method, during the embedded portion forming step, the adhesive layer's contact area with the first semiconductor chip on the substrate is locally heated before crimping. This local heating of the adhesive layer before crimping allows deformation near the contact area due to flow and load during subsequent crimping. Consequently, this semiconductor device manufacturing method eliminates residual air around the first semiconductor chip and reduces voids in the embedded portion.

[0008] [2] The method for manufacturing a semiconductor device according to [1], wherein, in the forming step, the first semiconductor chip is heated together with the substrate, the contact region is brought into contact with the first semiconductor chip, and after a predetermined period of time, the semiconductor chip with the adhesive layer is press-bonded to the substrate. In this case, the amount of heat input to the adhesive layer can be controlled by the heating temperature of the first semiconductor chip and the contact time between the first semiconductor chip and the contact region. Therefore, local heating of the adhesive layer can be easily performed.

[0009] [3] The method for manufacturing a semiconductor device according to [1], wherein, in the forming step, after the contact area is heated by irradiation with laser light, the semiconductor chip with the adhesive layer is pressure-bonded to the substrate. In this case, the amount of heat input to the adhesive layer and the heated area can be controlled by the irradiation conditions of the laser light. Therefore, local heating of the adhesive layer can be easily performed. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 It is a schematic cross-sectional view showing an example of a semiconductor package.

[0011] Figure 2 It is a schematic plan view showing an example of a laminated film.

[0012] Figure 3 It is along Figure 2 Cross-sectional view taken along line III-III.

[0013] Figure 4 In the figure, (a) is a schematic cross-sectional view showing the attaching step, (b) is a schematic cross-sectional view showing the cutting step, and (c) is a schematic cross-sectional view showing the irradiation step.

[0014] Figure 5 In the figure, (a) is a schematic cross-sectional view showing a pickup process, and (b) is a schematic cross-sectional view showing a die attaching process.

[0015] Figure 6 It is a schematic cross-sectional view showing a gap.

[0016] Figure 7In the figures, (a) and (b) are schematic cross-sectional views showing how voids are generated in the conventional method.

[0017] Figure 8 In the drawings, (a) and (b) are schematic cross-sectional views illustrating a method for manufacturing a semiconductor device according to this embodiment.

[0018] Figure 9 In the drawings, (a) and (b) are schematic cross-sectional views illustrating a method for manufacturing a semiconductor device according to a modification example. DETAILED DESCRIPTION

[0019] Hereinafter, preferred embodiments of a method for manufacturing a semiconductor device according to one aspect of the present invention will be described in detail with reference to the accompanying drawings.

[0020] In the following description, unless otherwise specified, the components (including steps, etc.) are not essential. The sizes of the components in the figures are conceptual, and the relative sizes of the components are not limited to the relationships shown in the figures. The illustrative numerical values ​​and their ranges do not limit the present invention.

[0021] In the following description, numerical ranges indicated by "to" indicate a range including the numerical values ​​before and after "to" as the minimum and maximum values, respectively. Furthermore, within numerical ranges described in stages, the upper or lower limit of one numerical range may be replaced by the upper or lower limit of another numerical range described in stages. The upper or lower limit of a numerical range may be replaced by the value shown in the Examples.

[0022] First, a semiconductor device manufactured using the method for manufacturing a semiconductor device according to this embodiment will be exemplified.

[0023] Figure 1 1 is a schematic cross-sectional view showing an example of a semiconductor package. Here, as the semiconductor package (semiconductor device) 1, a semiconductor device such as a NAND type flash memory is exemplified. Figure 1 As shown, semiconductor package 1 includes substrate 2, first semiconductor chip (semiconductor chip) 3, second semiconductor chip (semiconductor chip) 4, embedded portion 5, and sealing portion 6. Substrate 2 is, for example, an organic substrate. Alternatively, it may be a metal substrate such as a lead frame. Predetermined circuit patterns 7 and 8 are formed on one side of substrate 2.

[0024] The first semiconductor chip 3 is, for example, a controller chip. The first semiconductor chip 3 is electrically connected to the circuit pattern 7 via an adhesive layer 9. The first semiconductor chip 3 is electrically connected to the circuit pattern 8 via a first wire 10. The second semiconductor chip 4 is, for example, a memory chip. The second semiconductor chip 4 is arranged on one side of the substrate 2 with a constant distance from the first semiconductor chip 3. The second semiconductor chip 4 is electrically connected to the circuit pattern 8 via a second wire 11.

[0025] An embedded portion 5 formed from an adhesive layer 24 of a laminate film 21 (described later) is provided between the second semiconductor chip 4 and the substrate 2. The first semiconductor chip 3, the circuit pattern 7, and the first conductive wire 10 are embedded between the second semiconductor chip 4 and the substrate 2 via the embedded portion 5. The first semiconductor chip 3, the second semiconductor chip 4, the first conductive wire 10, and the second conductive wire 11 are sealed to one side of the substrate 2 via a sealing portion 6 that extends beyond the embedded portion 5.

[0026] Next, examples of laminated films used in the above-mentioned method for manufacturing a semiconductor device are given.

[0027] Figure 2 : is a schematic top view showing an example of a laminated film. Figure 3 It is along Figure 2 Cross-sectional view taken along line III-III. Figure 2 and Figure 3 The laminate film 21 shown is a long film used for securing semiconductor wafers during the dicing step and forming the embedded portion 5 during the die attach step in the manufacturing process of the semiconductor package 1. Generally, the laminate film 21 is stored in a roll and is removed from the roll as needed for use.

[0028] like Figure 2 and Figure 3 As shown, the laminate film 21 includes an elongated base film 22 and label portions 23 provided on one side of the base film 22 at predetermined intervals along the extending direction of the base film 22. The label portion 23 is composed of an adhesive layer 24 overlapping the base film 22, a pressure-sensitive adhesive layer 25 overlapping the adhesive layer 24, and a base layer 27 overlapping the pressure-sensitive adhesive layer 25. The label portion 23 has, for example, a circular shape when viewed from above.

[0029] The base film 22 is, for example, a resin film. Examples of the resin material constituting the base film 22 include polytetrafluoroethylene, polyethylene, polypropylene, polymethylpentene, polyethylene terephthalate, and polyimide. The thickness of the base film 22 can be, for example, 10 to 200 μm, or 30 to 170 μm. The surface of the base film 22 can be subjected to a mold release treatment using silicone or the like.

[0030] The adhesive layer 24 is, for example, a film-like portion known as a die attach film. As a constituent material of the adhesive layer 24, for example, an electrically insulating resin can be cited. As the resin constituting the adhesive layer 24, a thermosetting resin that is thermally cured can be used. The adhesive layer 24 can be composed of a single or multiple thermosetting resins, or a combination of a thermosetting resin and a thermoplastic resin. Alternatively, the adhesive layer 24 can be composed of a resin that is first melted by a first heat and then cured by a second heat. The first heat can be 70°C to 150°C, and the second heat can be 100°C to 200°C.

[0031] Examples of thermosetting resins include epoxy resins, bismaleimide resins, triazine resins, phenolic resins, unsaturated polyester resins, melamine resins, urea-formaldehyde resins, polyisocyanate resins, furan resins, resorcinol resins, benzoguanamine resins, diallyl phthalate resins, silicone resins, siloxane-modified epoxy resins, cyanoacrylate resins, xylene resins, and acrylate resins. Examples of thermoplastic resins include polyimide resins, polyamide resins, polyurethane resins, polyvinyl butyral resins, and siloxane-modified polyamide-imide resins. These resins can be used alone or as a mixture of two or more. The adhesive layer 24 may contain acrylic rubber.

[0032] The pressure-sensitive adhesive layer 25 and the substrate layer 27 are, for example, film-like portions referred to as cutting tapes. The pressure-sensitive adhesive layer 25 can be any one of a single layer or multiple layers. The pressure-sensitive adhesive layer 25 preferably has adhesive force at room temperature and has the required adhesion force relative to the adherend. The pressure-sensitive adhesive layer 25 preferably has the characteristic of being cured (adhesive force reduction) by high-energy rays such as radiation or heat. The pressure-sensitive adhesive layer 25 can more preferably be easily peeled off from the substrate film 22 and the adhesive layer 24 even without applying high-energy rays such as radiation or heat. The pressure-sensitive adhesive layer 25 can be a pressure-sensitive pressure-sensitive adhesive layer. The pressure-sensitive adhesive layer 25 can be formed, for example, using acrylic resins, various synthetic rubbers, natural rubber, and polyimide resins. The substrate layer 27 is formed, for example, by resins such as polyolefins, polypropylene, and ionomers. The thickness of the pressure-sensitive adhesive layer 25 including the base layer 27 may be, for example, 10 μm to 200 μm, or 20 μm to 150 μm.

[0033] In this embodiment, if Figure 2 and Figure 3 As shown, in the label portion 23, the pressure-sensitive adhesive layer 25 and the base layer 27 have an annular protrusion P that protrudes outward from the edge of the adhesive layer 24. The protrusion P overlaps one side of the base film 22. As a result, the adhesive layer 24 on one side of the base film 22 is covered by the pressure-sensitive adhesive layer 25 and the base layer 27.

[0034] In the present embodiment, a protective portion 26 is provided to surround the label portion 23. The protective portion 26 is a portion that protects the label portion 23 from the pressure when the laminate film 21 is wound into a roll. The protective portion 26 is symmetrically arranged in the width direction at two edge portions in the width direction of one side of the substrate film 22, and extends along the extension direction of the substrate film 22. In the present embodiment, the protective portion 26 is composed of a pressure-sensitive adhesive layer 25 and a substrate layer 27. The label portion 23 and the protective portion 26 are formed as follows: After the pressure-sensitive adhesive layer 25 and the substrate layer 27 are stacked to cover the adhesive layer 24 on one side of the substrate film 22, the pressure-sensitive adhesive layer 25 and the substrate layer 27 are pre-cut in a prescribed pattern, and unnecessary portions are peeled off from one side of the substrate film 22.

[0035] Next, a method for manufacturing the semiconductor package 1 will be described.

[0036] The manufacturing method of the semiconductor package 1 of this embodiment includes a bonding process, a dicing process, an irradiation process, a pickup process, and a die bonding process. The bonding process is a process of bonding the pressure-sensitive adhesive layer 25 and the base layer 27 together with the adhesive layer 24 to the semiconductor wafer W. In the bonding process, as shown in FIG. Figure 4 As shown in (a) of FIG. 1 , the label portion 23 is attached to one side of the semiconductor wafer W with the adhesive layer 24 facing the semiconductor wafer W, and then the base film 22 is peeled from the label portion 23. In the attaching step, the peripheral edge of the pressure-sensitive adhesive layer 25 is fixed to a ring frame (not shown), and the semiconductor wafer W is supported inside the ring frame.

[0037] The dicing process is a process of cutting the semiconductor wafer W to form the semiconductor chips 31 with the adhesive layer. In the dicing process, a cutting means such as a blade or laser light is used. Figure 4 As shown in (b) in FIG, the semiconductor wafer W is cut together with the adhesive layer 24 in a predetermined pattern (e.g., a grid pattern). Thus, a plurality of semiconductor chips 31 with adhesive layers are formed on the pressure-sensitive adhesive layer 25. The chip portion 32 in the semiconductor chip 31 with adhesive layers becomes the aforementioned second semiconductor chip 4 in the manufactured semiconductor package 1. When the semiconductor wafer W and the adhesive layer 24 are cut, by introducing a cutting line to reach the pressure-sensitive adhesive layer 25, adjacent semiconductor chips 31, 31 with adhesive layers can be more reliably separated from each other.

[0038] The irradiation step is a step of irradiating the pressure-sensitive adhesive layer 25 with light to cure it. Figure 4 As shown in (c) in the irradiation process, the pressure-sensitive adhesive layer 25 is irradiated with ultraviolet light V to reduce the adhesive strength of the pressure-sensitive adhesive layer 25. The picking process is a process of picking up the semiconductor chip 31 with the adhesive layer from the pressure-sensitive adhesive layer 25. In the picking process, a picking means such as a collet C is used, such as Figure 5As shown in (a) in FIG. 1 , the semiconductor chip 31 with the adhesive layer is picked up from the pressure-sensitive adhesive layer 25 whose adhesive strength has decreased.

[0039] The die attach process is a process of placing the semiconductor chip 31 with the adhesive layer on the substrate 2. Figure 5 In the example (b) of FIG, the first semiconductor chip 3 is electrically connected to the circuit pattern 7 of the substrate 2 via the adhesive layer 9, and the first semiconductor chip 3 is electrically connected to the circuit pattern 8 via the first conductive wire 10. In this state, the semiconductor chip 31 with the adhesive layer is thermocompressed with the adhesive layer 24 facing the substrate 2. As a result, an embedded portion 5 is formed between the second semiconductor chip 4 and the substrate 2, embedding each of the first semiconductor chip 3, the circuit pattern 7, and the first conductive wire 10.

[0040] Then, the second semiconductor chip 4 is electrically connected to the circuit pattern 8 via the second wire 11, and the first semiconductor chip 3, the second semiconductor chip 4, the first wire 10 and the second wire 11 are sealed by the sealing portion 6, thereby obtaining Figure 1 The semiconductor package 1 shown in FIG. The sealing portion 6 can be formed, for example, by injection molding using a mold. After the sealing portion 6 is formed, the sealing portion 6 can be further heated to cure the sealing portion 6. The heating temperature can be 165°C to 185°C, and the heating time can be 0.5 to 8 hours.

[0041] In the production of the semiconductor package 1 described above, in the die attach process, the first semiconductor chip 3 is required to be sufficiently embedded (embeddedness) in the embedding portion 5 using the adhesive layer 24. Regarding the embedding nature, suppressing voids is important. Figure 6 It is a schematic cross-sectional view showing a gap. Figure 6 In order to simplify the description, the circuit pattern on the substrate 102, the adhesive layer between the substrate 102 and the first semiconductor chip 103, and the wires (described later) are omitted. Figures 7 to 9 (The same applies to ).

[0042] like Figure 6 As shown, voids G refer to a phenomenon in which a gap is formed in the embedded portion 105 between the substrate 102 and the second semiconductor chip 104. The formation of voids is believed to cause not only a reduction in reliability due to poor embedding of the first semiconductor chip 103, but also a phenomenon in which the embedded portion 105 and the second semiconductor chip 104 bulge in a convex shape (curling) due to the volume of the voids G.

[0043] Figure 7 In FIG. 1 , (a) and (b) are schematic cross-sectional views showing the situation where voids are generated in the conventional method. Figure 7As shown in (a) of FIG. 1 , in a conventional method, first, a substrate 102 having a first semiconductor chip 103 mounted thereon and a semiconductor chip 131 with an adhesive layer, in which an adhesive layer 124 is laminated on a second semiconductor chip 104, are prepared. Next, the substrate 102 is heated to a temperature that reaches the melting point of the resin constituting the adhesive layer 124. By heating the substrate 102, the first semiconductor chip 103 on the substrate 102 is also heated to the same temperature.

[0044] After heating the substrate 102 and the first semiconductor chip 103, the semiconductor chip 131 with the adhesive layer is thermocompressed onto the substrate 102 using a collet C, with the adhesive layer 124 facing the substrate 102. This forms an embedded portion 105 between the substrate 102 and the second semiconductor chip 104, embedding the first semiconductor chip 103. The load applied to the semiconductor chip 131 with the adhesive layer by the collet C is constant, for example, within the range of 15N to 45N. The total thermocompression bonding time is, for example, approximately 1 to 3 seconds, but is set to 2 seconds here.

[0045] In the initial stage of thermocompression bonding, the adhesive layer 124 is pressed into contact with the first semiconductor chip 103, thereby Figure 7 As shown in (a) of FIG. , the adhesive layer 124 begins to deform so that the portion in contact with the first semiconductor chip 103 becomes a recessed portion. At this time, only the surface of the adhesive layer 124 in contact with the first semiconductor chip 103 is heated. Therefore, the adhesive layer 124 deforms faster than the entire adhesive layer 124 melts, and the adhesive layer 124 deforms as an elastic body while maintaining its film shape.

[0046] If, for example, about 0.05 to 0.1 seconds have passed since the adhesive layer 124 came into contact with the first semiconductor chip 103, the adhesive layer 124 is deformed, as shown in FIG. Figure 7 As shown in (b) in FIG. 1 , the edge of the adhesive layer 124 contacts the substrate 102. As a result, the adhesive layer 124 is heated from both the first semiconductor chip 103 and the substrate 102. However, at this time, the adhesive layer 124 still deforms as an elastic body, so a gap G can be formed around the first semiconductor chip 103.

[0047] After, for example, 0.1 seconds after the adhesive layer 124 comes into contact with the first semiconductor chip 103, the adhesive layer 124 is entirely melted by the heat from both the first semiconductor chip 103 and the substrate 102, and flows due to its own weight and the load from the collet C. However, the adhesive layer 124 tends to be insufficiently flowed around the first semiconductor chip 103, leaving gaps G around the first semiconductor chip 103, and possibly generating voids in the finally formed embedded portion 105 (see FIG. Figure 6 ).

[0048] To address this problem, the semiconductor device manufacturing method according to the present embodiment suppresses voids in the embedded portion 5 by locally heating the contact region R of the adhesive layer 24 that contacts the first semiconductor chip 3 before pressure bonding.

[0049] Figure 8 In FIG. 1 , (a) and (b) are schematic cross-sectional views showing a method for manufacturing a semiconductor device according to this embodiment. Figure 8 As shown in (a) of FIG. 1 , in this embodiment, first, a substrate 2 with a first semiconductor chip 3 mounted thereon and a semiconductor chip 31 with an adhesive layer, in which an adhesive layer 24 is laminated on a second semiconductor chip 4, are prepared (preparation step). Next, the substrate 2 is heated to approximately 120°C. The heating of the substrate 2 also heats the first semiconductor chip 3 on the substrate 2 to the same temperature.

[0050] After heating the substrate 2 and the first semiconductor chip 3, the semiconductor chip 31 with the adhesive layer is thermocompressed onto the substrate 2 using a collet C, with the adhesive layer 24 facing the substrate 2. This forms an embedded portion 5 embedding the first semiconductor chip 3 between the substrate 2 and the second semiconductor chip 4 (forming step). The load applied to the semiconductor chip 31 with the adhesive layer by the collet C is constant, for example, within the range of 15N to 45N. The total thermocompression bonding time is, for example, approximately 1 to 3 seconds, but is set to 2 seconds here.

[0051] In this embodiment, when the semiconductor chip 31 with the adhesive layer is thermally pressed onto the substrate 2, Figure 8 As shown in (a), the contact region R of the adhesive layer 24 is brought into contact with the first semiconductor chip 3 and held for a predetermined time. At this time, no load is applied to the adhesive layer 24 by the collet C. The adhesive layer 24 is heated by the first semiconductor chip 3, causing it to be locally melted, centered around the contact region R abutting the first semiconductor chip 3, and including the thickness direction of the adhesive layer 24. The time for the contact region R of the adhesive layer 24 to be brought into contact with the first semiconductor chip 3 and held is set based on the physical properties of the resin material constituting the adhesive layer 24 and is set to a time sufficient to soften the portion centered around the contact region R. The time for the contact region R of the adhesive layer 24 to be brought into contact with the first semiconductor chip 3 and held can be set, for example, to be approximately 0.1 seconds or longer.

[0052] After the adhesive layer 24 is partially melted with the contact area R as the center, Figure 8As shown in (b) in the figure, a load is applied to the semiconductor chip 31 with the adhesive layer by the collet C, and the adhesive layer 24 is pressed against the substrate 2 and the first semiconductor chip 3. The time of pressing is set according to the physical properties of the resin material constituting the adhesive layer 24, and is set to a time sufficient for the flow of the portion centered on the contact area R. In the initial stage of pressing, only the portion of the adhesive layer 24 that is locally melted centered on the contact area R generates flow based on its own weight and the load from the collet C. As a result, the flow of the adhesive layer 24 is fully generated around the first semiconductor chip 3, and the area around the first semiconductor chip 3 is filled with the adhesive layer 24 without gaps. Therefore, the voids in the embedded portion 5 that is finally formed can be suppressed.

[0053] As described above, in this semiconductor device manufacturing method, during the step of forming the embedded portion 5, the contact region R of the adhesive layer 24, which will contact the first semiconductor chip 3 on the substrate 2, is locally heated before crimping. By locally heating the adhesive layer 24 before crimping, deformation of the adhesive layer 24 near the contact region R during the subsequent crimping can be generated due to the flow and load of the adhesive layer 24. Therefore, in this semiconductor device manufacturing method, it is possible to eliminate residual air around the first semiconductor chip 3 and suppress voids in the embedded portion 5.

[0054] Furthermore, in this semiconductor device manufacturing method, the contact region R of the adhesive layer 24 is locally heated before crimping. This results in the adhesive layer 24 flowing only in the portion that has locally melted, centered around the contact region R, due to its own weight and the load from the collet C. Subsequently, the heat from the substrate 2 and the first semiconductor chip 3 causes the rest of the adhesive layer 24 to melt. However, compared to melting the entire adhesive layer 124 at once, as in conventional methods, this method can suppress the expansion of the adhesive layer 24 in the in-plane direction of the substrate 2 during crimping. Therefore, in addition to suppressing voids, this semiconductor device manufacturing method can also suppress oozing (a phenomenon in which the embedded portion 5 protrudes from between the substrate 2 and the second semiconductor chip 4).

[0055] In this embodiment, the first semiconductor chip 3 is heated along with the substrate 2, and after the contact region R of the adhesive layer 24 is brought into contact with the first semiconductor chip 3 and held for a predetermined period of time, the semiconductor chip 31 with the adhesive layer is pressure-bonded to the substrate 2. This method allows the amount of heat input to the adhesive layer 24 to be controlled by the heating temperature of the first semiconductor chip 3 and the contact time between the first semiconductor chip 3 and the contact region R. Consequently, localized heating of the adhesive layer 24 can be easily implemented.

[0056] The present invention is not limited to the above embodiment. For example, in the above embodiment, the contact area R of the adhesive layer 24 is brought into contact with the first semiconductor chip 3 and is kept in contact for a predetermined time to locally heat the area near the contact area R. However, other methods may be used to locally heat the area near the contact area R. For example, Figure 9 As shown in (a) and (b) of FIG. 1 , the semiconductor chip 31 with the adhesive layer can be pressed onto the substrate 2 after the contact area R is heated by irradiation with the laser light L. In this example, Figure 9 As shown in (a) of FIG. 1 , the contact area R of the adhesive layer 24 of the semiconductor chip 31 with an adhesive layer held by the collet C is irradiated with laser light L, thereby locally melting the adhesive layer 24 centered on the contact area R. The laser light L may be irradiated at one or more points in the contact area R, or may be scanned in the in-plane direction of the surface of the adhesive layer 24 in the contact area R. The irradiation position of the laser light L may be outside the contact area R and in the peripheral area.

[0057] After the adhesive layer 24 is partially melted with the contact area R as the center, Figure 9 As shown in (b) of FIG. 3 , a load is applied to the semiconductor chip 31 with the adhesive layer by the collet C, pressing the adhesive layer 24 against the substrate 2 and the first semiconductor chip 3. As a result, flow occurs only in the portion that is locally melted centered on the contact region R due to its own weight and the load from the collet C. Consequently, the adhesive layer 24 flows sufficiently around the first semiconductor chip 3, and the area around the first semiconductor chip 3 is completely filled with the adhesive layer 24.

[0058] In this method, as in the above-described embodiment, the adhesive layer 24 flows fully around the first semiconductor chip 3, and the area surrounding the first semiconductor chip 3 is completely filled with the adhesive layer 24. Therefore, voids within the ultimately formed embedded portion 5 can be suppressed. Furthermore, since the expansion of the adhesive layer 24 in the in-plane direction of the substrate 2 during pressure bonding can be suppressed, in addition to suppressing voids, seepage can also be suppressed. Furthermore, the amount of heat input to the adhesive layer 24 and the heated area can be controlled by the irradiation conditions of the laser light L. Therefore, localized heating of the adhesive layer 24 can be easily implemented.

[0059] Furthermore, in each of the above-described embodiments, from the perspective of more reliably causing the adhesive layer 24 to flow only in the portion that is locally melted centered around the contact region R during press-bonding, a method may be employed in which the temperature of the adhesive layer 24 other than the contact region R is not increased or cooled. For example, the process of forming the embedded portion 5 may be performed at a temperature below room temperature (20° C.), or a gas having a temperature below room temperature may be sprayed from the side of the semiconductor chip 31 with the adhesive layer during the formation process.

[0060] From a similar perspective, for example, the dimensions of the supporting surface of the collet C can be set slightly smaller than the dimensions of the semiconductor chip 31 with the adhesive layer. In this case, the load applied to the portion locally melted centered around the contact region R can be made greater than the load applied to the portion outside of it. This allows the adhesive layer 24 to more reliably flow only in the portion locally melted centered around the contact region R during pressure bonding.

[0061] In the above-described embodiment, during the formation process, the first semiconductor chip 3 is heated together with the substrate 2, and the contact region R of the adhesive layer 24 is brought into contact with the first semiconductor chip 3. The process is then stopped for a predetermined time, thereby causing the adhesive layer 24 to be locally melted around the contact region R. However, the process does not necessarily need to be stopped with the adhesive layer 24 in contact with the first semiconductor chip 3. Within the range where the adhesive layer 24 is locally melted around the contact region R, the adhesive layer 24 can be pressed into the first semiconductor chip 3 at a low speed (low load).

[0062] In the above embodiment, a semiconductor package 1 is exemplified as a semiconductor device in which a first semiconductor chip 3 is connected to a circuit pattern 8 via a first wire 10. However, the structure of the semiconductor device is not limited thereto. For example, the semiconductor device may be a semiconductor package in which the first semiconductor chip 3 is flip-chip connected to the circuit pattern 8.

Claims

1. A method for manufacturing a semiconductor device, comprising: a preparation step of preparing a substrate on which a first semiconductor chip is mounted and a semiconductor chip with an adhesive layer in which an adhesive layer is laminated on a second semiconductor chip; and forming a step of thermocompression bonding the semiconductor chip with the adhesive layer to the substrate with the adhesive layer facing the substrate, thereby forming an embedding portion for embedding the first semiconductor chip between the substrate and the second semiconductor chip; In the forming step, a contact region of the adhesive layer that is to come into contact with the first semiconductor chip is locally heated before pressure bonding.

2. The method for manufacturing a semiconductor device according to claim 1, wherein: In the forming step, the first semiconductor chip is heated together with the substrate, the contact region is brought into contact with the first semiconductor chip, and after being left in contact for a predetermined time, the semiconductor chip with the adhesive layer is pressure-bonded to the substrate.

3. The method for manufacturing a semiconductor device according to claim 1, wherein: In the forming step, after the contact region is heated by irradiation with laser light, the semiconductor chip with the adhesive layer is pressure-bonded to the substrate.

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