Fragmented LED wafer test method and system and computer equipment

Abstract

The invention relates to a fragment LED wafer testing method and system and computer equipment, and the method comprises the steps: recognizing a central crystal grain at the central position of a wafer to be tested, building a plane coordinate system with the central crystal grain as a coordinate origin, and obtaining the coordinate data of a plurality of other crystal grains on the wafer to be tested based on the plane coordinate system; and calculating the current distance between the corresponding other crystal grains and the central crystal grain based on the coordinate data of the other crystal grains, comparing the current distance with a preset reference value, and selecting a corresponding test mode based on a comparison result so as to test the current crystal grain. According to the invention, the crystal grains on the fragment notch can be tested in the corresponding test mode, so that the problem that all the crystal grains on the fragment wafer are fully tested due to system problems is solved, and the production efficiency of products is improved.

Description

Technical Field

[0001] The present invention relates to the technical field of LED wafer testing, and in particular to a method, system and computer equipment for testing broken LED wafers. Background Art

[0002] Current LED wafer manufacturing requires full parameter testing of each individual die on the wafer, including key electrical characteristics (such as forward voltage (VF), brightness (LOP), wavelength (WLD), etc.). Based on product characteristics, each wafer undergoes full optical and electrical testing on the outer 50 circles; the inner circle undergoes full electrical testing, and optical testing is performed 1x5 times. The test output data meets product characteristic requirements.

[0003] The calculation logic of the wafer test system is to calculate the circle data from the outside to the inside based on the actual scan, and thus define it according to the outer circle data. Therefore, in the case of wafer fragmentation, the circle data is also calculated from the outside to the inside. The fragmentation cut does not require a full 50-circle test of the outer circle, but only a full electrical test and a 1X5 optical test are required. The full test caused by the system calculation logic problem seriously affects the product production efficiency. Summary of the Invention

[0004] Based on this, the purpose of the present invention is to provide a broken LED wafer testing method, system and computer equipment to address the deficiencies in the prior art.

[0005] To achieve the above object, the present invention provides a method for testing an LED wafer, the method comprising:

[0006] Identifying a central grain at the center position of a wafer to be measured, establishing a plane coordinate system with the central grain as the coordinate origin, and acquiring coordinate data of a plurality of other grains on the wafer to be measured based on the plane coordinate system;

[0007] The current distance between the corresponding other die and the central die is calculated based on the coordinate data of the other die, the current distance is compared with a preset reference value, and a corresponding test mode is selected based on the comparison result to test the current die.

[0008] The beneficial effects of the present invention are: by identifying the central grain at the center position of the wafer to be tested, and establishing a plane coordinate system with the central grain as the coordinate origin, the coordinate data of other grains on the wafer to be tested are obtained based on the plane coordinate system, and then the current distance between the corresponding other grains and the central grain is calculated based on the coordinate data of other grains, the current distance is compared with the preset reference value, and then the corresponding test mode is selected based on the comparison result to test the current grain. Different from the existing technology, the grains on the fragment cut can be tested with the corresponding test mode to improve the problem of full testing of all grains on the fragment wafer due to system problems, which is beneficial to improving product production efficiency.

[0009] Furthermore, the step of selecting a corresponding test mode based on the comparison result to test the current die includes:

[0010] When the current distance is less than or equal to the preset reference value, performing optical sampling and electrical full testing on the current die;

[0011] When the current distance is greater than or equal to the preset reference value, a full optical test and a full electrical test are performed on the current die.

[0012] Furthermore, the method further comprises:

[0013] Dividing the outer circle area and the inner circle area of ​​the wafer to be measured based on the parameter information of the wafer to be measured and the customized requirements, wherein the parameter information of the wafer to be measured includes the center coordinates and radius of the wafer to be measured;

[0014] The preset reference value is formulated based on the outer circle area and the inner circle area.

[0015] Furthermore, the method further comprises:

[0016] When the current distance is less than or equal to the preset reference value, it is determined that the current grain is within the inner circle area;

[0017] When the current distance is greater than or equal to the preset reference value, it is determined that the current grain is within the outer ring area.

[0018] Furthermore, the method further comprises:

[0019] The coordinate data of each crystal grain on the wafer to be measured is scanned and identified by the point measurement system, and the coordinate data of each crystal grain is stored in a ROM memory.

[0020] To achieve the above objectives, the present invention further provides a broken LED wafer testing system for implementing the broken LED wafer testing method as described above, the system comprising:

[0021] An identification and acquisition module is used to identify the central grain at the center position of the wafer to be measured, establish a plane coordinate system with the central grain as the coordinate origin, and obtain coordinate data of several other grains on the wafer to be measured based on the plane coordinate system;

[0022] The testing module is used to calculate the current distance between the corresponding other grains and the central grain based on the coordinate data of the other grains, compare the current distance with a preset reference value, and select a corresponding test mode based on the comparison result to test the current grain.

[0023] Furthermore, the test module includes:

[0024] A first testing unit, configured to perform optical sampling and electrical full testing on the current die when the current distance is less than or equal to the preset reference value;

[0025] The second testing unit is configured to perform a full optical test and a full electrical test on the current die when the current distance is greater than or equal to the preset reference value.

[0026] Furthermore, the system further comprises:

[0027] A division module, configured to divide the outer ring area and the inner ring area of ​​the wafer to be measured based on parameter information of the wafer to be measured and customized requirements, wherein the parameter information of the wafer to be measured includes the center coordinates and radius of the wafer to be measured;

[0028] A formulating module is used to formulate the preset reference value based on the outer circle area and the inner circle area.

[0029] Furthermore, the system further comprises:

[0030] a first judging unit, configured to judge that the current grain is within the inner ring area when the current distance is less than or equal to the preset reference value;

[0031] The second judgment unit is configured to judge that the current grain is within the outer ring area when the current distance is greater than or equal to the preset reference value.

[0032] To achieve the above objectives, the present invention also provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the broken LED wafer testing method as described above is implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 This is a flow chart of a broken LED wafer testing method according to an embodiment of the present invention;

[0034] Figure 2 FIG. 1 is a structural block diagram of a broken LED wafer testing system according to an embodiment of the present invention.

[0035] The following specific embodiments will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solutions and advantages of this application more clearly understood, the present application is described and illustrated below in conjunction with the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely used to explain this application and are not intended to limit this application. Based on the embodiments provided in this application, all other embodiments obtained by those of ordinary skill in the art without making any creative efforts are within the scope of protection of this application.

[0037] Obviously, the drawings described below are merely examples or embodiments of the present application. Those skilled in the art can, without inventive effort, apply the present application to other similar scenarios based on these drawings. Furthermore, it is also understood that, although the effort involved in such a development process may be complex and lengthy, for those skilled in the art related to the content disclosed in this application, changes in design, manufacturing, or production based on the technical content disclosed in this application are merely conventional technical means and should not be construed as an insufficiency of the content disclosed in this application.

[0038] References to "embodiments" in this application mean that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it refer to independent or alternative embodiments that are mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described in this application may be combined with other embodiments unless there is a conflict.

[0039] Unless otherwise defined, the technical or scientific terms used in this application should have the ordinary meaning understood by a person of ordinary skill in the technical field to which this application belongs. The words "one", "a", "the" and the like used in this application do not indicate a limit on quantity and may indicate the singular or plural. The terms "include", "comprise", "have" and any variations thereof used in this application are intended to cover non-exclusive inclusions; for example, a process, method, system, product or device that includes a series of steps or modules (units) is not limited to the listed steps or units, but may also include steps or units that are not listed, or may also include other steps or units that are inherent to these processes, methods, products or devices. The words "connect", "connected", "coupled" and the like used in this application are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. The word "multiple" used in this application refers to two or more. "And / or" describes the association relationship of associated objects, indicating that three relationships can exist. For example, "A and / or B" can mean: A exists alone, A and B exist at the same time, and B exists alone. The character " / " generally indicates that the objects before and after are in an "or" relationship. The terms "first", "second", "third", etc. involved in this application are only used to distinguish similar objects and do not represent a specific order for the objects.

[0040] Example 1

[0041] See also Figure 1 , is a flow chart of the broken LED wafer testing method in the first embodiment of the present invention, as shown Figure 1 As shown, the method includes the following steps:

[0042] Step S101: identifying a central die at the center of a wafer to be measured, establishing a plane coordinate system with the central die as the coordinate origin, and acquiring coordinate data of several other die on the wafer to be measured based on the plane coordinate system;

[0043] Among them, the central grain will record the corresponding marking data and the radius data of the wafer to be tested. The entire wafer to be tested is scanned by camera to identify the central grain of the wafer to be tested. The central grain is used as the coordinate origin, the direction parallel to the fragment is used as the X-axis, and the direction perpendicular to the fragment is used as the Y-axis to establish a plane coordinate system.

[0044] It should be noted that the method further includes:

[0045] When the wafer to be tested is identified, the fragment position is obtained based on the image of the wafer to be tested. Specifically, the intersection of the contour of the wafer to be tested is scanned, and the intersection of the wafer to be tested is divided into different contour lines. Each contour line is matched with the line type library to determine the fragment position.

[0046] It can be understood that the line type library includes multiple types of lines, and each line has its corresponding type attribute. The line type library can be customized.

[0047] Step S102: calculating the current distance between the corresponding other die and the central die based on the coordinate data of the other die, comparing the current distance with a preset reference value, and selecting a corresponding test mode based on the comparison result to test the current die.

[0048] Furthermore, the step of selecting a corresponding test mode based on the comparison result to test the current die includes:

[0049] When the current distance is less than or equal to the preset reference value, performing optical sampling and electrical full testing on the current die;

[0050] When the current distance is greater than or equal to the preset reference value, a full optical test and a full electrical test are performed on the current die.

[0051] It should be noted that the expression for calculating the current distance between the corresponding other grains and the central grain is as follows:

[0052]

[0053] Wherein, d represents the current distance between the other grains and the central grain, (x, y) represents the coordinate data of the central grain, and (h, k) represents the coordinate data of the other grains.

[0054] Through the above steps, the central grain at the center position of the wafer to be tested is identified, and a plane coordinate system is established with the central grain as the coordinate origin. The coordinate data of other grains on the wafer to be tested are obtained based on the plane coordinate system, and then the current distance between the corresponding other grains and the central grain is calculated based on the coordinate data of other grains. The current distance is compared with the preset reference value, and then the corresponding test mode is selected based on the comparison result to test the current grain. Different from the existing technology, the grains on the fragment cut can be tested with the corresponding test mode to improve the problem of full testing of all grains on the fragment wafer due to system problems, which is beneficial to improving product production efficiency.

[0055] Furthermore, the method further comprises:

[0056] Dividing the outer circle area and the inner circle area of ​​the wafer to be measured based on the parameter information of the wafer to be measured and the customized requirements, wherein the parameter information of the wafer to be measured includes the center coordinates and radius of the wafer to be measured;

[0057] The custom requirements include the number of circles to be divided and the distance between adjacent circles.

[0058] The preset reference value is formulated based on the outer circle area and the inner circle area.

[0059] The preset reference value is the distance between the edge contour of the inner ring area and the central grain.

[0060] Furthermore, the method further comprises:

[0061] The coordinate data of each crystal grain on the wafer to be measured is scanned and identified by the point measurement system, and the coordinate data of each crystal grain is stored in a ROM memory.

[0062] Example 2

[0063] See also Figure 2 , is a structural block diagram of a broken LED wafer testing system in a second embodiment of the present invention, the system comprising:

[0064] An identification and acquisition module is used to identify the central grain at the center position of the wafer to be measured, establish a plane coordinate system with the central grain as the coordinate origin, and obtain coordinate data of several other grains on the wafer to be measured based on the plane coordinate system;

[0065] The testing module is used to calculate the current distance between the corresponding other grains and the central grain based on the coordinate data of the other grains, compare the current distance with a preset reference value, and select a corresponding test mode based on the comparison result to test the current grain.

[0066] In the specific implementation, the central grain at the center position of the wafer to be tested is identified, and a plane coordinate system is established with the central grain as the coordinate origin. The coordinate data of other grains on the wafer to be tested are obtained based on the plane coordinate system, and then the current distance between the corresponding other grains and the central grain is calculated based on the coordinate data of other grains. The current distance is compared with the preset reference value, and then the corresponding test mode is selected based on the comparison result to test the current grain. Different from the existing technology, the grains on the fragment cut can be tested with the corresponding test mode to improve the problem of full testing of all grains on the fragment wafer due to system problems, which is beneficial to improving product production efficiency.

[0067] Furthermore, the test module includes:

[0068] A first testing unit, configured to perform optical sampling and electrical full testing on the current die when the current distance is less than or equal to the preset reference value;

[0069] The second testing unit is configured to perform a full optical test and a full electrical test on the current die when the current distance is greater than or equal to the preset reference value.

[0070] Furthermore, the system further comprises:

[0071] A division module, configured to divide the outer ring area and the inner ring area of ​​the wafer to be measured based on parameter information of the wafer to be measured and customized requirements, wherein the parameter information of the wafer to be measured includes the center coordinates and radius of the wafer to be measured;

[0072] A formulating module is used to formulate the preset reference value based on the outer circle area and the inner circle area.

[0073] Furthermore, the system further comprises:

[0074] a first judging unit, configured to judge that the current grain is within the inner ring area when the current distance is less than or equal to the preset reference value;

[0075] The second judgment unit is configured to judge that the current grain is within the outer ring area when the current distance is greater than or equal to the preset reference value.

[0076] Furthermore, the system further comprises:

[0077] The coordinate data of each crystal grain on the wafer to be measured is scanned and identified by the point measurement system, and the coordinate data of each crystal grain is stored in a ROM memory.

[0078] Example 3

[0079] The third embodiment of the present invention is based on the same inventive concept and proposes a computer-readable storage medium. The computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the steps of the broken LED wafer testing method of the above embodiment are implemented.

[0080] The logic and / or steps represented in the flowcharts or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing the logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (e.g., a computer-based system, a system including a processor, or other system that can fetch and execute instructions from an instruction execution system, apparatus, or device). For purposes of this specification, "computer-readable medium" can be any device that stores, communicates, propagates, or transmits a program for use by, or in conjunction with, an instruction execution system, apparatus, or device.

[0081] More specific examples (a non-exhaustive list) of computer-readable media include the following: an electrical connection with one or more wires (electronic devices), a portable computer disk cartridge (magnetic devices), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disc read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering, or processing in another suitable manner as necessary, and then stored in a computer memory.

[0082] Among them, the memory may include a large-capacity memory for data or instructions. By way of example and not limitation, the memory may include a hard disk drive (HDD), a floppy disk drive, a solid-state drive (SSD), a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive, or a combination of two or more of these. Where appropriate, the memory may include a removable or non-removable (or fixed) medium. Where appropriate, the memory may be inside or outside the data processing device. In a specific embodiment, the memory is a non-volatile memory. In a specific embodiment, the memory includes a read-only memory (ROM) and a random access memory (RAM). Where appropriate, the ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically alterable ROM (EAROM) or a flash memory (FLASH), or a combination of two or more of these. Under appropriate circumstances, the RAM can be a static random access memory (SRAM) or a dynamic random access memory (DRAM), where the DRAM can be a fast page mode dynamic random access memory (FPMDRAM), an extended data output dynamic random access memory (EDODRAM), a synchronous dynamic random access memory (SDRAM), etc.

[0083] Example 4

[0084] The fourth embodiment of the present invention is based on the same inventive concept and proposes a computer device, which includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the broken LED wafer testing method of the above embodiment.

[0085] It should be understood that various parts of the present invention can be implemented using hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application-specific integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0086] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0087] Under the premise that no conflict occurs, those skilled in the art may freely combine and superimpose the above-mentioned additional technical features.

[0088] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A method for testing broken LED wafers, characterized in that: The method comprises: Identifying a central grain at the center position of a wafer to be measured, establishing a plane coordinate system with the central grain as the coordinate origin, and acquiring coordinate data of a plurality of other grains on the wafer to be measured based on the plane coordinate system; The current distance between the corresponding other die and the central die is calculated based on the coordinate data of the other die, the current distance is compared with a preset reference value, and a corresponding test mode is selected based on the comparison result to test the current die.

2. The broken LED wafer testing method according to claim 1, characterized in that: The step of selecting a corresponding test mode based on the comparison result to test the current die includes: When the current distance is less than or equal to the preset reference value, performing optical sampling and electrical full testing on the current die; When the current distance is greater than or equal to the preset reference value, a full optical test and a full electrical test are performed on the current die.

3. The broken LED wafer testing method according to claim 1, characterized in that: The method further comprises: Dividing the outer circle area and the inner circle area of ​​the wafer to be measured based on the parameter information of the wafer to be measured and the customized requirements, wherein the parameter information of the wafer to be measured includes the center coordinates and radius of the wafer to be measured; The preset reference value is formulated based on the outer circle area and the inner circle area.

4. The broken LED wafer testing method according to claim 3, characterized in that: The method further comprises: When the current distance is less than or equal to the preset reference value, it is determined that the current grain is within the inner circle area; When the current distance is greater than or equal to the preset reference value, it is determined that the current grain is within the outer ring area.

5. The broken LED wafer testing method according to claim 1, characterized in that: The method further comprises: The coordinate data of each crystal grain on the wafer to be measured is scanned and identified by the point measurement system, and the coordinate data of each crystal grain is stored in a ROM memory.

6. A broken LED wafer testing system, used to implement the broken LED wafer testing method according to any one of claims 1 to 5, characterized in that: The system comprises: An identification and acquisition module is used to identify the central grain at the center position of the wafer to be measured, establish a plane coordinate system with the central grain as the coordinate origin, and obtain coordinate data of several other grains on the wafer to be measured based on the plane coordinate system; The testing module is used to calculate the current distance between the corresponding other grains and the central grain based on the coordinate data of the other grains, compare the current distance with a preset reference value, and select a corresponding test mode based on the comparison result to test the current grain.

7. The broken LED wafer testing system according to claim 6, characterized in that: The test module includes: A first testing unit, configured to perform optical sampling and electrical full testing on the current die when the current distance is less than or equal to the preset reference value; The second testing unit is configured to perform a full optical test and a full electrical test on the current die when the current distance is greater than or equal to the preset reference value.

8. The broken LED wafer testing system according to claim 6, characterized in that: The system further comprises: A division module, configured to divide the outer ring area and the inner ring area of ​​the wafer to be measured based on parameter information of the wafer to be measured and customized requirements, wherein the parameter information of the wafer to be measured includes the center coordinates and radius of the wafer to be measured; A formulating module is used to formulate the preset reference value based on the outer circle area and the inner circle area.

9. The broken LED wafer testing system according to claim 8, characterized in that: The system further comprises: a first judging unit, configured to judge that the current grain is within the inner ring area when the current distance is less than or equal to the preset reference value; The second judgment unit is configured to judge that the current grain is within the outer ring area when the current distance is greater than or equal to the preset reference value.

10. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the computer program, the broken LED wafer testing method as claimed in claim 1 is implemented.

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