Computing power resource capacity expansion system of intelligent computing center

Abstract

The invention particularly relates to a computing power resource capacity expansion system of an intelligent computing center, and relates to the technical field of intelligent computing centers. The resource management and scheduling module is used for dynamic allocation and real-time monitoring of computing power resources and intelligent scheduling of computing power based on a load evaluation coefficient of a node to achieve capacity expansion of the computing power resources; a data interaction module; and a performance optimization and acceleration module. According to the invention, the resource management and scheduling module can sense the load state of a node in real time based on a load evaluation model constructed by using an offset value, a task delay value and a backlog value through computing power, dynamically distribute a new task to a low-load node, and automatically increase and decrease computing resources through an elastic capacity expansion and contraction mechanism; the overload phenomenon of'hot nodes' caused by traditional single index scheduling is effectively avoided, the node load balance degree is improved, the task average processing delay is reduced, and the overall operation efficiency of the computing center is remarkably optimized.

Description

Technical Field

[0001] The present invention relates to the technical field of intelligent computing centers, and in particular to a computing resource expansion system for intelligent computing centers. Background Art

[0002] With the rapid development of technologies such as artificial intelligence, big data, and cloud computing, intelligent computing centers are facing challenges such as explosive growth in data size and a sharp increase in the complexity of computing tasks. Traditional computing resource management models are gradually exposing the following problems:

[0003] Traditional scheduling algorithms only allocate tasks based on single indicators such as CPU utilization and memory usage, without considering dynamic factors such as task delays and queue backlogs.

[0004] For example, when the processing delay of some nodes increases significantly due to backlog of task queues, traditional scheduling cannot perceive and adjust the allocation strategy in time, which can easily cause "hot node" overload problems and lead to an imbalance in the overall computing power utilization.

[0005] Therefore, a computing resource expansion system with hardware heterogeneous collaboration capabilities, intelligent load assessment mechanism and full-process performance optimization is needed to achieve dynamic adaptation, efficient scheduling and continuous optimization of computing resources to meet the computing power requirements in complex computing scenarios. Summary of the Invention

[0006] The purpose of the present invention is to propose a system for expanding computing power resources of an intelligent computing center in order to solve the above problems.

[0007] In order to achieve the above object, the present invention adopts the following technical solutions:

[0008] A computing resource expansion system for an intelligent computing center, comprising:

[0009] Hardware infrastructure module: provides physical support for the computing center, including computing, storage, network equipment and supporting facilities;

[0010] Resource management and scheduling module: Dynamic allocation of computing resources, real-time monitoring, and intelligent scheduling of computing power based on node load assessment coefficients to achieve computing power resource expansion;

[0011] Data interaction module: responsible for data access, preprocessing, output and external service interface management, ensuring efficient data circulation and interaction within and outside the system;

[0012] Performance optimization and acceleration module: Improves computing task execution efficiency and reduces processing time through compilation optimization, algorithm acceleration, and hardware collaboration technology.

[0013] Preferably, the hardware infrastructure module specifically includes a computing node cluster, a storage system, a network architecture, and supporting infrastructure;

[0014] The computing node cluster includes:

[0015] General computing servers: Servers based on the x86 architecture are used for general data processing and web services; servers based on the ARM architecture are used for cloud-native applications and edge computing scenarios;

[0016] GPU acceleration cluster: using NVIDIA's A100 and H100 GPUs;

[0017] Specialized computing chips: including FPGA chips and ASIC chips;

[0018] Heterogeneous computing platform: Connect the CPU with GPU and FPGA accelerator cards through the PCIe interface, and use the CUDA and OpenCL programming frameworks to enable different types of processors to work together;

[0019] Storage System:

[0020] High-performance storage: Disk arrays use high-speed protocols and are suitable for databases and real-time data analysis scenarios that require extremely high storage performance. Distributed storage systems meet data storage needs through multi-node data redundancy and intelligent data distribution.

[0021] Massive data storage: Provides API interface to support massive unstructured data storage;

[0022] Network architecture:

[0023] High-speed Internet: 10 Gigabit Ethernet enables low-latency, high-bandwidth data transmission between computing nodes, meeting the data interaction needs of distributed computing and storage clusters;

[0024] Network security components: Firewall devices implement secure filtering and access control of network traffic through access control lists, intrusion prevention systems, and virtual private network functions.

[0025] Preferably, the resource management and scheduling module specifically includes:

[0026] Resource management platform:

[0027] Virtualize the CPU, memory, storage, and network resources of a physical server into multiple virtual machines. Each virtual machine can independently run an operating system and applications, achieving resource isolation and sharing.

[0028] Monitoring and metering:

[0029] The CPU usage, memory usage, disk I / O, and network traffic metrics of computing nodes are collected through the Pull mode and stored in a time series database.

[0030] Intelligent scheduling:

[0031] Obtain node computing power utilization data, task processing delay data, and task queue data;

[0032] After analyzing the computing power utilization data, task processing delay data, and task queue data, we can obtain the computing power utilization offset value, task delay value, and backlog value.

[0033] The load assessment coefficient is obtained by comprehensively processing the computing power using the offset value, task delay value, and backlog value;

[0034] Based on the load evaluation coefficient of the node, new tasks are assigned to nodes with lower loads to avoid overloading some nodes and idling some nodes.

[0035] Preferably, the process of obtaining the computing power utilization offset value includes:

[0036] Obtain CPU core unutilization and GPU memory unutilization through the performance monitoring interface;

[0037] Obtaining CPU core unutilization and GPU memory unutilization at preset time intervals, and respectively presetting CPU core unutilization thresholds and GPU memory unutilization thresholds; performing difference calculation between the obtained CPU core unutilization and GPU memory unutilization and the corresponding CPU core unutilization thresholds and GPU memory unutilization thresholds;

[0038] Arrange the obtained core utilization difference and memory utilization difference according to the time series, and remove the values ​​less than 0;

[0039] Count the core utilization differences and memory utilization differences respectively, divide the core utilization differences by the CPU core unutilization rate to get the core deviation; divide the memory utilization differences by the GPU memory unutilization rate to get the memory deviation;

[0040] According to the time point of obtaining each core utilization difference value and each memory utilization difference value, the CPU core unutilization rate and the GPU memory unutilization rate corresponding to each core utilization difference value and each memory utilization difference value are obtained;

[0041] The computing power utilization offset value is obtained by weighted calculation of the core utilization difference, memory utilization difference, CPU core unutilization rate, and GPU memory unutilization rate.

[0042] Preferably, the process of obtaining the task delay value includes:

[0043] Get the time point when the task is submitted and the time point when the node receives the task, and get the duration between the two time points, which is recorded as the delay time;

[0044] A delay time threshold is preset, and the difference between the delay time and the delay time threshold is calculated to obtain a delay difference; an allowable range of the delay difference is preset, and a delay difference that is not within the allowable range of the delay difference is recorded as an abnormal delay difference;

[0045] Get the delay time of a preset number of tasks and calculate the corresponding abnormal delay difference;

[0046] Arrange all the abnormal delay differences obtained according to the time series, and extract the three largest abnormal delay differences; arrange the three largest abnormal delay differences according to the time series as well, and record them as the first abnormal delay difference, the second abnormal delay difference, and the third abnormal delay difference respectively;

[0047] Obtain the time differences between the first abnormal time difference and the second abnormal time difference, the second abnormal time difference and the third abnormal time difference, and the first abnormal time difference and the third abnormal time difference, and record them as the first interval difference, the second interval difference, and the third interval difference;

[0048] Calculate the difference between the first abnormal time difference and the second abnormal time difference, take the absolute value, and then multiply the difference with the first interval difference to obtain a first quantized value;

[0049] Calculate the difference between the second abnormal time difference and the third abnormal time difference, take the absolute value, and then multiply it by the second interval difference to obtain a first quantized value;

[0050] Calculate the difference between the first abnormal time difference and the third abnormal time difference, take the absolute value, and then multiply it by the second interval difference to obtain a third quantized value;

[0051] An ellipse model is established by using the first quantized value and the second quantized value as the major and minor semi-axes of the ellipse respectively, and an ellipsoid model is established by using the third quantized value as the height of the ellipse model. The volume of the ellipsoid model is calculated and recorded as the task delay value.

[0052] Preferably, the process of obtaining the backlog value includes:

[0053] Get the number of pending tasks and the number of completed tasks in each node's task queue at preset time intervals; subtract the number of pending tasks from the number of completed tasks, remove the values ​​greater than 0, and take the absolute value of the remaining values ​​as the delay value;

[0054] Obtain the number of delayed values ​​and divide it by the number of pending tasks to obtain the delay degree;

[0055] Arrange the delay values ​​in time series, obtain the time difference between adjacent delay values, record it as delayed adjacent time, and extract the largest delayed adjacent time, record it as the maximum delayed adjacent time;

[0056] The backlog value is obtained by weighted calculation of the delay degree and the maximum adjacent delay time.

[0057] Preferably, the computing power utilization offset value and the task delay value are respectively used as two right-angled sides of a right triangle, and the remaining side is connected to obtain a complete right triangle, the backlog value is used as the height of the right triangle, a triangular pyramid model is established, and the volume of the triangular pyramid is calculated and recorded as the load assessment coefficient;

[0058] Obtain the load assessment coefficient of each node in turn;

[0059] Three sets of threshold value ranges are preset, and each set of thresholds corresponds to a load level. The load assessment coefficient is matched with the value ranges of the three sets of thresholds to obtain the load level corresponding to the load assessment coefficient. The load level of each node is obtained in turn, and the corresponding number of tasks are allocated according to the size of the load level; the load level includes low load, medium load and high load, and the load level is proportional to the load.

[0060] Preferably, the data interaction module specifically includes:

[0061] In the data input and output link, batch file transfer is realized, asynchronous access of real-time data is completed, and data can be read and written through direct connection to the database;

[0062] The output end writes the processing results back to the database and pushes them to a third party through the API interface;

[0063] The data preprocessing component is responsible for data cleaning, conversion and distribution, removing duplicate values, filling missing data, and converting the format after the cleaning operation;

[0064] Caching hot data reduces database pressure and processes and distributes data streams in real time.

[0065] Preferably, the performance optimization and acceleration module specifically includes:

[0066] Compilation optimization and parallel computing:

[0067] Compiler optimization: Optimizes code to generate efficient machine code. Targeting the CPU's vectorized instruction set, the compiler automatically converts code suitable for vectorization into vectorized instructions, allowing multiple execution units to simultaneously process multiple data points, improving computing efficiency.

[0068] Parallel computing framework: Rapid processing of large-scale data based on a distributed computing framework;

[0069] Algorithm optimization and acceleration library:

[0070] Mathematical library acceleration: Uses a mathematical function library to perform mathematical calculations for matrix operations and linear equations; provides efficient convolution, pooling, and activation function deep learning operators through a deep neural network library to accelerate the training and inference process of deep learning models.

[0071] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:

[0072] 1. The present invention uses a load assessment model constructed by the resource management and scheduling module based on computing power utilization offset value, task delay value, and backlog value. It can perceive the node load status in real time, dynamically allocate new tasks to low-load nodes, and automatically increase or decrease computing resources through an elastic scaling mechanism; effectively avoid the "hot node" overload phenomenon caused by traditional single-indicator scheduling, improve node load balancing, reduce the average task processing delay, and significantly optimize the overall operating efficiency of the computing center.

[0073] 2. The present invention realizes the improvement of the efficiency of the whole process from data access, processing to output through the data interaction module through a unified data pre-processing component and API gateway management mechanism; the performance optimization and acceleration module achieves a breakthrough in computing task efficiency without relying on hardware upgrades through compilation optimization, parallel computing framework and hardware collaboration technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0074] Further details, features and advantages of the present application are disclosed in the following description of exemplary embodiments in conjunction with the accompanying drawings, in which:

[0075] Figure 1 Flowchart of the present invention. DETAILED DESCRIPTION

[0076] Several embodiments of the present application will be described in more detail below with reference to the accompanying drawings so that those skilled in the art can implement the present application. The present application can be embodied in many different forms and for many different purposes and should not be limited to the embodiments described herein. These embodiments are provided to make the present application comprehensive and complete and to fully convey the scope of the present application to those skilled in the art. The embodiments do not limit the present application.

[0077] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which this application belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the relevant art and / or the context of this specification, and will not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0078] See also Figure 1 As shown, the present invention provides a technical solution:

[0079] A computing resource expansion system for an intelligent computing center, comprising:

[0080] Hardware infrastructure module: provides physical support for the computing center, including computing, storage, network equipment and supporting facilities, and is the material basis for computing capacity expansion;

[0081] Specifically include:

[0082] The computing node cluster includes:

[0083] General-purpose computing servers: Servers based on the x86 architecture, such as the Dell PowerEdge series and Lenovo ThinkSystem series, are suitable for general computing tasks such as routine data processing and web services. Servers based on the ARM architecture, such as Huawei's TaiShan servers, feature low power consumption and high concurrent processing capabilities, and are used for cloud-native applications and edge computing scenarios.

[0084] GPU acceleration cluster: Using NVIDIA's A100 and H100 GPUs, they excel in deep learning training, scientific computing simulation, and graphics rendering. AMD's MI series GPUs are suitable for cost-sensitive high-performance computing tasks.

[0085] Specialized computing chips: FPGA (field programmable gate array) chips, such as Xilinx's Versal series, can be flexibly programmed according to needs and are often used in scenarios that require rapid customization of algorithms, such as communication signal processing and high-frequency financial trading; ASIC (application-specific integrated circuit) chips;

[0086] Heterogeneous computing platform: Connect the CPU with GPUs and FPGA accelerator cards through the PCIe interface, and use the CUDA and OpenCL programming frameworks to enable different types of processors to work together. For example, in deep learning training, the CPU is responsible for data preprocessing and task scheduling, while the GPU focuses on large-scale matrix operations, significantly improving training efficiency.

[0087] Storage System:

[0088] High-performance storage: Disk arrays use high-speed protocols and are suitable for databases and real-time data analysis scenarios with extremely high storage performance requirements. Distributed storage systems address data storage needs through multi-node data redundancy and intelligent data distribution. In-memory computing Redis clusters, leveraging the high-speed read and write capabilities of memory, store data in memory and support complex data structures and atomic operations. They are often used for caching hotspot data, implementing distributed locks, and building real-time counters.

[0089] Massive data storage: Provides API interface to support massive unstructured data storage;

[0090] Network architecture:

[0091] High-speed Internet: 10 Gigabit Ethernet enables low-latency, high-bandwidth data transmission between computing nodes, meeting the data interaction needs of distributed computing and storage clusters;

[0092] Network security components: Firewall devices implement secure filtering and access control of network traffic through access control lists, intrusion prevention systems, and virtual private network functions;

[0093] Infrastructure support:

[0094] Power supply and heat dissipation: When the mains power is interrupted, the battery pack provides a short-term power supply to the computing equipment. The air conditioner controls the temperature of the computer room within the preset parameters to ensure that the equipment operates in a suitable environment.

[0095] Cabinets and Cabling: High-density cabinets are used, with preset space layout and ventilation design to improve the space utilization of the computer room. Fiber optic distribution frames are used for fiber splicing, wiring, and management, making the wiring in the computer room neat and standardized, and facilitating maintenance and troubleshooting.

[0096] Resource management and scheduling module: Dynamic allocation of computing resources, real-time monitoring, and intelligent scheduling of computing power based on node load assessment coefficients to achieve computing power resource expansion;

[0097] Specifically include:

[0098] Resource management platform:

[0099] The CPU, memory, storage, and network resources of a physical server are virtualized into multiple virtual machines. Each virtual machine can independently run an operating system and applications, achieving resource isolation and sharing. Docker, a containerization technology, is lightweight and highly portable, packaging applications and their dependencies into containers, which can be quickly deployed in different environments through the container engine.

[0100] Monitoring and metering:

[0101] The CPU usage, memory usage, disk I / O, and network traffic metrics of computing nodes are collected through the Pull mode and stored in a time series database.

[0102] Intelligent scheduling:

[0103] Obtain node computing power utilization data, task processing delay data, and task queue data;

[0104] After analyzing the computing power utilization data, task processing delay data, and task queue data, we can obtain the computing power utilization offset value, task delay value, and backlog value.

[0105] The process of obtaining the hashrate utilization offset value includes:

[0106] Obtain CPU core unutilization and GPU memory unutilization through the performance monitoring interface;

[0107] Obtaining CPU core unutilization and GPU memory unutilization at preset time intervals, and respectively presetting CPU core unutilization thresholds and GPU memory unutilization thresholds; performing difference calculation between the obtained CPU core unutilization and GPU memory unutilization and the corresponding CPU core unutilization thresholds and GPU memory unutilization thresholds;

[0108] Arrange the obtained core utilization difference and memory utilization difference according to the time series, and remove the values ​​less than 0;

[0109] Count the core utilization differences and memory utilization differences respectively, divide the core utilization differences by the CPU core unutilization rate to get the core deviation; divide the memory utilization differences by the GPU memory unutilization rate to get the memory deviation;

[0110] According to the time point of obtaining each core utilization difference value and each memory utilization difference value, the CPU core unutilization rate and the GPU memory unutilization rate corresponding to each core utilization difference value and each memory utilization difference value are obtained;

[0111] The computing power utilization offset value is obtained by weighted calculation of the core utilization difference, memory utilization difference, CPU core unutilization rate, and GPU memory unutilization rate.

[0112] After presetting the weight factors of the core utilization difference, memory utilization difference, CPU core unutilization rate, and GPU memory unutilization rate, the core utilization difference, memory utilization difference, CPU core unutilization rate, and GPU memory unutilization rate are multiplied by their corresponding weight factors, and the sum is calculated to obtain the computing power utilization offset value;

[0113] The process of obtaining the task delay value includes:

[0114] Get the time point when the task is submitted and the time point when the node receives the task, and get the duration between the two time points, which is recorded as the delay time;

[0115] A delay time threshold is preset, and the difference between the delay time and the delay time threshold is calculated to obtain a delay difference; an allowable range of the delay difference is preset, and a delay difference that is not within the allowable range of the delay difference is recorded as an abnormal delay difference;

[0116] Get the delay time of a preset number of tasks and calculate the corresponding abnormal delay difference;

[0117] Arrange all the abnormal delay differences obtained according to the time series, and extract the three largest abnormal delay differences; arrange the three largest abnormal delay differences according to the time series as well, and record them as the first abnormal delay difference, the second abnormal delay difference, and the third abnormal delay difference respectively;

[0118] Obtain the time differences between the first abnormal time difference and the second abnormal time difference, the second abnormal time difference and the third abnormal time difference, and the first abnormal time difference and the third abnormal time difference, and record them as the first interval difference, the second interval difference, and the third interval difference;

[0119] Calculate the difference between the first abnormal time difference and the second abnormal time difference, take the absolute value, and then multiply the difference with the first interval difference to obtain a first quantized value;

[0120] Calculate the difference between the second abnormal time difference and the third abnormal time difference, take the absolute value, and then multiply it by the second interval difference to obtain a first quantized value;

[0121] Calculate the difference between the first abnormal time difference and the third abnormal time difference, take the absolute value, and then multiply it by the second interval difference to obtain a third quantized value;

[0122] An ellipse model is established by using the first quantized value and the second quantized value as the major semi-axis and the minor semi-axis of the ellipse respectively, an ellipsoid model is established by using the third quantized value as the height of the ellipse model, and the volume of the ellipsoid model is calculated and recorded as the task delay value;

[0123] The process of obtaining the backlog value includes:

[0124] Get the number of pending tasks and the number of completed tasks in each node's task queue at preset time intervals; subtract the number of pending tasks from the number of completed tasks, remove the values ​​greater than 0, and take the absolute value of the remaining values ​​as the delay value;

[0125] Obtain the number of delayed values ​​and divide it by the number of pending tasks to obtain the delay degree;

[0126] Arrange the delay values ​​in time series, obtain the time difference between adjacent delay values, record it as delayed adjacent time, and extract the largest delayed adjacent time, record it as the maximum delayed adjacent time;

[0127] The backlog value is obtained by weighting the delay degree and the maximum delay neighbor time;

[0128] Preset weight factors for the delay degree and the maximum delay adjacent time, multiply the delay degree and the maximum delay adjacent time with their corresponding weight factors, and sum them to obtain the backlog value;

[0129] The load assessment coefficient is obtained by comprehensively processing the computing power using the offset value, task delay value, and backlog value;

[0130] Use the computing power utilization offset value and the task delay value as the two right-angled sides of a right triangle, and connect the remaining side to form a complete right triangle. Use the backlog value as the height of the right triangle to build a triangular pyramid model. Calculate the volume of the triangular pyramid and record it as the load assessment coefficient.

[0131] Obtain the load assessment coefficient of each node in turn;

[0132] Three sets of threshold value ranges are preset, each set of thresholds corresponds to a load level. The load assessment coefficient is matched with the value ranges of the three sets of thresholds to obtain the load level corresponding to the load assessment coefficient. The load level of each node is obtained in turn, and the corresponding number of tasks are allocated according to the load level. The load levels include low load, medium load, and high load, and the load level is proportional to the load.

[0133] Based on the node load evaluation coefficient, new tasks are assigned to nodes with lower loads to avoid overloading some nodes and leaving some nodes idle;

[0134] Elastic Scaling: Automatic elastic scaling triggers the automatic creation of containers or virtual machines to increase computing resources by monitoring system load indicators (such as CPU utilization exceeding 80%). When the load decreases (such as CPU utilization falling below 20%), it automatically deletes excess containers or shuts down virtual machines, freeing up resources and reducing costs. Manual elastic scaling allows users to manually increase or decrease computing resources based on business needs through the API interface or management interface.

[0135] For example, before a large event, the administrator manually increases the number of web servers to ensure that the system can withstand high concurrent access;

[0136] Data interaction module: responsible for data access, preprocessing, output and external service interface management, ensuring efficient data circulation and interaction within and outside the system;

[0137] Specifically include:

[0138] The data processing and interaction module is the core hub for the computing center to achieve efficient data circulation, processing and external services. It covers the entire process from data access, processing to output, and provides external interactive interfaces and development environment support.

[0139] In the data input and output link, batch file transfer is realized, asynchronous access of real-time data is completed, and data can be read and written through direct connection to the database;

[0140] The output end writes the processing results back to the database and pushes them to a third party through the API interface;

[0141] The data preprocessing component is responsible for data cleaning, conversion, and distribution, removing duplicate values, and filling missing data. It converts CSV files into Parquet format to improve storage and query efficiency.

[0142] Cache hot data to reduce database pressure, and process and distribute data streams in real time;

[0143] In terms of external service interfaces, the API gateway provides unified management, providing API publishing, version control, identity authentication, traffic restriction functions, and automatically generates interface documentation. It supports multi-language development and integrates debugging and version control functions, making it easy for developers to quickly build data processing and service applications based on module capabilities.

[0144] Performance optimization and acceleration module: Improves computing task execution efficiency and reduces processing time through compilation optimization, algorithm acceleration, hardware collaboration and other technologies;

[0145] Specifically include:

[0146] Compilation optimization and parallel computing:

[0147] Compiler optimization: Optimizes code to generate efficient machine code. For CPU vectorized instruction sets, such as Intel's AVX512, the compiler automatically converts code suitable for vectorization into vectorized instructions, allowing multiple execution units to simultaneously process multiple data, improving computing efficiency.

[0148] Parallel computing framework: Based on the distributed computing framework Apache Spark, it enables rapid processing of large-scale data. For example, in data analysis, Spark can efficiently process petabytes of data through components such as distributed SQL queries and the machine learning algorithm library (MLlib). Based on the distributed computing model MapReduce, large-scale data processing tasks are decomposed into two stages: Map and Reduce. Through multi-node parallel processing, distributed computing of data is achieved, which is often used in big data batch processing scenarios. MPI (Message Passing Interface) is a commonly used parallel programming model in high-performance computing. It enables data interaction and collaborative computing between multiple nodes through inter-process communication (such as sending and receiving messages), and is suitable for scientific computing, numerical simulation and other fields. The Python multiprocessing library provides a simple and easy-to-use multi-process programming interface that can utilize multi-core CPUs to execute tasks in parallel, improving program operation efficiency.

[0149] Algorithm optimization and acceleration library:

[0150] Mathematical library acceleration: IntelMKL, a mathematical function library, is used to perform mathematical calculations for matrix operations and solving linear equations. The CUDA deep neural network library provides efficient convolution, pooling, and activation function deep learning operators to accelerate the training and inference process of deep learning models.

[0151] Automatic tuning tool: Optimizes trained deep learning models through the deep learning inference optimizer. By merging network layers and using precision quantization technology, it reduces the model's computational workload and memory usage, thereby increasing inference speed.

[0152] Operation and maintenance and security assurance module: Use automated operation and maintenance, security protection, and disaster recovery to ensure stable system operation and prevent security risks and failures. Specifically, it includes:

[0153] Automated Operation and Maintenance:

[0154] Configuration management: Record the computing center's hardware asset information, including server models, configuration parameters, IP addresses, MAC addresses, network topology, and connections between devices. Use automatic discovery tools to regularly scan the network and automatically update asset information to ensure data accuracy.

[0155] Fault management: According to the preset alarm rules, alarm information is sent to email, SMS, and instant messaging tools; based on factors such as fault type and urgency, it is automatically assigned to the corresponding operation and maintenance personnel for processing;

[0156] Safety protection system:

[0157] Access control: Role-based access control implements fine-grained control over user access to resources by defining different roles (such as administrator, general user, auditor) and assigning corresponding operation permissions to each role. Multi-factor authentication combines multiple authentication methods such as passwords, SMS verification codes, and biometrics to improve the security of user identity authentication and prevent unauthorized access caused by password leaks.

[0158] Data security: The transport layer uses encryption protocols to encrypt data during network transmission.

[0159] The above formulas are obtained by collecting a large amount of data and performing software simulation, and a formula close to the actual value is selected. The influencing weight factors and specific coefficient values ​​in the formula are set by technical personnel in this field according to actual conditions, and can be adjusted and modified later.

[0160] The above description of the embodiments is intended to enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A computing resource expansion system for an intelligent computing center, characterized in that: include: Hardware infrastructure module: provides physical support for the computing center, including computing, storage, network equipment and supporting facilities; Resource management and scheduling module: Dynamic allocation of computing resources, real-time monitoring, and intelligent scheduling of computing power based on node load assessment coefficients to achieve computing power resource expansion; Data interaction module: responsible for data access, preprocessing, output and external service interface management, ensuring efficient data circulation and interaction within and outside the system; Performance optimization and acceleration module: Improves computing task execution efficiency and reduces processing time through compilation optimization, algorithm acceleration, and hardware collaboration technology.

2. The intelligent computing center computing resource expansion system according to claim 1, characterized in that: Hardware infrastructure module, specifically including computing node clusters, storage systems, network architecture, and supporting infrastructure; The computing node cluster includes: General computing servers: Servers based on the x86 architecture are used for general data processing and web services; servers based on the ARM architecture are used for cloud-native applications and edge computing scenarios; GPU acceleration cluster: using NVIDIA's A100 and H100 GPUs; Specialized computing chips: including FPGA chips and ASIC chips; Heterogeneous computing platform: Connect the CPU with GPU and FPGA accelerator cards through the PCIe interface, and use the CUDA and OpenCL programming frameworks to enable different types of processors to work together; Storage System: High-performance storage: Disk arrays use high-speed protocols and are suitable for databases and real-time data analysis scenarios that require extremely high storage performance. Distributed storage systems meet data storage needs through multi-node data redundancy and intelligent data distribution. Massive data storage: Provides API interface to support massive unstructured data storage; Network architecture: High-speed Internet: 10 Gigabit Ethernet enables low-latency, high-bandwidth data transmission between computing nodes, meeting the data interaction needs of distributed computing and storage clusters; Network security components: Firewall devices implement secure filtering and access control of network traffic through access control lists, intrusion prevention systems, and virtual private network functions.

3. The intelligent computing center computing resource expansion system according to claim 2, characterized in that: Resource management and scheduling module, specifically including: Resource management platform: Virtualize the CPU, memory, storage, and network resources of a physical server into multiple virtual machines. Each virtual machine can independently run an operating system and applications, achieving resource isolation and sharing. Monitoring and metering: The CPU usage, memory usage, disk I / O, and network traffic metrics of computing nodes are collected through the Pull mode and stored in a time series database. Intelligent Scheduling: Obtain node computing power utilization data, task processing delay data, and task queue data; After analyzing the computing power utilization data, task processing delay data, and task queue data, we can obtain the computing power utilization offset value, task delay value, and backlog value. The load assessment coefficient is obtained by comprehensively processing the computing power using the offset value, task delay value, and backlog value; Based on the load evaluation coefficient of the node, new tasks are assigned to nodes with lower loads to avoid overloading some nodes and idling some nodes.

4. The intelligent computing center computing resource expansion system according to claim 3, characterized in that: The process of obtaining the hashrate utilization offset value includes: Obtain CPU core unutilization and GPU memory unutilization through the performance monitoring interface; Obtaining CPU core unutilization and GPU memory unutilization at preset time intervals, and respectively presetting CPU core unutilization thresholds and GPU memory unutilization thresholds; performing difference calculation between the obtained CPU core unutilization and GPU memory unutilization and the corresponding CPU core unutilization thresholds and GPU memory unutilization thresholds; Arrange the obtained core utilization difference and memory utilization difference according to the time series, and remove the values ​​less than 0; Count the core utilization differences and memory utilization differences respectively, divide the core utilization differences by the CPU core unutilization rate to get the core deviation; divide the memory utilization differences by the GPU memory unutilization rate to get the memory deviation; According to the time point of obtaining each core utilization difference value and each memory utilization difference value, the CPU core unutilization rate and the GPU memory unutilization rate corresponding to each core utilization difference value and each memory utilization difference value are obtained; The computing power utilization offset value is obtained by weighted calculation of the core utilization difference, memory utilization difference, CPU core unutilization rate, and GPU memory unutilization rate.

5. The intelligent computing center computing resource expansion system according to claim 4, characterized in that: The process of obtaining the task delay value includes: Get the time point when the task is submitted and the time point when the node receives the task, and get the duration between the two time points, which is recorded as the delay time; A delay time threshold is preset, and the difference between the delay time and the delay time threshold is calculated to obtain a delay difference; an allowable range of the delay difference is preset, and a delay difference that is not within the allowable range of the delay difference is recorded as an abnormal delay difference; Get the delay time of a preset number of tasks and calculate the corresponding abnormal delay difference; Arrange all the abnormal delay differences obtained according to the time series, and extract the three largest abnormal delay differences; arrange the three largest abnormal delay differences according to the time series as well, and record them as the first abnormal delay difference, the second abnormal delay difference, and the third abnormal delay difference respectively; Obtain the time differences between the first abnormal time difference and the second abnormal time difference, the second abnormal time difference and the third abnormal time difference, and the first abnormal time difference and the third abnormal time difference, and record them as the first interval difference, the second interval difference, and the third interval difference; Calculate the difference between the first abnormal time difference and the second abnormal time difference, take the absolute value, and then multiply it by the first interval difference to obtain a first quantized value; Calculate the difference between the second abnormal time difference and the third abnormal time difference, take the absolute value, and then multiply it by the second interval difference to obtain a first quantized value; Calculate the difference between the first abnormal time difference and the third abnormal time difference, take the absolute value, and then multiply it by the second interval difference to obtain a third quantized value; An ellipse model is established by using the first quantized value and the second quantized value as the major and minor semi-axes of the ellipse respectively, and an ellipsoid model is established by using the third quantized value as the height of the ellipse model. The volume of the ellipsoid model is calculated and recorded as the task delay value.

6. The intelligent computing center computing resource expansion system according to claim 5, characterized in that: The process of obtaining the backlog value includes: Get the number of pending tasks and the number of completed tasks in each node's task queue at preset time intervals; subtract the number of pending tasks from the number of completed tasks, remove the values ​​greater than 0, and take the absolute value of the remaining values ​​as the delay value; Obtain the number of delayed values ​​and divide it by the number of pending tasks to obtain the delay degree; Arrange the delay values ​​in time series, obtain the time difference between adjacent delay values, record it as delayed adjacent time, and extract the largest delayed adjacent time, record it as the maximum delayed adjacent time; The backlog value is obtained by weighted calculation of the delay degree and the maximum adjacent delay time.

7. The intelligent computing center computing resource expansion system according to claim 6, characterized in that: Use the computing power utilization offset value and the task delay value as the two right-angled sides of a right triangle, and connect the remaining side to form a complete right triangle. Use the backlog value as the height of the right triangle to build a triangular pyramid model. Calculate the volume of the triangular pyramid and record it as the load assessment coefficient. Obtain the load assessment coefficient of each node in turn; Three sets of threshold value ranges are preset, and each set of thresholds corresponds to a load level. The load assessment coefficient is matched with the value ranges of the three sets of thresholds to obtain the load level corresponding to the load assessment coefficient. The load level of each node is obtained in turn, and the corresponding number of tasks are allocated according to the size of the load level; the load level includes low load, medium load and high load, and the load level is proportional to the load.

8. The intelligent computing center computing resource expansion system according to claim 1, characterized in that: Data interaction module, specifically including: In the data input and output link, batch file transfer is realized, asynchronous access of real-time data is completed, and data can be read and written through direct connection to the database; The output end writes the processing results back to the database and pushes them to a third party through the API interface; The data preprocessing component is responsible for data cleaning, conversion and distribution, removing duplicate values, filling missing data, and converting the format after the cleaning operation; Caching hot data reduces database pressure and processes and distributes data streams in real time.

9. The intelligent computing center computing resource expansion system according to claim 1, characterized in that: Performance optimization and acceleration modules, including: Compilation optimization and parallel computing: Compiler optimization: Optimizes code to generate efficient machine code. Targeting the CPU's vectorized instruction set, the compiler automatically converts code suitable for vectorization into vectorized instructions, allowing multiple execution units to simultaneously process multiple data points, improving computing efficiency. Parallel computing framework: Rapid processing of large-scale data based on a distributed computing framework; Algorithm optimization and acceleration library: Mathematical library acceleration: Uses a mathematical function library to perform mathematical calculations for matrix operations and linear equations; provides efficient convolution, pooling, and activation function deep learning operators through a deep neural network library to accelerate the training and inference process of deep learning models.

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