Method for detecting ESD (Electro-Static Discharge) resistance of display module
By combining hardware circuits with detection methods, the display module's anti-ESD performance can be accurately judged, solving the problem of large human judgment errors in existing technologies and reducing the overall risk and economic losses of the machine.
Patent Information
- Application Number
- CN202511060417.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-30
- Publication Date
- 2025-09-26
AI Technical Summary
The existing technology lacks accurate detection methods to evaluate the anti-electrostatic discharge (ESD) performance of display modules, resulting in large errors in human judgment, which may cause the entire device to display abnormally or even be scrapped.
A hardware circuit is designed to connect the TPIO interface of the driver IC to the test mainboard through a detection line and a current-limiting resistor. The driver IC reads the ESD status register data and sends a specific electrical signal. The test mainboard determines the ESD performance of the module based on the electrical signal.
It achieves accurate detection of the display module's anti-ESD performance, reduces the risk of display abnormalities and scrapping of the entire machine, and reduces economic losses.
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of display modules, and in particular to a method for detecting the ESD resistance of a display module. Background Art
[0002] In the current LCD module industry, the flexible cables used to illuminate the modules serve as connections between test motherboards, fixtures, and modules, enabling electrical signal transmission. Electrostatic discharge (ESD), short for electrostatic discharge, generates a very high transient voltage at extremely high speeds, occurring within hundreds of millions of seconds. Failure to instantly conduct such high voltages can severely damage the circuit system. The ESD resistance of finished display modules is closely related to the FPC (Flexible Printed Circuit Board) that transmits electrical signals. Currently, there are no testing methods or systems to verify the ESD resistance of finished display modules. ESD testing is performed manually with the modules illuminated during the ESD testing process to verify the module's ESD resistance. This simulates ESD-induced failures under power-on conditions, packaging, transportation, and assembly. Due to the significant differences between the laboratory environment during the testing process (including two key factors, temperature and humidity) and the environment during packaging, transportation, and assembly, coupled with the fact that the results after the ESD test are manually judged, the module's ESD resistance results are inaccurate. For modules that are slightly damaged after the ESD test, the module's ESD resistance is judged by manually observing whether the illuminated module exhibits obvious display anomalies during the ESD test. This method cannot accurately detect the module's ESD resistance because human-detectable anomalies are only easily identified when the display is obviously abnormal or the screen is black. The power supply driving capacity used by the module manufacturer's fixtures and test motherboards is relatively high, so anomalies caused by minor module failures during the ESD test may not be obvious, making manual judgments prone to misjudgment. On the whole device side, due to the limited load capacity of the battery, problems such as display anomalies, no display, abnormal current flow, and poor touch performance will be significantly magnified after the assembly of a module that is slightly damaged after the ESD test.
[0003] Therefore, the existing technology has defects and needs to be improved. Summary of the Invention
[0004] The purpose of the present invention is to overcome the deficiencies of the prior art and provide a method for detecting the ESD resistance of a display module.
[0005] The technical solution of the present invention is as follows: The present invention provides a method for detecting the ESD resistance of a display module, comprising: Step 1: providing a display module and a test device, electrically connecting the display module and the test device, wherein a detection circuit for detecting ESD is provided on a module FPC of the display module, the detection circuit is connected to a TPIO interface of a driver IC and a test mainboard, and a current-limiting resistor is connected in series with the detection circuit; Step 2: Perform an ESD test on the display module. After the test is completed, the driver IC reads the register data recording the ESD status. If the register data is normal, a first signal is sent to the test mainboard via the detection circuit. If the register data is abnormal, a second signal is sent to the test mainboard via the detection circuit. Step 3: The test mainboard receives the electrical signal from the driver IC. If the received electrical signal is the first signal, the display module test result is determined to be normal and the test passes. If the received electrical signal is the second signal, the display module test result is determined to be abnormal. The test mainboard restarts the display module and enters step 4. Step 4: The driver IC reads the register data recording the ESD status, and sends a first signal to the test mainboard through the detection circuit when the register data is normal, and sends a second signal to the test mainboard through the detection circuit when the register data is abnormal; Step 5: The test mainboard receives an electrical signal from the driver IC. If the received electrical signal is the first signal, the display module test result is determined to be normal and the test passes; if the received electrical signal is the second signal, the display module test result is determined to be abnormal and the test fails.
[0006] Furthermore, the first signal is a high-level signal, and the second signal is a low-level signal.
[0007] Furthermore, the resistance of the current limiting resistor is 500 to 3000 ohms.
[0008] By adopting the above scheme, the beneficial effect of the present invention is that: by designing a hardware circuit in combination with a detection method to detect the display module after reset and restart, the module's anti-ESD performance can be accurately judged, avoiding the risk of sending modules with substandard anti-ESD performance to the client for installation, greatly reducing hidden dangers, and reducing the risk of poor display or even scrapping of the entire machine and economic losses. DETAILED DESCRIPTION
[0009] The present invention is described in detail below with reference to specific embodiments.
[0010] In this embodiment, the present invention provides a method for detecting the ESD resistance of a display module, comprising the following steps: Step 1: providing a display module and a test device, electrically connecting the display module and the test device, wherein the module FPC of the display module has a detection circuit for detecting ESD, the detection circuit is connected to the TPIO interface of the driver IC and the test mainboard, and a 1000 ohm current limiting resistor is connected in series on the detection circuit to avoid damage to the test mainboard.
[0011] Step 2: Perform an ESD test on the display module. After the test is completed, the driver IC reads the register data that records the ESD status. When the register data is normal, a first signal is sent to the test mainboard through the detection circuit. When the register data is abnormal, a second signal is sent to the test mainboard through the detection circuit. The first electrical signal is a 1.8V high-level signal and the second signal is a 0V low-level signal.
[0012] Step 3: The test mainboard receives an electrical signal from the driver IC. If the received electrical signal is the first signal, the display module test result is determined to be normal, the test passes, and the display module's anti-ESD performance is qualified; if the received electrical signal is the second signal, the display module test result is determined to be abnormal, the test mainboard restarts the display module and enters step 4.
[0013] Step 4: The driver IC reads the register data recording the ESD status, and sends a first signal to the test mainboard through the detection line when the register data is normal, and sends a second signal to the test mainboard through the detection line when the register data is abnormal.
[0014] Step 5: The test mainboard receives an electrical signal from the driver IC. If the received electrical signal is the first signal, the display module test result is determined to be normal, the test passes, and the display module's anti-ESD performance is qualified; if the received electrical signal is the second signal, the display module test result is determined to be abnormal, the test fails, and the display module's anti-ESD performance is unqualified.
[0015] In summary, the beneficial effect of this solution is that by designing a hardware circuit combined with a detection method to detect the display module after reset and restart, the module's anti-ESD performance can be accurately judged, avoiding the risk of sending modules with substandard anti-ESD performance to the client for installation, greatly reducing hidden dangers, and reducing the risk of poor display or even scrapping of the entire machine and economic losses. The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.
Claims
1. A method for detecting the ESD resistance of a display module, characterized in that: The method comprises the following steps: step 1: providing a display module and a test device, electrically connecting the display module and the test device, wherein a detection circuit for detecting ESD is provided on a module FPC of the display module, the detection circuit is connected to a TPIO interface of a driver IC and a test mainboard, and a current-limiting resistor is connected in series on the detection circuit; step 2: performing an anti-ESD test on the display module, and after the test is completed, causing the driver IC to read register data recording an ESD status, and sending a first signal to the test mainboard through the detection circuit when the register data is normal, and sending a second signal to the test mainboard through the detection circuit when the register data is abnormal; step 3: the test mainboard receives an electrical signal from the driver IC, and if the received electrical signal is the first signal, it is determined that the test result of the display module is normal and the test passes; if the received electrical signal is the second signal, it is determined that the test result of the display module is abnormal, and the test mainboard restarts the display module and enters step 4; Step 4: Instruct the driver IC to read the register data recording the ESD status, and send a first signal to the test mainboard through the detection circuit when the register data is normal, and send a second signal to the test mainboard through the detection circuit when the register data is abnormal; Step 5: The test mainboard receives the electrical signal from the driver IC, and if the received electrical signal is the first signal, it is determined that the display module test result is normal and the test passes; if the received electrical signal is the second signal, it is determined that the display module test result is abnormal and the test fails.
2. The method for detecting the ESD resistance of a display module according to claim 1, wherein: The first signal is a high-level signal, and the second signal is a low-level signal.
3. The method for detecting the ESD resistance of a display module according to claim 1, wherein: The resistance of the current limiting resistor is 500 to 3000 ohms.
