Receiving radio frequency link adjusting circuit and satellite terminal

Abstract

According to the receiving radio frequency link adjusting circuit and the satellite terminal provided by the invention, the baseband processor sets the time before the initial point of the cyclic prefix of the baseband signal to send the indication signal to the detector, so that the gain adjustment of the link is completed when the radio frequency signal is received, the control time delay is reduced, and the TTI-level real-time response is realized. The control time delay is reduced, so that the risk of burnout of a radio frequency rear-end device caused by over-high control time delay is avoided. By utilizing the characteristics that the radio frequency signal has periodicity and the signal strength of adjacent periods does not suddenly change, the gain adjustment strategy corresponding to the signal strength of the previous period is adopted to adjust the numerical control attenuator in the current period, so that the rationality and effectiveness of gain adjustment are guaranteed.

Description

Technical Field

[0001] The present application relates to the field of radio frequency communication technology, and in particular to a receiving radio frequency link adjustment circuit and a satellite terminal. Background Art

[0002] In traditional receive RF links, a detector or FPGA is used to detect the power of the RF signal. The FPGA / MCU then controls the attenuation of a digitally controlled attenuator or bypasses the low-noise amplifier to achieve gain control. This process requires the signal to pass through detection, ADC conversion, and FPGA / MCU processing before adjusting the attenuator. This results in high control loop latency and the risk of damaging back-end RF components. Summary of the Invention

[0003] The purpose of the embodiments of the present application is to provide a receiving radio frequency link adjustment circuit and a satellite terminal to solve the problem that the existing receiving radio frequency link gain control has a high delay and there is a risk of burning out the radio frequency back-end components.

[0004] An embodiment of the present application provides a receiving radio frequency link adjustment circuit, comprising: a digitally controlled attenuator, an adjustment module, a detector, a signal coupler, and a baseband processor; the signal coupler is configured to: allow a radio frequency signal to pass through the signal coupler and reach the digitally controlled attenuator, while simultaneously allowing a coupled signal from the signal coupler to enter the detector; the detector is configured to determine a corresponding voltage signal based on the signal strength of the coupled signal; and, upon receiving an indication signal, output a voltage signal to the adjustment module; the adjustment module is configured to adjust the gain of the digitally controlled attenuator based on the voltage signal; the baseband processor is configured to set a time before a starting point of a cyclic prefix of the baseband signal and send an indication signal to the detector; the indication signal is configured to instruct the detector to output a voltage signal corresponding to a previous period of the radio frequency signal.

[0005] Among them, the radio frequency signal (i.e., satellite signal) is periodic, and the signal strength of adjacent cycles does not change suddenly. Therefore, the gain adjustment strategy corresponding to the signal strength of the previous cycle can be used to adjust the digitally controlled attenuator in the current cycle.

[0006] In the above technical solution, the baseband processor sets a time before the start of the baseband signal's cyclic prefix to send an indication signal to the detector. This ensures that link gain adjustment is complete upon receiving the RF signal, reducing control latency and achieving real-time response at the TTI level. This reduced control latency avoids the risk of damaging RF back-end components due to excessive control latency. By leveraging the periodicity of RF signals (satellite signals) and the fact that signal strength does not change suddenly between consecutive cycles, the gain adjustment strategy corresponding to the signal strength of the previous cycle is used to adjust the digitally controlled attenuator in the current cycle, ensuring the rationality and effectiveness of gain adjustment.

[0007] In some optional implementations, the baseband processor is further configured to instruct the detector to output a voltage signal corresponding to a current cycle of the RF signal when there is no voltage signal corresponding to a previous cycle of the RF signal.

[0008] In this technical solution, the baseband processor instructs the detector to output the voltage signal corresponding to the current RF signal cycle when the voltage signal corresponding to the previous RF signal cycle is not present. This allows the circuit to adapt to a variety of complex operating scenarios. Gain adjustment can be performed both during initial signal reception and after signal interruption, ensuring the normal operation of the receive RF chain and greatly improving the circuit's adaptability.

[0009] In some optional embodiments, the time T is set: T=T2+T1; wherein T1 is the time from the cyclic prefix starting point of the RF signal to the cyclic prefix starting point of the baseband signal in the same period, and T2 is the time from the cyclic prefix starting point of the baseband signal to the effectiveness of the adjustment in the same period.

[0010] In the above technical solution, T1 is the time from the input of the cyclic prefix starting point of the RF signal to the input of the cyclic prefix starting point of the baseband signal in the same period, and T2 is the time from the starting point of the cyclic prefix of the baseband signal to the effective date of the adjustment in the same period. By defining the set time T as the sum of T1 and T2, the total time required from the starting point of the cyclic prefix of the RF signal to the effective date of the gain adjustment can be accurately calculated. When the time T is set before the baseband processor to send an indication signal to the detector, it can be ensured that the gain adjustment takes effect just when the RF signal is received, achieving a precise match between the gain adjustment timing and the RF signal period, and avoiding problems caused by adjustment too early or too late.

[0011] Specifically, if adjustment is performed too early, gain adjustment is completed before the RF signal arrives, potentially causing signal distortion. If adjustment is performed too late, the RF signal has already entered the receive chain before gain adjustment takes effect, potentially damaging RF backend components due to excessive signal strength. Precisely setting the time T effectively avoids these problems and ensures accurate signal reception.

[0012] In some optional embodiments, the invention further comprises: a low noise amplifier with a bypass; the radio frequency signal passes through the signal coupler and the digitally controlled attenuator in sequence to reach the low noise amplifier; The regulating module is also used to adjust the gain of the low noise amplifier according to the voltage signal.

[0013] In actual communication scenarios, signal strength will fluctuate greatly due to factors such as distance, obstacles, and interference. The low-noise amplifier with bypass provides an additional transmission path for the signal. When the input signal strength is too large, the signal can be transmitted through the bypass without going through the amplification link, enabling the system to handle a wide range of signal strengths from extremely weak to strong, greatly broadening the dynamic range of signal reception.

[0014] The regulation module adjusts the gain of the low-noise amplifier according to the voltage signal, realizing automatic control of the working state of the low-noise amplifier, that is, automatically selecting to amplify the signal or transmit the signal through the bypass according to the strength of the input signal, ensuring that the signal is always within the appropriate processing range.

[0015] In some optional embodiments, the system further includes: a radio frequency transceiver chip; the radio frequency signal passes through the signal coupler, the digitally controlled attenuator, and the low noise amplifier in sequence to reach the radio frequency transceiver chip; The RF transceiver chip is used to convert the analog signal output by the low-noise amplifier into a digital baseband signal and transmit the baseband signal to the baseband processor; the baseband processor is also used to determine the starting point of the baseband signal cyclic prefix based on the baseband signal.

[0016] In the above technical solution, after the baseband processor determines the starting point of the baseband signal cyclic prefix, it advances the starting point of the baseband signal cyclic prefix of the next cycle by T1+T2 according to the pre-calibrated times T1 and T2, and sends an indication signal to the detector to ensure that the gain adjustment takes effect just when the RF signal is received.

[0017] In some optional embodiments, the regulating module includes a comparator; the comparator is used to compare the voltage signal output by the detector with the comparison voltage, and output the control level to the controlled end of the digitally controlled attenuator or the low noise amplifier.

[0018] In the above technical solution, the voltage signal output by the detector is positively correlated with the signal strength of the RF signal. A comparator is used to compare the voltage signal with a comparison voltage. When the voltage signal is greater than the comparison voltage, a high-level control level is output to the digitally controlled attenuator to control the digitally controlled attenuator to attenuate the RF signal, and / or a low-level control level is output to the low-noise amplifier, and the control signal is transmitted through the bypass of the low-noise amplifier. When the voltage signal is less than the comparison voltage, a low-level control signal is output to the digitally controlled attenuator to control the digitally controlled attenuator not to attenuate the RF signal, and / or a high-level control level is output to the low-noise amplifier to control the low-noise amplifier to amplify the signal.

[0019] In some optional embodiments, the adjustment module includes a first comparator, a second comparator, a third comparator and a fourth comparator; the first comparator is used to compare the voltage signal output by the detector with the first comparison voltage, and output a first control level to the first controlled end of the digitally controlled attenuator; the second comparator is used to compare the voltage signal output by the detector with the second comparison voltage, and output a second control level to the second controlled end of the digitally controlled attenuator; the third comparator is used to compare the voltage signal output by the detector with the third comparison voltage, and output a third control level to the third controlled end of the digitally controlled attenuator; the fourth comparator is used to compare the voltage signal output by the detector with the fourth comparison voltage, and output a fourth control level to the controlled end of the low-noise amplifier; wherein, 0<first comparison voltage<second comparison voltage<fourth comparison voltage<third comparison voltage.

[0020] In the above technical solution, control signals are generated by parallel processing of the first comparator, the second comparator, the third comparator, and the fourth comparator, respectively, and transmitted to the first controlled terminal, the second controlled terminal, the third controlled terminal of the digitally controlled attenuator, and the controlled terminal of the low-noise amplifier, specifically including: When the voltage signal is less than the first comparison voltage, the first comparator outputs a low level to the first controlled end of the digitally controlled attenuator, the second comparator outputs a low level to the second controlled end of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled end of the low noise amplifier.

[0021] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first comparator outputs a high level to the first controlled end of the digitally controlled attenuator, the second comparator outputs a low level to the second controlled end of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled end of the low noise amplifier.

[0022] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first comparator outputs a high level to the first controlled end of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled end of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled end of the low noise amplifier.

[0023] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first comparator outputs a high level to the first controlled end of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled end of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth comparator outputs a high level to the controlled end of the low noise amplifier.

[0024] When the voltage signal is greater than the third comparison voltage, the first comparator outputs a high level to the first controlled end of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled end of the digitally controlled attenuator, the third comparator outputs a high level to the third controlled end of the digitally controlled attenuator, and the fourth comparator outputs a high level to the controlled end of the low noise amplifier.

[0025] In some optional implementations, the regulating module includes a MOS tube; The MOS tube is used to obtain and output the corresponding control level to the controlled end of the digitally controlled attenuator or low-noise amplifier based on the voltage signal output by the detector.

[0026] In the above technical solution, the voltage signal output by the detector is positively correlated with the signal strength of the RF signal. A MOS transistor is used to compare the voltage signal with a comparison voltage. When the voltage signal is greater than the comparison voltage, a high-level control level is output to the digitally controlled attenuator to control the digitally controlled attenuator to attenuate the RF signal, and / or a low-level control level is output to the low-noise amplifier, and the control signal is transmitted through the bypass of the low-noise amplifier. When the voltage signal is less than the comparison voltage, a low-level control signal is output to the digitally controlled attenuator to control the digitally controlled attenuator not to attenuate the RF signal, and / or a high-level control level is output to the low-noise amplifier to control the low-noise amplifier to amplify the signal.

[0027] In some optional embodiments, the adjustment module includes: a first MOS transistor, a second MOS transistor, a third MOS transistor and a fourth MOS transistor; the first MOS transistor is used to obtain and output a first control level to a first controlled end of the digitally controlled attenuator according to a voltage signal output by the detector; the second MOS transistor is used to obtain and output a second control level to a second controlled end of the digitally controlled attenuator according to the voltage signal output by the detector; the third MOS transistor is used to obtain and output a third control level to a third controlled end of the digitally controlled attenuator according to the voltage signal output by the detector; and the fourth MOS transistor is used to obtain and output a fourth control level to a controlled end of a low-noise amplifier according to the voltage signal output by the detector.

[0028] In the above technical solution, the voltage signal output by the detector enters different MOS tubes after passing through different voltage-dividing resistors. Then, through parallel processing by the first MOS tube, the second MOS tube, the third MOS tube, and the fourth MOS tube, control signals are generated and transmitted to the first controlled terminal, the second controlled terminal, the third controlled terminal of the digitally controlled attenuator, and the controlled terminal of the low-noise amplifier, respectively. Specifically, the following steps are taken: When the voltage signal is less than the first comparison voltage, the first MOS tube outputs a low level to the first controlled end of the digitally controlled attenuator, the second MOS tube outputs a low level to the second controlled end of the digitally controlled attenuator, the third MOS tube outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth MOS tube outputs a low level to the controlled end of the low noise amplifier.

[0029] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first MOS tube outputs a high level to the first controlled end of the digitally controlled attenuator, the second MOS tube outputs a low level to the second controlled end of the digitally controlled attenuator, the third MOS tube outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth MOS tube outputs a low level to the controlled end of the low noise amplifier.

[0030] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first MOS tube outputs a high level to the first controlled end of the digitally controlled attenuator, the second MOS tube outputs a high level to the second controlled end of the digitally controlled attenuator, the third MOS tube outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth MOS tube outputs a low level to the controlled end of the low noise amplifier.

[0031] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first MOS tube outputs a high level to the first controlled end of the digitally controlled attenuator, the second MOS tube outputs a high level to the second controlled end of the digitally controlled attenuator, the third MOS tube outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth MOS tube outputs a high level to the controlled end of the low noise amplifier.

[0032] When the voltage signal is greater than the third comparison voltage, the first MOS tube outputs a high level to the first controlled end of the digitally controlled attenuator, the second MOS tube outputs a high level to the second controlled end of the digitally controlled attenuator, the third MOS tube outputs a high level to the third controlled end of the digitally controlled attenuator, and the fourth MOS tube outputs a high level to the controlled end of the low noise amplifier.

[0033] In some optional embodiments, the first controlled end of the digitally controlled attenuator corresponds to a controllable attenuation of 4 dB, the first controlled end of the digitally controlled attenuator corresponds to a controllable attenuation of 8 dB, and the first controlled end of the digitally controlled attenuator corresponds to a controllable attenuation of 16 dB; The maximum gain of the low noise amplifier is 22dB, and the minimum gain of the low noise amplifier is -1dB.

[0034] In the above technical solution, when the voltage signal is less than the first comparison voltage, the first MOS transistor outputs a low level to the first controlled terminal of the digitally controlled attenuator, the second MOS transistor outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third MOS transistor outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOS transistor outputs a low level to the controlled terminal of the low-noise amplifier. At this point, the digitally controlled attenuator is in a non-attenuating state, the low-noise amplifier is in an amplifying state, and the link gain is 22dB.

[0035] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first MOS transistor outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuating the signal by 4dB). The second MOS transistor outputs a low level to the second controlled terminal of the digitally controlled attenuator. The third MOS transistor outputs a low level to the third controlled terminal of the digitally controlled attenuator. The fourth MOS transistor outputs a low level to the controlled terminal of the low-noise amplifier. At this point, the digitally controlled attenuator attenuates by 4dB, the low-noise amplifier is amplifying, and the link gain is 18dB.

[0036] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first MOS transistor outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuation of 4dB), the second MOS transistor outputs a high level to the second controlled terminal of the digitally controlled attenuator (attenuation of 8dB), the third MOS transistor outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOS transistor outputs a low level to the controlled terminal of the low-noise amplifier. At this point, the digitally controlled attenuator attenuates a total of 12dB, the low-noise amplifier is in amplification mode, and the link gain is 10dB.

[0037] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first MOS transistor outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuation of 4dB), the second MOS transistor outputs a high level to the second controlled terminal of the digitally controlled attenuator (attenuation of 8dB), the third MOS transistor outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOS transistor outputs a high level to the controlled terminal of the low-noise amplifier (attenuation of 1dB). At this point, the digitally controlled attenuator attenuates 12dB in total, the low-noise amplifier is in bypass mode, and the link gain is -13dB.

[0038] When the voltage signal is greater than the third comparison voltage, the first MOS transistor outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second MOS transistor outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third MOS transistor outputs a high level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOS transistor outputs a high level to the controlled terminal of the low-noise amplifier. At this point, the digitally controlled attenuator attenuates by 28 dB, the low-noise amplifier is in bypass mode, and the link gain is -29 dB.

[0039] In summary, the automatic gain adjustment range of the link is -29dB to +22dB, with a gain range of 51dB.

[0040] An embodiment of the present application provides a satellite terminal, comprising any one of the above-described receiving radio frequency link adjustment circuits. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0042] Figure 1 A schematic diagram of the structure of a receiving radio frequency link adjustment circuit provided in the first embodiment of the present application; Figure 2 A schematic diagram of the structure of a receiving radio frequency link adjustment circuit provided in the second embodiment of the present application; Figure 3 A schematic diagram of a receiving radio frequency link adjustment circuit structure provided in the third embodiment of the present application; Figure 4 A schematic diagram of the structure of a receiving RF link adjustment circuit provided in the fourth embodiment of the present application. DETAILED DESCRIPTION

[0043] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0044] The purpose of the embodiments of the present application is to provide a receiving radio frequency link adjustment circuit and a satellite terminal to solve the problem that the existing receiving radio frequency link gain control has a high delay and there is a risk of burning out the radio frequency back-end components.

[0045] Please refer to Figure 1 , Figure 1 A schematic structural diagram of a receiving radio frequency link adjustment circuit provided in the first embodiment of the present application includes: a digitally controlled attenuator, an adjustment module, a detector, a signal coupler and a baseband processor.

[0046] The signal coupler is used for: the radio frequency signal passes through the signal coupler to reach the digital controlled attenuator, and at the same time, the coupled signal of the signal coupler enters the detector.

[0047] The detector is used to determine the corresponding voltage signal according to the signal strength of the coupled signal; and output the voltage signal to the regulating module when receiving the indication signal.

[0048] The adjustment module is used to adjust the gain of the digitally controlled attenuator based on the voltage signal. The adjustment module, such as a voltage comparator or MOS transistor, compares the voltage signal with the corresponding threshold and outputs high or low level signals to the adjustment port of the digitally controlled attenuator to achieve gain adjustment.

[0049] The baseband processor is used to set a time before the baseband signal cyclic prefix starting point and send an indication signal to the detector. The indication signal is used to instruct the detector to output the voltage signal corresponding to the previous cycle of the RF signal. Specifically, the detector obtains a new voltage signal in each cycle. At the beginning of the current cycle, the indication signal first controls the detector to continue outputting the voltage signal of the previous cycle until the detector generates the voltage signal of the current cycle. The detector then updates the output voltage signal. The baseband signal is the signal that enters the baseband processor after the RF signal is processed, and the baseband signal cyclic prefix starting point is the starting point of the cyclic prefix in the baseband signal.

[0050] The RF signal (i.e., satellite signal) is periodic, and the signal strength in adjacent cycles does not change suddenly. Therefore, the gain adjustment strategy corresponding to the signal strength in the previous cycle (i.e., the voltage signal corresponding to the previous cycle of the RF signal) can be used to adjust the digitally controlled attenuator in the current cycle.

[0051] In an embodiment of the present application, the baseband processor sets a time before the starting point of the baseband signal cyclic prefix to send an indication signal to the detector, so that the link gain adjustment is completed when the RF signal is received, the control delay is reduced, and TTI-level real-time response is achieved. Since the control delay is reduced, the risk of burning out the RF back-end components due to excessive control delay is avoided. Taking advantage of the fact that the RF signal (satellite signal) is periodic and the signal strength of adjacent cycles does not change suddenly, the gain adjustment strategy corresponding to the signal strength of the previous cycle is used to adjust the digitally controlled attenuator in the current cycle, ensuring the rationality and effectiveness of the gain adjustment.

[0052] Please refer to Figure 2 , Figure 2 A schematic diagram of the structure of a receiving RF link adjustment circuit provided in the second embodiment of the present application.

[0053] In some optional implementations, the baseband processor is further configured to instruct the detector to output a voltage signal corresponding to a current cycle of the RF signal when there is no voltage signal corresponding to a previous cycle of the RF signal.

[0054] In this embodiment of the present application, the baseband processor instructs the detector to output the voltage signal corresponding to the current RF signal cycle when the voltage signal corresponding to the previous RF signal cycle is not present. This allows the circuit to adapt to a variety of complex operating scenarios. Whether receiving a signal for the first time or re-receiving it after a signal interruption, gain adjustment can be performed to ensure the normal operation of the receiving RF chain, greatly improving the circuit's adaptability.

[0055] Specifically, in one possible embodiment, when the detector generates a voltage signal based on the coupled signal, it sends the voltage signal to the baseband processor. If the baseband processor does not have the voltage signal from the previous cycle, it immediately instructs the detector to output the voltage signal, thereby achieving gain adjustment. In other words, while the first gain adjustment will experience a certain delay, subsequent gain adjustments will experience no delay (or reduced delay).

[0056] In some optional embodiments, the time T is set: T=T2+T1; T1 is the time from the cyclic prefix starting point of the RF signal to the cyclic prefix starting point of the baseband signal in the same period, and T2 is the time from the cyclic prefix starting point of the baseband signal to the time when the adjustment takes effect in the same period.

[0057] In the embodiment of the present application, T1 is the time from the cyclic prefix starting point of the RF signal to the cyclic prefix starting point of the baseband signal in the same period, and T2 is the time from the cyclic prefix starting point of the baseband signal to the time when the adjustment takes effect in the same period. By defining the set time T as the sum of T1 and T2, the total time required from the start point of the cyclic prefix of the RF signal to the time when the gain adjustment takes effect can be accurately calculated. When the time T is set before the baseband processor to send an indication signal to the detector, it can be ensured that the gain adjustment takes effect just when the RF signal is received, thereby achieving a precise match between the gain adjustment timing and the RF signal period, and avoiding problems caused by adjustment too early or too late.

[0058] Specifically, if adjustment is performed too early, gain adjustment is completed before the RF signal arrives, potentially causing signal distortion. If adjustment is performed too late, the RF signal has already entered the receive chain before gain adjustment takes effect, potentially damaging RF backend components due to excessive signal strength. Precisely setting the time T effectively avoids these problems and ensures accurate signal reception.

[0059] In some optional embodiments, the device further includes: a radio frequency transceiver chip; The RF transceiver chip is used to convert the analog signal output by the low-noise amplifier into a digital baseband signal and transmit the baseband signal to the baseband processor; The baseband processor is further configured to determine a starting point of a cyclic prefix of the baseband signal according to the baseband signal.

[0060] In an embodiment of the present application, after the baseband processor determines the starting point of the baseband signal cyclic prefix, it advances the starting point of the baseband signal cyclic prefix of the next cycle by T1+T2 according to the pre-calibrated times T1 and T2, and sends an indication signal to the detector to ensure that the gain adjustment takes effect when the RF signal is received.

[0061] In some optional embodiments, the present invention further comprises: a low noise amplifier with a bypass; The regulating module is also used to adjust the gain of the low noise amplifier according to the voltage signal.

[0062] In actual communication scenarios, signal strength will fluctuate greatly due to factors such as distance, obstacles, and interference. The low-noise amplifier with bypass provides an additional transmission path for the signal. When the input signal strength is too large, the signal can be transmitted through the bypass without going through the amplification link, enabling the system to handle a wide range of signal strengths from extremely weak to strong, greatly broadening the dynamic range of signal reception.

[0063] The regulation module adjusts the gain of the low-noise amplifier according to the voltage signal, realizing automatic control of the working state of the low-noise amplifier, that is, automatically selecting to amplify the signal or transmit the signal through the bypass according to the strength of the input signal, ensuring that the signal is always within the appropriate processing range.

[0064] In some optional embodiments, the adjustment module includes a comparator; The comparator is used to compare the voltage signal output by the detector with the comparison voltage, and output the control level to the controlled end of the digitally controlled attenuator or the low noise amplifier.

[0065] In an embodiment of the present application, the voltage signal output by the detector is positively correlated with the signal strength of the radio frequency signal. A comparator is used to compare the voltage signal with a comparison voltage. When the voltage signal is greater than the comparison voltage, a high-level control level is output to a digitally controlled attenuator to control the digitally controlled attenuator to attenuate the radio frequency signal, and / or a low-level control level is output to a low-noise amplifier, and the control signal is transmitted through a bypass of the low-noise amplifier. When the voltage signal is less than the comparison voltage, a low-level control signal is output to the digitally controlled attenuator to control the digitally controlled attenuator not to attenuate the radio frequency signal, and / or a high-level control level is output to the low-noise amplifier to control the low-noise amplifier to amplify the signal.

[0066] For details, please refer to Figure 3 , Figure 3 A schematic diagram of a receive RF link regulation circuit structure provided in the third embodiment of the present application. The regulation module of this embodiment includes a first comparator, a second comparator, a third comparator, and a fourth comparator. The voltage signal output by the detector is simultaneously input to the first, second, third, and fourth comparators, which process the voltage signal in parallel to obtain a corresponding control level.

[0067] The first comparator is used to compare the voltage signal output by the detector with the first comparison voltage, and output a first control level to the first controlled terminal of the digitally controlled attenuator; The second comparator is used to compare the voltage signal output by the detector with the second comparison voltage, and output a second control level to the second controlled terminal of the digitally controlled attenuator; The third comparator is used to compare the voltage signal output by the detector with the third comparison voltage, and output a third control level to the third controlled terminal of the digitally controlled attenuator; The fourth comparator is used to compare the voltage signal output by the detector with a fourth comparison voltage, and output a fourth control level to the controlled terminal of the low noise amplifier; Here, 0 < first comparison voltage < second comparison voltage < fourth comparison voltage < third comparison voltage. It should be noted that the voltage signal is positively correlated with the strength of the RF signal. The first, second, third, and fourth voltages are also related to the strength of the RF signal. The relative magnitudes of the first, second, third, and fourth voltages are related to the adjustable attenuation value of the digitally controlled attenuator (or the amplification factor of the low-noise amplifier). For example, 0 < first comparison voltage (0.4V) < second comparison voltage (1V) < fourth comparison voltage (2V) < third comparison voltage (3.4V).

[0068] In the embodiment of the present application, control signals are generated by parallel processing of the first comparator, the second comparator, the third comparator, and the fourth comparator, respectively, and transmitted to the first controlled terminal, the second controlled terminal, the third controlled terminal, and the controlled terminal of the low-noise amplifier of the digitally controlled attenuator, specifically including: When the voltage signal is less than the first comparison voltage, the first comparator outputs a low level to the first controlled end of the digitally controlled attenuator, the second comparator outputs a low level to the second controlled end of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled end of the low noise amplifier.

[0069] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first comparator outputs a high level to the first controlled end of the digitally controlled attenuator, the second comparator outputs a low level to the second controlled end of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled end of the low noise amplifier.

[0070] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first comparator outputs a high level to the first controlled end of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled end of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled end of the low noise amplifier.

[0071] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first comparator outputs a high level to the first controlled end of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled end of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth comparator outputs a high level to the controlled end of the low noise amplifier.

[0072] When the voltage signal is greater than the third comparison voltage, the first comparator outputs a high level to the first controlled end of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled end of the digitally controlled attenuator, the third comparator outputs a high level to the third controlled end of the digitally controlled attenuator, and the fourth comparator outputs a high level to the controlled end of the low noise amplifier.

[0073] In some optional embodiments, the first controlled end of the digitally controlled attenuator corresponds to a controllable attenuation of 4 dB, the first controlled end of the digitally controlled attenuator corresponds to a controllable attenuation of 8 dB, and the first controlled end of the digitally controlled attenuator corresponds to a controllable attenuation of 16 dB; the maximum gain of the low noise amplifier is 22 dB, and the minimum gain of the low noise amplifier is -1 dB.

[0074] In this embodiment of the present application, when the voltage signal is less than the first comparison voltage, the first comparator outputs a low level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled terminal of the low-noise amplifier. At this point, the digitally controlled attenuator is in a non-attenuating state, the low-noise amplifier is in an amplifying state, and the link gain is 22dB.

[0075] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuating the signal by 4dB). The second comparator outputs a low level to the second controlled terminal of the digitally controlled attenuator. The third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator. The fourth comparator outputs a low level to the controlled terminal of the low-noise amplifier. At this point, the digitally controlled attenuator attenuates the signal by 4dB, the low-noise amplifier is amplifying, and the link gain is 18dB.

[0076] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuating 4dB), the second comparator outputs a high level to the second controlled terminal of the digitally controlled attenuator (attenuating 8dB), the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a low level to the controlled terminal of the low-noise amplifier. At this point, the digitally controlled attenuator attenuates 12dB in total, the low-noise amplifier is amplifying, and the link gain is 10dB.

[0077] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuating 4dB), the second comparator outputs a high level to the second controlled terminal of the digitally controlled attenuator (attenuating 8dB), the third comparator outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a high level to the controlled terminal of the low-noise amplifier (attenuating 1dB). At this point, the digitally controlled attenuator has a total attenuation of 12dB, the low-noise amplifier is in bypass mode, and the link gain is -13dB.

[0078] When the voltage signal is greater than the third comparison voltage, the first comparator outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second comparator outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third comparator outputs a high level to the third controlled terminal of the digitally controlled attenuator, and the fourth comparator outputs a high level to the controlled terminal of the low-noise amplifier. At this point, the digitally controlled attenuator attenuates 28dB in total, the low-noise amplifier is in bypass mode, and the link gain is -29dB.

[0079] Therefore, in this embodiment, the automatic gain adjustment range of the entire link is -29dB to +22dB, and the gain range is 51dB.

[0080] In some optional implementations, the regulating module includes a MOS tube; The MOS tube is used to obtain and output the corresponding control level to the controlled end of the digitally controlled attenuator or low-noise amplifier based on the voltage signal output by the detector.

[0081] In an embodiment of the present application, the voltage signal output by the detector is positively correlated with the signal strength of the radio frequency signal. The voltage signal is compared with a comparison voltage using a MOS tube. When the voltage signal is greater than the comparison voltage, a high-level control level is output to a digitally controlled attenuator to control the digitally controlled attenuator to attenuate the radio frequency signal, and / or a low-level control level is output to a low-noise amplifier, and the control signal is transmitted through a bypass of the low-noise amplifier. When the voltage signal is less than the comparison voltage, a low-level control signal is output to the digitally controlled attenuator to control the digitally controlled attenuator not to attenuate the radio frequency signal, and / or a high-level control level is output to the low-noise amplifier to control the low-noise amplifier to amplify the signal.

[0082] For details, please refer to Figure 4 , Figure 4 A schematic diagram of a receiving radio frequency link adjustment circuit structure provided in the fourth embodiment of the present application. The adjustment module of this embodiment includes: a first MOS transistor, a second MOS transistor, a third MOS transistor, and a fourth MOS transistor; The first MOS tube is used to obtain and output a first control level to a first controlled terminal of the digitally controlled attenuator according to the voltage signal output by the detector; The second MOS tube is used to obtain and output a second control level to the second controlled end of the digitally controlled attenuator according to the voltage signal output by the detector; The third MOS tube is used to obtain and output a third control level to the third controlled terminal of the digitally controlled attenuator according to the voltage signal output by the detector; The fourth MOS transistor is used to obtain and output a fourth control level to the controlled end of the low noise amplifier according to the voltage signal output by the detector.

[0083] In the embodiment of the present application, the voltage signal output by the detector enters different MOS transistors after passing through different voltage-dividing resistors, and then is processed in parallel by the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor to generate control signals, which are transmitted to the first controlled terminal, the second controlled terminal, the third controlled terminal of the digitally controlled attenuator, and the controlled terminal of the low-noise amplifier, respectively. Specifically, the control signals include: When the voltage signal is less than the first comparison voltage, the first MOS tube outputs a low level to the first controlled end of the digitally controlled attenuator, the second MOS tube outputs a low level to the second controlled end of the digitally controlled attenuator, the third MOS tube outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth MOS tube outputs a low level to the controlled end of the low noise amplifier.

[0084] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first MOS tube outputs a high level to the first controlled end of the digitally controlled attenuator, the second MOS tube outputs a low level to the second controlled end of the digitally controlled attenuator, the third MOS tube outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth MOS tube outputs a low level to the controlled end of the low noise amplifier.

[0085] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first MOS tube outputs a high level to the first controlled end of the digitally controlled attenuator, the second MOS tube outputs a high level to the second controlled end of the digitally controlled attenuator, the third MOS tube outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth MOS tube outputs a low level to the controlled end of the low noise amplifier.

[0086] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first MOS tube outputs a high level to the first controlled end of the digitally controlled attenuator, the second MOS tube outputs a high level to the second controlled end of the digitally controlled attenuator, the third MOS tube outputs a low level to the third controlled end of the digitally controlled attenuator, and the fourth MOS tube outputs a high level to the controlled end of the low noise amplifier.

[0087] When the voltage signal is greater than the third comparison voltage, the first MOS tube outputs a high level to the first controlled end of the digitally controlled attenuator, the second MOS tube outputs a high level to the second controlled end of the digitally controlled attenuator, the third MOS tube outputs a high level to the third controlled end of the digitally controlled attenuator, and the fourth MOS tube outputs a high level to the controlled end of the low noise amplifier.

[0088] In some optional embodiments, the first controlled end of the digitally controlled attenuator corresponds to a controllable attenuation of 4 dB, the first controlled end of the digitally controlled attenuator corresponds to a controllable attenuation of 8 dB, and the first controlled end of the digitally controlled attenuator corresponds to a controllable attenuation of 16 dB; The maximum gain of the low noise amplifier is 22dB, and the minimum gain of the low noise amplifier is -1dB.

[0089] In this embodiment of the present application, when the voltage signal is less than the first comparison voltage, the first MOS transistor outputs a low level to the first controlled terminal of the digitally controlled attenuator, the second MOS transistor outputs a low level to the second controlled terminal of the digitally controlled attenuator, the third MOS transistor outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOS transistor outputs a low level to the controlled terminal of the low-noise amplifier. At this point, the digitally controlled attenuator is in a non-attenuating state, the low-noise amplifier is in an amplifying state, and the link gain is 22dB.

[0090] When the voltage signal is greater than the first comparison voltage and less than the second comparison voltage, the first MOS transistor outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuating the signal by 4dB). The second MOS transistor outputs a low level to the second controlled terminal of the digitally controlled attenuator. The third MOS transistor outputs a low level to the third controlled terminal of the digitally controlled attenuator. The fourth MOS transistor outputs a low level to the controlled terminal of the low-noise amplifier. At this point, the digitally controlled attenuator attenuates by 4dB, the low-noise amplifier is amplifying, and the link gain is 18dB.

[0091] When the voltage signal is greater than the second comparison voltage and less than the fourth comparison voltage, the first MOS transistor outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuation of 4dB), the second MOS transistor outputs a high level to the second controlled terminal of the digitally controlled attenuator (attenuation of 8dB), the third MOS transistor outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOS transistor outputs a low level to the controlled terminal of the low-noise amplifier. At this point, the digitally controlled attenuator attenuates a total of 12dB, the low-noise amplifier is in amplification mode, and the link gain is 10dB.

[0092] When the voltage signal is greater than the fourth comparison voltage and less than the third comparison voltage, the first MOS transistor outputs a high level to the first controlled terminal of the digitally controlled attenuator (attenuation of 4dB), the second MOS transistor outputs a high level to the second controlled terminal of the digitally controlled attenuator (attenuation of 8dB), the third MOS transistor outputs a low level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOS transistor outputs a high level to the controlled terminal of the low-noise amplifier (attenuation of 1dB). At this point, the digitally controlled attenuator attenuates 12dB in total, the low-noise amplifier is in bypass mode, and the link gain is -13dB.

[0093] When the voltage signal is greater than the third comparison voltage, the first MOS transistor outputs a high level to the first controlled terminal of the digitally controlled attenuator, the second MOS transistor outputs a high level to the second controlled terminal of the digitally controlled attenuator, the third MOS transistor outputs a high level to the third controlled terminal of the digitally controlled attenuator, and the fourth MOS transistor outputs a high level to the controlled terminal of the low-noise amplifier. At this point, the digitally controlled attenuator attenuates by 28 dB, the low-noise amplifier is in bypass mode, and the link gain is -29 dB.

[0094] Therefore, in this embodiment, the automatic gain adjustment range of the entire link is -29dB to +22dB, and the gain range is 51dB.

[0095] An embodiment of the present application provides a satellite terminal, comprising any one of the above-described receiving radio frequency link adjustment circuits.

[0096] In the embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interface, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0097] In addition, the units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0098] Furthermore, the functional modules in each embodiment of the present application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0099] In this document, relational terms such as first and second, etc. are used merely to distinguish one entity or operation from another entity or operation, but do not necessarily require or imply any actual relationship or order between these entities or operations.

[0100] The above description is merely an embodiment of the present application and is not intended to limit the scope of protection of the present application. For those skilled in the art, various modifications and variations of the present application are possible. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A receiving radio frequency link adjustment circuit, characterized in that: include: Digitally controlled attenuators, adjustment modules, detectors, signal couplers, and baseband processors; The signal coupler is used for: the radio frequency signal reaches the digitally controlled attenuator through the signal coupler, and at the same time, the coupled signal of the signal coupler enters the detector; The detector is used to determine a corresponding voltage signal according to the signal strength of the coupled signal; and output the voltage signal to the regulating module when receiving an indication signal; The adjustment module is used to adjust the gain of the digitally controlled attenuator according to the voltage signal; The baseband processor is used to set the time before the starting point of the baseband signal cyclic prefix and send an indication signal to the detector; the indication signal is used to instruct the detector to output the voltage signal corresponding to the previous cycle of the radio frequency signal.

2. The circuit according to claim 1, wherein The baseband processor is further configured to instruct the detector to output a voltage signal corresponding to a current cycle of the radio frequency signal when there is no voltage signal corresponding to a previous cycle of the radio frequency signal.

3. The circuit according to claim 1, wherein The set time T: T=T2+T1; T1 is the time from the cyclic prefix starting point of the RF signal to the cyclic prefix starting point of the baseband signal in the same period, and T2 is the time from the cyclic prefix starting point of the baseband signal to the time when the adjustment takes effect in the same period.

4. The circuit according to claim 1, wherein Also includes: A low-noise amplifier with bypass; the radio frequency signal passes through the signal coupler and the digitally controlled attenuator in sequence to reach the low-noise amplifier; The adjustment module is further configured to adjust the gain of the low noise amplifier according to the voltage signal.

5. The circuit according to claim 4, wherein Also includes: RF transceiver chip; the RF signal passes through the signal coupler, digitally controlled attenuator, and low noise amplifier in sequence to reach the RF transceiver chip; The RF transceiver chip is used to convert the analog signal output by the low-noise amplifier into a digital baseband signal, and transmit the baseband signal to the baseband processor; The baseband processor is further configured to determine a baseband signal cyclic prefix starting point according to the baseband signal.

6. The circuit according to claim 5, wherein: The adjustment module includes a comparator; The comparator is used to compare the voltage signal output by the detector with a comparison voltage, and output a control level to the controlled end of the digitally controlled attenuator or the low noise amplifier.

7. The circuit according to claim 6, wherein: The adjustment module includes a first comparator, a second comparator, a third comparator and a fourth comparator; The first comparator is used to compare the voltage signal output by the detector with a first comparison voltage, and output a first control level to the first controlled terminal of the digitally controlled attenuator; The second comparator is used to compare the voltage signal output by the detector with a second comparison voltage, and output a second control level to the second controlled terminal of the digitally controlled attenuator; The third comparator is used to compare the voltage signal output by the detector with a third comparison voltage, and output a third control level to the third controlled terminal of the digitally controlled attenuator; The fourth comparator is used to compare the voltage signal output by the detector with a fourth comparison voltage, and output a fourth control level to the controlled terminal of the low noise amplifier; Wherein, 0<first comparison voltage<second comparison voltage<fourth comparison voltage<third comparison voltage.

8. The circuit according to claim 5, wherein: The regulating module includes a MOS tube; The MOS tube is used to obtain and output a corresponding control level to the controlled end of the digitally controlled attenuator or the low-noise amplifier according to the voltage signal output by the detector.

9. The circuit according to claim 8, wherein The regulating module includes: a first MOS transistor, a second MOS transistor, a third MOS transistor and a fourth MOS transistor; The first MOS transistor is used to obtain and output a first control level to the first controlled end of the digitally controlled attenuator according to the voltage signal output by the detector; The second MOS transistor is used to obtain and output a second control level to the second controlled end of the digitally controlled attenuator according to the voltage signal output by the detector; The third MOS transistor is used to obtain and output a third control level to the third controlled terminal of the digitally controlled attenuator according to the voltage signal output by the detector; The fourth MOS transistor is used to obtain and output a fourth control level to the controlled end of the low noise amplifier according to the voltage signal output by the detector.

10. A satellite terminal, characterized in that: It comprises a receiving radio frequency link adjustment circuit as described in any one of claims 1 to 9 above.

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