A package structure and a packaging method of an image device

Abstract

The application discloses an image device packaging structure and a packaging method. The image device packaging structure comprises a wafer, the wafer comprises a wafer body and a photosensitive chip on a first surface of the wafer body; a light-transmitting protective layer is located on the side of the first surface and contacts and covers the photosensitive chip; a superlens is located on the side, away from the wafer, of the light-transmitting protective layer, and the superlens and the photosensitive chip at least partially overlap in the thickness direction of the wafer body. By adopting the above technical means, the photosensitive chip can be completely sealed by arranging the light-transmitting protective layer, the packaging strength of the packaging structure is improved, and the thin type of the packaging structure is facilitated to be arranged; the superlens can be arranged to regulate and control light, the photoelectric conversion efficiency of the photosensitive chip is improved, and the performance of the image device is optimized.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of chip packaging, and in particular to a packaging structure and a packaging method of an image device. BACKGROUND

[0002] The packaging structure of the image device is widely used in the fields of imaging modules, intelligent terminals, vehicle-mounted vision, security monitoring and medical imaging.

[0003] At present, in the packaging structure of the image device, the photosensitive chip is usually arranged in a bonding cavity formed between a wafer body and a substrate, the packaging strength of the packaging structure is low, and it is difficult to realize the thin-type arrangement of the packaging structure of the image device. SUMMARY

[0004] The present application provides a packaging structure and a packaging method of an image device to improve the packaging strength of the packaging structure and realize the thin-type arrangement of the packaging structure, and to improve the light regulation effect of the image device and optimize the performance of the image device.

[0005] In a first aspect, an embodiment of the present application provides a packaging structure of an image device, comprising:

[0006] a wafer, comprising a wafer body and a photosensitive chip located on a first surface of the wafer body;

[0007] a light-transmitting protective layer located on one side of the first surface and contacting and covering the photosensitive chip;

[0008] a superlens located on a side of the light-transmitting protective layer away from the wafer, and along the thickness direction of the wafer body, the superlens at least partially overlaps the photosensitive chip.

[0009] Optionally, the superlens is arranged in contact with the light-transmitting protective layer.

[0010] Optionally, the wafer further comprises a wafer electrode located on the first surface, and the light-transmitting protective layer contacts and covers the wafer electrode.

[0011] The packaging structure further comprises an interconnection structure and a connecting bump.

[0012] The interconnection structure penetrates the wafer body and is electrically connected with the wafer electrode.

[0013] The connecting bump is located on a second surface of the wafer body and is electrically connected with the interconnection structure; the second surface is arranged opposite to the first surface.

[0014] Optionally, the superlens comprises a plurality of sub-lenses.

[0015] There are two different heights of the sub-lenses, and / or, there are two different cross-sectional areas of the sub-lenses.

[0016] Optionally, the superlens covers the photosensitive chip along a thickness direction of the wafer body.

[0017] In a second aspect, the embodiments of the present application further provide a packaging method of an image device, comprising:

[0018] providing a wafer, the wafer comprising a wafer body and a photosensitive chip on a first surface of the wafer body;

[0019] preparing a light-transmitting protective layer on a side of the first surface, the light-transmitting protective layer contacting and covering the photosensitive chip;

[0020] preparing a superlens on a side of the light-transmitting protective layer away from the wafer; along a thickness direction of the wafer body, the superlens at least partially overlaps the photosensitive chip.

[0021] Optionally, before preparing the light-transmitting protective layer on the side of the first surface, the method further comprises:

[0022] preparing a wafer electrode on the side of the first surface;

[0023] preparing the light-transmitting protective layer on the side of the first surface, the light-transmitting protective layer contacting and covering the photosensitive chip, comprising:

[0024] preparing the light-transmitting protective layer on the side of the first surface, the light-transmitting protective layer contacting and covering the photosensitive chip and the wafer electrode;

[0025] The packaging method further comprises:

[0026] preparing a via in the wafer body, the via penetrating through the wafer body and exposing the wafer electrode;

[0027] preparing an interconnection structure in the via, the interconnection structure being electrically connected with the wafer electrode;

[0028] preparing a connection bump on a second surface of the wafer body, the connection bump being electrically connected with the interconnection structure; the second surface is oppositely arranged with the first surface.

[0029] Optionally, before preparing the via in the wafer body, the method further comprises:

[0030] preparing a bonding glue layer on a side of the superlens away from the wafer, the bonding glue layer contacting and covering the superlens;

[0031] preparing a bonding substrate on a side of the bonding glue layer away from the wafer, the bonding substrate being bonded and connected with the wafer through the bonding glue layer.

[0032] Preparation of a via in the wafer body, comprising:

[0033] Thinning the wafer body from the second surface side of the wafer body;

[0034] Preparation of a via in the thinned wafer body;

[0035] After the bump is prepared on the second surface of the wafer body, further comprising:

[0036] Removing the bonding adhesive layer and the bonding substrate.

[0037] Optionally, an ultralens is prepared on the side of the light-transmitting protective layer away from the wafer, comprising:

[0038] According to at least one of the polarization requirement, phase requirement and amplitude requirement of the light rays by the photosensitive chip, a plurality of sub-lenses are prepared on the side of the light-transmitting protective layer away from the wafer, the heights of two of the sub-lenses are different, and / or the cross-sectional areas of two of the sub-lenses are different.

[0039] Optionally, an ultralens is prepared on the side of the light-transmitting protective layer away from the wafer, comprising:

[0040] An ultralens material layer is prepared on the side of the light-transmitting protective layer away from the wafer.

[0041] An ultralens is prepared on the side of the light-transmitting protective layer away from the wafer by using a nanoimprint technology.

[0042] The technical scheme provided by the embodiment of the present application, by setting a light-transmitting protective layer on the side of the first surface of the wafer body, and the light-transmitting protective layer contacting and covering the photosensitive chip, on the one hand, the photosensitive chip can be completely sealed by the light-transmitting protective layer, the packaging strength of the packaging structure is improved, and the thinness of the packaging structure is facilitated. On the other hand, the light-transmitting protective layer has high light-transmitting property and does not affect the absorption of light rays by the photosensitive chip. In addition, by setting an ultralens on the side of the light-transmitting protective layer away from the wafer, and the ultralens and the photosensitive chip at least partially overlapping in the thickness direction of the wafer body, the ultralens can regulate the incident light rays, and then the light rays regulated by the ultralens are incident on the photosensitive chip to form an image, thereby improving the imaging performance of the image device.

[0043] It should be understood that the content described in this part is not intended to identify key or important features of the embodiments of the present application, nor is it used to limit the scope of the present application. Other features of the present application will become apparent from the following description. BRIEF DESCRIPTION OF DRAWINGS

[0044] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments description will be briefly introduced. Obviously, the drawings in the following description only constitute some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained from these drawings without creative labor.

[0045] Figure 1 A structural schematic diagram of a packaging structure of an image device provided by an embodiment of the present application is shown in the figure.

[0046] Figure 2 A flowchart of a first packaging method of an image device provided by an embodiment of the present application is shown in the figure.

[0047] Figure 3 A flowchart of a first packaging method of an image device provided by an embodiment of the present application is shown in the figure. Figure 2 A flowchart of a first packaging method of an image device provided by an embodiment of the present application is shown in the figure.

[0048] Figure 4 A flowchart of a second packaging method of an image device provided by an embodiment of the present application is shown in the figure.

[0049] Figure 5 A flowchart of a second packaging method of an image device provided by an embodiment of the present application is shown in the figure. Figure 4 A flowchart of a second packaging method of an image device provided by an embodiment of the present application is shown in the figure.

[0050] Figure 6 A flowchart of a third packaging method of an image device provided by an embodiment of the present application is shown in the figure.

[0051] Figure 7 A flowchart of a third packaging method of an image device provided by an embodiment of the present application is shown in the figure. Figure 6 A flowchart of a third packaging method of an image device provided by an embodiment of the present application is shown in the figure.

[0052] Figure 8 A flowchart of a third packaging method of an image device provided by an embodiment of the present application is shown in the figure. Figure 6 A flowchart of a third packaging method of an image device provided by an embodiment of the present application is shown in the figure.

[0053] Figure 9 A flowchart of a fourth packaging method of an image device provided by an embodiment of the present application is shown in the figure.

[0054] Figure 10 A flowchart of a fifth packaging method of an image device provided by an embodiment of the present application is shown in the figure.

[0055] Figure 11 A flowchart of a fifth packaging method of an image device provided by an embodiment of the present application is shown in the figure. Figure 10 A flowchart of a fifth packaging method of an image device provided by an embodiment of the present application is shown in the figure. DETAILED DESCRIPTION

[0056] In the following, the technical solutions in the embodiments of the present application will be described clearly and completely with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by a person of ordinary skill in the art without creative effort should belong to the protection scope of the present application.

[0057] It should be noted that the terms "first", "second" and the like in the description and claims of the present application and the above drawings are used to distinguish similar objects, and do not necessarily indicate a specific order or sequence. It should be understood that the data thus used can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in other than the order illustrated or described herein. In addition, the terms "comprise" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device that includes a list of steps or units does not necessarily limit to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0058] Figure 1 A structural schematic diagram of a packaging structure of an image device provided by an embodiment of the present application is shown in Figure 1 The packaging structure of the image device includes: a wafer 10, the wafer 10 includes a wafer body 101 and a photosensitive chip 102 located on a first surface aa of the wafer body 101; a light-transmitting protective layer 20 located on the side of the first surface aa and contacting and covering the photosensitive chip 102; a superlens 30 located on the side of the light-transmitting protective layer 20 away from the wafer 10, and the superlens 30 at least partially overlaps with the photosensitive chip 102 along the thickness direction of the wafer body (for example, the Z direction shown in Figure 1

[0059] Specifically, the wafer 10 includes the wafer body 101 and the photosensitive chip 102 located on the first surface aa of the wafer body 101. The wafer body 101 is used to carry the photosensitive chip 102. The first surface aa can be the upper surface of the wafer body 101, that is, the photosensitive chip 102 is located on the upper surface of the wafer body 101. The photosensitive chip 102 is used to convert the incident light signal into an electrical signal, and then make the image device output digital image data.

[0060] ​Specifically, the light-transmitting protective layer 20 is located on the side of the first surface aa and contacts the light-sensing chip 102, that is, the light-transmitting protective layer 20 contacts the upper surface and the side surface of the light-sensing chip 102, that is, the light-sensing chip 102 is located between the light-transmitting protective layer 20 and the wafer body 101, which is conducive to completely sealing the light-sensing chip 102. As a comparative example, the light-sensing chip in the prior art is usually arranged in the bonding cavity formed between the wafer body and the substrate, however, the embodiment of the present application contacts and covers the light-sensing chip 102 through the light-transmitting protective layer 20, on the one hand, the light-transmitting protective layer 20 protects the light-sensing chip 102 and improves the packaging strength of the packaging structure, on the other hand, the thinness of the light-transmitting protective layer 20 can realize the thinness of the packaging structure, and the flexibility of the thickness of the packaging structure is higher. In addition, the light-transmitting protective layer 20 has high light-transmitting property, that is, the light incident to the light-transmitting protective layer 20 will not be absorbed by the light-transmitting protective layer 20, but will be transmitted to the light-sensing chip 102 after passing through the light-transmitting protective layer 20, thereby not affecting the light absorption of the light-sensing chip 102.

[0061] As an example, the material of the light-transmitting protective layer 20 can be a high-transmittance sealing glue, which can on the one hand ensure the adhesion between the light-transmitting protective layer 20 and the first surface aa, and on the other hand ensure that the light-transmitting protective layer 20 has high light-transmitting property, thereby improving the imaging effect of the imaging device.

[0062] Specifically, the superlens 30 is located on the side of the light-transmitting protective layer 20 away from the wafer 10, that is, the superlens 30 is arranged on the upper surface of the light-transmitting protective layer 20, at this time, the light-transmitting protective layer 20 can be used as the substrate of the superlens 30 and other subsequent film layers located on the side of the light-transmitting protective layer 20 away from the wafer body 101, which is conducive to the preparation of other film layers. Further, along the thickness direction Z of the wafer body, the superlens 30 at least partially overlaps the light-sensing chip 102. That is, the orthographic projection of the superlens 30 on the wafer body 101 at least partially overlaps the orthographic projection of the light-sensing chip 102 on the wafer body 101, so that in the overlapping area of the superlens 30 and the light-sensing chip 102, the light passes through the superlens 30 and the light-transmitting protective layer 20 in turn and is incident to the light-sensing chip 102, thereby realizing the imaging function of the imaging device.

[0063] It should be noted that the superlens 30 can regulate at least one of the polarization, phase and amplitude requirements of the incident light, thereby ensuring that the light incident to the light-sensing chip 102 after being regulated by the superlens 30 meets the polarization, phase and amplitude requirements of the light-sensing chip 102, so as to improve the efficiency of the light-sensing chip 102 in converting the optical signal into an electrical signal and improve the imaging effect.

[0064] As an example, Figure 1The technical scheme shows that the superlens 30 covers the photosensitive chip 102 along the thickness direction Z of the wafer body, that is, the light rays after being regulated by the superlens 30 can almost be incident on the photosensitive chip 102, so that the efficiency of converting the optical signal into the electrical signal by the photosensitive chip 102 can be further improved, and the imaging effect of the imaging device is improved.

[0065] The packaging structure of the imaging device provided by the embodiment of the present application can completely seal the photosensitive chip by arranging the light-transmitting protective layer on one side of the first surface of the wafer body, improve the packaging strength of the packaging structure, and facilitate the thin design of the packaging structure. The light-transmitting protective layer has high light-transmitting property and does not affect the absorption of the light rays by the photosensitive chip. In addition, the superlens is arranged on the side of the light-transmitting protective layer away from the wafer, and the superlens and the photosensitive chip at least partially overlap along the thickness direction of the wafer body. In this way, the superlens can regulate the incident light rays, and the light rays after being regulated by the superlens are incident on the photosensitive chip for imaging, so that the imaging performance of the imaging device is improved.

[0066] Optionally, with reference to Figure 1 , the superlens 30 is arranged in contact with the light-transmitting protective layer 20.

[0067] Specifically, the superlens 30 is arranged in contact with the light-transmitting protective layer 20, that is, the lower surface of the superlens 30 is in contact with the upper surface of the light-transmitting protective layer 20. In other words, the light-transmitting protective layer 20 can be used as a substrate, and the superlens 30 is arranged on the upper side of the light-transmitting protective layer 20. Since the upper surface of the light-transmitting protective layer 20 has good flatness, the stability and reliability of the superlens 30 are improved. In addition, the superlens 30 is in direct contact with the light-transmitting protective layer 20, and no other structure is arranged between the superlens 30 and the light-transmitting protective layer 20, so that the thin design of the packaging structure is facilitated. In addition, the light rays after being regulated by the superlens 30 are incident on the photosensitive chip 102 with a small optical path, that is, the light rays incident on the photosensitive chip 102 have excellent optical performance, so that the imaging effect of the imaging device is improved.

[0068] Specifically, the nano-imprinting technology can be used to prepare the superlens 30 on the side of the light-transmitting protective layer 20 away from the wafer 10, so as to regulate the light rays.

[0069] Optionally, with reference to Figure 1 , the wafer 10 further includes a wafer electrode 103 located on the first surface aa, and the light-transmitting protective layer 20 covers the wafer electrode 103 in contact; the packaging structure further includes an interconnection structure 40 and a connecting bump 50; the interconnection structure 40 penetrates the wafer body 101 and is electrically connected with the wafer electrode 103; the connecting bump 50 is located on the second surface bb of the wafer body 101 and is electrically connected with the interconnection structure 40; and the second surface bb is arranged opposite to the first surface aa.

[0070] Specifically, the wafer electrode 103 is located on the first surface aa, i.e., the upper surface of the wafer body 101, for electrical connection with an external circuit to ensure the transmission of electrical signals. The light-transmitting protective layer 20 contacts and covers the wafer electrode 103, so that the stability of the wafer electrode 103 can be protected by the light-transmitting protective layer 20 to prevent damage to the wafer electrode 103.

[0071] Specifically, the second surface bb of the wafer body 101 can be the lower surface of the wafer body 101. The connecting bump 50 is located on the second surface bb of the wafer body 101, i.e., the connecting bump 50 is located on the lower surface of the wafer body 101. The interconnection structure 40 penetrates the wafer body 101 and is electrically connected with the wafer electrode 103 and the connecting bump 50. In other words, the interconnection structure 40 can serve as a transition connection structure between the wafer electrode 103 and the connecting bump 50, so that the wafer electrode 103 is electrically connected with the external circuit through the interconnection structure 40 and the connecting bump 50, which is conducive to ensuring the electrical connection between the photosensitive chip 102 and the outside world, and thus realizing the transmission of imaging electrical signals.

[0072] It should be noted that, continuing to refer to Figure 1 , the left and right sides of the interconnection structure 40 can also include a passivation structure 100, which serves a passivation function and can protect the through hole. The passivation structure 100 does not completely cover the wafer electrode 103, i.e., the wafer electrode 103 is exposed for design, so that the wafer electrode 103 is electrically connected with the external circuit through the interconnection structure 40 and the connecting bump 50. Specifically, a through hole is prepared in the wafer body 101, the through hole penetrates the wafer body 101 and exposes the wafer electrode 103, then a passivation layer is deposited on the sidewall of the through hole, and the passivation structure 100 is formed by patterning the passivation layer. Then, the interconnection structure 40 is prepared in the through hole and the connecting bump 50 is prepared on the second surface bb of the wafer body 101, so as to realize the electrical connection between the wafer electrode 103 and the external circuit.

[0073] It should be noted that a connecting structure 110 can be provided between the interconnection structure 40 and the connecting bump 50, wherein the connecting structure 110 can be nickel and gold, so as to improve the stability of the connection between the interconnection structure 40 and the connecting bump 50, and thus improve the stability and reliability of the packaging structure.

[0074] For example, a person skilled in the art can set the thickness of the passivation structure 100 according to actual needs, and the present embodiment does not make specific limitations thereon.

[0075] Optionally, continuing to refer to Figure 1 , the superlens 30 includes a plurality of sub-lenses 301; there are two sub-lenses 301 with different heights, and / or there are two sub-lenses 301 with different cross-sectional areas.

[0076] Specifically, the superlens 30 includes a plurality of independently arranged sub-lenses 301. For example, the cross-sectional shape of each sub-lens 301 can be rectangular.

[0077] As a feasible implementation, the heights of two sub-lenses 301 in the plurality of sub-lenses 301 are different. For example, in the case that the cross-sectional areas of the sub-lenses 301 are the same, the greater the height of the sub-lens 301, the stronger the phase modulation ability of the sub-lens 301 on the light. For example, in the case that the height of the first sub-lens 31 is greater than the height of the second sub-lens 32, the first sub-lens 31 has a stronger phase modulation ability on the light than the second sub-lens 32 when the light respectively enters the first sub-lens 31 and the second sub-lens 32.

[0078] As another feasible implementation, the cross-sectional areas of two sub-lenses 301 in the plurality of sub-lenses 301 are different. The cross-sectional area can be understood as the width of the sub-lens 301. For example, in the case that the heights of the sub-lenses 301 are the same, the greater the cross-sectional area of the sub-lens 301, the stronger the phase modulation ability of the sub-lens 301 on the light. For example, in the case that the cross-sectional area of the third sub-lens 33 is greater than the cross-sectional area of the first sub-lens 31, the third sub-lens 33 has a stronger phase modulation ability on the light than the first sub-lens 31 when the light respectively enters the first sub-lens 31 and the third sub-lens 33.

[0079] As still another feasible implementation, the heights of two sub-lenses 301 in the plurality of sub-lenses 301 are different, and the cross-sectional areas of two sub-lenses 301 are different. For example, in the case of the first sub-lens 31, the second sub-lens 32, and the third sub-lens 33, the heights of the first sub-lens 31 and the second sub-lens 32 are different, and the cross-sectional area of the third sub-lens 33 is different from that of the first sub-lens 31. In this way, on the one hand, the regulation of the light can be realized, and on the other hand, the flexibility of the superlens 30 can be realized.

[0080] It should be noted that the distance between two adjacent sub-lenses 301 can be the same or different, which is conducive to further improving the flexibility of the superlens 30 and realizing the diversification of the image device. Specifically, in the preparation process of the superlens 30, a whole layer of superlens material layer can be prepared first, and then the nano-imprinting technology can be used to prepare the superlens 30 on the side of the light-transmitting protective layer 20 away from the wafer 10, so that the height, cross-section, and distance between two adjacent sub-lenses 301 can be controlled, that is, the sub-lenses 301 with the required size can be manufactured according to the needs, and then the superlens 30 is formed.

[0081] Optionally, continuing to refer to Figure 1The superlens 30 covers the photosensitive chip 102 along the thickness direction Z of the wafer body.

[0082] Specifically, the superlens 30 covers the photosensitive chip 102, that is, the orthographic projection of the superlens 30 on the wafer body 101 covers the orthographic projection of the photosensitive chip 102 on the wafer body 101. Thus, the light rays regulated by the superlens 30 can all be incident on the photosensitive chip 102, which can ensure that more light rays are incident on the photosensitive chip 102 after being regulated by the superlens 30, thereby improving the imaging effect of the image device.

[0083] Based on the same inventive concept, the embodiment of the present application also provides a packaging method of an image device, Figure 2 The flowchart of the first packaging method of the image device provided by the embodiment of the present application is shown in Figure 3 The process flowchart of the packaging method of the image device is shown in Figure 2 The packaging method of the image device includes: Figure 2 and Figure 3 The packaging method of the image device includes:

[0084] S101, providing a wafer, the wafer comprising a wafer body and a photosensitive chip located on a first surface of the wafer body.

[0085] Specifically, referring to step (a1) in Figure 3 The wafer 10 comprises a wafer body 101 and a photosensitive chip 102 located on a first surface aa of the wafer body 101. The wafer body 101 is used to carry the photosensitive chip 102. The first surface aa can be the upper surface of the wafer body 101, that is, the photosensitive chip 102 is located on the upper surface of the wafer body 101. The photosensitive chip 102 is used to convert incident light signals into electrical signals, thereby enabling the image device to output digital image data.

[0086] S102, preparing a light-transmitting protective layer on the side of the first surface, the light-transmitting protective layer being in contact with and covering the photosensitive chip.

[0087] Specifically, referring to Figure 3In step (b1) in the method, the light-transmissive protective layer 20 is located on the side of the first surface aa and contacts the light-sensing chip 102, that is, the light-transmissive protective layer 20 contacts the upper surface and the side surface of the light-sensing chip 102, that is, the light-sensing chip 102 is located between the light-transmissive protective layer 20 and the wafer body 101, which is conducive to completely sealing the light-sensing chip 102. As a comparison, the light-sensing chip 103 in the prior art is usually arranged in the bonding cavity formed between the wafer body and the substrate, however, the embodiment of the present application contacts and covers the light-sensing chip 102 by the light-transmissive protective layer 20, on the one hand, the light-transmissive protective layer 20 protects the light-sensing chip 102 and improves the packaging strength of the packaging structure, on the other hand, the light-transmissive protective layer 20 is thin, which can realize the thinness of the packaging structure and has high flexibility in the thickness of the packaging structure. In addition, the light-transmissive protective layer 20 has high light transmittance, that is, the light incident to the light-transmissive protective layer 20 will not be absorbed by the light-transmissive protective layer 20 but be transmitted to the light-sensing chip 102 through the light-transmissive protective layer 20, which will not affect the light absorption of the light-sensing chip 102.

[0088] S103, preparing a superlens on the side of the light-transmissive protective layer away from the wafer, and the superlens and the light-sensing chip at least partially overlap along the thickness direction of the wafer body.

[0089] Specifically, referring to step (c1) in the method, Figure 3 In step (c1) in the method, the superlens 30 is located on the side of the light-transmissive protective layer 20 away from the wafer 10, that is, the superlens 30 is arranged on the upper surface of the light-transmissive protective layer 20, at this time, the light-transmissive protective layer 20 can be used as the substrate of the superlens 30 and other subsequent film layers located on the side of the light-transmissive protective layer 20 away from the wafer body 101, which is conducive to the preparation of other film layers. Further, the superlens 30 and the light-sensing chip 102 at least partially overlap along the thickness direction Z of the wafer body. That is, the orthographic projection of the superlens 30 on the wafer body 101 and the orthographic projection of the light-sensing chip 102 on the wafer body 101 at least partially overlap, so that in the overlapping area of the superlens 30 and the light-sensing chip 102, the light successively passes through the superlens 30 and the light-transmissive protective layer 20 and is incident to the light-sensing chip 102, realizing the imaging function of the image device.

[0090] The packaging method of the image device provided by the embodiment of the present application can completely seal the light-sensing chip by preparing the light-transmissive protective layer on the side of the first surface of the wafer body, improve the packaging strength of the packaging structure, and the light-transmissive protective layer has high light transmittance and will not affect the light absorption of the light-sensing chip. In addition, the superlens is prepared on the side of the light-transmissive protective layer away from the wafer, and the superlens and the light-sensing chip at least partially overlap along the thickness direction of the wafer body, so that the superlens can regulate the incident light, and then the light regulated by the superlens is incident to the light-sensing chip for imaging, which can improve the imaging performance of the image device.

[0091] Optionally, Figure 4 A flowchart of a second packaging method of an image device according to an embodiment of the present application is shown in FIG. 2B. Figure 5 A flowchart of a second packaging method of an image device according to an embodiment of the present application is shown in FIG. 2B. Figure 4 A flowchart of a second packaging method of an image device according to an embodiment of the present application is shown in FIG. 2B. Figure 4 A flowchart of a second packaging method of an image device according to an embodiment of the present application is shown in FIG. 2B. Figure 5 A flowchart of a second packaging method of an image device according to an embodiment of the present application is shown in FIG. 2B. Figure 4 A flowchart of a second packaging method of an image device according to an embodiment of the present application is shown in FIG. 2B. Figure 5 A flowchart of a second packaging method of an image device according to an embodiment of the present application is shown in FIG. 2B.

[0092] S201, providing a wafer, the wafer comprising a wafer body and a photosensitive chip on a first surface of the wafer body.

[0093] Specifically, refer to step (a2) in FIG. 1A. Figure 5 S202, preparing a wafer electrode on the first surface side.

[0094] Specifically, refer to step (b2) in FIG. 1A.

[0095] Figure 5 Specifically, refer to step (b2) in FIG. 1A.

[0096] S203, preparing a light-transmitting protective layer on the first surface side, the light-transmitting protective layer contacting and covering the photosensitive chip and the wafer electrode.

[0097] Specifically, refer to step (c2) in FIG. 1A. Figure 5 Specifically, refer to step (c2) in FIG. 1A.

[0098] S204, preparing a superlens on a side of the light-transmitting protective layer away from the wafer, the superlens at least partially overlapping the photosensitive chip along a thickness direction of the wafer body.

[0099] Figure 5 Specifically, refer to step (d2) in FIG. 1A.

[0100] S205, preparing a via in the wafer body, the via penetrating through the wafer body and exposing the wafer electrode.

[0101] Specifically, refer to step (e2) in FIG. 1A. Figure 5 Specifically, refer to step (e2) in FIG. 1A.​​

[0102] S206. An interconnect structure is fabricated in the through-hole, and the interconnect structure is electrically connected to the wafer electrode.

[0103] For details, please refer to Figure 5 In step (f2), an interconnect structure 40 is fabricated in the via 60, and the interconnect structure is electrically connected to the wafer electrode 103 of 40.

[0104] It should be noted that before fabricating the interconnect structure 40 in the via 60, a passivation layer is deposited on the sidewall of the via 60, and a passivation structure 100 is formed by patterning the passivation layer. Thus, the passivation structure 100 helps to achieve passivation and protect the via 60.

[0105] S207. Connecting bumps are prepared on the second surface of the wafer body, and the connecting bumps are electrically connected to the interconnect structure; the second surface is disposed opposite to the first surface.

[0106] For details, please refer to Figure 5 In step (g2), a connection bump 50 is fabricated on the second surface bb of the wafer body 101. The connection bump 50 is electrically connected to the interconnect structure 40. The second surface bb is positioned opposite to the first surface aa. The interconnect structure 40 penetrates the wafer body 101 and is electrically connected to the wafer electrode 103 and the connection bump 50. In other words, the interconnect structure 40 can serve as a transitional connection structure between the wafer electrode 103 and the connection bump 50, allowing the wafer electrode 103 to be electrically connected to external circuits through the interconnect structure 40 and the connection bump 50. This facilitates ensuring the electrical connection between the photosensitive chip 102 and the outside world, thereby enabling the transmission of imaging electrical signals.

[0107] It should be noted that the reference Figure 6 Step (g2) in the process, before the connection bump 50 is prepared on the second surface bb of the wafer body 101, further includes: preparing a connection structure 110 on the side of the interconnect structure 40 away from the wafer electrode 103, so as to improve the stability of the connection between the interconnect structure 40 and the connection bump 50, thereby improving the stability and reliability of the packaging structure.

[0108] The imaging device packaging method provided in this embodiment of the invention enables the electrical connection between the photosensitive chip and the outside world by setting wafer electrodes, interconnect structures and connection bumps, thereby realizing the transmission of imaging electrical signals.

[0109] Optional, Figure 7 This is a schematic flowchart of a third imaging device packaging method provided in an embodiment of the present invention. Figure 6 for Figure 8 A partial process flow diagram of the corresponding imaging device packaging method. Figure 6 for Figures 6-8 Another part of the process flow diagram for the packaging method of the corresponding imaging device is shown.Figures 6-8 On the basis of the above-mentioned embodiments, the operation before the through hole is prepared in the wafer body is described in detail, as shown in Figure 7 The packaging method of the image device includes:

[0110] S301, a wafer is provided, the wafer includes a wafer body and a photosensitive chip located on a first surface of the wafer body.

[0111] Specifically, refer to step (a3) in Figure 7 .

[0112] S302, a wafer electrode is prepared on the side of the first surface.

[0113] Specifically, refer to step (b3) in Figure 7 .

[0114] S303, a light-transmitting protective layer is prepared on the side of the first surface, the light-transmitting protective layer contacts and covers the photosensitive chip and the wafer electrode.

[0115] Specifically, refer to step (c3) in Figure 7 .

[0116] S304, a superlens is prepared on the side of the light-transmitting protective layer away from the wafer; along the thickness direction of the wafer body, the superlens at least partially overlaps the photosensitive chip.

[0117] Specifically, refer to step (d3) in Figure 7 .

[0118] S305, a bonding adhesive layer is prepared on the side of the superlens away from the wafer, the bonding adhesive layer contacts and covers the superlens.

[0119] Specifically, refer to step (e3) in Figure 7 , a bonding adhesive layer 70 is prepared on the side of the superlens 30 away from the wafer 10, the bonding adhesive layer 70 contacts and covers the superlens 30, so that the bonding adhesive layer 70 can protect the superlens 30 from being damaged in the subsequent process of thinning the wafer body 101, thereby ensuring the stability of the superlens 30.

[0120] S306, a bonding substrate is prepared on the side of the bonding adhesive layer away from the wafer, the bonding substrate is bonded and connected to the wafer through the bonding adhesive layer.

[0121] Specifically, refer to step (f3) in Figure 8 , a bonding substrate 80 is prepared on the side of the bonding adhesive layer 70 away from the wafer 10, the bonding substrate 80 is bonded and connected to the wafer 10 through the bonding adhesive layer 70. The bonding adhesive layer 70 can bond and connect the bonding substrate 80 to the wafer 10, so that the bonding substrate 80 plays a supporting role in the subsequent process of thinning the wafer body 101.

[0122] S307, thinning the wafer body from the second surface side of the wafer body.

[0123] Specifically, referring to step (g3) in FIG. 7, the wafer body 101 is thinned from the second surface bb side of the wafer body 101 to achieve thin-type arrangement of the image device. Figure 8

[0124] Illustratively, the material of the wafer body 101 can be a silicon substrate, which can be processed by mechanical grinding process using a diamond grinding wheel, or mechanical and chemical polishing, or plasma dry etching, or wet etching using fluorine-containing chemical solution.

[0125] S308, preparing a through hole in the thinned wafer body, the through hole penetrating through the wafer body and exposing a wafer electrode.

[0126] Specifically, referring to step (h3) in FIG. 7. Figure 8

[0127] S309, preparing an interconnection structure in the through hole, the interconnection structure being electrically connected with the wafer electrode.

[0128] Specifically, referring to step (i3) in FIG. 7. Figure 8

[0129] S310, preparing a connecting bump on the second surface of the wafer body, the connecting bump being electrically connected with the interconnection structure; the second surface being oppositely arranged with the first surface.

[0130] Specifically, referring to step (g3) in FIG. 7. Figure 8

[0131] S311, removing the bonding adhesive layer and the bonding substrate.

[0132] Specifically, referring to step (k3) in FIG. 7 to expose the superlens 30, and the preparation of the image device is completed. Figure 9

[0133] The packaging method of the image device provided by the embodiment of the present application can bond the bonding substrate to the wafer through the bonding adhesive layer, so that the superlens can be protected during the subsequent thinning process of the wafer body, and the bonding substrate can also play a supporting role.

[0134] Optionally, Figure 9 FIG. 7 is a flowchart of a fourth packaging method of an image device provided by an embodiment of the present application, Figure 9 Based on the above embodiment, the operation of preparing the superlens on the side of the light-transmitting protective layer away from the wafer is described in detail, as shown in FIG. 7, the packaging method of the image device comprises the following steps. Figure 3 ​​​​​​

[0135] S401, providing a wafer, the wafer comprising a wafer body and a photosensitive chip located on a first surface of the wafer body.

[0136] S402, preparing a light-transmitting protective layer on the first surface side, the light-transmitting protective layer contacting and covering the photosensitive chip.

[0137] S403, preparing a plurality of sub-lenses on the side of the light-transmitting protective layer away from the wafer according to at least one of the polarization requirement, the phase requirement and the amplitude requirement of the photosensitive chip for light, there being a difference in height between two sub-lenses, and / or there being a difference in cross-sectional area between two sub-lenses; the super-lens and the photosensitive chip at least partially overlap in the thickness direction of the wafer body.

[0138] With continued reference to step (c1) in Figure 10 The super-lens 30 can modulate the polarization, phase and amplitude of the light so that the modulated light meets the requirements of the photosensitive chip 102, thereby improving the imaging effect of the image device. As a possible implementation, there is a difference in height between two sub-lenses 301 in the plurality of sub-lenses 301. Taking the phase of the light modulated by the super-lens as an example, in the case where the cross-sectional areas of the sub-lenses 301 are the same, the greater the height of the sub-lenses 301, the stronger the phase modulation capability of the sub-lenses 301 for the light. Illustratively, taking the height of the first sub-lens 31 being greater than the height of the second sub-lens 32 as an example, so that the light respectively enters the first sub-lens 31 and the second sub-lens 32, the phase modulation capability of the first sub-lens 31 for the light is greater than the phase modulation capability of the second sub-lens 32 for the light.

[0139] As another possible implementation, there is a difference in cross-sectional area between two sub-lenses 301 in the plurality of sub-lenses 301. The cross-sectional area can be understood as the width of the sub-lenses 301. Taking the phase of the light modulated by the super-lens as an example, in the case where the heights of the sub-lenses 301 are the same, the greater the cross-sectional area of the sub-lenses 301, the stronger the phase modulation capability of the sub-lenses 301 for the light. Illustratively, taking the cross-sectional area of the third sub-lens 33 being greater than the cross-sectional area of the first sub-lens 31 as an example, so that the light respectively enters the first sub-lens 31 and the third sub-lens 33, the phase modulation capability of the third sub-lens 33 for the light is greater than the phase modulation capability of the first sub-lens 31 for the light.

[0140] As yet another possible implementation, there is a difference in height between two sub-lenses 301 in the plurality of sub-lenses 301, and there is a difference in cross-sectional area between two sub-lenses 301. Illustratively, taking the first sub-lens 31, the second sub-lens 32 and the third sub-lens 33 as an example, the height of the first sub-lens 31 is different from the height of the second sub-lens 32, and the cross-sectional area of the third sub-lens 33 is different from the cross-sectional area of the first sub-lens 31, so that on the one hand the regulation of the light can be realized, and on the other hand the flexibility of the arrangement of the super-lens 30 can be realized.

[0141] The packaging method of the image device provided by the embodiment of the present application can manufacture the sub-lenses of the required size according to the requirements, form the super-lens, and then make the light rays modulated by the super-lens meet the requirements of the photosensitive chip, thereby improving the imaging effect of the image device.

[0142] Optionally, Figure 11 The fifth packaging method of the image device provided by the embodiment of the present application is shown in the flowchart. Figure 10 The fifth packaging method of the image device provided by the embodiment of the present application is shown in the flowchart. Figure 10 The fifth packaging method of the image device provided by the embodiment of the present application is shown in the flowchart. Figure 11 And Figure 10 On the basis of the above-mentioned embodiment, the operation of manufacturing the super-lens on the side of the light-transmitting protective layer away from the wafer is described in detail. Figure 11 And Figure 11 The packaging method of the image device provided by the embodiment of the present application includes the following steps.

[0143] S501, providing a wafer, the wafer including a wafer body and a photosensitive chip on a first surface of the wafer body.

[0144] Specifically, refer to step (a4) in Figure 11 .

[0145] S502, manufacturing a light-transmitting protective layer on the side of the first surface, the light-transmitting protective layer contacting and covering the photosensitive chip.

[0146] Specifically, refer to step (b4) in Figure 11 .

[0147] S503, manufacturing a super-lens material layer on the side of the light-transmitting protective layer away from the wafer.

[0148] Specifically, refer to step (c4) in Figure 11 . The super-lens material layer 90 is manufactured on the side of the light-transmitting protective layer 20 away from the wafer 10, so that the super-lens material layer 90 can be processed to obtain the super-lens.

[0149] S504, manufacturing the super-lens on the side of the light-transmitting protective layer away from the wafer by using the nano-imprinting technology; along the thickness direction of the wafer body, the super-lens at least partially overlaps the photosensitive chip.

[0150] Specifically, refer to step (d4) in ​Step (d4) in the method. The nanoimprint technology is a kind of micro-nano processing technology with high precision, low cost and large-scale replication. The technology transfers the nanostructure pattern on the template to the substrate through mechanical imprinting, breaking through the diffraction limit of traditional photolithography. That is, the nanometer imprinting technology can be used to transfer the super lens pattern to the super lens material layer, and then form a plurality of independently arranged sub-lenses 301 to complete the preparation of the super lens 30, and then can replace the traditional lens to achieve the functions of focusing light, reducing pixel crosstalk, optimizing the light path angle and improving the overall imaging performance.

[0151] The packaging method of the image device provided by the embodiment of the application adopts the nanoimprint technology to prepare the super lens on the side of the light-transmitting protective layer away from the wafer, which realizes the preparation of the nanometer super lens on the one hand, and can save the multiple exposure and developing steps of the traditional photolithography, so that the preparation process is simple.

[0152] It should be understood that the various forms of flow shown above can be used to reorder, add or delete steps. For example, each step described in the present application can be executed in parallel, sequentially or in a different order, as long as the desired results of the technical solutions of the present application can be achieved, which is not limited herein.

[0153] The above specific embodiments do not constitute a limitation on the scope of protection of the present application. Those skilled in the art should understand that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A packaging structure for an imaging device, characterized in that, include: A wafer, the wafer comprising a wafer body and a photosensitive chip located on a first surface of the wafer body; A light-transmitting protective layer is located on one side of the first surface and contacts and covers the photosensitive chip; A superlens is located on the side of the light-transmitting protective layer away from the wafer and along the thickness direction of the wafer body; the superlens at least partially overlaps with the photosensitive chip. The superlens is disposed in contact with the light-transmitting protective layer; The superlens covers the photosensitive chip along the thickness direction of the wafer body.

2. The packaging structure according to claim 1, characterized in that, The wafer also includes wafer electrodes located on the first surface, and the light-transmitting protective layer contacts and covers the wafer electrodes; The packaging structure also includes interconnect structures and connection bumps; The interconnect structure extends through the wafer body and is electrically connected to the wafer electrodes; The connection bump is located on the second surface of the wafer body and is electrically connected to the interconnect structure; the second surface is disposed opposite to the first surface.

3. The packaging structure according to claim 1, characterized in that, The superlens includes multiple sublenses; There are two sub-lenses with different heights, and / or there are two sub-lenses with different cross-sectional areas.

4. A packaging method for an imaging device, characterized in that, include: A wafer is provided, the wafer including a wafer body and a photosensitive chip located on a first surface of the wafer body; A light-transmitting protective layer is prepared on one side of the first surface, and the light-transmitting protective layer contacts and covers the photosensitive chip; A superlens is fabricated on the side of the light-transmitting protective layer away from the wafer; along the thickness direction of the wafer body, the superlens at least partially overlaps with the photosensitive chip; The superlens is disposed in contact with the light-transmitting protective layer; The superlens covers the photosensitive chip along the thickness direction of the wafer body.

5. The packaging method according to claim 4, characterized in that, Before preparing the light-transmitting protective layer on one side of the first surface, the method further includes: A wafer electrode is fabricated on one side of the first surface; A light-transmitting protective layer is prepared on one side of the first surface, the light-transmitting protective layer contacting and covering the photosensitive chip, including: A light-transmitting protective layer is prepared on one side of the first surface, and the light-transmitting protective layer contacts and covers the photosensitive chip and the wafer electrode; The encapsulation method further includes: A via is formed in the wafer body, the via penetrating the wafer body and exposing the wafer electrode; An interconnect structure is fabricated in the via, and the interconnect structure is electrically connected to the wafer electrode. Connection bumps are formed on the second surface of the wafer body, and the connection bumps are electrically connected to the interconnect structure; the second surface is disposed opposite to the first surface.

6. The packaging method according to claim 5, characterized in that, Before fabricating through-holes in the wafer body, the method further includes: A bonding adhesive layer is prepared on the side of the superlens away from the wafer, and the bonding adhesive layer contacts and covers the superlens; A bonding substrate is prepared on the side of the bonding adhesive layer away from the wafer, and the bonding substrate is bonded to the wafer through the bonding adhesive layer; Fabricating through-holes in the wafer body includes: Thin the wafer body from one side of the second surface of the wafer body; Through-holes are fabricated in the thinned wafer body; After fabricating connection bumps on the second surface of the wafer body, the process further includes: Remove the bonding adhesive layer and the bonding substrate.

7. The packaging method according to claim 4, characterized in that, Fabricating a superlens on the side of the light-transmitting protective layer away from the wafer includes: Based on at least one of the polarization, phase, and amplitude requirements of the photosensitive chip for light, a plurality of sub-lenses are fabricated on the side of the light-transmitting protective layer away from the wafer, wherein two of the sub-lenses have different heights and / or two of the sub-lenses have different cross-sectional areas.

8. The packaging method according to claim 4, characterized in that, Fabricating a superlens on the side of the light-transmitting protective layer away from the wafer includes: A superlens material layer is prepared on the side of the light-transmitting protective layer away from the wafer; A superlens was fabricated on the side of the light-transmitting protective layer away from the wafer using nanoimprint technology.

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