MEMS inertial sensor and preparation method thereof

Abstract

The invention relates to the technical field of semiconductor devices, in particular to an MEMS inertial sensor and a preparation method thereof, and the sensor comprises a first supporting substrate and a first wafer which are stacked; a first groove is formed in one side, close to the first wafer, of the first supporting substrate; the first wafer comprises a fixed electrode, the projection of the fixed electrode on the first supporting substrate is located in the first groove, and a gap is formed between the bottom surface of the first groove and the fixed electrode; and a supporting column which extends along the direction vertical to the first wafer and is connected with the fixed electrode is arranged in the first groove. On the premise of ensuring sufficient mechanical support, stray capacitance between the bottom electrode and the substrate is effectively reduced so as to adapt to engineering application requirements in diversified working condition environments.

Description

Technical Field

[0001] This application relates to the field of semiconductor device technology, and more specifically, to a MEMS inertial sensor and its fabrication method. Background Technology

[0002] In existing technologies, the fixed electrodes in inertial sensors are typically fabricated directly on the surface of a dielectric layer on a substrate. Because this dielectric layer needs to provide sufficient electrical isolation and mechanical support, its thickness is generally between 1 and 3 μm. However, a thicker dielectric layer not only limits the growth rate of the chemical vapor deposition (CVD) process, leading to reduced production efficiency, but also causes significant wafer warping during high-temperature processing due to differences in thermal expansion coefficients, affecting the accuracy of subsequent photolithography and bonding, and restricting device yield and consistency. More critically, the materials of traditional dielectric layers have high dielectric constants (εᵣ≈4–8), forming a non-negligible parasitic capacitance between the fixed electrode and the conductive substrate. This parasitic capacitance significantly reduces sensor sensitivity, increases the noise floor level, and may introduce nonlinear responses, severely affecting the device's dynamic range and resolution. Furthermore, increasing the dielectric layer thickness to reduce parasitic capacitance further exacerbates the wafer warping problem, creating a trade-off between process technology and performance. While existing technologies have attempted to mitigate these issues by optimizing dielectric materials or introducing materials with low dielectric constants, these often sacrifice mechanical strength or process compatibility, making it difficult to meet the demands of high-reliability applications. Furthermore, with the trend towards miniaturization, how to improve space utilization and reduce chip size without sacrificing structural stability, while ensuring the device possesses good resistance to mechanical shock and environmental overload, remains a significant challenge for current inertial sensor design. Summary of the Invention

[0003] The purpose of this application is to provide a MEMS inertial sensor and its fabrication method, which effectively reduces the parasitic capacitance between the bottom electrode and the substrate while ensuring sufficient mechanical support, so as to meet the engineering application requirements under diverse working conditions.

[0004] This application is implemented as follows: In a first aspect, this application provides a MEMS inertial sensor, including a first support substrate and a first wafer stacked together; the first support substrate has a first groove on the side near the first wafer; the first wafer includes a fixed electrode, the projection of the fixed electrode on the first support substrate is located in the first groove, and a gap is formed between the bottom surface of the first groove and the fixed electrode; a support post is provided in the first groove, extending along the direction perpendicular to the first wafer and connected to the fixed electrode.

[0005] As an optional implementation, the gap is filled with air.

[0006] As an optional implementation, the first supporting substrate has an annular groove on the surface opposite to the first wafer, and the projection of the inner wall of the annular groove on the fixed electrode overlaps with the projection of the supporting column on the fixed electrode; the depth of the annular groove extends to the bottom surface of the first groove, and the columnar structure in the annular groove is connected to the supporting column to form a conductive column.

[0007] As an optional implementation, the end face of the columnar structure away from the fixed electrode is provided with a pad, and the pad is electrically connected to the fixed electrode through a conductive post.

[0008] As an optional implementation, the annular groove is filled with an insulating layer, which is used to block the electrical connection between the columnar structure and the first supporting substrate.

[0009] As an optional implementation, the central axis of the annular groove is aligned with the central axis of the support column.

[0010] As an optional implementation, it also includes a second support substrate and a second wafer; the first support substrate, the first wafer, the second wafer and the second support substrate are stacked in sequence; the second support substrate has a second groove on the surface near the second wafer; the second wafer includes a mass block corresponding to the position of the fixed electrode and a support protrusion located on the surface of the second wafer away from the second support substrate.

[0011] As an optional implementation, the first wafer and the second wafer are connected by a metal bonding structure.

[0012] As an optional implementation, the second groove is provided with a limiting boss, which is located within the projection coverage area of ​​the mass block.

[0013] Secondly, this application provides a method for fabricating a MEMS inertial sensor, comprising: An annular groove is etched on a first surface of a first supporting substrate, the depth of which is less than the thickness of the first supporting substrate; An insulating layer is filled into the annular groove; A first groove is etched on the second surface of the first support substrate to form a support pillar; the sum of the depth of the first groove and the depth of the annular groove is greater than or equal to the thickness of the first support substrate; the support pillar is connected to the columnar structure in the middle of the annular groove to form a conductive pillar. A first wafer is bonded to the second surface of a first supporting substrate; A fixed electrode connected to a conductive pillar is formed by etching the first wafer, and a gap is formed between the fixed electrode and the bottom surface of the first groove.

[0014] As an optional implementation, after forming a fixed electrode connected to the conductive pillar by etching the first wafer, and after a gap is formed between the fixed electrode and the bottom surface of the first groove, the method further includes: A second groove is etched on the second support substrate, and a limiting protrusion corresponding to the position of the fixed electrode is formed at the same time. A second wafer is bonded to the surface of the second groove etched on the second support substrate; The second wafer is etched to form support protrusions and a mass block corresponding to the position of the fixed electrode; the support protrusions are used to support the mass block. The second wafer is bonded to the surface of the first wafer opposite to the first supporting substrate by a metal layer.

[0015] As an optional implementation, the bonding connection between the second wafer and the surface of the first wafer facing away from the first supporting substrate via a metal layer includes: A patterned first metal layer is prepared on the surface of a first wafer; a patterned second metal layer is prepared on the surface of a support protrusion on a second wafer. Align the first wafer with the second wafer so that the first metal layer and the second metal layer are bonded together.

[0016] As an optional implementation, after bonding the second wafer to the surface of the first wafer opposite to the first supporting substrate via a metal layer, the method further includes: The surface of the first supporting substrate facing away from the first wafer is thinned; the surface of the second supporting substrate facing away from the second wafer is thinned. A pad is prepared on the conductive pillar.

[0017] As an optional implementation, etching a first groove and forming a support pillar on the second surface of the first support substrate includes: A protective medium layer is deposited on the surface of the first groove.

[0018] The beneficial effects of this application include: The MEMS inertial sensor and its fabrication method provided in this application utilize a first groove on a first supporting substrate and silicon support pillars to mechanically support the first wafer and fixed electrodes. This creates an air-medium gap between the fixed electrodes and the conductive substrate, significantly reducing the high parasitic capacitance introduced by traditional thick dielectric layers. This effectively improves the sensor's sensitivity, signal-to-noise ratio, and dynamic range, while suppressing nonlinear responses. This structure avoids the use of thick dielectric layers, mitigating wafer warpage caused by excessive dielectric layer thickness. It also improves the precision of photolithography and bonding processes and device consistency. Furthermore, the support pillars, made of silicon, possess excellent mechanical strength and thermal stability. Compared to thin films or perforated structures, they exhibit stronger resistance to mechanical shock and environmental overload, are less affected by temperature changes, and can operate stably for extended periods under complex conditions. In addition, this design does not rely on materials with low dielectric constants but poor mechanical properties. While ensuring high reliability and process compatibility, it facilitates device miniaturization and high-performance integration, significantly improving the overall performance, yield, and application reliability of the MEMS inertial sensor. Attached Figure Description

[0019] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is one of the structural schematic diagrams of the MEMS inertial sensor in the embodiments of this application; Figure 2 This is a second schematic diagram of the structure of the MEMS inertial sensor according to an embodiment of this application; Figure 3 This is the third schematic diagram of the structure of the MEMS inertial sensor in this application embodiment; Figure 4 This is the fourth schematic diagram of the structure of the MEMS inertial sensor in this application embodiment; Figure 5 This is the fifth schematic diagram of the structure of the MEMS inertial sensor in this application embodiment; Figure 6 This is the sixth schematic diagram of the structure of the MEMS inertial sensor in this application embodiment; Figure 7 This is the seventh schematic diagram of the structure of the MEMS inertial sensor in this application embodiment; Figure 8 This is the eighth schematic diagram of the structure of the MEMS inertial sensor in this application embodiment; Figure 9This is the ninth schematic diagram of the structure of the MEMS inertial sensor in this application embodiment; Figure 10 This is the tenth schematic diagram of the structure of the MEMS inertial sensor in the embodiment of this application.

[0021] Icons: 100-First supporting substrate; 101-First wafer; 102-First groove; 103-Fixed electrode; 104-Support pillar; 105-Annular groove; 106-Columnar structure; 107-Conductive pillar; 108-Pad; 109-Insulating layer; 110-Second supporting substrate; 111-Second wafer; 112-Second groove; 113-Supporting protrusion; 114-Mass block; 115-Beam structure; 116-Metal bonding structure; 117-Limiting protrusion; 118-Dielectric protection layer; 119-First metal layer; 120-Second metal layer. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0023] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0024] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. Furthermore, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0025] In the description of this application, it should also be noted that, unless otherwise expressly specified and limited, the terms "set up," "install," "connect," and "link" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0026] In inertial sensors, the fixed electrodes are typically fabricated directly on the surface of a dielectric layer on the substrate. This dielectric layer, needing to provide sufficient electrical isolation and mechanical support, is generally 1–3 μm thick. However, a thicker dielectric layer not only limits the growth rate of the chemical vapor deposition (CVD) process, leading to reduced production efficiency, but also causes significant wafer warping during high-temperature processing due to differences in thermal expansion coefficients. This affects subsequent photolithography and bonding accuracy, restricting device yield and consistency. More critically, the traditional dielectric layer material has a high dielectric constant (εᵣ≈4–8), forming a non-negligible parasitic capacitance between the fixed electrode and the conductive substrate. This parasitic capacitance significantly reduces sensor sensitivity, increases noise floor levels, and may introduce nonlinear responses, severely impacting the device's dynamic range and resolution. Furthermore, increasing the dielectric layer thickness to reduce parasitic capacitance further exacerbates wafer warping, creating a trade-off between process technology and performance.

[0027] While existing technologies have attempted to mitigate these issues by optimizing dielectric materials or introducing materials with low dielectric constants, these often sacrifice mechanical strength or process compatibility, making it difficult to meet the demands of high-reliability applications. Furthermore, with the trend towards miniaturization, how to improve space utilization and reduce chip size without sacrificing structural stability, while ensuring the device possesses good resistance to mechanical shock and environmental overload, remains a significant challenge for current inertial sensor design.

[0028] To solve the above technical problems, refer to Figure 1 As shown, this application embodiment provides a MEMS inertial sensor, including a first support substrate 100 and a first wafer 101 stacked together; the first support substrate 100 has a first groove 102 on the side near the first wafer 101; the first wafer 101 includes a fixed electrode 103, the projection of the fixed electrode 103 on the first support substrate 100 is located in the first groove 102, and a gap is formed between the bottom surface of the first groove 102 and the fixed electrode 103; a support post 104 is provided in the first groove 102, extending along the direction perpendicular to the first wafer 101 and connected to the fixed electrode 103.

[0029] It should be noted that the MEMS inertial sensor provided in this application embodiment directly fabricates the fixed electrode 103 on the first wafer 101, while the corresponding first support substrate 100 forms a first groove 102 on one side close to the first wafer 101, so that the projection of the fixed electrode 103 falls completely into the first groove 102, and an air-filled gap is formed between the two; that is, an air layer is formed between the bottom surface of the first groove 102 and the fixed electrode 103.

[0030] Because air has an extremely low dielectric constant (εᵣ≈1), this gap replaces the traditional thick dielectric layer with a high dielectric constant, significantly reducing the parasitic capacitance between the fixed electrode 103 and the conductive substrate, thereby effectively improving the sensor's sensitivity, reducing noise, and improving linearity.

[0031] It should be noted that, in this embodiment, a vertically extending support pillar 104 is provided within the first groove 102. This provides mechanical support and structural stability for the first wafer 101 while avoiding the traditional approach of relying on a thick dielectric layer for mechanical strength. Therefore, the overall dielectric thickness can be reduced or the thick dielectric layer can be eliminated, alleviating wafer warpage caused by thermal expansion mismatch in the thick dielectric layer and improving process accuracy and device consistency. During operation, when the sensor is subjected to external acceleration, the sensitive mass block 114 shifts, causing a change in capacitance between the fixed electrode 103 and the mass block 114. The low parasitic capacitance structure ensures a higher signal-to-noise ratio and dynamic range. This design achieves a balance between parasitic capacitance suppression, improved process compatibility, and chip miniaturization without sacrificing mechanical reliability.

[0032] Compared to the structure of setting a through-substrate groove on the substrate and fixing the electrode 103 with a thin film, although this structure can reduce parasitic capacitance, it has low mechanical strength, poor impact resistance and overload resistance, and is prone to deformation or even failure due to external vibration or drop impact. In addition, the thermal expansion coefficient of the thin film material is much different from that of the silicon substrate, which can easily cause stress concentration under temperature cycling or extreme environments, affecting the stability and reliability of the device.

[0033] In this embodiment, a support pillar 104 made of silicon is used to support and fix the electrode 103. The silicon support pillar 104 has excellent mechanical strength and rigidity, which can effectively resist external mechanical shock and high-g environmental overload, significantly improving the robustness of the device. At the same time, the support pillar 104 has the same coefficient of thermal expansion as the silicon substrate and wafer, resulting in good thermal matching and minimal thermal stress caused by temperature changes. This avoids structural deformation or performance drift caused by temperature drift, thereby ensuring long-term stable and reliable operation of the sensor in complex and variable working conditions. This design achieves low parasitic capacitance while taking into account high reliability and environmental adaptability, making it particularly suitable for applications with stringent stability requirements, such as automotive electronics and aerospace.

[0034] The MEMS inertial sensor provided in this application embodiment uses a first groove 102 on a first support substrate 100 and a support pillar 104 to mechanically support the first wafer 101 and the fixed electrode 103. This creates an air-medium gap between the fixed electrode 103 and the conductive substrate, significantly reducing the high parasitic capacitance introduced by traditional thick dielectric layers. This effectively improves the sensor's sensitivity, signal-to-noise ratio, and dynamic range, while suppressing nonlinear responses. This structure avoids the use of thick dielectric layers, mitigating wafer warpage caused by excessive dielectric layer thickness, and improving the accuracy of photolithography and bonding processes and device consistency. Furthermore, the support pillar 104, made of silicon, possesses excellent mechanical strength and thermal stability. Compared to thin films or hollow structures, it exhibits stronger resistance to mechanical shock and environmental overload, is less affected by temperature changes, and can operate stably for extended periods under complex conditions. In addition, this design does not rely on materials with low dielectric constants but poor mechanical properties. While ensuring high reliability and process compatibility, it facilitates device miniaturization and high-performance integration, significantly improving the overall performance, yield, and application reliability of the MEMS inertial sensor.

[0035] Reference Figure 1 , Figure 2 , Figure 4 as well as Figure 5 As shown, in an optional embodiment, the surface of the first support substrate 100 opposite to the surface of the first wafer 101 is provided with an annular groove 105, and the projection of the inner wall of the annular groove 105 on the fixed electrode 103 overlaps with the projection of the support pillar 104 on the fixed electrode 103; the depth of the annular groove 105 extends to the bottom surface of the first groove 102, and the columnar structure 106 in the annular groove 105 is connected to the support pillar 104 to form a conductive pillar 107.

[0036] The depth-to-width ratio of the annular groove 105 can be set as needed by those skilled in the art, and is not specifically limited here. For example, the depth-to-width ratio of the annular groove 105 is 10-20:1. More preferably, the depth-to-width ratio of the annular groove 105 is 15:1.

[0037] It should be noted that, in this embodiment of the application, an annular groove 105 is provided on the surface of the first support substrate 100 away from the first wafer 101, and the projection of the inner wall of the annular groove 105 on the fixed electrode 103 overlaps with the projection of the silicon support pillar 104. The depth of the annular groove 105 extends to the bottom surface of the first groove 102, so that the columnar structure 106 of the inner wall of the annular groove 105 is connected to the original support pillar 104, and together they form a complete conductive pillar 107.

[0038] The conductive pillar 107 not only provides mechanical support but also serves as a vertical interconnect channel, leading the electrical signal from the fixed electrode 103 from the first wafer 101 side through the support pillar 104 and the pillar structure 106 to the back side of the first support substrate 100, thus achieving back-side electrical interconnection. This vertical conductive structure avoids the additional routing space required by traditional planar wiring, significantly improving chip space utilization and facilitating device miniaturization. Simultaneously, the shorter signal path and lower resistance help reduce parasitic resistance and power consumption, improving signal transmission efficiency. During operation, the capacitance change sensed by the fixed electrode 103 is efficiently conducted to the external readout circuit through the conductive pillar 107, while the overall structure maintains good mechanical stability and shock resistance. This design integrates electrical interconnection and mechanical support functions, improving performance and integration while reducing chip size.

[0039] Among them, the end face of the columnar structure 106 away from the fixed electrode 103 is provided with a pad 108, and the pad 108 is electrically connected to the fixed electrode 103 through the conductive post 107.

[0040] Reference Figure 1 , Figure 3 , Figure 4 as well as Figure 5 As shown, in one optional embodiment, the annular groove 105 is filled with an insulating layer 109, which is used to block the electrical connection between the columnar structure 106 and the first support substrate 100.

[0041] It should be noted that the annular groove 105 is filled with an insulating layer 109 (such as silicon dioxide or silicon nitride). This layer, deposited on the sidewalls and bottom of the annular groove 105, effectively isolates the columnar structure 106 from the surrounding first support substrate 100. Since the first support substrate 100 is typically a conductive silicon substrate, if the columnar structure 106 were in direct contact with the substrate, the fixed electrode 103 would short-circuit with the first support substrate 100 through the columnar structure 106, causing device failure. The introduction of the insulating layer 109 blocks this leakage path, ensuring that the conductive pillar 107 is connected to the fixed electrode 103 only through a designed vertical path, while remaining electrically isolated from the surrounding substrate, thus guaranteeing the reliability of signal transmission. Simultaneously, while providing electrical isolation, the insulating layer 109 still allows the conductive pillar 107 to provide mechanical support, maintaining structural stability. This design, while achieving back-side vertical interconnection, improving space utilization, and reducing power consumption, further enhances the electrical reliability of the device and avoids the risk of signal crosstalk or short circuits caused by substrate conductivity.

[0042] As an optional implementation, the central axis of the annular groove 105 is aligned with the central axis of the support column 104.

[0043] It should be noted that, through the axial alignment design, this embodiment ensures that the support column 104 and the columnar structure 106 within the annular groove 105 are precisely coaxially connected in space, forming a continuous, symmetrical, and electrically stable vertical interconnection path. This structure allows the support column 104 and the columnar structure 106 to seamlessly connect, forming a complete and centrally symmetrical conductive column 107. This not only improves the reliability of the electrical connection and reduces the problems of uneven contact resistance and current density distribution, but also facilitates the uniformity and controllability of etching and filling processes during manufacturing. Simultaneously, axial alignment ensures that the mechanical load is distributed symmetrically along the center, avoiding stress concentration or structural tilting caused by eccentric support, thus improving the overall mechanical stability and impact resistance of the structure. This design, while achieving efficient vertical signal output from the fixed electrode 103, reducing power consumption, and improving space utilization, further optimizes electrical performance and mechanical reliability, which is beneficial for improving device consistency and yield.

[0044] Reference Figure 1 , Figure 8 , Figure 9 as well as Figure 10 As shown, as an optional implementation, it also includes a second support substrate 110 and a second wafer 111; the first support substrate 100, the first wafer 101, the second wafer 111 and the second support substrate 110 are stacked in sequence; a second groove 112 is formed on the surface of the second support substrate 110 near the second wafer 111; the second wafer 111 includes a mass block 114 corresponding to the position of the fixed electrode 103, and a support protrusion 113 located on the surface of the second wafer 111 away from the second support substrate 110.

[0045] It should be noted that the embodiments of this application achieve a high-performance, high-stability MEMS inertial sensor by constructing a symmetrical stacked structure. The technical principle is as follows: based on the original first supporting substrate 100 and first wafer 101, a second supporting substrate 110 and a second wafer 111 are further integrated to form a four-layer symmetrical stacked structure of "supporting substrate-wafer-wafer-supporting substrate". The second supporting substrate 110 has a second groove 112 on the side near the second wafer 111, corresponding to the first groove 102 on the first supporting substrate 100. Supporting protrusions, a mass block 114, and a beam structure 115 connecting the mass block 114 and the anchor point are formed by etching on the second wafer 111. The mass block 114, as an inertial sensing element, undergoes reversible deformation through the beam structure 115 under external acceleration, generating displacement. A fixed electrode 103 is located on the first wafer 101 and faces the mass block 114, forming a capacitive detection structure. When the sensor is subjected to acceleration, the mass block 114 is displaced relative to the fixed electrode 103, causing a change in capacitance, thereby achieving high-sensitivity detection of external motion signals.

[0046] The structure provided in this application not only improves the overall mechanical rigidity and anti-external interference capability of the device, but also effectively suppresses common-mode interference caused by temperature gradient, stress mismatch and external vibration, thereby improving the stability and common-mode rejection capability of the sensor. At the same time, the four-layer bonding structure is conducive to further reducing the chip size and improving the integration, making it suitable for inertial sensing applications with high performance, miniaturization and high reliability requirements.

[0047] Among them, reference Figure 1 As shown, the first wafer 101 and the second wafer 111 are connected by a metal bonding structure 116.

[0048] It should be noted that, utilizing the properties of metallic materials (such as gold, copper, aluminum, or their alloys) undergoing plastic deformation and atomic diffusion at lower temperatures and pressures, the corresponding surfaces of the first wafer 101 and the second wafer 111 are metal-bonded to form a strong mechanical connection and reliable electrical interconnection. This metal bonding structure 116 not only provides high-strength interfacial bonding force, improving the overall mechanical stability and shock resistance of the device, but also enables direct conduction of electrical signals between the two wafers. This facilitates electrical integration and signal transmission between the circuit containing the fixed electrode 103 and the mass block 114, eliminating the need for additional lead wires or vias, further improving integration density and reducing parasitic effects.

[0049] Reference Figure 8 , Figure 9 as well as Figure 10 As shown, as an optional implementation, a limiting boss 117 is provided in the second groove 112, and the limiting boss 117 is located within the projection coverage area of ​​the mass block 114.

[0050] It should be noted that when the sensor is subjected to a large acceleration or external impact, causing excessive displacement of the mass block 114, the mass block 114 moves downward through the beam structure 115 to the side approaching or contacting the second support substrate 110. At this time, the limiting boss 117, as a pre-designed mechanical stop structure, can effectively limit the excessive movement of the mass block 114, preventing it from directly colliding with or adhering to the second support substrate 110, thereby avoiding plastic deformation or fracture of the sensitive structure. Since the limiting boss 117 is located in the projection area directly below the mass block 114, the force distribution is more uniform, ensuring that the impact load is stably transmitted and dispersed, reducing local stress concentration, and improving the reliability and repeatability of the limiting process. At the same time, this structure significantly enhances the device's overload resistance and environmental tolerance without interfering with the free movement of the mass block 114 within the normal operating range. Especially under high-g impact or severe vibration conditions, it can effectively protect the MEMS sensitive structure and improve the device's service life and long-term stability.

[0051] This application provides a method for fabricating a MEMS inertial sensor, including: like Figure 2 As shown, an annular groove 105 is etched on the first surface of the first support substrate 100, and the depth of the annular groove 105 is less than the thickness of the first support substrate 100. like Figure 3 As shown, an insulating layer 109 is filled into the annular groove 105 by a thermo-oxidation process; like Figure 4 As shown, a first groove 102 is etched on the second surface of the first support substrate 100 to form a support pillar 104; the sum of the depth of the first groove 102 and the depth of the annular groove 105 is greater than or equal to the thickness of the first support substrate 100; the support pillar 104 is connected to the columnar structure 106 in the middle of the annular groove 105 to form a conductive pillar 107. like Figure 6 As shown, a first wafer 101 is bonded to the second surface of the first support substrate 100; like Figure 7 As shown, a fixed electrode 103 connected to the conductive pillar 107 is formed by etching the first wafer 101, and a gap is formed between the fixed electrode 103 and the bottom surface of the first groove 102.

[0052] It should be noted that, in this embodiment of the application, after the first wafer 101 is bonded to the second surface of the first supporting substrate 100, the surface of the first wafer 101 can be treated by thinning and polishing processes to reduce the thickness of the first wafer 101 to the target thickness. For example, the thickness of the first wafer 101 is 5-10 μm.

[0053] It should be noted that the MEMS inertial sensor fabrication method of this application embodiment achieves integrated mechanical support, electrical isolation, and vertical interconnection. In this application embodiment, an annular groove 105 is etched on the first surface of the first support substrate 100, and silicon dioxide is grown as an insulating layer 109 using a thermal oxidation process. This thermal oxidation layer has excellent uniformity and interface quality, which can effectively isolate the electrical connection between the subsequently formed conductive pillars 107 and the first support substrate 100, preventing short circuits. In this embodiment, deep silicon etching is performed on the second surface of the substrate to form a first groove 102 extending to the bottom of the annular groove 105, while retaining the silicon structure in the central region as a support pillar 104. At this time, the support pillar 104 and the columnar structure 106 composed of the remaining silicon in the annular groove 105 are naturally aligned and connected to form a conductive pillar 107 that extends through part of the substrate thickness. The vertical electrical connection channel of the fixed electrode 103 can be realized without additional deposition of conductive material. Then, the first wafer 101 is bonded to the second surface, and the bonding interface provides structural integrity. Finally, the fixed electrode 103 electrically connected to the conductive pillar 107 is defined by etching the first wafer 101, and the fixed electrode 103 is suspended above the first groove 102 to form an air dielectric gap. This process fully utilizes double-sided etching and thermal oxidation techniques on silicon substrates, avoiding the deposition of thick dielectric layers and complex metal filling processes. It simplifies the manufacturing process, improves structural alignment accuracy and electrical reliability, and significantly reduces parasitic capacitance through air gaps, thereby enhancing sensor sensitivity and signal-to-noise ratio. It also provides a solid process foundation for subsequent back-side lead-out, miniaturized high-density integration.

[0054] As an optional implementation, after forming a fixed electrode 103 connected to the conductive pillar 107 by etching the first wafer 101, and after forming a gap between the fixed electrode 103 and the bottom surface of the first groove 102, the method further includes: like Figure 8 As shown, a second groove 112 is etched on the second support substrate 110, and a limiting protrusion 117 corresponding to the position of the fixed electrode 103 is formed at the same time. like Figure 9 As shown, a second wafer 111 is bonded to the surface of the second support substrate 110 on which the second groove 112 is etched. like Figure 9 , Figure 10 As shown, the second wafer 111 is etched to form a support protrusion 113 and a mass block 114 corresponding to the position of the fixed electrode 103; the support protrusion 113 is used to support the mass block 114. like Figure 1 As shown, the second wafer 111 is bonded to the surface of the first wafer 101 opposite to the first support substrate 100 through a metal layer.

[0055] The second wafer 111 is bonded to the surface of the first wafer 101 opposite to the first supporting substrate 100 via a metal layer, including: like Figure 7 As shown, a patterned first metal layer 119 is fabricated on the surface of the first wafer 101; as Figure 10 As shown, a patterned second metal layer 120 is prepared on the surface of the support protrusion 113 of the second wafer 111; like Figure 1 As shown, the first wafer 101 and the second wafer 111 are aligned so that the first metal layer 119 and the second metal layer 120 are bonded.

[0056] The method further includes, after bonding the second wafer 111 to the surface of the first wafer 101 opposite to the first supporting substrate 100 via a metal layer: The surface of the first support substrate 100 facing away from the first wafer 101 is thinned; the surface of the second support substrate 110 facing away from the second wafer 111 is thinned. Pads 108 are prepared on conductive pillars 107.

[0057] It should be noted that after the integration of the first wafer 101 and the first support substrate 100 is completed and a fixed electrode 103 with vertical conductive pillars 107 is formed, a second groove 112 is etched on the second support substrate 110 using an etching process, and a limiting protrusion 117 structure is precisely retained in the second groove 112. The limiting protrusion 117 is located within the movement range of the subsequent mass block 114 and serves as a mechanical stop for overload protection. Subsequently, the second wafer 111 is bonded to the second support substrate 110 to form a stable support platform. Then, the second wafer 111 is etched to form the mass block 114 and the beam structure 115 connecting the mass block 114 and the anchor point, ensuring that it is precisely aligned with the fixed electrode 103 below, thus forming a capacitance detection structure. Finally, the second wafer 111 and the first wafer 101 are mechanically connected and electrically interconnected back-to-back via metal bonding. This metal bonding is completed at a relatively low temperature, ensuring structural strength and hermeticity while avoiding the impact of high temperatures on the formed microstructure. It also establishes a low-resistance signal path between the upper and lower wafers. This process route employs a modular and symmetrical manufacturing flow, and the high-precision wafer bonding not only improves the device's shock and overload resistance but also enhances temperature stability and common-mode rejection performance. This facilitates the miniaturization, high reliability, and mass production of high-performance MEMS inertial sensors.

[0058] As an optional implementation, etching a first groove 102 on the second surface of the first support substrate 100 to form a support pillar 104 includes: like Figure 8 As shown, a protective medium layer 118 is deposited on the surface of the first groove 102.

[0059] It should be noted that when deep silicon etching is performed on the first wafer 101 to form the fixed electrode 103, the etching process may generate plasma erosion, chemical residues, or particulate contamination, which can easily invade the already formed first groove 102, causing structural damage, surface roughness, or decreased insulation performance, thereby affecting the electrical isolation performance and long-term reliability between the fixed electrode 103 and the substrate. By pre-depositing a dielectric protective layer 118, the sidewalls and bottom surface of the first groove 102 can be effectively covered and sealed, especially the areas of the support pillars 104 and conductive pillars 107, forming a stable physical and electrical barrier to prevent the penetration of etching gases or byproducts and avoid short circuits or interface leakage in the conductive pillars 107. At the same time, the dielectric protective layer 118 can also enhance interface stability and stress buffering in subsequent wafer bonding and high-temperature processes. The embodiments of this application significantly improve the structural integrity and process tolerance in multi-step micromachining processes, ensuring that the key low parasitic capacitance structure is not damaged in complex manufacturing processes, and improving device yield and performance consistency.

[0060] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A MEMS inertial sensor, characterized in that, The first support substrate (100) and the first wafer (101) are stacked together. The first support substrate (100) has a first groove (102) on the side near the first wafer (101). The first wafer (101) includes a fixed electrode (103). The projection of the fixed electrode (103) on the first support substrate (100) is located in the first groove (102). A gap is formed between the bottom surface of the first groove (102) and the fixed electrode (103). The first groove (102) is provided with a support post (104) extending in a direction perpendicular to the first wafer (101) and connected to the fixed electrode (103).

2. The MEMS inertial sensor according to claim 1, characterized in that, The gap is filled with air.

3. The MEMS inertial sensor according to claim 1, characterized in that, The first support substrate (100) has an annular groove (105) on its surface away from the first wafer (101), and the projection of the inner wall of the annular groove (105) on the fixed electrode (103) overlaps with the projection of the support column (104) on the fixed electrode (103); the depth of the annular groove (105) extends to the bottom surface of the first groove (102), and the columnar structure (106) in the annular groove (105) is connected to the support column (104) to form a conductive column (107).

4. The MEMS inertial sensor according to claim 3, characterized in that, The columnar structure (106) has a pad (108) on its end face away from the fixed electrode (103), and the pad (108) is electrically connected to the fixed electrode (103) through a conductive post (107).

5. The MEMS inertial sensor according to claim 3, characterized in that, The annular groove (105) is filled with an insulating layer (109), which is used to block the electrical connection between the columnar structure (106) and the first support substrate (100).

6. The MEMS inertial sensor according to claim 3, characterized in that, The central axis of the annular groove (105) is consistent with the central axis of the support column (104).

7. The MEMS inertial sensor according to any one of claims 1-6, characterized in that, It also includes a second support substrate (110) and a second wafer (111); the first support substrate (100), the first wafer (101), the second wafer (111) and the second support substrate (110) are stacked in sequence; the second support substrate (110) has a second groove (112) on the surface near the second wafer (111); the second wafer (111) includes a mass block (114) corresponding to the position of the fixed electrode (103) and a support protrusion (113) on the surface of the second wafer (111) away from the second support substrate (110).

8. The MEMS inertial sensor according to claim 7, characterized in that, The first wafer (101) and the second wafer (111) are connected by a metal bonding structure (116).

9. The MEMS inertial sensor according to claim 7, characterized in that, The second groove (112) is provided with a limiting boss (117), which is located within the projection coverage area of ​​the mass block (114).

10. A method for fabricating a MEMS inertial sensor, characterized in that, include: An annular groove (105) is etched on a first surface of a first support substrate (100), the depth of which is less than the thickness of the first support substrate (100). An insulating layer (109) is filled in the annular groove (105); A first groove (102) is etched on the second surface of the first support substrate (100) to form a support pillar (104); the sum of the depth of the first groove (102) and the depth of the annular groove (105) is greater than or equal to the thickness of the first support substrate (100); the support pillar (104) is connected to the columnar structure (106) in the middle of the annular groove (105) to form a conductive pillar (107). A first wafer (101) is bonded to the second surface of a first support substrate (100). A fixed electrode (103) connected to a conductive post (107) is formed by etching the first wafer (101), and a gap is formed between the fixed electrode (103) and the bottom surface of the first groove (102).

11. The method for fabricating a MEMS inertial sensor according to claim 10, characterized in that, After forming a fixed electrode (103) connected to the conductive pillar (107) by etching the first wafer (101), and after a gap is formed between the fixed electrode (103) and the bottom surface of the first groove (102), the method further includes: A second groove (112) is etched on the second support substrate (110), and a limiting boss (117) corresponding to the position of the fixed electrode (103) is formed at the same time. A second wafer (111) is bonded to the surface of the second groove (112) etched on the second support substrate (110). The second wafer (111) is etched to form a support protrusion (113) and a mass block (114) corresponding to the position of the fixed electrode (103); the support protrusion (113) is used to support the mass block (114). The second wafer (111) is bonded to the surface of the first wafer (101) opposite to the first support substrate (100) by means of a metal layer.

12. The method for fabricating a MEMS inertial sensor according to claim 11, characterized in that, The bonding connection between the second wafer (111) and the surface of the first wafer (101) facing away from the first support substrate (100) via a metal layer includes: A patterned first metal layer (119) is prepared on the surface of the first wafer (101); a patterned second metal layer (120) is prepared on the surface of the support protrusions (113) of the second wafer (111). Align the first wafer (101) with the second wafer (111) so that the first metal layer (119) and the second metal layer (120) are bonded together.

13. The method for fabricating a MEMS inertial sensor according to claim 11, characterized in that, After bonding the second wafer (111) to the surface of the first wafer (101) away from the first support substrate (100) via a metal layer, the method further includes: The surface of the first support substrate (100) facing away from the first wafer (101) is thinned; the surface of the second support substrate (110) facing away from the second wafer (111) is thinned. A pad (108) is prepared on the conductive post (107).

14. The method for fabricating a MEMS inertial sensor according to any one of claims 10-13, characterized in that, The process of etching a first groove (102) on the second surface of the first support substrate (100) and forming a support pillar (104) includes: A protective medium layer (118) is deposited on the surface of the first groove (102).

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