Method, apparatus, controller and computer program product for accessing memory area

Abstract

The embodiment of the invention relates to a method and device for accessing a storage area, a controller and a computer program product. The method includes determining whether a target process to which a target thread belongs enables access to a plurality of storage areas. The method further includes, in response to determining that the target process enables access to the plurality of memory regions, providing a target pointer library to the target thread, where the target pointer library includes a base address and a size of the target memory region. According to the method, the storage areas under different vehicle safety integrity levels can be automatically detected by using the threads in the process of enabling access of the multiple storage areas, so that the safety of vehicle driving can be improved, and resources are saved at the same time.

Description

Technical Field

[0001] The present disclosure relates to the field of data processing, and more particularly, to a method, apparatus, controller, and computer program product for accessing a storage area. Background Art

[0002] With the rapid development of the automotive industry and the increasing level of intelligence, vehicle safety issues are becoming increasingly prominent, especially in terms of the functional safety of electronic and electrical systems. Therefore, the development of a scientific and reasonable set of vehicle safety integrity level standards is of great significance for ensuring vehicle safety and reducing the risk of traffic accidents. In this context, the Automotive Safety Integrity Level (ASIL) grading system came into being.

[0003] The development of the Vehicle Safety Integrity Level (ASIL) was based on the ISO 26262 standard published by the International Organization for Standardization (ISO). This standard sets comprehensive requirements for the functional safety of vehicle electrical and electronic systems. Based on the ISO 26262 standard, ASIL levels are divided into five levels: QM, A, B, C, and D, to assess and address potential risks in vehicle systems. ASIL-D represents the highest vehicle hazard level and imposes the highest functional safety requirements. Summary of the Invention

[0004] Embodiments of the present disclosure provide a method, apparatus, device, vehicle, and computer program product for accessing a storage area. In a first aspect of the present disclosure, a method for accessing a storage area is provided. The method includes determining whether a target process to which a target thread belongs enables access to multiple storage areas. Furthermore, the method includes, in response to determining that the target process enables access to multiple storage areas, providing a target pointer library to the target thread, wherein the target pointer library includes a base address and size of the target storage area.

[0005] In a second aspect of the present disclosure, a device is provided. The device includes a determining unit configured to determine whether a target process to which a target thread belongs enables access to multiple storage areas. The device also includes a providing unit configured to, in response to determining that the target process enables access to multiple storage areas, provide a target pointer library to the target thread, wherein the target pointer library includes a base address and size of a target storage area.

[0006] In a third aspect of the present disclosure, a controller is provided, comprising: at least one processor; and a memory coupled to the at least one processor and having instructions stored thereon, the instructions causing the controller to perform the method according to the first aspect of the present disclosure when executed by the at least one processor.

[0007] In a fourth aspect of the present disclosure, a computer program product is provided, the computer program product being tangibly stored on a non-transitory computer-readable medium and comprising machine-executable instructions which, when executed, cause a machine to perform the method according to the first aspect of the present disclosure.

[0008] In a fifth aspect of the present disclosure, a computer-readable storage medium is provided, on which machine-executable instructions are stored, wherein the machine-executable instructions are executed by a processor to implement the method according to the first aspect of the present disclosure.

[0009] In a sixth aspect of the present disclosure, a vehicle is provided, comprising the controller according to the third aspect of the present disclosure.

[0010] It should be understood that the contents described in the Summary of the Invention section are not intended to limit the key or important features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become readily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] The above and other objects, features and advantages of the present disclosure will become more apparent through a more detailed description of exemplary embodiments of the present disclosure with reference to the accompanying drawings, wherein like reference numerals generally represent like components throughout the exemplary embodiments of the present disclosure.

[0012] Figure 1 is a schematic diagram of an example vehicle in which various embodiments of the present disclosure may be implemented;

[0013] Figure 2 is a flowchart of a method for accessing a storage area according to an embodiment of the present disclosure;

[0014] Figure 3 is a flow chart of obtaining a target pointer library according to an embodiment of the present disclosure;

[0015] Figure 4 is a schematic diagram of obtaining a target pointer library according to an embodiment of the present disclosure;

[0016] Figure 5 is a process diagram of a method for accessing a storage area according to an embodiment of the present disclosure;

[0017] Figure 6 is a schematic diagram of interacting with a target array according to an embodiment of the present disclosure;

[0018] Figure 7 illustrates a schematic block diagram of an example device suitable for implementing embodiments of the present disclosure; and

[0019] Figure 8is a schematic diagram of an apparatus for accessing a storage area according to an embodiment of the present disclosure.

[0020] In the various drawings, the same or corresponding reference numerals denote the same or corresponding parts. DETAILED DESCRIPTION

[0021] The following describes embodiments of the present disclosure in more detail with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for illustrative purposes only and are not intended to limit the scope of protection of the present disclosure.

[0022] In the description of the embodiments of the present disclosure, the term "including" and similar terms should be understood as open inclusion, that is, "including but not limited to." The term "based on" should be understood as "based at least in part on." The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment." The terms "first," "second," etc. may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0023] In the context of vehicle safety integrity levels, various middleware in a vehicle are at different vehicle safety integrity levels. Middleware at a specific vehicle safety integrity level is provided with a physically independent storage area. All processes associated with the middleware (including the threads owned by the process) are statically bound to the storage area set by the middleware, making it impossible for these processes to share or write to the storage area set by middleware at other vehicle safety integrity levels. For this reason, processes associated with the storage area set by middleware at other vehicle safety integrity levels cannot share or write to the data in the storage area set by the middleware at this specific vehicle safety integrity level. As a result, data at different vehicle safety integrity levels strictly comply with the requirements of this vehicle safety integrity level.

[0024] However, due to driving needs, processes associated with different vehicle safety integrity levels may require inter-process communication. This can lead to situations where data generated by middleware at one vehicle safety integrity level is used in the operations of middleware at another vehicle safety integrity level. Because different vehicle safety integrity levels have strict regulations on data attributes (such as size), this situation may result in data that does not meet the requirements of the other vehicle safety integrity level being used in processes associated with that other vehicle safety integrity level, thereby posing a security risk.

[0025] In order to solve this problem, the present disclosure proposes a method and device for accessing storage areas, which allows such processes and their threads to access multiple storage areas by setting a transit process, and automatically provides a pointer library corresponding to the storage area. Specifically, by determining whether the target process to which the target thread belongs enables access to multiple storage areas, it is judged whether the target thread belongs to a thread in the transit process; and when it is determined that the thread belongs to the transit process, a target pointer library is provided to the target thread. Because the target pointer library includes the base address and size of the target storage area, the target thread can access the target storage area. In this case, the threads in the transit process can be used to automatically detect storage areas under different vehicle safety integrity levels without human intervention, which can improve the safety of vehicle driving while saving human resources.

[0026] The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Figure 1 FIG is a schematic diagram of an example vehicle 100 in which various embodiments of the present disclosure may be implemented. Figure 1 As shown, the vehicle 100 may include a storage area 110 , a processor 120 , and a storage area 130 .

[0027] In this embodiment, in order to overcome the security risks brought about by binding a process to a storage area, the processor 120 may set a process that can access multiple storage areas, i.e., a transit process, wherein the target thread of the process has completed access to the storage area 110 and is next preparing to access the storage area 130. Before accessing the storage area 130, the embodiment includes determining whether the target process to which the target thread belongs has enabled access to multiple storage areas. If the target process to which the target thread belongs does not enable access to multiple storage areas, for example, it is statically bound to the storage area 110, then the target thread is not allowed to access the storage area 130. If the target process to which the target thread belongs has enabled access to multiple storage areas, for example, a flag bit is set in the target process, which flag bit indicates the number of storage areas associated with the target process, then the target thread of the target process is allowed to access the storage area 130.

[0028] This embodiment further includes providing a target pointer library to the target thread in response to determining that the target process enables access to multiple storage areas, wherein the target pointer library includes a base address and size of the target storage area. After the target thread of the target process is allowed to access storage area 130, the pointer library for storage area 130 can be automatically provided to the target thread. Because the target pointer library includes the base address and size of the target storage area, the target thread can use the pointer library to access the storage area 130 and complete the target task for the storage area 130 according to the program code.

[0029] Combined with the above Figure 1An example environment 100 is described in which embodiments of the present disclosure can be implemented. Figure 2 A flow chart depicts a method 200 for accessing a storage area according to an embodiment of the present disclosure.

[0030] At block 202, a determination is made as to whether the target process to which the target thread belongs enables access to multiple memory areas. A process that enables access to multiple memory areas is considered a transit process and is permitted to access multiple memory areas. Non-transit processes, on the other hand, are statically bound to a specific memory area, set by middleware associated with a specific vehicle safety integrity level, and are prohibited from accessing memory areas outside of that area. By examining the association between the target process and the memory area, this embodiment can automatically determine whether the target process is a transit process, eliminating the need for manual analysis or intervention.

[0031] At block 204, in response to determining that the target process enables access to multiple storage areas, a target pointer library is provided to the target thread, where the target pointer library includes a base address and size of the target storage area. The target process enabling access to multiple storage areas means that the target thread can also access multiple storage areas. Therefore, when the target thread executes subsequent program code, this embodiment automatically provides the target thread with a target pointer library for the target storage area, eliminating the need for manual determination of the target pointer library and manual allocation of the target pointer library to the target thread.

[0032] In the method for accessing a storage area disclosed in the present invention, a transfer process is set to allow such a process and its threads to access multiple storage areas, and a pointer library corresponding to the storage area is automatically provided. Specifically, by determining whether the target process to which the target thread belongs enables access to multiple storage areas, it is judged whether the target thread belongs to a thread in the transfer process; and when it is determined that the thread belongs to the transfer process, the target pointer library is provided to the target thread. Because the target pointer library includes the base address and size of the target storage area, the target thread can access the target storage area. In this case, the threads in the transfer process can be used to automatically detect storage areas under different vehicle safety integrity levels without human intervention, which can improve the safety of vehicle driving while saving human resources.

[0033] In some embodiments, when a thread (such as a target thread) is about to execute a first program code, a specific method for determining whether a target process to which the target thread belongs enables access to multiple storage areas before execution can be implemented by the following operations. The first operation is (1) obtaining a first number of middleware associated with the target process, where the middleware is a node that manages storage areas, and there is a one-to-one correspondence between the middleware and the storage areas. The other operation is (2) if the processor determines that the first number is greater than a first threshold, determining that the target process enables access to multiple storage areas.

[0034] In this embodiment, a flag is set for the target process, indicating the number of middleware associated with the target process. For example, an integer variable can be used as the flag. For non-transit processes, the flag is always set to a first number. For transit processes, the flag can be any number greater than the first number. In some examples, the first number can be 1. Therefore, by detecting the first number of middleware associated with the target process, it is possible to automatically and accurately distinguish between transit processes and transit processes, achieving automatic distinction.

[0035] In some embodiments, the method according to the present disclosure further includes, if the first number is equal to a first threshold, having the target thread access the initial storage area based on the initial pointer library. The fact that the first number is equal to the first threshold indicates that the target process to which the target thread belongs is not a transit process, and therefore can only use the initial pointer library. This embodiment achieves backward compatibility, i.e., compatibility with previous storage area access mechanisms, which is very important for traditional industries such as the automotive industry.

[0036] In some embodiments, providing the target pointer library to the target thread includes acquiring the target pointer library. The target pointer library is used to access the target storage area. Because the target thread may access other storage areas to execute program code before beginning to access the target storage area, the initial pointer library associated with the target thread may be for other storage areas. Furthermore, because the target thread needs to execute a subsequent first program code, which involves reading data from the target storage area, it is necessary to acquire the target pointer library to associate the target pointer library with the target thread.

[0037] In this embodiment, providing the target pointer library to the target thread also includes backing up the initial pointer library if the initial pointer library associated with the target thread is different from the target pointer library, wherein the initial pointer library indicates the pointer library associated with the target thread before executing the first program code. The initial pointer library is different from the target pointer library, which means that the target thread needs to access a different storage area when executing the first program code. If the target pointer library is directly associated with the target thread, the initial pointer library may be lost. The consequence of this is that the target thread cannot restore the initial pointer library after executing the first program code, and thus cannot execute the program code subsequent to the first program code.

[0038] In this embodiment, providing the target pointer library to the target thread also includes associating the target pointer library with the target thread. This association allows the target thread to correctly access relevant data when executing the first program code. In this embodiment, the target pointer library is automatically provided to the target thread, while its previous pointer library is backed up. This enables the target thread to automatically access the target storage area and restore its initial pointer library after executing the first program code.

[0039] Figure 31 is a flowchart of obtaining a target pointer library according to an embodiment of the present disclosure, including blocks 302 to 306. In block 302, a pointer library array for a target process is obtained. In this embodiment, a separate pointer library array is provided for the target process to store pointer libraries used by each thread of the target process when executing the first program code.

[0040] In block 304, an array element corresponding to the target thread is determined from the pointer library array for the target process as the target array element. The target array can store pointer libraries for each thread of the target process, from which the pointer library required by the target thread is selected. To facilitate retrieval, in some embodiments, the sequence number of each thread in the target process corresponds one-to-one to the sequence number of each array element in the pointer library array, and determining the array element corresponding to the target thread from the pointer library array for the target process includes: determining the sequence number of the target thread in the first number of threads as the target sequence number; and determining the target array element from the target array based on the target sequence number, wherein the sequence number of the target array element in the target array is equal to the target sequence number. For example, for the pointer library array a[4], the pointer library required for the thread with the target sequence number 2 of the target process to access the first program code can be stored in array element a[1]. Similarly, the pointer library required for the thread with the target sequence number 1 of the target process to access the first program code can be stored in array element a[0]. In block 306, the pointer library stored in the target array element is obtained as the target pointer library.

[0041] In this embodiment, a data structure of an array with a pointer library as a data type is provided, so that a target pointer library for a target storage area can be automatically provided to a target thread without having to set a target pointer library for the target thread.

[0042] For a clearer understanding of the above embodiments, please refer to Figure 6 . Figure 6 This is a schematic diagram of interacting with a target array according to an embodiment of the present disclosure. In this embodiment, the type of the target array is a pointer type, so the values ​​of each array element of the target array are pointer type data, which can be used to store a pointer library. Figure 6In the example, the target thread 602 is entering the scope of the first program code 612 and intends to execute the first program code 612 to complete the corresponding task. The variables, parameters, etc. involved in the first program code 612 are all stored in the target storage area. Because it is necessary to provide the target thread 602 with a target pointer library 608 pointing to the target storage area. Here, an object (object) 604 can be set to provide the target pointer library 608, which includes a function to access the target array and obtain the target pointer library. The object 604 first accesses the interface 610 for obtaining the sequence number of the target thread to obtain the target sequence number, for example, 3. Then the object 604 accesses the target array a[4]606 and traverses from the array element a[0] towards a[4]. When traversing to the third array element a[2], it can be determined that the target pointer library 608 stored in the array element is the target pointer library for the first program code. Therefore, the object 604 can carry the target pointer library 608 back and provide it to the target thread 602. The target thread 602 uses the target pointer library 608 to successfully execute the first program code.

[0043] Figure 4 4 is a schematic diagram of obtaining a target pointer library according to an embodiment of the present disclosure. Start at 402. At 404, determine whether the target process to which the target thread belongs enables access to multiple storage areas. If the target process does not enable access to multiple storage areas, it means that the target process is not a transit thread, and therefore can only return its statically bound pointer library at 406, and cannot switch to the pointer library for the first program code. If the target process enables access to multiple storage areas, it means that the target process is a transit thread, and therefore proceed to 408 to obtain the target sequence number of the target thread. Then proceed to 410, traverse the target array starting from the first data element until the array element corresponding to the target sequence number is traversed. Finally, at 412, the pointer library stored in the array element corresponding to the target sequence number is returned to the target thread for executing the first program code.

[0044] In some embodiments, the method for accessing the storage area also includes associating the target thread with the backed-up initial pointer library if the target thread ends the execution of the first program code. When detecting the storage area, usually a section of program code corresponds to one storage area, so when the target thread ends the execution of the first program code, it will leave the scope of the first program code and return to the scope of the external program code of the first program code. In the scope of the external program code, the initial pointer library should be used to execute the subsequent program code, so it is necessary to call the previously backed-up initial pointer library and assign it to the target thread so that it will not access the wrong storage area when executing the subsequent program code. In this embodiment, the backed-up initial pointer library is returned to the target pointer, which can achieve automatic switching, prevent the occurrence of errors, and reduce the consumption of human resources.

[0045] In some embodiments, the method for accessing the storage area also includes if the initial pointer library associated with the target thread is the same as the target pointer library, the target thread accesses the initial storage area according to the initial pointer library. The method for accessing the storage area also includes if the target thread ends the execution of the first program code, keeping the target thread associated with the initial pointer library. Although the target thread is determined to belong to a transit process associated with multiple storage areas, if the storage area accessed by executing the first program code is still the initial storage area, it can be determined that the initial pointer library is the same as the target pointer library, so there is no need to switch and back up, and the initial pointer library is directly used to execute the first program code. Similarly, after the execution of the first program code is completed, there is no need to switch back to the pointer library. This can improve efficiency and save computing resources.

[0046] Figure 5 This is a process diagram of a method for accessing a storage area according to an embodiment of the present disclosure. In this embodiment, to automate these functions, a class in an object-oriented programming language (e.g., C++) can be defined, for example, a class named Guard. The Guard class can include a first variable (e.g., a Boolean variable) for determining whether a switch is required; a second variable for storing a backup initial pointer library; a third variable for storing the current pointer library; and a fourth variable for storing the pointer library to be used. Beginning at 502, an object Guard1 of the Guard class is called by a target thread. At 504, if it is determined that the target process enables access to multiple storage areas, the target pointer library is provided to the target thread. Specifically, the Guard1 object can obtain a first number of storage areas associated with the target process to which the target thread belongs, using an interface. The interface can be a first function for obtaining the first number. The first number can be stored in a flag bit of the target process. Therefore, the Guard1 object can call the first function to read the value of the flag bit as the first number. If the first number is equal to a first threshold, the target thread accesses the initial storage area using the initial pointer library. If the first number is equal to the first threshold, it means that the target process to which the target thread belongs is not a transit process, so only the initial pointer library can be used. If the first number is greater than the first threshold, it is determined that the target process enables access to multiple storage areas. Then you can refer to Figure 6 The target pointer library is obtained in this way and stored in the fourth variable of the object Guard1.

[0047] At 506 places, object Guard1 judges whether the target pointer library is identical with the initial pointer library, that is, object Guard1 can judge whether the third variable is identical with the fourth variable.If not identical, proceed to 508 places and switch the initial pointer library to the target pointer library, set the first variable to true (true), assign the value of the third variable for storing the current pointer library to the second variable for storing the initial pointer library of the backup, then assign the value of the fourth variable for storing the pointer library to be used to the third variable for storing the current pointer library, then proceed to 510 places and execute the first program code. If identical, proceed directly to 510 places and use the initial pointer library to execute the first program code, object Guard1 has achieved backward compatibility, that is, can be compatible with the previous storage area access mechanism. Object Guard1 can set the first variable to false (false). After executing the first program code, judge at 512 places whether it is necessary to switch back to the initial pointer library. If it is determined at 506 that the initial pointer library and the target pointer library are the same, then no switching is required and the process ends at 516. Otherwise, it is necessary to switch back to the initial pointer library at 514. That is, the object Guard1 can assign the value of the second variable used to store the backup initial pointer library to the third variable used to store the current pointer library. Finally, the process ends at 516.

[0048] Figure 7 A schematic block diagram of an example device 700 suitable for implementing an embodiment of the present disclosure is shown. As shown, the device 700 includes a processor 701, which can load computer program instructions stored in a read-only memory (ROM) 702 into a random access memory (RAM) 703 to perform various appropriate actions and processes. In the RAM 703, various programs and data required for the operation of the device 700 can also be stored. The processor 701, ROM 702, and RAM 703 are connected to each other via a bus 704. An input / output (I / O) interface 705 is also connected to the bus 704.

[0049] The various methods and processes described above may be executed by the processor 701. For example, in some embodiments, the various methods and processes described above may be implemented as a computer software program tangibly embodied on a machine-readable medium. In some embodiments, part or all of the computer program may be loaded and / or installed onto the device 700 via the ROM 702. When the computer program is loaded into the RAM 703 and executed by the processor 701, one or more actions of the methods and processes described above may be performed.

[0050] The present disclosure may be a method, an apparatus, a system and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for executing various aspects of the present disclosure.

[0051] Figure 8 Schematic diagram of a device for accessing a storage area according to an embodiment of the present disclosure. Figure 8 The device 800 shown includes: a determination unit 802, configured to determine whether the target process to which the target thread belongs enables access to multiple storage areas; and a providing unit 804, configured to provide a target pointer library to the target thread if it is determined that the target process enables access to the multiple storage areas, wherein the target pointer library includes the base address and size of the target storage area.

[0052] In some embodiments, the determining unit 802 includes a flag obtaining unit and a judging unit. The flag obtaining unit is configured to obtain a first number of middleware associated with the target process. The judging unit is configured to determine that the target process enables access to multiple storage areas in response to the first number being greater than a first threshold.

[0053] In some embodiments, providing unit 804 includes: a pointer library acquisition unit, a backup unit, and an association unit. The pointer library acquisition unit is configured to acquire a target pointer library. The backup unit is configured to back up the initial pointer library in response to an initial pointer library associated with a target thread being different from the target pointer library, where the initial pointer library indicates the pointer library associated with the target thread before executing the first program code. The association unit is configured to associate the target pointer library with the target thread.

[0054] In some embodiments, the pointer library acquisition unit includes: a first acquisition unit, a second acquisition unit, and a third acquisition unit. The first acquisition unit is configured to acquire a pointer library array for a target process. The second acquisition unit is configured to determine an array element corresponding to a target thread from the pointer library array for the target process as a target array element. The third acquisition unit is configured to acquire a pointer library stored in the target array element as a target pointer library.

[0055] In some embodiments, the sequence number of each thread in the target process corresponds one-to-one to the sequence number of each array element in the pointer library array, and the second acquisition unit includes: a sequence number determination unit and an array element determination unit. The sequence number determination unit is configured to determine the sequence number of the target thread in the first number of threads as the target sequence number. The array element determination unit is configured to determine the target array element from the target array based on the target sequence number, wherein the sequence number of the target array element in the target array is equal to the target sequence number.

[0056] In some embodiments, the apparatus 800 further includes a first processing unit configured to associate the target thread with the backed-up initial pointer library in response to the target thread finishing execution of the first program code.

[0057] In some embodiments, the apparatus 800 further includes a second processing unit and a third processing unit. The second processing unit is configured to, in response to the initial pointer library associated with the target thread being the same as the target pointer library, cause the target thread to access the initial storage area based on the initial pointer library. The third processing unit is configured to, in response to the target thread terminating execution of the first program code, maintain the association between the target thread and the initial pointer library.

[0058] In some embodiments, the apparatus 800 further includes a fourth processing unit configured to, in response to the first number being equal to the first threshold, cause the target thread to access the initial storage area according to the initial pointer library.

[0059] The present disclosure provides a controller, comprising: at least one processor; and a memory, coupled to the at least one processor and having instructions stored thereon, wherein when the instructions are executed by the at least one processor, the controller executes an embodiment of the method according to any one of the above aspects.

[0060] A computer-readable storage medium may be a tangible device that can hold and store instructions used by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. More specific examples (a non-exhaustive list) of computer-readable storage media include random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), and any suitable combination thereof. The computer-readable storage medium used herein is not to be interpreted as a transient signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagated through a waveguide or other transmission medium (e.g., a light pulse through a fiber optic cable), or an electrical signal transmitted through a wire.

[0061] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions to be stored in the computer-readable storage medium in each computing / processing device.

[0062] The computer program instructions for performing the operations of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, and conventional procedural programming languages ​​such as "C" language or similar programming languages. Computer-readable program instructions may be executed entirely on a user's computer, partially on a user's computer, as an independent software package, partially on a user's computer, partially on a remote computer, or entirely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., utilizing an Internet service provider to connect via the Internet). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may be personalized by utilizing the state information of the computer-readable program instructions. The electronic circuit may execute the computer-readable program instructions, thereby realizing various aspects of the present disclosure.

[0063] Various aspects of the present disclosure are described herein with reference to flowcharts and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the present disclosure. It should be understood that each block of the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer-readable program instructions.

[0064] These computer-readable program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine such that when these instructions are executed by the processing unit of the computer or other programmable data processing device, a device is generated that implements the functions / actions specified in one or more blocks in the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium, where these instructions cause the computer, programmable data processing device, and / or other device to operate in a specific manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing various aspects of the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0065] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operational steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0066] The flow charts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the systems, methods and computer program products according to multiple embodiments of the present disclosure. In this regard, each box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and the part of the module, program segment or instruction contains one or more executable instructions for realizing the prescribed logical function. In some alternative implementations, the functions marked in the box can also occur in a sequence different from that marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be implemented by a dedicated hardware-based system that performs the prescribed function or action, or can be implemented by a combination of dedicated hardware and computer instructions.

[0067] While various embodiments of the present disclosure have been described above, the above descriptions are illustrative, non-exhaustive, and not intended to be limiting of the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is selected to best explain the principles of the embodiments, their practical applications, or improvements to existing technologies, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A method (200) for accessing a storage area, comprising: Determining (202) whether the target process to which the target thread belongs enables access to multiple storage areas; as well as In response to determining that the target process enables access to the plurality of memory regions, a target pointer library is provided (204) to the target thread, wherein the target pointer library includes a base address and a size of a target memory region.

2. The method according to claim 1, wherein determining whether the target process to which the target thread belongs enables access to multiple storage areas comprises: Obtaining a first number of middleware associated with the target process; as well as In response to the first number being greater than a first threshold, it is determined that the target process enables access to a plurality of storage areas.

3. The method according to claim 2, wherein providing the target pointer library to the target thread comprises: Obtaining the target pointer library; In response to an initial pointer library associated with the target thread being different from the target pointer library, backing up the initial pointer library, wherein the initial pointer library indicates a pointer library associated with the target thread before executing the first program code; as well as The target pointer library is associated with the target thread.

4. The method according to claim 3, wherein the acquiring the target pointer library comprises: Obtaining (302) a pointer library array for the target process; determining (304) an array element corresponding to the target thread from an array of pointers to the target process as a target array element; as well as A pointer library storing the target array element is obtained (306) as the target pointer library.

5. The method according to claim 4 , wherein the sequence number of each thread in the target process corresponds one-to-one to the sequence number of each array element in the pointer library array, and determining the array element corresponding to the target thread from the pointer library array for the target process comprises: Determine a sequence number of the target thread in the first number of threads as a target sequence number; as well as A target array element is determined from the target array according to the target sequence number, wherein the sequence number of the target array element in the target array is equal to the target sequence number.

6. The method according to claim 3, further comprising: In response to the target thread finishing execution of the first program code, the target thread is associated with the backed-up initial pointer library.

7. The method according to claim 3, further comprising: In response to the initial pointer library associated with the target thread being the same as the target pointer library, the target thread accesses the initial storage area according to the initial pointer library; as well as In response to the target thread ending execution of the first program code, the target thread is kept associated with the initial pointer library.

8. The method according to claim 2, further comprising: In response to the first number being equal to a first threshold, the target thread accesses an initial storage area according to an initial pointer library.

9. A device (800) for accessing a storage area, comprising: A determination unit (802) configured to determine whether a target process to which a target thread belongs enables access to multiple storage areas; as well as A providing unit (804) is configured to provide a target pointer library to the target thread in response to determining that the target process enables access to the plurality of storage areas, wherein the target pointer library includes a base address and a size of a target storage area.

10. A controller comprising: at least one processor; as well as A memory is coupled to the at least one processor and has instructions stored thereon, the instructions causing the controller to perform the method according to any one of claims 1-8 when executed by the at least one processor.

11. A computer program product tangibly stored on a non-transitory computer readable medium and comprising machine-executable instructions which, when executed, cause a machine to perform the method according to any one of claims 1 to 8.

12. A vehicle (100) comprising a controller according to claim 10.

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