Memory management method and device, electronic equipment and medium

Abstract

The embodiment of the invention provides a memory management method and device, electronic equipment and a medium, and relates to the technical field of computers.The method comprises the steps that when a madvision interface is called by a user process, suggestion information input by the user process through the madvision interface is obtained; under the condition that the suggested content is the degradation operation, traversing each virtual memory area in the virtual memory range, and calling a memory page migration function to perform degradation operation on memory pages meeting a preset degradation condition in the virtual memory areas; and under the condition that the suggested content is the upgrading operation, traversing each virtual memory region in the virtual memory range, and calling a memory page migration function to upgrade memory pages meeting a preset upgrading condition in the virtual memory regions. According to the scheme, the relationship between the memory capacity and the access delay can be better balanced on the premise that the system performance is not influenced as far as possible.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a memory management method, device, electronic device, and medium. Background Art

[0002] As artificial intelligence, big data analytics, and machine learning become mainstream applications, computers are increasingly demanding high-capacity and high-bandwidth content. However, traditional Double Data Rate (DDR) memory is expensive and cannot meet this growing demand. The emergence of Compute Express Link (CXL) offers the potential for more economical high-capacity memory expansion. However, due to hardware architecture limitations, CXL memory access speeds are slower than those of traditional Dynamic Random Access Memory (DRAM).

[0003] To leverage the large capacity of CXL memory while minimizing access latency, a tiered memory strategy has been introduced to manage large memory capacities. In a typical tiered memory architecture, CXL memory is treated as a separate, slower Non-Uniform Memory Access (NUMA) node, while DRAM is treated as a relatively faster NUMA node. The computer's operating system evaluates the frequency of data usage in memory, placing less frequently used data on slower NUMA nodes and more frequently used data on faster NUMA nodes, thus achieving a balance between large memory capacity and access latency.

[0004] For example, the currently used memory tiering strategy can be a NUMA balancing strategy. When local memory pressure is high, a least recently used (LRU) algorithm is used to identify cold pages that have been infrequently used and demote them to CXL memory. For frequently used hot pages, they are marked as hot the first time they are accessed. The next time they are accessed, they are promoted to the local memory node using a page fault mechanism, enabling faster access. However, memory demotion requires waiting until local memory pressure is high before the kernel automatically triggers memory demotion. By this time, system performance has already significantly degraded, and performing memory demotion can further degrade system performance. For memory promotion, because the kernel cannot accurately determine which memory pages are considered hot by user processes, it will only promote a memory page as hot after it has been accessed twice. This delay in promotion can negatively impact system performance. Therefore, it is currently impossible to achieve a balance between large memory capacity and access latency without compromising system performance, limiting the effectiveness of memory tiering. Summary of the Invention

[0005] The purpose of the embodiments of the present application is to provide a memory management method, apparatus, electronic device, and medium to better balance the relationship between memory capacity and access latency while minimizing the impact on system performance. The specific technical solution is as follows:

[0006] In a first aspect, an embodiment of the present application provides a memory management method, comprising:

[0007] When a memory suggestion madvise interface is called by a user process, obtaining suggestion information passed by the user process through the madvise interface, the suggestion information including a starting virtual address, a memory region length, and suggestion content, the suggestion content being a downgrade operation or an upgrade operation, and the starting virtual address and the memory region length being used to indicate a virtual memory range targeted by the suggestion content;

[0008] In a case where the suggested content is a downgrade operation, traversing each virtual memory area within the virtual memory range, calling a memory page migration function to perform a downgrade operation on memory pages within the virtual memory area that meet a preset downgrade condition;

[0009] In the case where the suggested content is an upgrade operation, each virtual memory area within the virtual memory range is traversed, and a memory page migration function is called to perform an upgrade operation on memory pages within the virtual memory area that meet preset upgrade conditions.

[0010] In a possible implementation, calling a memory page migration function to perform a demotion operation on a memory page in the virtual memory area that meets a preset demotion condition includes:

[0011] Traversing each memory page in the virtual memory area, isolating the memory pages that meet the preset degradation conditions from the least recently used (LRU) linked list, and adding them to the degradation linked list;

[0012] After completing the traversal of all memory pages within the virtual memory range, the memory page migration function is called to migrate each memory page in the demotion linked list from the local memory node to the computational fast link CXL memory node.

[0013] In a possible implementation, calling a memory page migration function to perform an upgrade operation on memory pages in the virtual memory area that meet preset upgrade conditions includes:

[0014] Traversing each memory page in the virtual memory area, and if the memory page meets the preset upgrade condition, updating the access timestamp of the memory page to the current timestamp;

[0015] Increase the reference count of the memory page by 1;

[0016] Call the memory page migration function to migrate the memory page from the CXL memory node to the local memory node.

[0017] In a possible implementation, after isolating the memory page that meets the preset degradation condition from the least recently used (LRU) linked list, the method further includes:

[0018] If the isolation fails, the memory page is added back to the LRU linked list, the page table state of the memory page is restored, and the traversal continues to the next memory page.

[0019] In a possible implementation, the preset degradation condition includes: the memory page is not any one of device memory, huge page memory, and non-anonymous page memory, the memory page is located on a local memory node, and the memory page has a corresponding CXL memory node;

[0020] The preset upgrade conditions include: the memory page is not any one of device memory, large page memory and non-anonymous page memory, the local node memory is sufficient, and the memory page is located on the CXL memory node.

[0021] In a second aspect, an embodiment of the present application provides a memory management device, comprising:

[0022] an acquisition module, configured to, when a memory suggestion madvise interface is called by a user process, acquire suggestion information passed by the user process through the madvise interface, the suggestion information including a starting virtual address, a memory region length, and suggestion content, wherein the suggestion content is a downgrade operation or an upgrade operation, and the starting virtual address and the memory region length are used to indicate a virtual memory range targeted by the suggestion content;

[0023] a demotion module configured to, when the suggested content is a demotion operation, traverse each virtual memory area within the virtual memory range and call a memory page migration function to perform a demotion operation on memory pages within the virtual memory range that meet a preset demotion condition;

[0024] The upgrade module is used to traverse each virtual memory area within the virtual memory range and call a memory page migration function to perform an upgrade operation on memory pages within the virtual memory area that meet preset upgrade conditions when the suggested content is an upgrade operation.

[0025] In a possible implementation, the downgrade module is specifically configured to:

[0026] Traversing each memory page in the virtual memory area, isolating the memory pages that meet the preset degradation conditions from the least recently used (LRU) linked list, and adding them to the degradation linked list;

[0027] After completing the traversal of all memory pages within the virtual memory range, the memory page migration function is called to migrate each memory page in the demotion linked list from the local memory node to the computational fast link CXL memory node.

[0028] In a possible implementation, the upgrade module is specifically configured to:

[0029] Traversing each memory page in the virtual memory area, and if the memory page meets the preset upgrade condition, updating the access timestamp of the memory page to the current timestamp;

[0030] Increase the reference count of the memory page by 1;

[0031] Call the memory page migration function to migrate the memory page from the CXL memory node to the local memory node.

[0032] In a possible implementation, the degradation module is further configured to, if isolation fails, re-add the memory page to the LRU linked list, restore the page table state of the memory page, and continue traversing the next memory page.

[0033] In a possible implementation, the preset degradation condition includes: the memory page is not any one of device memory, huge page memory, and non-anonymous page memory, the memory page is located on a local memory node, and the memory page has a corresponding CXL memory node;

[0034] The preset upgrade conditions include: the memory page is not any one of device memory, large page memory and non-anonymous page memory, the local node memory is sufficient, and the memory page is located on the CXL memory node.

[0035] In a third aspect, an embodiment of the present application provides an electronic device, including a processor, a communication interface, a memory, and a communication bus, wherein the processor, the communication interface, and the memory communicate with each other via the communication bus;

[0036] Memory for storing computer programs;

[0037] The processor is configured to implement the method described in the first aspect above when executing the program stored in the memory.

[0038] In a fourth aspect, an embodiment of the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method described in the first aspect above is implemented.

[0039] In a fifth aspect, an embodiment of the present application further provides a computer program product comprising instructions, which, when executed on a computer, enables the computer to execute the method described in the first aspect.

[0040] Using the above technical solution, when the madvise interface is called by a user process, the kernel obtains the recommendation information passed by the user process through the madvise interface. If the recommendation content is a downgrade operation, the kernel calls the memory page migration function to downgrade the memory pages in the virtual memory area that meet the preset upgrade conditions. If the recommendation content is an upgrade operation, the kernel calls the memory page migration function to upgrade the memory pages in the virtual memory area that meet the preset upgrade conditions. By calling the madvise interface, the user process can migrate memory data between the local memory node and the CXL memory node according to its actual needs, which can improve the use of the local memory node, avoid downgrading when the local memory node is under high memory pressure, and eliminate the need to wait for two accesses to a memory page before upgrading the memory page. Therefore, it can better balance the relationship between memory capacity and access latency while minimizing the impact on system performance.

[0041] Of course, it is not necessary to achieve all the advantages described above at the same time when implementing any product or method of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other embodiments can also be obtained based on these drawings.

[0043] Figure 1 A flowchart of a memory management method provided in an embodiment of the present application;

[0044] Figure 2 A schematic diagram of the overall framework of the memory management method provided in an embodiment of the present application;

[0045] Figure 3 A flowchart of the downgrade operation in the memory management method provided in an embodiment of the present application;

[0046] Figure 4 A flowchart of the upgrade operation in the memory management method provided in an embodiment of the present application;

[0047] Figure 5 A schematic diagram of the structure of a memory management device provided in an embodiment of the present application;

[0048] Figure 6 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0049] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field based on this application are within the scope of protection of this application.

[0050] To facilitate understanding, the relevant technical terms involved in the embodiments of this application are first explained.

[0051] Memory tiering: Memory tiering refers to dividing a computer storage system into multiple levels (such as registers, cache, memory, disk, etc.). The higher the level, the faster the access speed but the smaller the capacity, while the lower the level, the slower the access speed but the larger the capacity. By balancing speed, capacity and cost through on-demand data flow, overall efficiency is improved.

[0052] CXL Memory: CXL memory is a high-speed interconnect technology based on the PCIE (peripheral component interconnect express) physical layer. It implements a cache coherence protocol to enable memory sharing and pooling between the CPU, accelerators, and memory expansion devices. Its core goal is to break the physical isolation of memory resources in traditional architectures, allowing direct access to a unified memory space across devices and achieving low-latency, high-bandwidth data interaction without software intervention. This technology addresses the resource waste caused by memory capacity fragmentation (such as stranded memory) in fields such as artificial intelligence (AI) and high-performance computing (HPC). It also significantly improves overall system throughput efficiency by dynamically allocating memory pools, making it a critical infrastructure supporting the computing power needs of next-generation data centers.

[0053] Memory promotion: In a typical memory hierarchy architecture that includes CXL memory, the operating system can move memory data that is about to be accessed from a CXL memory node with a slower access speed to a local memory node with a faster access speed to enable faster access to the data. This movement is called memory promotion.

[0054] Memory demotion: In a typical memory tiered architecture that includes CXL memory, the operating system can move temporarily unaccessed memory data from faster-access local memory nodes to slower-access CXL memory nodes to conserve memory capacity on the local fast memory nodes. This movement is called memory promotion.

[0055] The following is a detailed introduction to the memory management method provided in the embodiments of the present application.

[0056] The present application provides a memory management method, which is applied to the core of an electronic device, such as Figure 1 As shown, the method includes:

[0057] S101. When a memory advice (madvise) interface is called by a user process, obtain advice information passed by the user process through the memory advice interface. The advice information includes a starting virtual address, a memory region length, and advice content. The advice content is a downgrade operation or an upgrade operation.

[0058] The starting virtual address and the length of the memory area are used to indicate the virtual memory range targeted by the suggested content, that is, if the suggested content is a downgrade operation, it is used to indicate that the memory pages within the virtual memory range are downgraded; if the suggested content is an upgrade operation, it is used to indicate that the memory pages within the virtual memory range are upgraded.

[0059] Among them, the kernel's madvise interface is used for user processes to provide memory usage suggestions to the kernel. The kernel will meet the user process's memory usage requirements as much as possible based on the suggestions provided by the user process. In the embodiment of the present application, the suggestions that the madvise interface can accept are expanded, and the user process can independently decide the virtual memory range that needs to be upgraded or downgraded.

[0060] The structure of the madvise function is: int madvise(unsigned long start, size_t len, int behavior).

[0061] Among them, unsigned long is used to declare integer variables, indicating unsigned long integers. The input parameter start indicates the starting address of the memory for the recommended content provided by the user process. len indicates the length of the memory area for the recommended content. Behavior indicates the specific recommended content.

[0062] In the embodiment of the present application, the suggestion content part of the madvise function is expanded. The suggestion content can be MADV_DEMOTE or MADV_PROMOTE. MADV_DEMOTE is used to indicate that the user process recommends a downgrade operation on the memory pages in the virtual memory range, and MADV_PROMOTE is used to indicate that the user process recommends a promotion operation on the memory pages in the virtual memory range.

[0063] S102: When the suggested content is a downgrade operation, traverse each virtual memory area within the virtual memory range, call a memory page migration function, and perform a downgrade operation on memory pages within the virtual memory area that meet a preset downgrade condition.

[0064] The memory page migration function is a native kernel function. By calling this function, the kernel can downgrade memory pages, migrating them from local memory nodes to CXL memory nodes. The kernel can also handle errors during this downgrade process. For example, a migration failure might occur due to insufficient memory on the CXL memory node. In this case, the memory page can be retained in the original local memory node without being cleared.

[0065] The default downgrade conditions include: the memory page is not device memory, huge page memory, or non-anonymous page memory; the memory page is located on a local memory node; and the memory page has a corresponding CXL memory node. The corresponding CXL memory node is the target CXL memory node to which the memory page can be migrated when downgrading.

[0066] S103: When the suggested content is an upgrade operation, each virtual memory area within the virtual memory range is traversed, and a memory page migration function is called to perform an upgrade operation on memory pages within the virtual memory area that meet preset upgrade conditions.

[0067] The kernel can call its own memory page migration function to upgrade the memory page, that is, migrate the memory page from the CXL memory node to the local memory node.

[0068] The preset upgrade conditions include: the memory page is not any of device memory, huge page memory, and non-anonymous page memory, the local node has sufficient memory, and the memory page is located on a CXL memory node.

[0069] Using this method, when the madvise interface is called by a user process, the kernel obtains the recommendation information passed by the user process through the madvise interface. If the recommendation is for a downgrade operation, the kernel calls the memory page migration function to downgrade the memory pages in the virtual memory area that meet the preset upgrade conditions. If the recommendation is for an upgrade operation, the kernel calls the memory page migration function to upgrade the memory pages in the virtual memory area that meet the preset upgrade conditions. By calling the madvise interface, the user process can migrate memory data between the local memory node and the CXL memory node according to its actual needs. This can improve the utilization of the local memory node, avoid downgrading the local memory node only when the memory pressure is high, and eliminate the need to wait for a memory page to be accessed twice before upgrading the memory page. This can better balance the relationship between memory capacity and access latency while minimizing the impact on system performance.

[0070] like Figure 2 As shown, Figure 2 The overall framework diagram of the memory management method provided in the embodiment of the present application is as follows: in user state, the user process calls the memory suggestion (madvise) interface, and then in kernel state, the kernel calls kernel function 1 to check the validity of the parameters passed in by the user process through the madvise function. The kernel function 1 is: execute memory suggestion (do_madvise) function, which can specifically check whether the virtual memory range indicated by the starting virtual address and the memory area length belongs to the memory range requested by the user, and check whether the suggestion content is the suggestion content supported by the kernel.

[0071] After the check passes, the kernel calls kernel function 2 to process each virtual memory area (VMA) within the virtual memory range. Kernel function 2 applies the virtual memory area behavior recommendation (madvise_vma_behavior). If the recommendation is a demotion recommendation (MADV_DEMOTE), kernel function 2 further calls the newly added kernel function 3, which performs the memory demotion process (madvise_demotion), to demote the memory pages within the virtual memory range. If the recommendation is a promotion recommendation (MADV_PROMOTE), kernel function 2 further calls the newly added kernel function 4, which performs the memory promotion process (madvise_promotion), to promote the memory pages within the virtual memory range.

[0072] The following describes the methods for downgrading and upgrading respectively.

[0073] Regarding the demotion operation, in the above S102, the memory page migration function is called to perform the demotion operation on the memory pages in the virtual memory area that meet the preset demotion conditions. Specifically, it can be implemented as follows:

[0074] Traverse each memory page in the virtual memory area and call the memory page migration function to migrate each memory page that meets the preset degradation conditions from the local memory node to the CXL node.

[0075] Specifically, each memory page in the virtual memory area is traversed, and the memory pages that meet the preset degradation conditions are isolated from the LRU linked list and added to the degradation list.

[0076] The memory management system locks and traverses the LRU linked list to select target page nodes. Target page nodes are nodes in the LRU linked list that meet preset demotion conditions. The selected target page nodes are then removed from the LRU linked list, marked as "quarantined," and added to the demotion linked list for subsequent recycling or swapping operations.

[0077] If a memory page is in use, the reference count is non-zero, the linked list structure is modified concurrently, the page type cannot be isolated, or system resources are limited, the above isolation operation may fail. At this time, it is necessary to restore the status mark of the memory page and hang the memory page in the LRU linked list to restore the status of the memory page before isolation and continue to traverse the next memory page.

[0078] After completing the traversal of all memory pages within the virtual memory range, the memory page migration function is called to migrate each memory page in the downgraded linked list from the local memory node to the CXL memory node.

[0079] When performing memory page migration, various errors such as locked or referenced pages, insufficient memory in the target memory node, page copy failure, Translation Lookaside Buffer (TLB) synchronization exceptions, and unsupported page types must be handled according to kernel specifications. Rollback should be performed when necessary to ensure system memory consistency and stability.

[0080] It is understandable that during the traversal process, if there is a memory page that does not meet the preset degradation condition, the memory page is skipped and the traversal continues to the next memory page.

[0081] The kernel calls the madvise_demotion function to perform the downgrade operation process as follows Figure 3 As shown, before executing the demotion operation, the madvise_demotion function first performs a series of preparatory work. Specifically, the function first performs a configuration judgment, checks whether the system supports memory demotion, and verifies whether the current process has the required memory operation permissions to ensure that subsequent demotion operations are legal and compliant. The function then refreshes the LRU linked list and cache status corresponding to the relevant memory area to ensure that the latest usage of the page is accurately reflected, providing a reliable information basis for subsequent page isolation and migration. Finally, the function batch refreshes the TLB entries of the relevant virtual pages to avoid virtual addresses being mapped to old physical pages, ensuring the correctness and consistency of address translation. After completing the preparatory work, start executing as follows Figure 3 The process shown.

[0082] S301: Determine whether the preset conditions are met. If yes, execute S302; if not, end the process.

[0083] The precondition refers to whether the aforementioned preparatory work has been completed correctly. For example, if the system is determined to support memory downgrade, the current process has the required memory operation permissions, the LRU list and cache status corresponding to the relevant memory area have been refreshed, and the TLB of the relevant virtual page has been refreshed, then the precondition is determined to be met. If any of the aforementioned preparatory work is not completed correctly, then the precondition is determined to be unmet.

[0084] S302: traverse memory pages within the virtual memory range.

[0085] S303: Determine whether the currently traversed memory page meets the degradation condition. If so, execute S304; if not, skip the memory page and return to S302 to continue traversing the next memory page.

[0086] S304: Determine whether the memory page can be successfully isolated from the least recently used list. If so, execute S306; if not, execute S305.

[0087] S305: Restore the page table status.

[0088] After S305 , the memory page is skipped and the process returns to S302 to continue traversing the next memory page.

[0089] S306: Add the memory page to the downgrade linked list.

[0090] S307: Determine whether all memory pages within the virtual memory range have been traversed. If so, execute S308; if not, return to S302 to continue traversing the next memory page.

[0091] S308: Call the kernel's memory page migration function to perform a downgrade operation on the memory pages in the downgrade linked list, and then end the process.

[0092] The downgraded linked list can be input into the memory page migration function, and then the memory page migration function can migrate the memory pages in the downgraded linked list, that is, migrate each memory page to the CXL memory node corresponding to the memory page and handle possible errors.

[0093] Using this method, the kernel provides user processes with a flexible and easy-to-use interface for memory downgrade. User processes can flexibly adjust according to their own needs without having to wait until the local memory node is under high pressure for the kernel to automatically trigger memory downgrade. This can avoid further degradation of system performance when the local memory node is under high pressure.

[0094] In some embodiments of the present application, for the upgrade operation, in the above S103, the memory page migration function is called to perform the upgrade operation on the memory pages in the virtual memory area that meet the preset upgrade conditions, which can be specifically implemented as follows:

[0095] Traverse each memory page in the virtual memory area and call the memory page migration function to migrate the memory pages that meet the preset upgrade conditions from the CXL memory node to the local memory node.

[0096] Specifically, each memory page in the virtual memory area is traversed. If the memory page meets the preset upgrade conditions, the access timestamp of the memory page is updated to the current timestamp; the reference count of the memory page is increased by 1; and the memory page migration function is called to migrate the memory page from the CXL memory node to the local memory node.

[0097] Among them, after the access timestamp of the memory page is updated to the current timestamp, it means that the memory page has been accessed recently, which can prevent the memory page from being recycled. The access timestamp of the memory page is the current timestamp, and the reference count of the memory page is increased by 1, indicating that the memory page is the memory page currently being processed. For the memory page currently being processed, the kernel can call the memory page migration function to migrate the memory page to the local memory node, thereby completing the upgrade operation of the memory page. When performing memory page migration, various errors such as the page being locked or being referenced, insufficient memory in the target memory node, page copy failure, TLB synchronization exception, and unsupported page type must be handled according to kernel specifications, and rollback must be performed when necessary to ensure system memory consistency and stability.

[0098] The flowchart of the kernel calling the madvise_promotion function to perform the upgrade operation is as follows Figure 4 As shown, before performing the upgrade operation, the madvise_promotion function first performs a series of preparatory work. Specifically, the function first performs a configuration judgment, checks whether the system supports memory upgrades, and verifies whether the current process has the required memory operation permissions to ensure that subsequent upgrade operations are legal and compliant. The function then refreshes the LRU linked list and cache status corresponding to the relevant memory area to ensure that the latest usage of the page is accurately reflected, providing a reliable information basis for subsequent page isolation and migration. Finally, the function batch refreshes the Translation Lookaside Buffer (TLB) items of the relevant virtual pages to avoid virtual addresses being mapped to old physical pages, ensuring the correctness and consistency of address translation. After completing the preparatory work, start executing as shown below Figure 4 The process shown.

[0099] S401: Determine whether the preset conditions are met. If yes, execute S402; if not, end the process.

[0100] The precondition refers to whether the aforementioned preparatory work has been completed correctly. For example, if the system is confirmed to support memory upgrades, the current process has the required memory operation permissions, the LRU list and cache status corresponding to the relevant memory area have been refreshed, and the TLB of the relevant virtual page has been refreshed, then the precondition is determined to be met. If any of the aforementioned preparatory work is not completed correctly, then the precondition is determined to be unmet.

[0101] S402: traverse memory pages within the virtual memory range.

[0102] S403: Determine whether the currently traversed memory page meets the upgrade condition. If yes, execute S404; if not, skip the memory page and return to S402 to continue traversing the next memory page.

[0103] S404: Update the access time of the memory page.

[0104] Specifically, the access timestamp of the memory page may be updated to the current timestamp.

[0105] S405: Increase the reference count of the memory page for the upgrade operation.

[0106] Specifically, the reference count of the memory page may be increased by 1.

[0107] S406: Call the memory page migration function to perform the upgrade operation.

[0108] Specifically, the memory page migration function may migrate the memory page from the CXL memory node to the local memory node.

[0109] S407: Determine whether all memory pages within the virtual memory range have been traversed. If so, end the process; if not, return to S402 to continue traversing the next memory page.

[0110] Using this method, the kernel can directly perform upgrade operations according to the memory suggestions after receiving them, avoiding the performance impact caused by having to access the same memory page multiple times to trigger the upgrade of the memory page, and can meet the needs of user processes as much as possible.

[0111] In summary, the method provided in the embodiment of the present application provides a flexible and easy-to-use interface for user processes based on the kernel's original memory suggestion interface, and provides user processes with a method for autonomously controlling memory page upgrades and upgrades, so that user processes can provide the kernel with upgrade and upgrade suggestions for memory pages within a specified virtual memory range according to their own needs. After accepting the suggestions of the user process, the kernel will operate as much as possible in accordance with the suggestions when conditions permit, in order to meet the needs of the user process. Moreover, this method does not require the introduction of an additional user-state control process, and the memory page upgrade and downgrade process is still controlled by the kernel, avoiding many limitations of user-state control. In addition, since the upgrade and downgrade operations are completely independent, they can be performed synchronously, which can avoid the local memory node from falling into a memory shortage scenario as much as possible, and the synchronous operation can improve the efficiency of memory page migration.

[0112] From the perspective of CXL memory usage, compared to existing memory technologies, the embodiments of this application provide a more radical upgrade and downgrade method. User processes can leverage CXL memory's large capacity based on their own business needs, maximizing the efficiency of CXL memory usage. Furthermore, to avoid system performance degradation caused by frequent upgrades and downgrades, the ratio of local memory to CXL memory is typically fixed. However, in the embodiments of this application, since user processes can autonomously suggest upgrades or downgrades, CXL memory capacity can be freed up to a certain extent, freeing up the fixed ratio. This allows for better memory expansion performance, a better balance between memory capacity and access latency, and improved overall tiered memory efficiency.

[0113] Corresponding to the above method embodiment, the present application embodiment also provides a memory management device, such as Figure 5 As shown, the device includes:

[0114] Acquisition module 501 is configured to, when a memory suggestion madvise interface is called by a user process, acquire suggestion information passed by the user process through the madvise interface, the suggestion information including a starting virtual address, a memory region length, and suggestion content, where the suggestion content is a downgrade operation or an upgrade operation, and the starting virtual address and memory region length are used to indicate the virtual memory range targeted by the suggestion content;

[0115] Demotion module 502, configured to, when the suggestion content is a demotion operation, traverse each virtual memory area within the virtual memory range and call a memory page migration function to perform a demotion operation on memory pages within the virtual memory area that meet a preset demotion condition;

[0116] The upgrade module 503 is configured to, when the suggested content is an upgrade operation, traverse each virtual memory area within the virtual memory range and call a memory page migration function to perform an upgrade operation on memory pages within the virtual memory area that meet preset upgrade conditions.

[0117] Optionally, the downgrade module 502 is specifically configured to:

[0118] Traverse each memory page in the virtual memory area, isolate the memory pages that meet the preset degradation conditions from the least recently used LRU linked list, and add them to the degradation linked list;

[0119] After completing the traversal of all memory pages within the virtual memory range, the memory page migration function is called to migrate each memory page in the downgraded linked list from the local memory node to the computational fast link CXL memory node.

[0120] Optionally, the upgrade module 503 is specifically configured to:

[0121] Traverse each memory page in the virtual memory area, and if the memory page meets the preset upgrade conditions, update the access timestamp of the memory page to the current timestamp;

[0122] Increase the reference count of the memory page by 1;

[0123] Call the memory page migration function to migrate the memory page from the CXL memory node to the local memory node.

[0124] Optionally, the demotion module 502 is further configured to, if isolation fails, re-add the memory page to the LRU linked list, restore the page table state of the memory page, and continue traversing the next memory page.

[0125] Optionally, the preset degradation conditions include: the memory page is not any of device memory, huge page memory, and non-anonymous page memory, the memory page is located on a local memory node, and the memory page has a corresponding CXL memory node;

[0126] The preset upgrade conditions include: the memory page is not any of device memory, huge page memory, and non-anonymous page memory, the local node has sufficient memory, and the memory page is located on a CXL memory node.

[0127] The present application also provides an electronic device, such as Figure 6 As shown, it includes a processor 601 , a communication interface 602 , a memory 603 and a communication bus 604 , wherein the processor 601 , the communication interface 602 , and the memory 603 communicate with each other via the communication bus 604 .

[0128] Memory 603, used for storing computer programs;

[0129] The processor 601 is configured to implement the method in the above method embodiment when executing the program stored in the memory 603 .

[0130] The communication bus mentioned in the electronic devices mentioned above can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus. This communication bus can be divided into address buses, data buses, control buses, etc. For ease of illustration, only a single thick line is used in the figure, but this does not mean that there is only one bus or only one type of bus.

[0131] The communication interface is used for communication between the above electronic device and other devices.

[0132] The memory may include random access memory (RAM) or non-volatile memory (NVM), such as at least one disk storage. Alternatively, the memory may be at least one storage device located away from the processor.

[0133] The above-mentioned processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, and discrete hardware components.

[0134] In another embodiment provided by the present application, a computer-readable storage medium is further provided, in which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned memory management methods are implemented.

[0135] In another embodiment provided by the present application, a computer program product including instructions is also provided, which, when executed on a computer, enables the computer to execute any one of the memory management methods in the above embodiments.

[0136] In the above embodiments, all or part of the embodiments can be implemented using software, hardware, firmware, or any combination thereof. When implemented using software, all or part of the embodiments can be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of the present application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via a wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) method. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that includes one or more available media. The available medium can be a magnetic medium (e.g., a floppy disk, hard disk, tape), an optical medium (e.g., a DVD), or a semiconductor medium (e.g., a solid-state drive (SSD)).

[0137] It should be noted that, in this document, relational terms such as first and second, etc., are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply the existence of any such actual relationship or order between these entities or operations. Moreover, the terms "comprises," "comprising," or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. In the absence of further limitations, an element defined by the phrase "comprising a ..." does not exclude the presence of other identical elements in the process, method, article, or device comprising the element.

[0138] Each embodiment in this specification is described in a related manner. Similar portions between the embodiments can be referred to in conjunction with each other. Each embodiment focuses on the differences from other embodiments. In particular, the device embodiments are generally similar to the method embodiments, so their description is relatively simple. For related portions, refer to the description of the method embodiments.

[0139] The above description is only a preferred embodiment of the present application and is not intended to limit the scope of protection of the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application are included in the scope of protection of the present application.

Claims

1. A memory management method, characterized in that: include: When a memory suggestion madvise interface is called by a user process, obtaining suggestion information passed by the user process through the madvise interface, the suggestion information including a starting virtual address, a memory region length, and suggestion content, the suggestion content being a downgrade operation or an upgrade operation, and the starting virtual address and the memory region length being used to indicate a virtual memory range targeted by the suggestion content; In a case where the suggested content is a downgrade operation, traversing each virtual memory area within the virtual memory range, calling a memory page migration function to perform a downgrade operation on memory pages within the virtual memory area that meet a preset downgrade condition; In the case where the suggested content is an upgrade operation, each virtual memory area within the virtual memory range is traversed, and a memory page migration function is called to perform an upgrade operation on memory pages within the virtual memory area that meet preset upgrade conditions.

2. The method according to claim 1, characterized in that The calling of the memory page migration function to perform a degradation operation on the memory pages in the virtual memory area that meet the preset degradation conditions includes: Traversing each memory page in the virtual memory area, isolating the memory pages that meet the preset degradation conditions from the least recently used (LRU) linked list, and adding them to the degradation linked list; After completing the traversal of all memory pages within the virtual memory range, the memory page migration function is called to migrate each memory page in the demotion linked list from the local memory node to the computational fast link CXL memory node.

3. The method according to claim 1, characterized in that The calling of the memory page migration function to perform an upgrade operation on the memory pages in the virtual memory area that meet the preset upgrade conditions includes: Traversing each memory page in the virtual memory area, and if the memory page meets the preset upgrade condition, updating the access timestamp of the memory page to the current timestamp; Increase the reference count of the memory page by 1; Call the memory page migration function to migrate the memory page from the CXL memory node to the local memory node.

4. The method according to claim 2, characterized in that After isolating the memory page that meets the preset degradation condition from the least recently used (LRU) linked list, the method further includes: If the isolation fails, the memory page is added back to the LRU linked list, the page table state of the memory page is restored, and the traversal continues to the next memory page.

5. The method according to any one of claims 1 to 4, characterized in that The preset degradation conditions include: the memory page is not any of device memory, huge page memory and non-anonymous page memory, the memory page is located on a local memory node and the memory page has a corresponding CXL memory node; The preset upgrade conditions include: the memory page is not any one of device memory, large page memory and non-anonymous page memory, the local node memory is sufficient, and the memory page is located on the CXL memory node.

6. A memory management device, characterized in that: include: an acquisition module, configured to, when a memory suggestion madvise interface is called by a user process, acquire suggestion information passed by the user process through the madvise interface, the suggestion information including a starting virtual address, a memory region length, and suggestion content, wherein the suggestion content is a downgrade operation or an upgrade operation, and the starting virtual address and the memory region length are used to indicate a virtual memory range targeted by the suggestion content; a demotion module configured to, when the suggested content is a demotion operation, traverse each virtual memory area within the virtual memory range and call a memory page migration function to perform a demotion operation on memory pages within the virtual memory range that meet a preset demotion condition; The upgrade module is used to traverse each virtual memory area within the virtual memory range and call a memory page migration function to perform an upgrade operation on memory pages within the virtual memory area that meet preset upgrade conditions when the suggested content is an upgrade operation.

7. The device according to claim 6, characterized in that The downgrade module is specifically used to: Traversing each memory page in the virtual memory area, isolating the memory pages that meet the preset degradation conditions from the least recently used (LRU) linked list, and adding them to the degradation linked list; After completing the traversal of all memory pages within the virtual memory range, the memory page migration function is called to migrate each memory page in the demotion linked list from the local memory node to the computational fast link CXL memory node.

8. The device according to claim 6, characterized in that The upgrade module is specifically used to: Traversing each memory page in the virtual memory area, and if the memory page meets the preset upgrade condition, updating the access timestamp of the memory page to the current timestamp; Increase the reference count of the memory page by 1; Call the memory page migration function to migrate the memory page from the CXL memory node to the local memory node.

9. The device according to claim 7, characterized in that The degradation module is further configured to, if isolation fails, re-add the memory page to the LRU linked list, restore the page table state of the memory page, and continue traversing the next memory page.

10. The device according to any one of claims 6 to 9, characterized in that: The preset degradation conditions include: the memory page is not any of device memory, huge page memory and non-anonymous page memory, the memory page is located on a local memory node and the memory page has a corresponding CXL memory node; The preset upgrade conditions include: the memory page is not any one of device memory, large page memory and non-anonymous page memory, the local node memory is sufficient, and the memory page is located on the CXL memory node.

11. An electronic device, characterized in that: It includes a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory communicate with each other via the communication bus; Memory for storing computer programs; A processor, configured to implement the method according to any one of claims 1 to 5 when executing a program stored in a memory.

12. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 5 is implemented.

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