Power amplifier circuit for a portable player

Abstract

The embodiment of the present application relates to the field of amplification circuit and driving circuit, and provides a power amplification circuit of a portable player, which comprises: a circuit comprising an audio signal input module, an audio signal output module, an amplifier power supply driving module and a power amplification module, wherein the output end of the audio signal input module is connected with the input end of the power amplification module, the output end of the power amplification module is connected with the audio signal output module, and the amplifier power supply driving module is connected with the power input port of the power amplification module; the amplifier power supply driving module can be externally connected with an independent external power supply, and can supply power to the power amplifier, so that the stability of the power amplifier during power supply is improved, and the audio quality during subsequent playing is improved.

Description

Technical Field

[0001] This application relates to the field of amplifier circuits and driver circuits, specifically to a power amplifier circuit for a portable player. Background Technology

[0002] A portable media player mainly consists of a system section, a decoding section, and a headphone amplifier section. All three sections consume a significant amount of power. Insufficient power to the headphone amplifier can negatively impact sound performance and degrade dynamics. Current solutions typically use a single power supply for these three sections. However, in portable media players, power consumption is rapid, which can cause fluctuations in the power supply to the headphone amplifier, resulting in reduced audio quality during subsequent playback. Summary of the Invention

[0003] This application provides a power amplifier circuit for a portable player, which can use an amplifier power supply driver module connected to an independent external power supply to power the power amplifier, thereby improving the stability of the power amplifier during power supply and thus improving the audio quality during subsequent playback.

[0004] A first aspect of this application provides a power amplifier circuit for a portable player. The circuit includes an audio signal input module, an audio signal output module, an amplifier power supply driver module, and a power amplifier module. The output terminal of the audio signal input module is connected to the input terminal of the power amplifier module, the output terminal of the power amplifier module is connected to the audio signal output module, and the amplifier power supply driver module is connected to the power input port of the power amplifier module.

[0005] The amplifier power supply drive module includes an external power interface, a voltage regulation control module, a sub-drive module, and a power output interface. The output terminal of the external power interface is connected to the input terminal of the voltage regulation control module, the output terminal of the voltage regulation control module is connected to the power output interface, and the control port of the sub-drive module is connected to the signal input port of the voltage regulation control module.

[0006] The power amplification module includes a first operational amplifier and a feedback adjustment submodule. The positive input terminal of the first operational amplifier is connected to the output terminal of the audio signal input module. The output terminal of the first operational amplifier is connected to the audio signal output module and the first terminal of the feedback adjustment submodule. The second terminal of the feedback adjustment submodule is connected to the inverting input terminal of the first operational amplifier. The power input port of the feedback adjustment submodule is connected to the power output interface of the amplifier power supply drive module.

[0007] In one possible implementation, the voltage regulation control module includes a charge pump, a second power amplifier, a first MOSFET N1, a first resistor, a second resistor, and a first capacitor. The input terminal of the charge pump is connected to an external power supply interface, and the output terminal of the charge pump is connected to the power supply terminal of the power amplifier. The first input terminal of the power amplifier is connected to the first signal output terminal of the sub-drive module. The second input terminal of the power amplifier is connected to the first terminals of the first and second resistors, and the second terminal of the first resistor is grounded. The signal output terminal of the power amplifier is connected to the first terminal of the first MOSFET. The second terminal of the first MOSFET is connected to the signal input terminal of the voltage regulation control module. The third terminal of the first MOSFET is connected to the output terminal of the voltage regulation control module, the first terminal of the first capacitor, and the second terminal of the second resistor. The second terminal of the first capacitor is grounded.

[0008] In one possible implementation, the sub-driving module includes a second MOSFET P2, a third MOSFET P3, a fourth MOSFET N4, a third resistor, a fourth resistor, a first Zener diode, a second Zener diode, a second capacitor, and a third capacitor. The source of the second MOSFET P2 is connected to the power input port. The gate and drain of the second MOSFET P2 are connected to the first terminal of the second capacitor, the first terminal of the fourth resistor, and the anode of the first Zener diode. The second terminal of the second capacitor is grounded. The cathode of the first Zener diode is connected in series with the third resistor and then to the gate of the third MOSFET P3. The second terminal of the fourth resistor is connected to the source of the third MOSFET P3. The drain of the third MOSFET P3 is connected to the first terminal of the third capacitor, the first terminal of the fifth resistor, and the drain of the fourth MOSFET N4 via the second Zener diode. The second terminal of the fifth resistor is connected to the gate of the fourth MOSFET N4. The source of the fourth MOSFET N4 outputs a reference voltage. The second terminal of the third capacitor is grounded.

[0009] In one possible implementation, the resistance of the third resistor is greater than the resistance of the fourth resistor.

[0010] In one possible implementation, the charge pump includes a fifth MOSFET P5, a sixth MOSFET P6, a seventh MOSFET N7, an eighth MOSFET N8, a ninth MOSFET P9, a tenth MOSFET P10, an eleventh MOSFET P11, a twelfth MOSFET P12, a fourth capacitor, a fifth capacitor, a sixth capacitor, and a seventh capacitor, wherein...

[0011] The source of the seventh MOSFET N7 is connected to the external power supply interface and the source of the eighth MOSFET N8. The drain of the seventh MOSFET N7 is connected to the drain of the fifth MOSFET P5, the first terminal of the fourth capacitor, the gate of the sixth MOSFET P6, and the gate of the eighth MOSFET N8. The gate of the seventh MOSFET N7 is connected to the gate of the fifth MOSFET P5, the first terminal of the fifth capacitor, the drain of the sixth MOSFET P6, and the drain of the eighth MOSFET N8. The second terminal of the fourth capacitor is connected to the first clock signal port. The second terminal of the fifth capacitor is connected to the second clock signal port. The source of the fifth MOSFET P5 is connected to the source of the sixth MOSFET P6 and the first terminal of the first charge pump intermediate interface.

[0012] The second end of the intermediate interface of the first charge pump is connected to the source of the ninth MOS transistor P9 and the source of the tenth MOS transistor P10. The gate and drain of the ninth MOS transistor P9 are connected to the first end of the sixth capacitor, the gate of the eleventh MOS transistor P11, and the drain of the twelfth MOS transistor P12. The gate and drain of the tenth MOS transistor P10 are connected to the first end of the seventh capacitor, the drain of the eleventh MOS transistor P11, and the gate of the twelfth MOS transistor P12. The source of the eleventh MOS transistor P11 and the source of the twelfth MOS transistor P12 are connected to the output end of the charge pump. The second end of the sixth capacitor is connected to the third clock signal port, and the second end of the seventh capacitor is connected to the fourth clock signal port.

[0013] Implementing the embodiments of this application has the following beneficial effects:

[0014] The power amplifier circuit of the portable player includes an audio signal input module, an audio signal output module, an amplifier power supply driver module, and a power amplifier module. The output terminal of the audio signal input module is connected to the input terminal of the power amplifier module, and the output terminal of the power amplifier module is connected to the audio signal output module. The amplifier power supply driver module is connected to the power input port of the power amplifier module. The amplifier power supply driver module includes an external power interface, a voltage regulation control module, a driver module, and a power output interface. The output terminal of the external power interface is connected to the input terminal of the voltage regulation control module, and the output terminal of the voltage regulation control module is connected to the power output interface. The control port of the driver module is connected to the signal input port of the voltage regulation control module. The driver module is used to adjust the power output according to the external power interface. The voltage signal at the output port and the energy consumption coefficient of the power amplifier module control the output voltage of the voltage regulation control module. The power amplifier module includes a first operational amplifier and a feedback adjustment submodule. The positive input terminal of the first operational amplifier is connected to the output terminal of the audio signal input module. The output terminal of the first operational amplifier is connected to the audio signal output module and the first terminal of the feedback adjustment submodule. The second terminal of the feedback adjustment submodule is connected to the inverting input terminal of the first operational amplifier. The power input port of the feedback adjustment submodule is connected to the power output interface of the amplifier power supply driver module. Therefore, an independent external power supply can be used to power the power amplifier through the amplifier power supply driver module, which improves the stability of the power amplifier during power supply and thus improves the audio quality during subsequent playback. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This application provides a schematic diagram of the power amplifier circuit for a portable player.

[0017] Figure 2 This application provides a schematic diagram of the structure of a voltage regulation control module.

[0018] Figure 3 This application provides a schematic diagram of the structure of a sub-driver module.

[0019] Figure 4 A schematic diagram of a charge pump is provided for an embodiment of this application;

[0020] Figure 5 This application provides a schematic diagram of the structure of a protection circuit. Detailed Implementation

[0021] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0023] In this application, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this application can be combined with other embodiments.

[0024] To better understand the power amplifier circuit of a portable player provided in this application embodiment, a brief introduction to the portable player is given below. The portable player includes a system section, a decoding section, and a headphone amplifier section. The headphone amplifier section amplifies the headphone audio signal, amplifies the received audio signal, outputs the amplified audio signal, and transmits it to the headphones for playback. Therefore, the stability of the headphone amplifier section is particularly important. Its stability involves the stability of the power supply and the stability of the amplifier circuit itself. Existing solutions generally perform well in terms of the stability of the amplifier circuit itself. However, existing solutions often neglect the stability of the power supply. For example, if all three parts of the player use the same external power supply, and since portable players are typically powered by batteries, the stability of the power supply decreases as the battery charge drops. Furthermore, the fact that all three parts are powered by batteries further reduces stability, thus affecting the operational stability of the amplifier.

[0025] To address the aforementioned issues, this application provides a power amplifier circuit for a portable player that can use an amplifier power supply driver module connected to an independent external power supply to power the power amplifier, thereby improving the stability of the power amplifier during power supply and thus enhancing the audio quality during subsequent playback.

[0026] Please see Figure 1 , Figure 1 This application provides a schematic diagram of the power amplifier circuit for a portable player, as illustrated in an embodiment. Figure 1 As shown, the power amplifier circuit of the portable player includes an audio signal input module 1, an audio signal output module 2, an amplifier power supply drive module 3, and a power amplifier module 4. The output terminal of the audio signal input module 1 is connected to the input terminal of the power amplifier module, the output terminal of the power amplifier module is connected to the audio signal output module 2, and the amplifier power supply drive module 3 is connected to the power input port of the power amplifier module 4.

[0027] The amplifier power supply drive module 3 includes an external power interface 31, a voltage regulation control module 32, a sub-drive module 34, and a power output interface 33. The output terminal of the external power interface 31 is connected to the input terminal of the voltage regulation control module 32, the output terminal of the voltage regulation control module 32 is connected to the power output interface 33, and the control port of the sub-drive module 34 is connected to the signal input port of the voltage regulation control module.

[0028] The power amplification module 4 includes a first operational amplifier 41 and a feedback adjustment submodule 42. The positive input terminal of the first operational amplifier 41 is connected to the output terminal of the audio signal input module 1. The output terminal of the first operational amplifier 41 is connected to the audio signal output module 2 and the first terminal of the feedback adjustment submodule 42. The second terminal of the feedback adjustment submodule 42 is connected to the inverting input terminal of the first operational amplifier 41. The power input port of the feedback adjustment submodule 42 is connected to the power output interface 33 of the amplifier power supply drive module 3.

[0029] The audio signal input module and audio signal output module can be general-purpose audio signal input modules and audio signal output modules. The feedback adjustment submodule 42 can also be a general-purpose feedback adjustment submodule 42, which can adjust the gain of the output signal of the first operational amplifier 41 according to the feedback adjustment submodule 42. The feedback adjustment submodule 42 includes a variable resistor module that adjusts the resistance value based on the voltage value of the output signal of the first operational amplifier 41. This variable resistor module provides feedback adjustment of the gain; as the voltage value increases, the resistance increases, thereby reducing the gain and lowering the voltage value of the output signal of the first operational amplifier 41, thus achieving the purpose of gain adjustment and stabilizing the output gain of the first operational amplifier 41 within a dynamic range, improving stability. The sub-drive module 34 can provide a stable reference voltage for the voltage regulation control module.

[0030] The portable player in this embodiment also includes other corresponding modules, such as a system section and a decoding section. These two sections are powered by a second power supply, which is different from the first power supply connected to the external power interface 31. The first and second power supplies are independent and separate. Therefore, using the first power supply prevents interference from the system section and decoding section during power consumption, and using an independent first power supply improves stability. Furthermore, in subsequent embodiments, a proprietary design has been implemented for the voltage regulation control module in the amplifier power supply driver module, which better suits the portable player and enhances its performance.

[0031] In one possible implementation, such as Figure 2 As shown, the voltage regulation control module 32 includes a charge pump 311, a second power amplifier 312, a first MOSFET N1, a first resistor R1, a second resistor R2, and a first capacitor C1. The input terminal of the charge pump 311 is connected to an external power supply interface 31, and the output terminal of the charge pump 311 is connected to the power supply terminal of the second power amplifier 312. The first input terminal of the second power amplifier 312 is connected to the first signal output terminal of the sub-drive module 34. The second input terminal of the second power amplifier 312 is connected to the first terminals of the first resistor R1 and the second resistor R2. The second terminal of the first resistor R1 is grounded. The signal output terminal of the second power amplifier 312 is connected to the first terminal of the first MOSFET. The second terminal of the first MOSFET is connected to the signal input terminal of the voltage regulation control module 32. The third terminal of the first MOSFET is connected to the output terminal of the voltage regulation control module 32, the first terminal of the first capacitor C1, and the second terminal of the second resistor R2. The second terminal of the first capacitor C1 is grounded.

[0032] Therefore, the voltage regulation control module can be powered by a charge pump and use a reference signal generated by the sub-drive module for voltage regulation control. The sub-drive module can generate a stable reference voltage when the circuit is turned on, thereby improving the stability of subsequent signal processing.

[0033] In one possible implementation, such as Figure 3 As shown, the sub-driving module 34 includes a second MOSFET P2, a third MOSFET P3, a fourth MOSFET N4, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first Zener diode D1, a second Zener diode D2, a second capacitor C2, and a third capacitor C3. The source of the second MOSFET P2 is connected to the power input port. The gate and drain of the second MOSFET P2 are connected to the first terminal of the second capacitor C2, the first terminal of the fourth resistor R4, and the positive terminal of the first Zener diode D1. The second terminal of the second capacitor C2 is grounded. The cathode of the first Zener diode D1 is connected in series with the third resistor R3 and then to the gate of the third MOSFET P3. The second terminal of the fourth resistor R4 is connected to the source of the third MOSFET P3. The drain of the third MOSFET P3 is connected through the second Zener diode D2 to the first terminal of the third capacitor C3, the first terminal of the fifth resistor R5, and the drain of the fourth MOSFET N4. The second terminal of the fifth resistor is connected to the gate of the fourth MOSFET N4. The source of the fourth MOSFET N4 outputs a reference voltage. The second terminal of the third capacitor C3 is grounded. The resistance of the third resistor R3 is greater than the resistance of the fourth resistor R4.

[0034] The resistance of the third resistor R3 is set to be greater than that of the fourth resistor R4. After P2 is turned on, the second capacitor C2 is charged first. When the charging voltage of the first capacitor C1 reaches the conduction voltage of the first Zener diode D1, the voltage drop after passing through R3 makes the gate voltage of P3 smaller than the source voltage of P3 after passing through R4, thus turning on P3. After turning on, under normal voltage conditions, the second Zener diode D2 is in the conducting state, then charging the third capacitor C3 and driving N4 to operate, outputting a reference voltage at the source of N4. Therefore, the stability of the generated reference voltage can be improved. When the voltage is low, the second Zener diode D2 is in the cutoff state to reduce the error caused by abnormally small voltages and reduce the decrease in reference voltage stability caused by abnormally small voltage fluctuations. Since the sub-driver module 34 can provide a stable reference voltage to the voltage regulation control module 32, the stability of the voltage output by the amplifier sub-driver module 34 can be improved, thereby improving the effect of subsequent audio output.

[0035] In one possible implementation, such as Figure 4As shown, the charge pump 311 includes a fifth MOSFET P5, a sixth MOSFET P6, a seventh MOSFET N7, an eighth MOSFET N8, a ninth MOSFET P9, a tenth MOSFET P10, an eleventh MOSFET P11, a twelfth MOSFET P12, a fourth capacitor C4, a fifth capacitor C5, a sixth capacitor C6, and a seventh capacitor C7, wherein...

[0036] The source of the seventh MOS transistor is connected to the external power supply interface 31 and the source of the eighth MOS transistor N8. The drain of the seventh MOS transistor N7 is connected to the drain of the fifth MOS transistor P5, the first terminal of the fourth capacitor C4, the gate of the sixth MOS transistor P6, and the gate of the eighth MOS transistor N8. The gate of the seventh MOS transistor N7 is connected to the gate of the fifth MOS transistor P5, the first terminal of the fifth capacitor C5, the drain of the sixth MOS transistor P6, and the drain of the eighth MOS transistor N8. The second terminal of the fourth capacitor C4 is connected to the first clock signal port CLKN1. The second terminal of the fifth capacitor C5 is connected to the second clock signal port CLKN2. The source of the fifth MOS transistor P5 is connected to the source of the sixth MOS transistor P6 and the first terminal of the first charge pump intermediate interface.

[0037] The second terminal of the intermediate interface of the first charge pump is connected to the source of the ninth MOSFET P9 and the source of the tenth MOSFET P10. The gate and drain of the ninth MOSFET P9 are connected to the first terminal of the sixth capacitor C6, the gate of the eleventh MOSFET P11, and the drain of the twelfth MOSFET P12. The gate and drain of the tenth MOSFET P10 are connected to the first terminal of the seventh capacitor C7, the drain of the eleventh MOSFET P11, and the gate of the twelfth MOSFET P12. The source of the eleventh MOSFET P11 and the source of the twelfth MOSFET P12 are connected to the output terminal of the charge pump 311. The second terminal of the sixth capacitor C6 is connected to the third clock signal port CLKP3, and the second terminal of the seventh capacitor C7 is connected to the fourth clock signal port CLKP4. The phase difference between the first clock signal at the first clock signal port and the second clock signal at the second clock signal port is 90 degrees. The phase difference between the third clock signal at the third clock signal port CLKP3 and the fourth clock signal at the fourth clock signal port CLKP4 is 180 degrees. The first, second, third, and fourth clock signals carry the same electrical potential.

[0038] When charge pump 311 is operating, when the first clock signal port CLKN1 is on a rising edge, a high level is transmitted to the gate of N8 via coupling C4, turning on N8 and charging C5 to the potential corresponding to the power supply voltage. Simultaneously, when the second clock signal port CLKN2 is on a falling edge, a low level is transmitted to the gate of P5 via C5. P5 turns on and transfers the voltage from the external power supply interface and the voltage output at the second clock signal port to the first terminal of the first charge pump's intermediate interface, and then to subsequent circuitry via the second terminal.

[0039] After the first terminal of the intermediate interface of the first charge pump generates a potential, the subsequent circuit operates under the control of the third clock signal of the third clock signal port CLKP3 and the fourth clock signal of the fourth clock signal port CLKP4, transferring the potential generated at the first terminal of the intermediate interface of the first charge pump to the output terminal of the charge pump.

[0040] Finally, the power supply voltage provided by the external power supply interface, as well as the voltages of the first clock signal and the second clock signal, are transmitted to the second end of the intermediate interface of the first charge pump. Then, the voltage at the second end of the intermediate interface of the first charge pump, the voltage carried by the third clock signal and the fourth clock signal are transmitted together to the output end of the charge pump.

[0041] Specifically, an overcurrent protection circuit is designed for the charge pump 311. This circuit provides overcurrent protection when the external power supply interface provides power to the first charge pump through N7 or N8. For example... Figure 5As shown, the charge pump 311 also includes an overcurrent protection circuit, which includes a thirteenth MOSFET P13, a fourteenth MOSFET P14, a fifteenth MOSFET P15, a sixteenth MOSFET P16, a seventeenth MOSFET N17, an eighth capacitor C8, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9. The external power supply interface 31 is connected to the source of the thirteenth MOSFET P13, the source of the fourteenth MOSFET P14, the source of the fifteenth MOSFET P15, and the source of the sixteenth MOSFET P16. The gate of the thirteenth MOSFET P13 is connected to the gate of the fourteenth MOSFET P14, the drain of the thirteenth MOSFET P13, and the seventeenth MOSFET N17. The drains of the fourteenth MOSFET P14 are connected to the gates of the fifteenth MOSFET P15 and the sixteenth MOSFET P16. The drain of the fifteenth MOSFET P15 is connected to the first terminal of the ninth resistor R9 and the second terminal of the sixth resistor R6. The first terminal of the sixth resistor R6 is connected to the source of the eighth MOSFET N8. The second terminal of the ninth resistor R9 is connected to the second terminal of the eighth resistor R8 and the gate of the seventeenth MOSFET N17. The drain of the sixteenth MOSFET P16 is connected to the first terminal of the eighth resistor R8 and the second terminal of the seventh resistor R7. The first terminal of the seventh resistor R7 is connected to the source of the seventh MOSFET N7. The source of the seventeenth MOSFET is grounded through the eighth capacitor C8. An external reference signal can be connected to the aforementioned reference signal, and the operating voltage can be output through a converter circuit to adapt to the operating voltages of P15 and P16. The circuit structure can refer to existing conventional voltage output regulation circuits, which can output electrical signals with various voltage values.

[0042] Among them, resistors R8 and R9 have the same resistance value.

[0043] The overcurrent protection circuit provides a stable current to the sources of the seventh and eighth MOSFETs through the fifteenth MOSFET P15 and the sixteenth MOSFET P16. When the current at point I1 or I2 abnormally increases, the voltage at point V0 will increase, causing N17 to conduct. After N17 conducts, it pulls down the gate voltages of P13 and P14, thus turning on P13 and P14. After P13 conducts, it charges C8, causing the gate voltages of P13 and P14 to gradually increase. As the gate voltages of P13 and P14 gradually increase, P14's... The on-resistance increases until it is cut off. During this process, P14 causes the gate voltages of P15 and P16 to gradually decrease from their initial maximum voltage to their steady-state gate voltages. When P15 and P16 are operating steadily, the currents at I1 and I2 decrease, causing N17 to turn off and the protection circuit to finish its operation. This completes the regulation of the drain output current of P15 and P16, thus enabling rapid overcurrent protection and overcurrent shunt processing in extreme situations. The use of C8 for buffer regulation also improves circuit stability. Furthermore, it avoids the energy loss caused by the mirror circuit design in existing solutions, where the mirror circuit is constantly in overcurrent protection mode.

[0044] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0045] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0046] The embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A power amplifier circuit for a portable player, characterized in that, The circuit includes an audio signal input module, an audio signal output module, an amplifier power supply driver module, and a power amplifier module. The output terminal of the audio signal input module is connected to the input terminal of the power amplifier module, the output terminal of the power amplifier module is connected to the audio signal output module, and the amplifier power supply driver module is connected to the power input port of the power amplifier module. The amplifier power supply drive module includes an external power interface, a voltage regulation control module, a sub-drive module, and a power output interface. The output terminal of the external power interface is connected to the input terminal of the voltage regulation control module, the output terminal of the voltage regulation control module is connected to the power output interface, and the control port of the sub-drive module is connected to the signal input port of the voltage regulation control module. The power amplification module includes a first operational amplifier and a feedback adjustment submodule. The positive input terminal of the first operational amplifier is connected to the output terminal of the audio signal input module. The output terminal of the first operational amplifier is connected to the audio signal output module and the first terminal of the feedback adjustment submodule. The second terminal of the feedback adjustment submodule is connected to the inverting input terminal of the first operational amplifier. The power input port of the feedback adjustment submodule is connected to the power output interface of the amplifier power supply drive module. The voltage regulation control module includes a charge pump, a second power amplifier, a first MOSFET N1, a first resistor, a second resistor, and a first capacitor. The input terminal of the charge pump is connected to an external power supply interface, and the output terminal of the charge pump is connected to the power supply terminal of the power amplifier. The first input terminal of the power amplifier is connected to the first signal output terminal of the sub-drive module. The second input terminal of the power amplifier is connected to the first terminals of the first and second resistors, and the second terminal of the first resistor is grounded. The signal output terminal of the power amplifier is connected to the first terminal of the first MOSFET, and the second terminal of the first MOSFET is connected to the signal input terminal of the voltage regulation control module. The third terminal of the first MOSFET is connected to the output terminal of the voltage regulation control module, the first terminal of the first capacitor, and the second terminal of the second resistor, and the second terminal of the first capacitor is grounded. The sub-driving module includes a second MOSFET P2, a third MOSFET P3, a fourth MOSFET N4, a third resistor, a fourth resistor, a first Zener diode, a second Zener diode, a second capacitor, and a third capacitor. The source of the second MOSFET P2 is connected to the power input port. The gate and drain of the second MOSFET P2 are connected to the first terminal of the second capacitor, the first terminal of the fourth resistor, and the anode of the first Zener diode. The second terminal of the second capacitor is grounded. The cathode of the first Zener diode is connected in series with the third resistor and then to the gate of the third MOSFET P3. The second terminal of the fourth resistor is connected to the source of the third MOSFET P3. The drain of the third MOSFET P3 is connected to the first terminal of the third capacitor, the first terminal of the fifth resistor, and the drain of the fourth MOSFET N4 via the second Zener diode. The second terminal of the fifth resistor is connected to the gate of the fourth MOSFET N4. The source of the fourth MOSFET N4 outputs a reference voltage. The second terminal of the third capacitor is grounded.

2. The power amplifier circuit for the portable player according to claim 1, characterized in that, The resistance value of the third resistor is greater than the resistance value of the fourth resistor.

3. The power amplifier circuit for the portable player according to claim 1 or 2, characterized in that, The charge pump includes a fifth MOSFET P5, a sixth MOSFET P6, a seventh MOSFET N7, an eighth MOSFET N8, a ninth MOSFET P9, a tenth MOSFET P10, an eleventh MOSFET P11, a twelfth MOSFET P12, a fourth capacitor, a fifth capacitor, a sixth capacitor, and a seventh capacitor, wherein; The source of the seventh MOSFET N7 is connected to the external power supply interface and the source of the eighth MOSFET N8. The drain of the seventh MOSFET N7 is connected to the drain of the fifth MOSFET P5, the first terminal of the fourth capacitor, the gate of the sixth MOSFET P6, and the gate of the eighth MOSFET N8. The gate of the seventh MOSFET N7 is connected to the gate of the fifth MOSFET P5, the first terminal of the fifth capacitor, the drain of the sixth MOSFET P6, and the drain of the eighth MOSFET N8. The second terminal of the fourth capacitor is connected to the first clock signal port. The second terminal of the fifth capacitor is connected to the second clock signal port. The source of the fifth MOSFET P5 is connected to the source of the sixth MOSFET P6 and the first terminal of the first charge pump intermediate interface. The second end of the intermediate interface of the first charge pump is connected to the source of the ninth MOS transistor P9 and the source of the tenth MOS transistor P10. The gate and drain of the ninth MOS transistor P9 are connected to the first end of the sixth capacitor, the gate of the eleventh MOS transistor P11, and the drain of the twelfth MOS transistor P12. The gate and drain of the tenth MOS transistor P10 are connected to the first end of the seventh capacitor, the drain of the eleventh MOS transistor P11, and the gate of the twelfth MOS transistor P12. The source of the eleventh MOS transistor P11 and the source of the twelfth MOS transistor P12 are connected to the output end of the charge pump. The second end of the sixth capacitor is connected to the third clock signal port, and the second end of the seventh capacitor is connected to the fourth clock signal port.

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