Low-noise electroencephalogram acquisition system based on multi-gain active electrode

Through the design of multiple-gain active electrodes and integrated circuits, the problems of insufficient noise and anti-interference performance of existing EEG acquisition equipment are solved, and a low-noise EEG signal acquisition system is realized, which is suitable for high-precision EEG signal acquisition and processing in diverse application scenarios.

CN120732443APending Publication Date: 2025-10-03UNIV OF ELECTRONICS SCI & TECH OF CHINA
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202510918210.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-03
Publication Date
2025-10-03

AI Technical Summary

Technical Problem

Existing EEG acquisition equipment has insufficient noise performance and anti-interference performance, making it difficult to achieve accurate acquisition and real-time denoising of weak EEG signals, especially in brain-computer interface application scenarios, which limits its practicality.

Method used

A low-noise EEG acquisition system based on multiple-gain active electrodes is used, combined with an operational amplifier, filter, right leg drive circuit and digital isolation circuit. Multi-level gain is used to reduce noise, suppress power frequency interference, and perform amplitude calibration and phase correction at the signal processing level.

Benefits of technology

It achieves low-noise, high signal-to-noise ratio EEG signal acquisition, improves anti-interference ability, supports high-density scalp EEG acquisition and high-precision information decoding, and adapts to diverse application scenarios.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120732443A_ABST
    Figure CN120732443A_ABST
Patent Text Reader

Abstract

The invention discloses a low-noise electroencephalogram acquisition system based on a multi-gain active electrode, which comprises the multi-gain active electrode, an analog circuit board, a digital isolation circuit, a digital circuit board and computer end signal processing software which are connected in sequence, the equivalent input noise of the input end of the system is reduced, and the noise in the whole acquisition process of the system is further reduced. High-pass filtering is combined behind the multi-gain active electrode to reduce direct current bias and avoid system saturation, system gain correction and phase correction are adopted, low-noise and high-signal-to-noise-ratio acquisition of electroencephalogram signals is achieved while the high anti-interference capacity of the electroencephalogram acquisition system is guaranteed, technical support is provided for acquisition of high-density scalp electroencephalogram, and the electroencephalogram acquisition system is suitable for large-scale popularization and application. And high-precision electroencephalogram information decoding is realized.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention belongs to the technical field of signal acquisition, and in particular relates to a design of a low-noise EEG acquisition system based on multiple-gain active electrodes. Background Art

[0002] As an important tool in basic brain science research and clinical diagnosis and treatment of neurological diseases, EEG signals have important application value in the fields of brain-computer interface and brain cognition research. However, their amplitude is only between 20 and 200 μV, which is an extremely weak bioelectric signal. During the acquisition process, they are easily affected by factors such as environmental noise, power frequency interference, and electrode polarization voltage.

[0003] Existing EEG acquisition equipment suffers from high equivalent input noise levels and insufficient anti-interference performance. Commercial devices using single-gain active electrodes generally have an equivalent input noise level of no less than 2μVpp. For example, Brain Products' actiCHampPlus device has an input noise of 2μVpp, making it difficult to accurately capture weak EEG features. Devices using passive electrodes are sensitive to changes in scalp contact impedance, and head movement can easily introduce artifacts, seriously affecting signal quality. Existing EEG acquisition equipment also has weak common-mode rejection capabilities. Differential acquisition methods reduce the common-mode rejection ratio (CMRR) due to inter-channel gain errors and phase deviations, making them unable to effectively suppress power frequency interference. Furthermore, existing EEG acquisition equipment suffers from severe baseline drift. The polarization voltage generated by the contact between the electrodes and the skin can cause baseline drift, masking true EEG signals such as slow waves and easily causing saturation in traditional single-ended acquisition systems.

[0004] Currently, technologies for removing electroencephalogram (EEG) noise and interference are often limited to software algorithms, EEG front-end chip design, and the use of right leg drive circuits. To remove EEG noise and interference through algorithms, both domestic and international approaches often employ multimodal fusion and adaptive filtering. Internationally, mainstream approaches focus on wavelet transforms, independent component analysis, and deep learning. Domestic research, however, has focused on combining traditional digital filtering with machine learning, achieving significant progress in the fusion of adaptive filtering and variational mode decomposition. However, existing algorithms often rely on offline processing, making it difficult to achieve real-time denoising and interference suppression for EEG signals. This not only reduces the efficiency of EEG data acquisition but also limits their practicality in applications such as real-time brain-computer interfaces. To address this issue, research is gradually shifting from purely software algorithms to hardware circuit design. For hardware-based EEG noise and interference removal, mainstream approaches, both domestic and international, focus on the design of dedicated EEG front-end amplifier chips and right leg drive circuits. However, the development of dedicated integrated circuits is not only complex but also requires high manufacturing costs. Their fixed architecture lacks flexibility, making them difficult to adapt to diverse application scenarios. Although the right leg drive circuit can specifically suppress power frequency interference, its effect on suppressing the system background noise is limited. Summary of the Invention

[0005] The purpose of the present invention is to solve the problems that existing EEG acquisition equipment has deficiencies in noise performance and anti-interference performance, and proposes a low-noise EEG acquisition system based on multiple gain active electrodes.

[0006] The technical solution of the present invention is: a low-noise EEG acquisition system based on multiple-gain active electrodes, comprising multiple-gain active electrodes, an analog circuit board, a digital isolation circuit, a digital circuit board and computer-side signal processing software connected in sequence; the multiple-gain active electrodes are used to perform noise reduction processing on the input EEG signals of the subjects, and transmit the noise-reduced EEG signals to the analog circuit board through a shielded line; the analog circuit board is used to filter and perform analog-to-digital conversion on the noise-reduced EEG signals to obtain digital signals; the digital isolation circuit is used to separate the analog circuit board and the digital circuit board to prevent high-frequency digital signals from interfering with low-frequency analog signals and to prevent static electricity from breaking down the digital circuit board; the digital circuit board is used to transmit digital signals to the computer-side signal processing software; the computer-side signal processing software is used to display and save the EEG signals of the subjects according to the digital signals, and provide users with real-time processing and interactive interface of EEG signals.

[0007] Furthermore, the multiple gain active electrode includes an operational amplifier chip U1, the OUTA pin of the chip U1 is connected to one end of the resistor R2, and is connected to the pad T4 as the output end of the multiple gain active electrode, the V- pin of the chip U1 is respectively connected to the ground capacitor C1, the negative power supply voltage VSS and the pad T2, the IN+ pin of the chip U1 is connected to the pad T3 as the input end of the multiple gain active electrode, the IN- pin of the chip U1 is respectively connected to the other end of the resistor R2 and the ground resistor R1, and the V+ pin of the chip U1 is respectively connected to the ground capacitor C2, the positive power supply voltage VCC and the pad T1.

[0008] Furthermore, the analog circuit board includes a second-order active high-pass filter, a single-ended to differential circuit, an analog-to-digital converter, an analog power supply circuit and a right leg drive circuit; the second-order active high-pass filter is used to filter the EEG signal after noise reduction to eliminate the influence of baseline instability caused by the polarization voltage; the single-ended to differential circuit is used to convert the single-ended EEG signal into an analog differential signal with a bias voltage to match the analog-to-digital converter; the analog-to-digital converter is used to perform analog-to-digital conversion on the analog differential signal to obtain a digital signal; the right leg drive circuit is connected to the subject's body to reduce the amplitude of the power frequency interference coupled by the human body; the analog power supply circuit is used to provide an adaptive power supply for the multiple gain active electrode, the second-order active high-pass filter, the single-ended to differential circuit, the analog-to-digital converter and the right leg drive circuit.

[0009] Furthermore, the second-order active high-pass filter includes an operational amplifier, a filter capacitor and a gain configuration resistor connected in sequence. The operational amplifier is used to construct a second-order active high-pass filter and simultaneously reduce the current in the EEG signal transmission path; the filter capacitor is used to eliminate DC offset; and the gain configuration resistor is used to adjust the gain of the operational amplifier.

[0010] Furthermore, the right leg drive circuit includes a voltage follower and an inverting amplifier connected in sequence; the voltage follower is used to transmit the common-mode signal of the subject's body to the inverting amplifier; the inverting amplifier is used to output a feedback signal to the subject's body according to the common-mode signal to offset the power frequency signal with opposite phase coupled to the human body.

[0011] Furthermore, the calculation formula of the feedback signal in the inverting amplifier is: in Represents the feedback signal, represents the common mode signal, represents the feedback resistor value of the inverting amplifier, Indicates the input resistance value of the inverting amplifier.

[0012] Furthermore, the digital circuit board includes an FPGA main control circuit, a USB circuit and a digital power supply circuit; the FPGA main control circuit is used to send the received digital signal to the USB circuit; the USB circuit is used to transmit the digital signal to the computer-side signal processing software through the USB communication protocol; the digital power supply circuit is used to provide an adaptive power supply for the FPGA main control circuit and the USB circuit.

[0013] The beneficial effects of the present invention are: (1) The present invention adopts a low-noise EEG acquisition technology based on multiple-gain active electrodes, wherein the multiple-gain active electrodes reduce the equivalent input noise at the input end of the system by increasing the gain of the operational amplifier, thereby reducing the noise in the overall acquisition process of the system.

[0014] (2) The present invention uses a single-ended acquisition method, combined with a right leg drive circuit, to suppress power frequency interference, and cooperates with a high sampling rate analog-to-digital converter to combine amplitude calibration and phase correction from the signal processing level, ensuring key parameters such as the system's CMRR and improving the anti-interference ability of the EEG acquisition equipment while making it have lower equivalent input noise.

[0015] (3) The present invention combines high-pass filtering after the multiple-gain active electrode to reduce DC bias and avoid system saturation, and adopts system gain correction and phase correction. While ensuring the strong anti-interference ability of the EEG acquisition system, it achieves low-noise and high signal-to-noise ratio acquisition of EEG signals, provides technical support for the acquisition of high-density scalp EEG, and realizes high-precision EEG information decoding. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 FIG2 is a structural block diagram of a low-noise EEG acquisition system based on multiple-gain active electrodes provided by an embodiment of the present invention.

[0017] Figure 2 FIG. 4 is a schematic diagram of cascade noise of an operational amplifier provided by an embodiment of the present invention.

[0018] Figure 3 FIG. 1 is a schematic diagram of a multi-gain active electrode circuit according to an embodiment of the present invention. DETAILED DESCRIPTION

[0019] The exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be understood that the embodiments shown and described in the accompanying drawings are merely exemplary and are intended to illustrate the principles and spirit of the present invention, rather than to limit the scope of the present invention.

[0020] The embodiment of the present invention provides a low-noise EEG acquisition system based on multiple-gain active electrodes, such as Figure 1As shown, it includes a multiple gain active electrode, an analog circuit board, a digital isolation circuit, a digital circuit board and computer-side signal processing software connected in sequence.

[0021] The multiple-gain active electrode is used to reduce the noise of the input EEG signal of the subject, and transmit the noise-reduced EEG signal to the analog circuit board through a shielded line; the analog circuit board is used to filter and perform analog-to-digital conversion on the noise-reduced EEG signal to obtain a digital signal; the digital isolation circuit is used to separate the analog circuit board and the digital circuit board to prevent high-frequency digital signals from interfering with low-frequency analog signals and to prevent static electricity from breaking down the digital circuit board; the digital circuit board is used to transmit the digital signal to the computer-side signal processing software; the computer-side signal processing software is used to display and save the subject's EEG signal based on the digital signal, and provide users with real-time processing and interactive interface of EEG signals.

[0022] In the embodiment of the present invention, the principle of the multiple gain active electrode is as follows: like Figure 2 As shown in Figure 2, when two operational amplifiers are cascaded, the calculation formula for the total noise output of the circuit is: in represents the total output noise, represents the input noise of the pre-stage operational amplifier, Indicates the preamplifier gain, represents the input noise of the subsequent operational amplifier, Represents the gain of the subsequent operational amplifier.

[0023] Divide both sides of the above equation by , the noise calculation formula referred to the input end can be obtained as: in It represents the noise referred to the input.

[0024] From the above formula, we can see that The larger the value, the smaller the noise of the subsequent circuit referred to the input end. The size of the equivalent input noise depends on the noise of the previous operational amplifier. It cannot be infinite. The dynamic range and noise performance of the system must be comprehensively considered, and the pre-stage gain must be determined based on the results of actual circuit debugging.

[0025] Utilizing the principle that increasing the gain of an operational amplifier reduces the equivalent input noise converted to the input end, an embodiment of the present invention designs an active electrode with multiple gains as the first-stage EEG signal processing circuit, and uses a multi-core wire with a shielded layer to connect to the electrode interface of the analog circuit board, reducing the introduction of noise and interference.

[0026] like Figure 3 As shown, the embodiment of the present invention uses OPA188 as the operational amplifier chip U1 of the multiple gain active electrode. The OUTA pin of the chip U1 is connected to one end of the resistor R2, and is connected to the pad T4 as the output end of the multiple gain active electrode. The V- pin of the chip U1 is respectively connected to the ground capacitor C1, the negative power supply voltage VSS and the pad T2. The IN+ pin of the chip U1 is connected to the pad T3 as the input end of the multiple gain active electrode. The IN- pin of the chip U1 is respectively connected to the other end of the resistor R2 and the ground resistor R1. The V+ pin of the chip U1 is respectively connected to the ground capacitor C2, the positive power supply voltage VCC and the pad T1. In the embodiment of the present invention, the multiple gain active electrode also includes a ground pad T5. The negative power supply voltage VSS and the positive power supply voltage VCC are respectively connected to the decoupling capacitors C1 and C2. The power supply voltage is filtered by the decoupling capacitors C1 and C2. The input voltage VIN is gain-adjusted by the resistors R1 and R2 to obtain the output voltage VOUT: The OPA188 operational amplifier chip offers advantages such as extremely low equivalent input noise and a wide supply voltage range. To reduce external environmental interference with signals during actual use, this embodiment of the present invention extracts a common reference voltage level from all electrodes to drive the shielding layer, further reducing noise introduced by the back-end transmission lines.

[0027] like Figure 1 As shown, the analog circuit board includes a second-order active high-pass filter, a single-ended to differential circuit, an analog-to-digital converter, an analog power supply circuit, and a right leg drive circuit.

[0028] Among them, the second-order active high-pass filter is used to filter the EEG signal after noise reduction and eliminate the influence of baseline instability caused by polarization voltage. In an embodiment of the present invention, the second-order active high-pass filter includes an operational amplifier, a filter capacitor and a gain configuration resistor connected in sequence; the operational amplifier is used to construct a second-order active high-pass filter and reduce the current on the EEG signal transmission path; the filter capacitor is used to eliminate DC offset; and the gain configuration resistor is used to adjust the gain of the operational amplifier. Taking into account the stability of the filter and preventing self-oscillation, the gain of the filter itself in the embodiment of the present invention does not exceed twice.

[0029] The single-ended to differential circuit is used to convert the single-ended EEG signal into an analog differential signal with a bias voltage to match the analog-to-digital converter and ensure the accuracy of the collected EEG signal. In the embodiment of the present invention, a precision instrumentation amplifier model INA849 from Texas Instruments is selected to design the single-ended to differential circuit. The instrumentation amplifier has a 1nV / Voltage input noise density and 1.1pA / The current input noise density is low, which is beneficial to reducing the equivalent input noise of the analog circuit board.

[0030] The analog-to-digital converter is used to convert analog differential signals into digital signals. In the embodiment of the present invention, the ADAQ4224 chip produced by Analog Devices is used. This chip has a 24-bit sampling accuracy and a sampling rate of up to 2 MSPS. This chip can reduce the phase difference of the common-mode signal between channels, thereby improving the common-mode rejection ratio of the EEG acquisition system at the data processing level.

[0031] The right leg drive circuit is connected to the subject's body to reduce the amplitude of power-frequency interference coupled from the human body. In this embodiment of the present invention, the right leg drive circuit includes a voltage follower and an inverting amplifier connected in sequence. The voltage follower transmits the common-mode signal from the subject's body to the inverting amplifier, which then outputs a feedback signal to the subject's body based on the common-mode signal to offset the power-frequency signal coupled from the human body with an opposite phase. The inverting amplifier uses the Texas Instruments OPA192, which can drive high capacitive loads with a high slew rate and offers flexible gain adjustment via resistor configuration.

[0032] In the embodiment of the present invention, the calculation formula of the feedback signal in the inverting amplifier is: in Represents the feedback signal, represents the common mode signal, represents the feedback resistor value of the inverting amplifier, Indicates the input resistance value of the inverting amplifier. In the embodiment of the present invention, Set to 10kΩ, Set to 1kΩ.

[0033] The analog power supply circuit is used to provide an adaptive power supply for the multi-gain active electrode, the second-order active high-pass filter, the single-ended to differential circuit, the analog-to-digital converter, and the right leg drive circuit. In this embodiment of the present invention, the analog circuit board supplies 5V power to the analog power circuit via the Type-C interface. Then, a power supply chip with voltage isolation generates ±12V, 9V, and ±5V voltages, of which ±12V is an alternative voltage solution and is not currently used. The remaining 5V, 4.096V, 3.3V, and 1.8V voltages are used to power the analog circuit board in a step-down manner via a low-ripple DC-DC converter or LDO.

[0034] like Figure 1 As shown, the digital circuit board includes an FPGA main control circuit, a USB circuit and a digital power supply circuit.

[0035] The FPGA master control circuit is used to transmit received digital signals to the USB circuit. In this embodiment of the present invention, a FPGA chip model EP4CE10E22C8L was selected. Its built-in 10K logic units achieve a low transmission latency of 22ns, enabling real-time processing of multi-channel signals and ensuring high-speed and complete data transmission to the computer-side signal processing software. A 50MHz active crystal oscillator was selected as the main clock source to ensure a stable data processing frequency for the FPGA, enabling the smooth completion of various calculations and data processing tasks.

[0036] The USB circuit is used to transmit digital signals to computer-side signal processing software via the USB communication protocol. In this embodiment of the present invention, a Cypress CY7C68013 chip is selected as the core data routing controller. This chip transmits data with the FPGA master control circuit via an asynchronous communication protocol, enabling real-time data reception. Simultaneously, based on the USB 2.0 high-speed transmission protocol, it establishes a communication link with the computer-side software, achieving stable data transmission.

[0037] The digital power supply circuit is used to provide adaptive power to the FPGA main control circuit and USB circuit. In this embodiment of the present invention, the MP2143DJ adjustable voltage chip is selected to power the digital circuit board through the USB interface. The low-ripple DC / DC is then used to step down the voltage to provide 3.3 V, 2.5 V, and 1.2 V to the digital circuit board.

[0038] In this embodiment of the present invention, the FPGA master control circuit is also equipped with FPGA software for logic processing, register configuration, data transmission, data sending, and tag signal reception. Leveraging the FPGA's parallel processing capabilities, the SPI communication protocol is used to parallelly control four ADAQ4224 chips, each with two channels, to achieve synchronous acquisition of 8 channels of EEG data. This is then communicated with the USB chip via a 16-bit parallel interface using a FIFO, ensuring synchronous acquisition and preprocessing of multi-channel signals.

[0039] In the embodiment of the present invention, the USB circuit is further configured with USB chip software for packaging and sending data. After receiving the data, the USB chip first packages the data and then transmits the data to the computer terminal signal processing software via the high-speed USB 2.0 protocol.

[0040] In an embodiment of the present invention, the computer-side signal processing software is designed based on QT and C++, which can filter and draw waveforms of EEG data, and save the EEG data locally in the format of a text document so that offline data analysis can be performed using software such as MATLAB.

[0041] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and it should be understood that the scope of protection of the present invention is not limited to such specific descriptions and embodiments. Those skilled in the art can make various other specific variations and combinations based on the technical teachings disclosed in the present invention without departing from the essence of the present invention, and such variations and combinations are still within the scope of protection of the present invention.

Claims

1. A low-noise EEG acquisition system based on multiple-gain active electrodes, characterized by: It includes a multiple gain active electrode, an analog circuit board, a digital isolation circuit, a digital circuit board and computer-side signal processing software connected in sequence; The multiple gain active electrode is used to perform noise reduction processing on the input EEG signal of the subject, and transmit the noise-reduced EEG signal to the analog circuit board through the shielded wire; The analog circuit board is used to filter and perform analog-to-digital conversion on the noise-reduced EEG signal to obtain a digital signal; The digital isolation circuit is used to separate the analog circuit board from the digital circuit board, preventing high-frequency digital signals from interfering with low-frequency analog signals and preventing static electricity from breaking down the digital circuit board. The digital circuit board is used to transmit digital signals to computer-side signal processing software; The computer-side signal processing software is used to display and save the subject's EEG signals based on digital signals, and provide users with real-time processing and interactive interfaces for EEG signals.

2. The low-noise EEG acquisition system based on multiple-gain active electrodes according to claim 1, characterized in that: The multiple gain active electrode includes an operational amplifier chip U1, the OUTA pin of the chip U1 is connected to one end of the resistor R2, and is connected to the pad T4 as the output end of the multiple gain active electrode, the V- pin of the chip U1 is respectively connected to the ground capacitor C1, the negative power supply voltage VSS and the pad T2, the IN+ pin of the chip U1 is connected to the pad T3 as the input end of the multiple gain active electrode, the IN- pin of the chip U1 is respectively connected to the other end of the resistor R2 and the ground resistor R1, and the V+ pin of the chip U1 is respectively connected to the ground capacitor C2, the positive power supply voltage VCC and the pad T1.

3. The low-noise EEG acquisition system based on multiple-gain active electrodes according to claim 1, characterized in that: The analog circuit board includes a second-order active high-pass filter, a single-ended to differential circuit, an analog-to-digital converter, an analog power supply circuit and a right leg drive circuit; The second-order active high-pass filter is used to filter the EEG signal after noise reduction to eliminate the influence of baseline instability caused by polarization voltage; The single-ended to differential circuit is used to convert a single-ended EEG signal into an analog differential signal with a bias voltage to match an analog-to-digital converter; The analog-to-digital converter is used to perform analog-to-digital conversion on the analog differential signal to obtain a digital signal; The right leg driving circuit is connected to the subject's body to reduce the amplitude of power frequency interference coupled to the human body; The analog power supply circuit is used to provide adaptive power for the multiple gain active electrode, the second-order active high-pass filter, the single-ended to differential circuit, the analog-to-digital converter and the right leg driving circuit.

4. The low-noise EEG acquisition system based on multiple-gain active electrodes according to claim 3, characterized in that: The second-order active high-pass filter includes an operational amplifier, a filter capacitor and a gain configuration resistor connected in sequence; The operational amplifier is used to construct a second-order active high-pass filter and simultaneously reduce the current in the EEG signal transmission path; The filter capacitor is used to eliminate DC offset; The gain configuration resistor is used to adjust the gain of the operational amplifier.

5. The low-noise EEG acquisition system based on multiple-gain active electrodes according to claim 3, characterized in that: The right leg driving circuit includes a voltage follower and an inverting amplifier connected in sequence; The voltage follower is used to transmit the common mode signal of the subject's body to the inverting amplifier; The inverting amplifier is used to output a feedback signal to the subject's body according to the common mode signal, so as to offset the power frequency signal with opposite phase coupled to the human body.

6. The low-noise EEG acquisition system based on multiple-gain active electrodes according to claim 3, characterized in that: The calculation formula of the feedback signal in the inverting amplifier is: in Represents the feedback signal, represents the common mode signal, represents the feedback resistor value of the inverting amplifier, Indicates the input resistance value of the inverting amplifier.

7. The low-noise EEG acquisition system based on multiple-gain active electrodes according to claim 1, characterized in that: The digital circuit board includes an FPGA main control circuit, a USB circuit and a digital power supply circuit; The FPGA main control circuit is used to send the received digital signal to the USB circuit; The USB circuit is used to transmit the digital signal to the computer-side signal processing software through the USB communication protocol; The digital power supply circuit is used to provide adaptive power for the FPGA main control circuit and the USB circuit.