A stress-adjustable semiconductor module packaging structure and its stress adjustment method

Abstract

This invention discloses a stress-adjustable semiconductor module packaging structure and its stress adjustment method, belonging to the field of semiconductor packaging technology. The semiconductor module packaging structure integrates an electronically controlled variable stiffness support layer into the semiconductor module packaging structure, realizing real-time adaptive compensation of thermo-mechanical stress during the entire operation of the packaging structure. Since the variable stiffness support layer can actively adjust its stiffness according to the real-time detected temperature and stress distribution, the stress concentration phenomenon inside the semiconductor module packaging structure is significantly alleviated. The stress adjustment method continuously iteratively adjusts the stiffness of the support layer through a closed-loop control strategy to achieve steady-state maintenance after stress balance, so that the semiconductor module packaging structure can still maintain good mechanical and thermal stability under complex working conditions such as frequent start-stop and high altitude and low air pressure.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor packaging technology, specifically relating to a stress-adjustable semiconductor module packaging structure and its stress adjustment method. Background Technology

[0002] Currently, high-voltage, high-power semiconductor modules, especially those using silicon carbide (SiC) devices, still commonly employ the traditional packaging scheme of DBC (Direct Bonded Copper) or DCB (Direct Copper Bonded) ceramic substrates combined with aluminum wire bonding. While this type of static structure meets basic requirements in terms of electrical interconnection, insulation, and heat dissipation, its inherent thermal resistance and parasitic inductance significantly limit device performance under high-frequency, high-current operating conditions. Furthermore, the stress concentration at the interface of multilayer thermal interface materials and multiple welding processes makes them highly susceptible to cracking or solder joint fatigue failure during thermal cycling, thereby reducing the overall reliability and lifespan of the module.

[0003] To improve this situation, solderless pressure contact packaging technology has gradually gained attention. This technology replaces the traditional soldering process by applying a constant mechanical load, which can reduce interface failure caused by thermal cycling. However, it also cannot dynamically adjust the contact pressure according to temperature changes or vibration conditions, leading to problems such as poor local contact and fatigue failure under long-term or extreme conditions. It is difficult to completely solve the bottleneck of limited packaging reliability.

[0004] Meanwhile, new technologies such as 3D stacking and flexible packaging are constantly evolving. 3D stacking can optimize heat dissipation paths to some extent, while flexible ceramic substrates and thin-film packaging have already been applied in low-voltage or medium-power applications. However, these solutions still remain at the static structural level and cannot actively cope with the dynamic stress generated inside the package due to changes in thermal, electrical, and mechanical coupling. In addition, although flexible packaging can bring advantages in terms of form and weight, it is difficult to meet the stringent requirements for dielectric strength and thermal stability in high-voltage and high-power applications.

[0005] In other high-end fields, intelligent variable stiffness materials have been used in multifunctional support structures (MFSS) for aerospace electronics and robotic joints, achieving integrated design of load management and lightweighting. However, these technologies have not yet been extended to the field of power electronic module packaging, failing to solve the dynamic mismatch problem caused by thermal expansion and mechanical vibration during the operation of high-voltage, high-power modules.

[0006] In summary, existing high-voltage, high-power semiconductor module packaging technologies generally rely on static design and lack the ability to compensate for changes in thermo-mechanical stress during operation. This leads to fatigue failure of solder joints and interface layers, as well as prominent issues such as localized overheating and stress concentration, especially under complex operating conditions involving high altitudes, large temperature differences, and frequent start-stop cycles. These are technical bottlenecks that urgently need to be addressed. Summary of the Invention

[0007] Based on the problems existing in the above-mentioned background technology, this invention proposes a stress-adjustable semiconductor module packaging structure and its stress adjustment method, which solves the problems that existing high-voltage and high-power semiconductor module packaging technologies generally rely on static design and lack the ability to compensate for changes in thermo-mechanical stress during operation, resulting in easy fatigue failure of solder joints and interface layers, local overheating and stress concentration.

[0008] The embodiments of the present invention are implemented as follows: The present invention provides a stress-adjustable semiconductor module packaging structure, which includes a base plate, a shell, a substrate, and a control module;

[0009] An electrically controlled variable rigidity support layer and a stress sensor are provided between the base plate and the substrate; a chip is provided on the substrate; specifically, the top of the chip is electrically interconnected with the upper surface of the substrate through wire bonding or solderless pressure contact.

[0010] The outer casing encapsulates the base plate, the base plate, and the control module. A temperature sensor is installed inside the outer casing. The electrically controlled variable rigidity support layer, the stress sensor, and the temperature sensor are all electrically connected to the control module. The control module adjusts the support stiffness of the electrically controlled variable rigidity support layer in real time based on the information collected by the stress sensor and the temperature sensor. An electrode terminal is provided on the top of the base plate. One end of the electrode terminal is fixedly connected to the upper surface of the base plate, and the other end passes through the outer casing and is fixedly connected to the top of the outer casing.

[0011] Furthermore, when the semiconductor module packaging structure is applied to a solderable power semiconductor device, an upper copper layer and a lower copper layer are respectively provided on the upper and lower surfaces of the substrate; the chip is disposed on the upper copper layer; a PCB board is disposed on the lower surface of the lower copper layer; the top of the electrically controlled variable rigidity support layer and the stress sensor are provided with electrical connections to the PCB board, and the temperature sensor is electrically connected to the PCB board; lead wires electrically connected to an external control module are provided on the PCB board.

[0012] Furthermore, when the semiconductor module packaging structure is applied to press-fit power semiconductor devices, the electronically controlled variable rigidity support layer is located below the stress sensor.

[0013] Furthermore, the electrically controlled variable rigidity support layer contains multiple support units arranged in a matrix, and multiple stress sensors are also arranged in a matrix. Each support unit and stress sensor is electrically connected to the PCB board via an independent electrode. This configuration enables the stiffness adjustment of the electrically controlled variable rigidity support layer to have spatial resolution and the stress sensors to have spatial detection capabilities, allowing for precise compensation for local hot spots or areas of localized stress concentration.

[0014] Furthermore, the material of the multiple support units in the electrically controlled variable rigidity support layer is an electroactive polymer, a shape memory alloy, or a magnetorheological material. Electroactive polymers, shape memory alloys, and magnetorheological materials each have different response speeds, displacement amounts, and costs. Electroactive polymers have fast responses but require higher driving voltages; shape memory alloys have large displacements but high energy consumption; and magnetorheological materials have moderate responses and are easy to integrate. In specific applications, the appropriate material can be flexibly selected based on different usage requirements.

[0015] Furthermore, the control module is an embedded MCU or FPGA with DAC / ADC, used to execute closed-loop control algorithm and output drive signal to variable stiffness support layer.

[0016] Furthermore, the electrically controlled variable rigidity support layer is connected to the upper end face of the base plate by welding or pressure to form a stable connection, so as to dynamically adjust the stiffness and compensate for stress mismatch caused by thermal expansion during operation.

[0017] Furthermore, a high thermal conductivity medium layer is provided between the electronically controlled variable rigidity support layer and the base plate, as well as between the chip and the substrate, to ensure excellent thermal conductivity while adjusting the rigidity.

[0018] The present invention also provides a stress adjustment method for a stress-adjustable semiconductor module packaging structure, comprising:

[0019] Step 1: Stress sensors and temperature sensors collect real-time data on the internal temperature distribution and stress state of the package.

[0020] Step 2: The control module has a built-in closed-loop control algorithm. Based on the collected internal temperature distribution and stress state data of the package, and according to the pre-calibrated stress-stiffness mapping curve, the control module calculates the adjustment amount of the stiffness of the electrically controlled variable stiffness support layer.

[0021] Step 3: The control module outputs a drive signal to the support unit on the electrically controlled variable rigidity support layer to adjust the stiffness of the electrically controlled variable rigidity support layer to the calculated adjustment amount.

[0022] Step 4: The electric variable rigidity support layer deforms in real time to compensate for the displacement caused by thermal expansion, thus completing one closed-loop control.

[0023] Step 5: If the stress sensor detects that the stress is still exceeding the limit, return to step 1 to continue iterating until the internal stress of the package reaches the ideal state.

[0024] Furthermore, in step 2, the closed-loop control algorithm adopts a PID control algorithm, a fuzzy control algorithm, or a neural network-based adaptive control algorithm.

[0025] Compared with existing high-voltage, high-power semiconductor module packaging technologies, the advantages of this invention are:

[0026] 1. The present invention provides a stress-adjustable semiconductor module packaging structure and its stress adjustment method. By integrating an electronically controlled variable stiffness support layer into the semiconductor module packaging structure, the packaging structure achieves real-time adaptive compensation for thermo-mechanical stress during the entire operation process. Since the variable stiffness support layer can actively adjust its stiffness according to the real-time detected temperature and stress distribution, the stress concentration phenomenon inside the semiconductor module packaging structure is significantly alleviated.

[0027] 2. The present invention provides a stress-adjustable semiconductor module packaging structure and its stress adjustment method. By continuously iteratively adjusting the stiffness of the support layer through a closed-loop control strategy, the steady state after stress balance is achieved, so that the semiconductor module packaging structure can still maintain good mechanical and thermal stability under complex working conditions such as frequent start-stop and high altitude and low air pressure.

[0028] 3. The present invention provides a stress-adjustable semiconductor module packaging structure and its stress adjustment method, which can reduce parasitic stress fluctuations of devices under high frequency and high current conditions, thereby improving the stability of switching losses and the consistency of thermal resistance in terms of electrical performance, and contributing to the further improvement of the overall system efficiency.

[0029] 4. The stress-adjustable semiconductor module packaging structure and its stress adjustment method provided by this invention have strong compatibility and can be directly integrated into existing DBC / aluminum wire or pressure contact packaging platforms. The only modification required involves adding a variable stiffness layer and corresponding sensing and driving circuits between the base plate and the chip, resulting in small process increments and controllable costs. Compared with other "smart materials + packaging" solutions, this invention achieves the best combination of advantages and disadvantages in terms of response speed, displacement adjustment range, and power consumption balance, making it more cost-effective for industrial deployment.

[0030] 5. This invention provides a stress-adjustable semiconductor module packaging structure and its stress adjustment method. The electrically controlled variable rigidity support layer can be customized according to different application scenarios. In ultra-high temperature scenarios, high-temperature resistant alloy units can be selected; in ultra-high frequency applications, electroactive polymers can be preferred; and in cost-sensitive products, magnetorheological materials can be used, all while maintaining the core adaptive compensation characteristics. This flexible configuration capability makes this invention widely applicable and significantly advantageous for promotion in various high-end power electronics fields such as aerospace, electric vehicles, wind power converters, and HVDC. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly described below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. The above and other objects, features, and advantages of the present invention will become clearer through the accompanying drawings. The same reference numerals indicate the same parts in all the drawings. The drawings are not intentionally drawn to scale to actual dimensions; the focus is on illustrating the main points of the invention.

[0032] Figure 1 This is a schematic diagram of the structure when the present invention is applied to a welded power semiconductor device.

[0033] Figure 2 This is a schematic diagram of the structure when the present invention is applied to a press-fit power semiconductor device.

[0034] The components are: 1. Base plate; 2. Outer shell; 3. Substrate; 4. Electrically controlled variable rigidity support layer; 5. Stress sensor; 6. Electrode terminal; 7. Upper copper layer; 8. Lower copper layer; 9. PCB board; 10. Lead wire. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0036] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0037] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0038] Furthermore, the terms "first," "second," etc., are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.

[0039] Please refer to Figure 1 As shown, this invention provides a stress-adjustable semiconductor module packaging structure for welded power semiconductor devices, including a base plate 1, a housing 2, a substrate 3, and a control module. An electrically controlled variable rigidity support layer 4 and a stress sensor 5 are disposed between the base plate 1 and the substrate 3. A chip is disposed on the substrate 3. The top of the chip is electrically interconnected with the upper surface of the substrate 3 via wire bonding or solderless pressure contact, ensuring the continuity of the heat flow path and low thermal resistance. The housing 2 encapsulates the base plate 1, the substrate 3, and the control module. A temperature sensor is disposed within the housing 2. The electrically controlled variable rigidity support layer 4, the stress sensor 5, and the temperature sensor are all electrically connected to the control module. The control module adjusts the support stiffness of the electrically controlled variable rigidity support layer 4 in real time based on the information collected by the stress sensor 5 and the temperature sensor. Multiple electrode terminals 6 are disposed on the top of the substrate 3. One end of each electrode terminal 6 is fixedly connected to the upper surface of the substrate 3, and the other end passes through the housing 2 and is fixedly connected to the top of the housing 2.

[0040] The aforementioned stress-adjustable semiconductor module packaging structure integrates an electronically controlled variable stiffness support layer into the semiconductor module packaging structure, achieving real-time adaptive compensation for thermo-mechanical stress throughout the entire operation of the packaging structure. Because the variable stiffness support layer can actively adjust its stiffness based on the real-time detected temperature and stress distribution, stress concentration within the semiconductor module packaging structure is significantly alleviated. Experimental tests show that under thermal cycling conditions of -40℃ to +150℃, the maximum stress at the interface of a traditional static packaging exceeds 45MPa, while with this solution, the maximum stress can be reduced to below 20MPa, a reduction of approximately 55%, effectively preventing fatigue cracks at solder joints and the interface layer during thermal cycling.

[0041] Meanwhile, the aforementioned stress-adjustable semiconductor module packaging structure can reduce parasitic stress fluctuations in devices under high-frequency and high-current conditions, thereby improving the stability of switching losses and the consistency of thermal resistance in terms of electrical performance, and contributing to further improvement in the overall system efficiency. Test data shows that the SiC half-bridge module with variable stiffness support reduces the range of thermal resistance fluctuations by about 40% and reduces the peak switching power consumption by about 8%.

[0042] Specifically, an upper copper layer 7 and a lower copper layer 8 are respectively provided on the upper and lower surfaces of the substrate 3; the chip is provided on the upper copper layer 7; a PCB board 9 is provided on the lower surface of the lower copper layer 8; the top of the electrically controlled variable rigidity support layer 4 and the stress sensor 5 are provided with electrical connections to the PCB board 9; the temperature sensor is electrically connected to the PCB board 9; and a lead wire 10 electrically connected to an external control module is provided on the PCB board 9.

[0043] like Figure 2 As shown, when the semiconductor module packaging structure is applied to a press-fit power semiconductor device, the electrically controlled variable rigidity support layer 4 is located below the stress sensor 5. For ease of illustration, only a single-chip module is used for explanation. A multi-chip parallel module only requires increasing the number of sub-units. Each sub-unit is equipped with an electrically controlled variable rigidity support layer 4 and a stress sensor 5, which together form a matrix in the device. All stress sensors 5 and their electrodes are connected to the outside world through the PCB and signal control terminals. The control electrode of the electrically controlled variable rigidity support layer 4 and the signal electrode of the stress sensor 5 are connected to the metal electrode of the control signal PCB through electrode pins, and finally connected to the external control module through the signal control terminals.

[0044] The stress-adjustable semiconductor module packaging structure boasts strong compatibility, allowing direct integration into existing DBC / aluminum wire or pressure contact packaging platforms. The only modification required involves adding a variable stiffness layer and corresponding sensing and driving circuitry between the base plate 1 and the chip, resulting in minimal process increments and controllable costs. Compared to other "smart material + packaging" solutions, this invention offers the optimal combination of response speed, displacement adjustment range, and power consumption balance, making it more cost-effective for industrial deployment.

[0045] Preferably, but not limited to, the electrically controlled variable rigidity support layer 4 contains multiple support units arranged in a matrix, and the stress sensors 5 are also multiple and arranged in a matrix. Each support unit and stress sensor 5 is electrically connected to the PCB board 9 via an independent electrode. This arrangement enables the stiffness adjustment of the electrically controlled variable rigidity support layer 4 to have spatial resolution and the stress sensors 5 to have spatial detection capabilities, allowing for precise compensation for local hot spots or areas of local stress concentration. Furthermore, the materials of the multiple support units in the electrically controlled variable rigidity support layer 4 are electroactive polymers, shape memory alloys, or magnetorheological materials. Electroactive polymers, shape memory alloys, and magnetorheological materials differ in their response speed, displacement, and cost. Electroactive polymers have a fast response but a high driving voltage; shape memory alloys have a large displacement but high energy consumption; and magnetorheological materials have a moderate response and are easy to integrate. In specific applications, the appropriate material can be flexibly selected according to different usage requirements, making this stress-adjustable semiconductor module packaging structure widely applicable and having significant promotional advantages in various high-end power electronics fields such as aerospace, electric vehicles, wind power converters, and HVDC.

[0046] To verify the versatility of the solution, a single-chip 1.2kV / 200A SiC half-bridge module can be used as a specific application example. In a laboratory environment, the electronically controlled variable rigidity support layer 4 is replaced with a shape memory alloy spring array, and four sets of temperature sensors and stress sensors 5 are arranged. Through PID control, the maximum stress at the packaging interface can be reduced from the original 45MPa to below 20MPa during thermal cycling tests from -40℃ to +150℃, and the fatigue life is improved by approximately 3 times.

[0047] Specifically, the control module is an embedded MCU or FPGA with DAC / ADC, used to execute closed-loop control algorithms and output drive signals to the variable stiffness support layer.

[0048] The electrically controlled variable rigidity support layer 4 is connected to the upper end face of the base plate 1 by welding or pressure to form a stable connection, so as to dynamically adjust the rigidity and compensate for stress mismatch caused by thermal expansion during operation.

[0049] A high thermal conductivity medium layer is provided between the electrically controlled variable rigidity support layer 4 and the base plate 1 shown, as well as between the chip and the substrate 3, to ensure excellent thermal conductivity while adjusting rigidity.

[0050] The present invention also provides a stress adjustment method for a stress-adjustable semiconductor module packaging structure, comprising:

[0051] Step 1: Stress sensor 5 and temperature sensor collect real-time data on the internal temperature distribution and stress state of the package.

[0052] Step 2: The control module has a built-in closed-loop control algorithm. Based on the collected internal temperature distribution and stress state data of the package, and according to the pre-calibrated stress-stiffness mapping curve, the control module calculates the adjustment amount of the stiffness of the electronically controlled variable stiffness support layer 4.

[0053] Step 3: The control module outputs a drive signal to the support unit on the electronically controlled variable rigidity support layer 4 to adjust the stiffness of the electronically controlled variable rigidity support layer 4 to the calculated adjustment amount.

[0054] Step 4: The electric variable rigidity support layer 4 deforms in real time to compensate for the displacement caused by thermal expansion, thus completing one closed-loop control.

[0055] Step 5: If stress sensor 5 detects that the stress is still exceeding the limit, return to step 1 to continue iterating until the internal stress of the package reaches the ideal state.

[0056] Furthermore, in step 2, the closed-loop control algorithm adopts a PID control algorithm, a fuzzy control algorithm, or a neural network-based adaptive control algorithm.

[0057] The aforementioned stress adjustment method iteratively adjusts the stiffness of the support layer through a closed-loop control strategy, achieving steady-state maintenance after stress balance. This ensures that the module maintains good mechanical and thermal stability even under complex operating conditions such as frequent start-stop cycles and high altitudes with low air pressure. In actual comparative tests, the failure probability of conventional semiconductor module packaging structures after 1000 thermal cycles is approximately 30%, while the failure rate of the semiconductor module packaging structure using this invention is less than 10% under the same conditions, increasing fatigue life by approximately 3 times, and significantly enhancing reliability from a life cycle perspective.

[0058] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A stress-adjustable semiconductor module packaging structure, characterized in that, Includes base plate, housing, base plate and control module; An electrically controlled variable rigidity support layer and a stress sensor are disposed between the base plate and the substrate; a chip is disposed on the substrate. The outer casing encapsulates the base plate, the substrate, and the control module. A temperature sensor is installed inside the outer casing. The electrically controlled variable rigidity support layer, the stress sensor, and the temperature sensor are all electrically connected to the control module. The control module adjusts the support stiffness of the electrically controlled variable rigidity support layer in real time based on the information collected by the stress sensor and the temperature sensor. An electrode terminal is provided on the top of the substrate. One end of the electrode terminal is fixedly connected to the upper surface of the substrate, and the other end passes through the outer shell and is fixedly connected to the top of the outer shell.

2. The stress-adjustable semiconductor module packaging structure according to claim 1, characterized in that, The upper and lower surfaces of the substrate are respectively provided with an upper copper layer and a lower copper layer; the chip is disposed on the upper copper layer; a PCB board is disposed on the lower surface of the lower copper layer; the top of the electrically controlled variable rigidity support layer and the stress sensor is provided with electrical connections to the PCB board, and the temperature sensor is electrically connected to the PCB board; the PCB board is provided with lead wires that are electrically connected to an external control module.

3. The stress-adjustable semiconductor module packaging structure according to claim 2, characterized in that, The electrically controlled variable rigidity support layer is provided with multiple support units arranged in a matrix, and there are multiple stress sensors arranged in a matrix; each support unit and stress sensor is electrically connected to the PCB board through an independent electrode.

4. The stress-adjustable semiconductor module packaging structure according to claim 3, characterized in that, The material of the multiple support units in the electrically controlled variable rigidity support layer is an electroactive polymer, shape memory alloy, or magnetorheological material.

5. The stress-adjustable semiconductor module packaging structure according to claim 3, characterized in that, The control module is an embedded MCU or FPGA with DAC / ADC.

6. The stress-adjustable semiconductor module packaging structure according to claim 5, characterized in that, The electrically controlled variable rigidity support layer is connected to the upper surface of the base plate by welding or pressure.

7. The stress-adjustable semiconductor module packaging structure according to claim 1, characterized in that, A high thermal conductivity medium layer is provided between the electrically controlled variable rigidity support layer and the base plate shown, as well as between the chip and the substrate.

8. A stress adjustment method based on the stress-adjustable semiconductor module packaging structure according to any one of claims 3 to 7, characterized in that, include: Step 1: Stress sensors and temperature sensors collect real-time data on the internal temperature distribution and stress state of the package. Step 2: The control module has a built-in closed-loop control algorithm. Based on the collected internal temperature distribution and stress state data of the package, and according to the pre-calibrated stress-stiffness mapping curve, the control module calculates the adjustment amount of the stiffness of the electrically controlled variable stiffness support layer. Step 3: The control module outputs a drive signal to the support unit on the electrically controlled variable rigidity support layer to adjust the stiffness of the electrically controlled variable rigidity support layer to the calculated adjustment amount. Step 4: The electric variable rigidity support layer deforms in real time to compensate for the displacement caused by thermal expansion, thus completing one closed-loop control. Step 5: If the stress sensor detects that the stress is still exceeding the limit, return to step 1 to continue iterating until the internal stress of the package reaches the ideal state.

9. The stress adjustment method for the stress-adjustable semiconductor module packaging structure according to claim 8, characterized in that, In step 2, the closed-loop control algorithm adopts PID control algorithm, fuzzy control algorithm or neural network-based adaptive control algorithm.

Images