Logic controller, flash memory upgrading method and device, electronic equipment and medium

By setting up an information storage device and a retry controller outside the flash memory, the reliability of device upgrades is improved, solving the problem of low reliability when upgrades fail in the prior art and avoiding disassembly operations.

CN120743318BActive Publication Date: 2025-11-28INSPUR SUZHOU INTELLIGENT TECH CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
CN202511247621.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-09-02
Publication Date
2025-11-28
Estimated Expiration
2045-09-02

AI Technical Summary

Technical Problem

When equipment upgrades fail, existing technologies manage the system by disassembling the device, which leads to low reliability.

Method used

By setting up a flash memory information storage device outside the flash memory to store the user flash memory information of the logic controller, and using the retry controller to retry the upgrade when the upgrade fails, physical disassembly is avoided.

Benefits of technology

This improves the reliability of equipment upgrade management and avoids physical damage and malfunctions that may result from disassembly.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN120743318B_ABST
    Figure CN120743318B_ABST
Patent Text Reader

Abstract

The application discloses a logic controller, a flash memory upgrading method and device, electronic equipment and a medium, and relates to the technical field of equipment management. Flash memory information of user flash memory of the logic controller is stored in a flash memory information storage, and upgrading and retry can be performed through the flash memory information, without the need of physically disassembling the equipment to rewrite the flash memory information, so that faults caused by disassembly are avoided, and the reliability of upgrading management is improved.
Need to check novelty before this filing date? Find Prior Art

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of device management, and in particular to a logic controller, a flash memory upgrading method and device, an electronic device, and a medium. BACKGROUND

[0002] In the application scenarios of servers, switches and other devices, with the progress of research and development, the functions of the devices can be gradually expanded and improved by upgrading the firmware of the devices. The upgrading of the device is essentially the physical programming of the embedded flash memory inside the device.

[0003] In related technologies, when the device upgrading fails, the device is managed by disassembly, which has the problem of low reliability. SUMMARY

[0004] The present application provides a logic controller, a flash memory upgrading method and device, an electronic device, and a medium to at least solve the problem of low upgrading management reliability in related technologies.

[0005] The present application provides a logic controller, including a user flash memory, a bus upgrading controller, a flash memory upgrading controller, a retry controller, and a flash memory information storage; wherein the bus upgrading controller is connected to a management controller outside the logic controller through an integrated circuit bus, the bus upgrading controller is connected to the flash memory upgrading controller, and the bus upgrading controller is configured to receive an upgrading instruction sent by the management controller and send the upgrading instruction to the flash memory upgrading controller; the flash memory upgrading controller is connected to the user flash memory and the retry controller, and the flash memory upgrading controller is configured to perform upgrading processing on the user flash memory according to the upgrading instruction and determine an upgrading result; the retry controller is connected to the flash memory information storage and the bus upgrading controller, and the retry controller is configured to send flash memory information stored in the flash memory information storage to the bus upgrading controller if the upgrading result is upgrading failure, so that the bus upgrading controller instructs the flash memory upgrading controller to perform upgrading retry processing on the user flash memory; the flash memory information storage is connected to the management controller, and the flash memory information storage is configured to store the flash memory information according to the upgrading instruction.

[0006] The present application also provides a flash memory upgrading method, including: receiving an upgrading instruction sent by a management controller outside a logic controller; performing upgrading processing on a user flash memory according to the upgrading instruction and determining an upgrading result; and sending flash memory information stored in a flash memory information storage to a bus upgrading controller through a retry controller if the upgrading result is upgrading failure, so that the bus upgrading controller instructs the flash memory upgrading controller to perform upgrading retry processing on the user flash memory.

[0007] The application further provides an upgrading device of flash memory, comprising: a receiving module, configured to receive an upgrading instruction sent by a management controller outside a logic controller; an upgrading module, configured to perform upgrading processing on user flash memory according to the upgrading instruction, and determine an upgrading result; and a management module, configured to send flash memory information stored in a flash memory information storage to a bus upgrading controller through a retry controller, so that the bus upgrading controller instructs a flash upgrading controller to perform upgrading retry processing on the user flash memory, if the upgrading result is upgrading failure.

[0008] The application further provides an electronic device, comprising: a memory, configured to store a computer program; and a processor, configured to execute the computer program to implement the steps of the flash memory upgrading method.

[0009] The application further provides a nonvolatile computer readable storage medium, wherein the nonvolatile computer readable storage medium stores a computer program, and the computer program is executed by a processor to implement the steps of the flash memory upgrading method.

[0010] The application further provides a computer program product, comprising a computer program, and the computer program is executed by a processor to implement the steps of the flash memory upgrading method.

[0011] According to the application, the flash memory information of the user flash memory of the logic controller is stored in the flash memory information storage, so that upgrading retry can be performed through the flash memory information, without the need of physically disassembling the device to rewrite the flash memory information, thereby avoiding the fault caused by disassembling the device, and improving the reliability of upgrading management. BRIEF DESCRIPTION OF DRAWINGS

[0012] In order to more clearly illustrate the embodiments of the application, the drawings needed in the embodiments will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the application, and other drawings can be obtained by those skilled in the art without creative effort.

[0013] Figure 1 An application scenario diagram of the flash memory upgrading method provided by the embodiments of the application;

[0014] Figure 2 A structure diagram of the logic controller provided by the embodiments of the application;

[0015] Figure 3 A structure diagram of the state register provided by the embodiments of the application;

[0016] Figure 4 A structure diagram of the logic controller provided by the embodiments of the application;

[0017] Figure 5 A structural schematic diagram of a logic controller provided for an embodiment of the present application is shown in FIG. 1.

[0018] Figure 6 A flowchart of a flash memory upgrading method provided for an embodiment of the present application is shown in FIG. 2.

[0019] Figure 7 A flowchart of a flash memory upgrading method provided for an embodiment of the present application is shown in FIG. 2.

[0020] Figure 8 A schematic diagram of upgrade retry provided for an embodiment of the present application is shown in FIG. 3.

[0021] Figure 9 A structural schematic diagram of a flash memory upgrading device provided for an embodiment of the present application is shown in FIG. 4.

[0022] Figure 10 A structural schematic diagram of a flash memory upgrading device provided for an embodiment of the present application is shown in FIG. 4.

[0023] Figure 11 A structural schematic diagram of an electronic device provided for an embodiment of the present application is shown in FIG. 5. DETAILED DESCRIPTION

[0024] The technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without any creative work fall within the protection scope of the present application.

[0025] It should be noted that, in the description of the present application, the terms “comprise”, “contain” or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not explicitly listed or inherent to such process, method, article or device. The terms “first”, “second” and the like in the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence.

[0026] The logic controller can be a complex programmable logic device (CPLD) programmed and configured with logic functions by a hardware description language to perform preset functions in a device such as a server. The logic controller includes a user flash memory and a configuration flash memory. The flash memory information of the user flash memory includes at least an identifier (such as a hardware model or a serial number) of the logic controller, which is used for verification in an upgrade process. The flash memory information of the configuration flash memory includes control logic of a device (such as a power supply, a fan, or an indicator light). The upgrade process of the logic controller is to write an upgrade package received from a remote device into the user flash memory and / or the configuration flash memory.

[0027] In the upgrade process of the logic controller, an upgrade failure can occur due to electromagnetic interference or the like. The configuration flash memory upgrade failure is a recoverable fault, and the upgrade repair can be directly performed through communication. The user flash memory upgrade failure is an unrecoverable fault, and the upgrade repair cannot be directly performed through communication.

[0028] Specifically, the upgrade process of the flash memory is to verify the identifier in the flash memory information and the identifier in the upgrade package, erase the original flash memory information of the flash memory after verification, and rewrite the information in the upgrade package. When the user flash memory upgrade fails, the original flash memory information of the flash memory has been erased, and subsequent verification and upgrade retry processing cannot be performed. When the configuration flash memory upgrade fails, the identifier in the flash memory information of the user flash memory is not erased, and verification can be performed, so that upgrade retry processing can be performed.

[0029] In related technologies, the verification function of the user flash memory is restored by manually operating a burner to rewrite the flash memory information and write the identifier after the logic controller is disassembled. However, disassembly and operation of the burner have a risk of physical damage, such as the logic controller not being provided with a joint test action group physical pin, manual soldering of a historical interface, and a risk of pad damage and electrostatic breakdown, which can cause a problem of low reliability of upgrade management.

[0030] In order for those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0031] In combination with the specific application environment architecture on which the execution of the flash memory upgrade method depends, the specific application environment architecture is described herein. Refer to Figure 1 , Figure 1As shown in FIG. 1, a schematic diagram of an application scenario of an upgrading method for a flash memory is shown. A flash memory information A is stored in a flash memory of a logic controller in an initial state. The upgrading is triggered by an upgrading package. If the upgrading is successful, the flash memory information A of the logic controller is updated to a flash memory information B. If the upgrading fails, the upgrading retry can be performed. If the upgrading retry is successful, the flash memory information A of the logic controller is updated to the flash memory information B.

[0032] Exemplarily, the application can retain the identification even if the upgrading fails by storing the identification in a position other than the flash memory, so as to verify the upgrading retry according to the identification. Compared with the manner in the related art, the application does not need to be physically disassembled in the upgrading retry process, so as to reduce the risk of the upgrading retry and improve the reliability of the upgrading management.

[0033] Figure 2 As shown in FIG. 2, a schematic diagram of a structure of a logic controller provided by an embodiment of the application is shown. The embodiment of the application provides a logic controller, which comprises a user flash memory, a bus upgrading controller, a flash memory upgrading controller, a retry controller and a flash memory information storage. Figure 2

[0034] The bus upgrading controller is connected with a management controller outside the logic controller through an integrated circuit bus. The bus upgrading controller is connected with the flash memory upgrading controller. The bus upgrading controller is configured to receive an upgrading instruction sent by the management controller and send the upgrading instruction to the flash memory upgrading controller.

[0035] The flash memory upgrading controller is connected with the user flash memory and the retry controller. The flash memory upgrading controller is configured to perform upgrading processing on the user flash memory according to the upgrading instruction and determine an upgrading result.

[0036] The retry controller is connected with the flash memory information storage and the bus upgrading controller. The retry controller is configured to send the flash memory information stored in the flash memory information storage to the bus upgrading controller if the upgrading result is the upgrading failure, so as to instruct the flash memory upgrading controller to perform the upgrading retry processing on the user flash memory.

[0037] The flash memory information storage is connected with the management controller. The flash memory information storage is configured to store the flash memory information according to the upgrading instruction.

[0038] Exemplarily, the management controller can be a baseboard management controller (BMC). The management controller sends the upgrading instruction to trigger the logic controller to perform the upgrading. The upgrading instruction can comprise an upgrading package, so as to make the logic controller perform the upgrading processing according to the upgrading package.

[0039] ​Optionally, the bus upgrade controller is connected to the integrated circuit bus and the bus upgrade controller corresponds to an integrated circuit bus address, so that the management controller accurately sends the upgrade instruction according to the address. The bus upgrade controller obtains the upgrade instruction from the integrated circuit bus according to the address, and the bus upgrade controller can analyze and process the upgrade instruction to obtain the upgrade package in the upgrade instruction.

[0040] For example, the flash memory upgrade controller is used to perform erasing and data writing of the flash memory to realize the upgrade of the flash memory. Specifically, the flash memory upgrade controller drives the user flash memory to perform erasing and data writing operation according to the data in the upgrade instruction.

[0041] For example, in the case of user flash memory upgrade failure, the identification in the flash memory information is verified, thereby reducing the disassembly operation.

[0042] For example, the flash memory information storage stores the flash memory information of the user flash memory before the initial upgrade processing in response to the upgrade instruction, so that the flash memory information is saved as a backup in the flash memory information storage. During the initial upgrade processing, the flash memory information in the flash memory information storage no longer changes, thereby ensuring that the flash memory information in the user flash memory is backed up before being erased, and the backed up flash memory information can be effectively stored, thereby improving the reliability of the upgrade management.

[0043] For example, the flash memory upgrade controller sends a FAIL_FLAG signal to the retry controller through the connection between the flash memory upgrade controller and the retry controller to trigger the upgrade retry.

[0044] For example, the flash memory information is stored in the flash memory information storage, which can be completed by hardware logic throughout the upgrade retry processing, thereby avoiding the disassembly operation.

[0045] The logic controller provided by the embodiment of the present application stores the flash memory information of the user flash memory of the logic controller in the flash memory information storage, so that the upgrade retry can be performed through the flash memory information without the need of physically disassembling and rewriting the flash memory information, thereby avoiding the failure caused by disassembly and improving the reliability of the upgrade management.

[0046] A feasible implementation manner is provided, Figure 3 The structure diagram of the state register provided by the embodiment of the present application is shown in Figure 3 As shown in the figure, the logic controller further includes a state register; the pin of the state register is connected to the flash memory upgrade controller and the user flash memory, and the state register is used to send the upgrade result to the flash memory upgrade controller when the upgrade fails.

[0047] For example, the pin of the state register can read the upgrade state of the user flash memory, and the upgrade result can be determined according to the upgrade state.

[0048] Optionally, the upgrade state read by the status register can be a native electrical signal of the user flash memory, such as a high voltage pulse or a check level.

[0049] Optionally, the flash upgrade controller reads the level signal of the pin of the status register, and determines the upgrade result according to the level signal.

[0050] In this feasible implementation manner, the user flash memory can be monitored in real time by setting the status register, so as to determine the upgrade result, and the flash upgrade controller can perform upgrade retry in time according to the upgrade result.

[0051] A feasible implementation manner, Figure 4 The structure schematic diagram of the logic controller provided by the embodiment of the present application is shown in Figure 4 As shown in the figure, the logic controller further comprises a check controller and a check value storage; the check controller is connected with the retry controller, the output end of the check value storage, and the bus upgrade controller, and is used for performing check processing on the flash information according to the information check value to obtain a first check result, and sending the flash information to the bus upgrade controller according to the first check result; the input end of the check value storage is connected with the bus upgrade controller, and the check value storage is used for generating the information check value corresponding to the user flash memory according to the upgrade instruction, and storing the information check value.

[0052] For example, after the retry controller sends the flash information to the check controller, the check controller performs check processing on the flash information to obtain a first check result, and then sends the flash information to the bus upgrade controller according to the first check result.

[0053] For example, if the first check result is a check pass, the check controller sends the flash information to the bus upgrade controller.

[0054] For example, the basis of the check processing is the information check value stored in the check value storage, and the flash information is checked according to the information check value.

[0055] For example, the first check result is a check pass, which indicates that the flash information is correct information, and then the flash information can be used for upgrade retry.

[0056] In this feasible implementation manner, the upgrade retry is performed according to the accurate flash information through check processing, so as to improve the reliability of the upgrade retry.

[0057] A feasible implementation manner, Figure 5 The structure schematic diagram of the logic controller provided by the embodiment of the present application is shown in Figure 5As shown, the logic controller further comprises a configuration flash memory; the flash memory upgrade controller is connected with the configuration flash memory, and is configured to perform upgrade retry processing on the configuration flash memory according to the upgrade instruction.

[0058] In an example, the upgrade retry of the configuration flash memory is triggered by the bus upgrade controller.

[0059] In an example, the configuration flash memory does not store the identifier, and even if the configuration flash memory is erased in the upgrade process performed by the flash memory upgrade controller, the upgrade retry can be performed by using the identifier in the user flash memory.

[0060] In an example, the channel connected between the flash memory upgrade controller and the configuration flash memory and the channel connected between the flash memory upgrade controller and the user flash memory are independent of each other, so as to avoid conflicts between the upgrade of the configuration flash memory and the upgrade of the user flash memory, and when the upgrade of one of the configuration flash memory and the user flash memory fails, the upgrade retry can be performed only on the flash memory whose upgrade fails.

[0061] In this feasible implementation manner, the channels of the configuration flash memory and the user flash memory are isolated, so as to avoid conflicts between the upgrade of the configuration flash memory and the upgrade of the user flash memory, thereby improving the reliability of the upgrade management.

[0062] Figure 6 A flowchart of the flash memory upgrade method provided by the embodiment of the application is shown in FIG. 1. Figure 6 As shown, the embodiment of the application provides a flash memory upgrade method, and the method is described in detail as follows.

[0063] S601, receiving an upgrade instruction sent by a management controller outside a logic controller.

[0064] In an example, the management controller and the logic controller are connected through an integrated circuit bus, the management controller generates an upgrade instruction according to an upgrade package, and sends the upgrade instruction to the logic controller, so as to instruct the logic controller to perform the upgrade according to the upgrade package in the upgrade instruction.

[0065] S602, performing upgrade processing on a user flash memory according to the upgrade instruction, and determining an upgrade result.

[0066] In an example, the upgrade result is a result obtained after the logic controller performs the upgrade processing on the user flash memory. The upgrade result includes upgrade success or upgrade failure.

[0067] In an example, the upgrade success indicates that the data of the upgrade package has been written into the user flash memory. The upgrade failure indicates that an interruption occurs between the completion of the upgrade processing, so that the data of the upgrade package is not written into the user flash memory.

[0068] With the scene example, if the upgrade is successful, the logic controller can run according to the new data. If the upgrade fails, the logic controller lacks the necessary data to run normally and cannot run normally. In order to restore the normal operation of the logic controller, the upgrade retry method is used for processing.

[0069] S603, if the upgrade result is upgrade failure, the flash information stored in the flash information storage is sent to the bus upgrade controller through the retry controller, so that the bus upgrade controller instructs the flash upgrade controller to perform upgrade retry processing on the user flash.

[0070] For example, when the upgrade result is upgrade failure, the flash upgrade controller has erased the user flash, and the flash information storage can normally store the flash information. The flash information can be read from the flash information storage, and the flash information includes an identifier used for verification during the upgrade process, so that the upgrade retry processing can effectively perform verification.

[0071] Optionally, the bus upgrade controller receives a new upgrade package from the management controller through the integrated circuit bus, or the bus upgrade controller triggers the flash upgrade controller to perform upgrade using the upgrade package in the first upgrade instruction.

[0072] The flash upgrade method provided by the embodiment of the application stores the flash information of the user flash of the logic controller in the flash information storage, so that the upgrade retry can be performed through the flash information, without the need of physically disassembling the device to rewrite the flash information, thereby avoiding the fault caused by disassembly, and improving the reliability of the upgrade management.

[0073] On the basis of any one of the above embodiments, the following will be described in combination with Figure 7 The detailed process of the flash upgrade method will be described.

[0074] Figure 7 A flowchart of a flash upgrade method provided by the embodiment of the application. As shown in the figure, Figure 7 The method comprises the following steps:

[0075] S701, receiving an upgrade instruction sent by a management controller outside the logic controller.

[0076] It should be noted that the execution process of S701 is described in S601, which will not be described here.

[0077] S702, determining the target data corresponding to the upgrade instruction stored in the user flash.

[0078] The upgrade instruction includes an upgrade package specified by the management controller, and the management controller instructs to write data in the upgrade package to the user flash memory. The target data is data in the user flash memory corresponding to the data in the upgrade package. The essence of the upgrade process is to replace the target data with the data in the upgrade package.

[0079] For example, the target data is parameter A, and the data in the upgrade package is parameter B. Parameter A and parameter B are of the same parameter type. In the upgrade process, parameter A of the same parameter type as parameter B in the user flash memory is determined according to the parameter type of parameter B, and then the replacement process is performed.

[0080] S703, erase the target data, and perform data rewriting on the user flash memory according to the upgrade instruction to perform the upgrade process.

[0081] For example, the flash upgrade controller generates an erase instruction to trigger the erasure of the target data, and rewrites the data in the user flash memory to perform the upgrade process after the erasure is completed.

[0082] Optionally, the flash upgrade controller generates a full erase instruction to erase all data in the user flash memory.

[0083] S704, read the pin information of the status register, and determine the upgrade result according to the pin information.

[0084] For example, the status register indicates different upgrade results through different pin information.

[0085] Optionally, the status register indicates the upgrade result of the configuration flash memory or the user flash memory through different pin information.

[0086] Optionally, a mapping relationship between the pin information and the upgrade result is configured in advance, and the corresponding upgrade result is determined according to the mapping relationship and the pin information.

[0087] S705, if the upgrade result is upgrade failure, the flash information storage in the flash information storage is sent to the bus upgrade controller through the retry controller, so that the bus upgrade controller instructs the flash upgrade controller to perform the upgrade retry process on the user flash memory.

[0088] In an example, the retry controller sends the flash information stored in the flash information storage to the bus upgrade controller, including: determining a retry threshold; determining an upgrade result by the retry controller; determining a user flash upgrade retry number by the retry controller if the upgrade result is upgrade failure; reading the stored information from the flash information storage by the retry controller if the upgrade retry number is less than or equal to the threshold; determining the flash information corresponding to the user flash from the stored information by the retry controller; determining a verification parameter of the flash information by the retry controller, the verification parameter including a flash corresponding to the flash information and / or a format of the flash information; performing verification processing on the verification parameter of the flash information by the retry controller to obtain a verification result, the verification result being verification passed or verification failed; and sending the flash information to the bus upgrade controller by the retry controller if the verification result is verification passed.

[0089] In an example, the retry threshold represents an upper limit of the upgrade retry number, and the retry threshold avoids the problem of excessive upgrade retry number leading to excessive cost.

[0090] In an example, if the current upgrade retry number is greater than the retry threshold, a fuse is triggered and the management controller is notified of the upgrade failure, so that the management controller changes the upgrade strategy.

[0091] In an example, if the fuse is triggered, log information of the current upgrade processing and the upgrade retry is obtained, the log information and the upgrade instruction are input into a prediction model to obtain a cause of the upgrade retry failure and a corresponding solution, wherein the prediction model is obtained by training historical data.

[0092] In an example, if the upgrade retry number is less than or equal to the threshold, it means that the upgrade retry number is within a controllable range, and further upgrade retry can be performed.

[0093] In an example, the flash information storage can store multiple types of information, and the flash information corresponding to the user flash is obtained by screening the information stored in the flash information storage during the upgrade retry.

[0094] In an example, the information stored in the flash information storage is grouped according to fields, each group corresponds to a field information, and the type of data is distinguished by the field information, so that the flash information corresponding to the user flash is accurately determined.

[0095] The flash information in the verification parameter corresponds to the memory, which indicates that the flash information is from the user flash or the configuration flash. The format of the flash information in the verification parameter is used to verify whether the format of the flash information stored in the memory is a format that can be recognized by the bus upgrade controller or the flash information memory. The verification processing is performed through the verification parameter to improve the accuracy of the flash information, thereby improving the reliability of the upgrade management.

[0096] Next, the application is described in combination with Figure 8 The upgrade retry is described.

[0097] Figure 8 The schematic diagram of the upgrade retry provided by the application is shown in the figure. Figure 8 As shown in the figure, the management controller sends an upgrade instruction to trigger the start of the upgrade, reads the status register according to the preset period. When the status information is not busy and not failed, the next step is performed, otherwise the upgrade fails. The erase instruction is sent to trigger the flash erase, and after the state is detected ready, the configuration flash starting address is written. The writing is performed page by page, and after each page is written, the status register is read. After the configuration flash area writing is completed, the target address is switched to the user flash address. The upgrade completion instruction is sent to close the upgrade channel, and the upgrade operation of the logic controller is completed. When the user flash upgrade fails, the retry controller is instructed to perform the upgrade retry.

[0098] In combination with the scene example, first, the management controller issues an upgrade instruction through the integrated circuit bus, and the logic controller synchronously stores the identifier in the user flash in the flash information memory. During the upgrade process, when the status register is read incorrectly (i.e., when the upgrade fails), the flash upgrade controller immediately sends a FAIL_FLAG signal to the retry controller to trigger the upgrade retry, extracts the identifier from the flash information memory to the bus upgrade controller, and drives the bus upgrade controller to issue again to perform the upgrade. If the upgrade fails again, the retry controller drives the bus upgrade controller to perform the upgrade again, and if the number of failures exceeds the retry number threshold, the fuse is triggered, and the management controller is notified of the upgrade failure.

[0099] In this feasible implementation manner, the upgrade number and the verification parameter are used for verification, which can improve the effectiveness of the upgrade processing, thereby improving the reliability of the upgrade management.

[0100] In a feasible implementation manner, the logic controller further includes a configuration flash. If the upgrade result is upgrade failure, the flash upgrade method further includes: generating a retry instruction through the retry controller; sending the retry instruction to the bus upgrade controller through the retry controller, so that the bus upgrade controller sends the retry instruction to the flash upgrade controller to perform the upgrade retry processing on the configuration flash.

[0101] Exemplarily, the upgrade processing is to upgrade the configuration flash memory first, and then upgrade the user flash memory, and in the case of upgrade failure of the configuration flash memory, the identification in the user flash memory can be used for verification due to the fact that the identification in the user flash memory is not erased.

[0102] In combination with the scene example, in the case of upgrade failure of the configuration flash memory, the retry controller does not need to read the flash memory information from the flash memory information storage, and can directly trigger the bus upgrade controller to perform upgrade retry.

[0103] In this feasible implementation manner, the identification in the user flash memory is used for upgrade retry of the configuration flash memory, thereby reducing the operation of retry, and further improving the reliability of upgrade management.

[0104] In a feasible implementation manner, if the upgrade result is upgrade success, the method further includes: determining a standard check value; determining original data from the user flash memory and / or the configuration flash memory, and performing calculation processing on the original data according to a check algorithm to obtain an original check value; comparing the original check value and the standard check value to perform cyclic redundancy check to obtain a second check result, the second check result being check pass or check fail; and if the second check result is check fail, performing upgrade retry processing.

[0105] Exemplarily, the cyclic redundancy check is a kind of error detection coding based on polynomial division.

[0106] Exemplarily, the upgrade result is upgrade success, which indicates that the data in the upgrade package has been written into the user flash memory and / or the configuration flash memory, and the cyclic redundancy check is used to determine whether there is an exception in the writing process, i.e., whether the actually written data is the target written data.

[0107] Exemplarily, the standard check value is a check value corresponding to the target written data, the original data is the actually written flash memory data, and the original check value obtained by performing calculation processing on the original data through the check algorithm is the actual check value. By comparing the original check value and the standard check value, it can be determined whether the actually written data is correct, and if not, further upgrade retry processing is performed.

[0108] Optionally, the management controller generates the upgrade instruction and simultaneously generates a corresponding standard check value.

[0109] In this feasible implementation manner, through the cyclic redundancy check, it can be ensured that the actually written memory data is correct data, thereby improving the reliability of upgrade management.

[0110] In a feasible implementation manner, after receiving the upgrade instruction sent by the management controller outside the receiving logic controller, the method further includes: determining flash memory information of the user flash memory, and storing the flash memory information to a flash memory information storage.

[0111] For example, the logic controller triggers the storage of flash memory information upon receiving an upgrade command.

[0112] As illustrated by the scenario example, the flash memory information in the user's flash memory may change. Retrieving the latest flash memory information from the user's flash memory in real time upon receiving an upgrade command ensures the validity of the flash memory message, allowing the latest flash memory information to be used during upgrade retries.

[0113] In this feasible implementation, by obtaining the latest flash memory information from the user's flash memory in real time when receiving upgrade instructions, the validity of flash memory messages can be ensured, thereby improving the reliability of upgrade management.

[0114] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0115] Figure 9 This is a schematic diagram of the structure of a flash memory upgrade device provided in an embodiment of this application. Figure 9 As shown, embodiments of this application also provide a flash memory upgrade device 90, which may include: a receiving module 91, an upgrade module 92, and a management module 93, wherein...

[0116] The receiving module 91 is used to receive upgrade commands sent by the management controller outside the logic controller.

[0117] Upgrade module 92 is used to upgrade the user's flash memory according to the upgrade instruction and determine the upgrade result.

[0118] The management module 93 is used to send the flash memory information stored in the flash memory to the bus upgrade controller through the retry controller if the upgrade result is an upgrade failure, so that the bus upgrade controller instructs the flash memory upgrade controller to perform upgrade retry processing on the user flash memory.

[0119] Optionally, the receiving module 91 can perform... Figure 6 S601 in the embodiment.

[0120] Optionally, upgrade module 92 can be executed. Figure 6 S602 in the embodiment.

[0121] Optionally, management module 93 can execute Figure 6 S603 in the embodiment.

[0122] It should be noted that the flash memory upgrade device shown in the embodiments of this application can execute the technical solution shown in the above method embodiments, and its implementation principle and beneficial effects are similar, so they will not be described again here.

[0123] In a possible implementation, the upgrading module 92 is specifically configured to:

[0124] determine target data corresponding to the upgrading instruction in the user flash memory;

[0125] erase the target data and perform data rewriting on the user flash memory according to the upgrading instruction to perform the upgrading process;

[0126] read pin information of the status register, and determine the upgrading result according to the pin information.

[0127] Figure 10 A structural schematic diagram of a flash memory upgrading apparatus provided by an embodiment of the present application is shown in FIG. 1. Figure 9 Based on the embodiment shown in FIG. 1, the flash memory upgrading apparatus 90 further includes a retry module 94, an execution module 95, a verification module 96, and a storage module 97, as shown in FIG. 2. Figure 10

[0128] The retry module 94 is configured to:

[0129] determine a retry number threshold;

[0130] determine the upgrading result through the retry controller;

[0131] if the upgrading result is upgrading failure, determine the number of upgrading retries of the user flash memory through the retry controller;

[0132] if the number of upgrading retries is less than or equal to the number threshold, read the stored information from the flash memory information storage through the retry controller, and determine the flash memory information corresponding to the user flash memory from the stored information;

[0133] determine a verification parameter of the flash memory information through the retry controller, the verification parameter including the flash memory corresponding to the flash memory information and / or the format of the flash memory information;

[0134] perform verification processing on the verification parameter of the flash memory information through the retry controller to obtain a verification result, the verification result being verification pass or verification fail;

[0135] if the verification result is verification pass, send the flash memory information to the bus upgrading controller through the retry controller.

[0136] The logic controller further includes a configuration flash memory; the execution module 95 is configured to:

[0137] generate a retry instruction through the retry controller;

[0138] send the retry instruction to the bus upgrading controller through the retry controller, so that the bus upgrading controller sends the retry instruction to the flash memory upgrading controller to perform upgrading retry processing on the configuration flash memory.​

[0139] The checking module 96 is configured to:

[0140] determine a standard check value;

[0141] determine original data from the user flash memory and / or the configuration flash memory, and perform calculation and processing on the original data according to a check algorithm to obtain an original check value;

[0142] compare the original check value and the standard check value to perform a cyclic redundancy check to obtain a second check result, the second check result being a check pass or a check fail;

[0143] if the second check result is a check fail, perform an upgrade retry process.

[0144] The storage module 97 is configured to:

[0145] determine flash memory information of the user flash memory, and store the flash memory information into a flash memory information storage.

[0146] The features of the embodiments of the upgrade device of the flash memory can be referred to the related descriptions of the embodiments of the upgrade method of the flash memory, which will not be repeated here.

[0147] Figure 11 A structural schematic diagram of an electronic device is provided in the present application. As shown in Figure 11 The electronic device 110 provided in the present embodiment includes at least one processor 1101 and a memory 1102. Optionally, the electronic device 110 further includes a communication component 1103. The processor 1101, the memory 1102 and the communication component 1103 are connected through a bus.

[0148] In the specific implementation process, the at least one processor 1101 executes the computer execution instructions stored in the memory 1102, so that the at least one processor 1101 executes the above-mentioned embodiments of the upgrade method of the flash memory.

[0149] The specific implementation process of the processor 1101 can be referred to the above-mentioned method embodiments, which have similar implementation principles and technical effects, and will not be repeated here.

[0150] In the above embodiments, it should be understood that the processor can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), etc. The general-purpose processor can be a microprocessor or any conventional processor, etc. The steps of the method disclosed in the application can be directly embodied as hardware processor execution, or executed by a combination of hardware and software modules in the processor.

[0151] The memory can include a random access memory (RAM), and can also include a non-volatile memory (NVM), such as at least one disk memory.

[0152] The bus can be an industry standard architecture (ISA) bus, a peripheral component (PCI) bus, an extended industry standard architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, the bus in the drawings of the present application does not limit to only one bus or one type of bus.

[0153] The embodiments of the present application also provide a non-volatile computer readable storage medium, which stores a computer program, and the computer program is configured to execute the steps in any of the above flash memory upgrading method embodiments when running.

[0154] In an example embodiment, the above non-volatile computer readable storage medium can include, but is not limited to, a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store computer programs.

[0155] The embodiments of the present application also provide a computer program product, which includes a computer program, and the computer program is executed by a processor to implement the steps in any of the above flash memory upgrading method embodiments.

[0156] The embodiment of the present application further provides another computer program product, comprising a nonvolatile computer readable storage medium, the nonvolatile computer readable storage medium stores a computer program, the computer program is executed by a processor to implement the steps in any of the above flash upgrading method embodiments.

[0157] Those skilled in the art will further appreciate that the units and algorithm steps of the examples described in connection with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, various examples have been described generally in terms of their functionality, without limitation. The hardware and software described above can be substituted for one another, and the principles of each example can be employed in a different form without departing from the scope of the present application.

[0158] The above provides a kind of logic controller, flash upgrading method, device, electronic equipment and medium provided by the present application in detail.The principle and implementation of the present application are described in this paper by applying specific examples, the above example is only used to help understand the method and its core idea of the present application.It should be pointed out that, for the ordinary skilled in the art, without departing from the principle of the present application, some improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of the claims of the present application.

Claims

1. A logic controller, characterized in that, include: User flash memory, bus upgrade controller, flash upgrade controller, retry controller, and flash information storage; among which... The bus upgrade controller is connected to a management controller outside the logic controller via an integrated circuit bus. The bus upgrade controller is also connected to the flash memory upgrade controller. The bus upgrade controller is used to receive upgrade commands sent by the management controller and send the upgrade commands to the flash memory upgrade controller. The flash memory upgrade controller is connected to the user flash memory and the retry controller. The flash memory upgrade controller is used to upgrade the user flash memory according to the upgrade instruction and determine the upgrade result. The retry controller is connected to the flash memory information storage and the bus upgrade controller. If the upgrade result is an upgrade failure, the retry controller sends the flash memory information stored in the flash memory to the bus upgrade controller so that the bus upgrade controller instructs the flash memory upgrade controller to perform upgrade retry processing on the user flash memory. The flash memory information storage is connected to the management controller, and the flash memory information storage is used to store the flash memory information according to the upgrade instruction.

2. The logic controller according to claim 1, characterized in that, The logic controller also includes a status register; The status register pins are connected to the flash memory upgrade controller and the user flash memory. The status register is used to send the upgrade result to the flash memory upgrade controller when the upgrade fails.

3. The logic controller according to claim 1, characterized in that, The logic controller also includes a verification controller and a verification value storage; The verification controller is connected to the retry controller, the output terminal of the verification value memory, and the bus upgrade controller. The verification controller is used to perform verification processing on the flash memory information according to the information verification value to obtain a first verification result, and send the flash memory information to the bus upgrade controller according to the first verification result. The input terminal of the verification value memory is connected to the bus upgrade controller. The verification value memory is used to generate the information verification value corresponding to the user flash memory according to the upgrade instruction, and to store the information verification value.

4. The logic controller according to any one of claims 1-3, characterized in that, The logic controller also includes configuration flash memory; The flash memory upgrade controller is connected to the configuration flash memory, and the flash memory upgrade controller is used to perform upgrade retry processing on the configuration flash memory according to the upgrade instruction.

5. A method for upgrading flash memory, characterized in that, Applied to the logic controller according to any one of claims 1-4; the method includes: Receive upgrade instructions sent by a management controller external to the logic controller; According to the upgrade instruction, the user's flash memory is upgraded, and the upgrade result is determined; If the upgrade result is an upgrade failure, the retry controller sends the flash memory information stored in the flash memory to the bus upgrade controller, so that the bus upgrade controller instructs the flash memory upgrade controller to retry the upgrade process of the user flash memory.

6. The flash memory upgrade method according to claim 5, characterized in that, Upgrade the user's flash memory and determine the upgrade result, including: Determine the target data corresponding to the upgrade instruction stored in the user's flash memory; The target data is erased, and the user flash memory is rewritten according to the upgrade instruction to perform the upgrade process; Read the pin information of the status register and determine the upgrade result based on the pin information.

7. The flash memory upgrade method according to claim 5 or 6, characterized in that, The flash memory information stored in the flash memory is sent to the bus upgrade controller via the retry controller, including: Determine the threshold for the number of retry attempts; The upgrade result is determined by the retry controller; If the upgrade result is an upgrade failure, the retry controller determines the number of upgrade retries the user flash memory has undergone; If the number of upgrade retries is less than or equal to the threshold number, the retry controller reads the stored information from the flash memory and determines the flash memory information corresponding to the user's flash memory from the stored information. The verification parameters of the flash memory information are determined by the retry controller, and the verification parameters include the flash memory corresponding to the flash memory information and / or the format of the flash memory information. The retry controller verifies the verification parameters of the flash memory information to obtain a verification result, which is either verification passed or verification failed. If the verification result is successful, the flash memory information is sent to the bus upgrade controller via the retry controller.

8. The flash memory upgrade method according to claim 7, characterized in that, The logic controller also includes configuration flash memory; if the upgrade result is an upgrade failure, the method further includes: The retry controller generates a retry command. The retry controller sends the retry instruction to the bus upgrade controller, so that the bus upgrade controller sends the retry instruction to the flash upgrade controller to perform upgrade retry processing on the configuration flash memory.

9. The flash memory upgrade method according to claim 7, characterized in that, The logic controller also includes a configuration flash memory; if the upgrade result is a successful upgrade, the method further includes: Determine the standard verification value; The original data is determined from the user flash memory and / or configuration flash memory, and the original data is processed according to the verification algorithm to obtain the original verification value; The original check value and the standard check value are compared to perform cyclic redundancy check to obtain a second check result, which is either check passed or check failed. If the second verification result is that the verification failed, then an upgrade and retry process will be performed.

10. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the flash memory upgrade method as described in any one of claims 5 to 9.

Citation Information

Patent Citations

  • Remapping method and device of interrupt vector table, microprocessor and electronic device

    CN112346739A

  • Baseboard management controller firmware upgrading method and device, equipment and medium

    CN118656101A