Method for quickly generating signal
By defining subroutine blocks and signal parameters and using software programs to generate signals, the problems of poor flexibility and high cost in the existing technology are solved, and the flexibility and efficiency of rapid signal generation are achieved.
Patent Information
- Application Number
- CN202510911321.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-02
- Publication Date
- 2025-10-03
AI Technical Summary
Existing signal generation technologies have poor flexibility, slow response speed, high development and maintenance costs, and are unable to meet rapidly changing and diverse signal requirements.
By defining subroutine blocks, setting signal parameters and input and output ports, and using software programs to generate signals, dynamic adjustment and flexible response can be achieved.
It improves the flexibility and adaptability of signal generation, reduces hardware development cost and time, and enhances R&D efficiency.
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Figure CN120743336A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of signal processing, and in particular to a method for quickly generating a signal. Background Art
[0002] Signal generation and processing are crucial components of modern electronics and communications. The efficiency and flexibility of signal generation are crucial for the development of numerous industries that rely on signal processing. Currently, with the rapid advancement of science and technology, emerging technologies such as 5G communications, artificial intelligence, and the Internet of Things are placing increasingly stringent demands on signal generation, exposing the limitations of existing signal generation techniques.
[0003] Traditional signal generation methods often have problems such as complex processes, poor flexibility, and slow response speed, making it difficult to meet rapidly changing signal requirements and diverse application scenarios.
[0004] For example, existing technologies face the following problems: First, traditional signal generation methods lack flexibility: Traditional signal generation methods are often based on fixed hardware circuits or specific software programs. Signal parameters, such as voltage range, frequency, and waveform, are determined during the design phase, making subsequent adjustments extremely difficult. For example, in the development and testing of communications equipment, it is often necessary to simulate complex signals in different environments. However, traditional methods are unable to quickly adapt to new signal requirements, seriously hindering the R&D process and increasing time and economic costs.
[0005] Second, signal processing logic lacks dynamic adjustment capabilities: Actual application scenarios are complex and ever-changing, requiring flexible adjustments to signal processing logic. However, existing technologies have rigid signal processing logic, making it difficult to dynamically optimize based on different input signal characteristics and system operating conditions. For example, in a smart grid, when power load fluctuates, signal generation strategies cannot be adjusted in real time to stabilize power supply, impacting the reliability and stability of the grid. Third, high development and maintenance costs: Traditional signal generation technologies rely on customized hardware, resulting in long development cycles and high hardware costs. Software updates and maintenance are also extremely complex, requiring significant effort from specialized technicians. For example, upgrading the signal generation module in medical equipment often requires a complete hardware redesign and software rewrite, resulting in high costs.
[0006] Based on this, the present invention designs a method for quickly generating a signal to solve the above problem. Summary of the Invention
[0007] In view of the above shortcomings of the prior art, the present invention provides a method for quickly generating a signal.
[0008] To achieve the above objectives, the present invention is implemented through the following technical solutions: A method for quickly generating a signal comprises the following steps: Step 1: Subroutine definition and signal parameter setting; Step 2: The subroutine is provided with two input ports for receiving external signals, namely port 1 and port 2; There is an output port for outputting the signal processed by the subroutine, which is port three; Step 3: Initialize the signal and define signal variable 1, signal variable 2 and assignment variable 3, then assign a value to assignment variable 3; Step 4: Start signal processing: Determine whether a rising edge occurs on port 1 or a falling edge occurs on port 2; If a rising edge occurs on port 1 or a falling edge occurs on port 2, proceed to step 5; If there is no rising edge on port 1 or no falling edge on port 2, wait for a rising edge on port 1 or a falling edge on port 2; Step 5: Process the assignment variable 3, assign the concatenated and multiplied values to the signal variable 1, and the signal variable 1 outputs the result through port 3; Step 6: While processing the signal, determine whether the assignment time of the signal variable 1 is greater than the set time threshold T; If it is greater, assign port 3 to X and terminate the thread; If it is less than or equal to, assign port 3 to Y and return to step 5; Step 7: Complete the writing of the subroutine main code and end the subroutine.
[0009] Furthermore, the steps of step one are as follows: Step A1, define a subroutine block named "name"; Step A2: Define a macro in the subroutine to specify the time unit conversion relationship as 1pt representing 200ps; Step A3: Set the maximum voltage value Vmax and the minimum voltage value Vmin of the signal in the subroutine.
[0010] Furthermore, the maximum voltage value Vmax is 1V, and the minimum voltage value Vmin is -2V.
[0011] Furthermore, the steps in step 3 are as follows: Step B1, start writing the main code of the subroutine; Step B2, define signal variable 1, signal variable 2 and assignment variable 3; Step B3: Assign a value to the assignment variable three.
[0012] Furthermore, the assignment variables are defined as fun(a), fun(b), fun(c), and fun(d).
[0013] Furthermore, the signal fun(a) is assigned the value W.
[0014] Furthermore, the signals fun(b), fun(c) and fun(d) are assigned the value Q.
[0015] Furthermore, W takes 0 or 1, and Q takes 0 or 1.
[0016] Furthermore, X takes 0 or 1.
[0017] Furthermore, Y takes 0 or 1.
[0018] Compared with the existing technology, the present invention has the following advantages: 1. By defining subroutine blocks, users can encapsulate specific signal processing logic, which is convenient for reuse and maintenance, and give subroutines meaningful names, which helps to clearly identify their functions; The macro defines the time unit conversion relationship (1pt represents 200ps), providing a unified measurement standard for time-related operations in subsequent signal processing; Setting the maximum and minimum voltage values of the signal (1V and -2V) determines the value range of the signal, constrains the output characteristics of the signal, and also provides boundary conditions for the calculation and assignment of the signal in the program; When faced with different signal requirements, it is possible to adapt by modifying these parameters. For example, when simulating complex signals in different environments during the development and testing of communication equipment, the relevant parameters of the signal can be flexibly adjusted as needed, rather than fixing the parameters in the design phase and making them difficult to change as in traditional methods. This solves the problem of poor flexibility, improves R&D efficiency, and reduces time and economic costs.
[0019] 2. Two input ports (port 1 and port 2) are used to receive external trigger signals or control signals, allowing the subroutine to interact with the external environment. The subroutine can dynamically adjust its internal processing logic based on changes in these input signals. An output port (port 3) is used to output the processed signal, which can be used to control other devices or as input for subsequent processing, thus enabling the subroutine to connect with other modules or systems. 3. Define multiple signal variables. These variables serve as data storage and processing units within the subroutine, and are responsible for signal transmission and calculation. Initialize and assign values to some signal variables such as fun(a) and fun(b), providing an initial state for subsequent signal processing and calculations, ensuring that the program can start running from a certain state; 4. Determine whether the input signal port 1 has a rising edge or port 2 has a falling edge, and realize the function of controlling the output signal according to the edge change of the input signal; In addition, the subroutines can respond differently according to different situations, which enhances the flexibility and adaptability of the program.
[0020] 5. The present invention mainly realizes signal generation through software programs. Compared with traditional signal generation technology that relies on customized hardware, it reduces the dependence on customized hardware, thereby reducing hardware development costs and development cycles. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] To more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present invention. Those skilled in the art can also derive other drawings based on these drawings without inventive effort.
[0022] Figure 1 A process of a method for quickly generating a signal according to the present invention Figure 1 ; Figure 2 A process of a method for quickly generating a signal according to the present invention Figure 2 ; Figure 3 This is a connection block diagram of embodiment 4 of the present invention. DETAILED DESCRIPTION
[0023] To make the purpose, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making any creative efforts shall fall within the scope of protection of the present invention.
[0024] Example 1: In some embodiments, please refer to the accompanying drawings of the specification. Figure 1-Figure 2 , a method for quickly generating a signal, comprising the following steps: Step 1: Subroutine definition and signal parameter setting; Implementation steps: Step A1: define a subroutine block named "name". In actual use, "name" needs to be replaced with a specific and meaningful name to identify the function or purpose of this program module.
[0025] Step A2: A macro definition is performed in the subroutine to specify the time unit conversion relationship as 1pt represents 200ps, which provides a unified measurement standard for time-related operations in subsequent signal processing; Step A3: Set the maximum voltage value Vmax=1V and the minimum voltage value Vmin=-2V of the signal in this subroutine. These parameters determine the voltage variation range of the signal in this module and affect the output characteristics of the signal. The value of the signal within this voltage range can be changed through relevant operations in the program.
[0026] Step 2: The subroutine has two input ports for receiving external signals, namely port 1 and port 2; the above two input ports can receive external trigger signals or other control signals as input conditions for the module's internal logic processing. The module will perform corresponding operations based on the changes in these input signals.
[0027] There is an output port for outputting the signal processed by the subroutine, which is port 3. This port is used to output the signal processed inside the module. This signal can be used to control other devices or as an input signal for subsequent processing, realizing the connection between the subroutine and other modules or systems. Step 3: Initialize the signal and define signal variable 1, signal variable 2 and assignment variable 3, then assign a value to assignment variable 3; Implementation steps: Step B1, start writing the main code of the subroutine; Step B2, define signal variable 1, signal variable 2 and assignment variable 3; Define the three assigned variables as fun(a), fun(b), fun(c), and fun(d). These signals are variables used to store and process data within the module. They can be assigned, operated on, and passed around in the program.
[0028] Step B3: Assign a value to the assignment variable three.
[0029] Assign the signal fun(a) to W, and assign the signals fun(b), fun(c), and fun(d) to Q to provide initial states for subsequent signal processing and operations.
[0030] Preferably, W is 0 and Q is 1; Step 4: Start signal processing: Determine whether a rising edge occurs on port 1 or a falling edge occurs on port 2; If a rising edge occurs at port 1 or a falling edge occurs at port 2, the process proceeds to step 5, thereby realizing the function of controlling the output signal according to the edge change of the input signal.
[0031] If there is no rising edge on port 1 or no falling edge on port 2, wait for a rising edge on port 1 or a falling edge on port 2; Step 5: Process fun(a), fun(b), fun(c), and fun(d), assign their concatenated and multiplied values to signal variable 1, and signal variable 1 outputs the result through port 3. This operation implements complex processing of internal signals and provides more possibilities for subsequent signal output and further calculations.
[0032] Step 6: While processing the signal, determine whether the assignment time of the signal variable 1 is greater than the set time threshold T; If timeout occurs, assign the output signal port 3 to X; If there is no timeout, assign the output signal port 3 to Y; Preferably, X is 0 or 1, and Y is 0 or 1.
[0033] This logical judgment enables the subroutine to respond differently according to different situations, enhancing the flexibility and adaptability of the program.
[0034] Step 7: Complete the writing of the subroutine main code and end the subroutine.
[0035] Embodiment 2: In some embodiments, as Figure 2 As shown in the figure, as a preferred embodiment of the present invention, a macro definition is implemented in a subroutine to specify the time unit conversion relationship: 1 point represents 200 ps. "Define" is a keyword in the macro definition. It defines a time measurement method: 1 point represents 200 ps (picoseconds) of actual time. This macro definition can be used in subsequent programs to conveniently represent time-related parameters such as time intervals and delays, improving code readability and maintainability.
[0036] For example, if a 200ps delay needs to be set in the program, you can use an expression related to 1pt to express it, without having to write the specific 200ps every time. When you need to modify the time accuracy, just modify it in Define.
[0037] Embodiment 3: In some embodiments, as Figure 2 As shown in FIG. 1 , as a preferred embodiment of the present invention, ** and ++ are self-defined operators of the present invention, ** represents a multiple relationship, ++ represents signal concatenation, + is a mathematical operator plus sign, and * is a mathematical operator multiplication sign; For example, this will assign the values of the signals fun(a), fun(b), fun(c), and fun(d) after specific operations and concatenation to signal variable 1. The operation steps are as follows: Repeat the signal fun(a) 100 times to get fun(a)**100; The signal fun(b) remains unchanged, and fun(b)**1 is obtained; Repeat the signal fun(c) 2000 times to get 2000*fun(c); Repeat the signal fun(d) 100 times to get 100*fun(d); Signals are concatenated in the order of fun(a)**100, fun(b)**1, 2000*fun(c), and 100*fun(d) to obtain the intermediate result. Finally, repeat this intermediate result 100 times to get the final result H, and assign H to signal variable 1.
[0038] The formula is as follows: H=[fun(a)**100++fun(b)**1++2000*fun(c)++100*fun(d)]**100; The statement of the present invention assigns the value H after splicing and multiple expansion of fun(a), fun(b), fun(c) and fun(d) to signal variable one, and then signal variable one outputs the result through port three.
[0039] Embodiment 4: In some embodiments, as Figure 3 As shown, as a preferred embodiment of the present invention, the present invention also provides a system for quickly generating signals, including a subroutine definition module, a port configuration module, a signal initialization module and a dynamic processing module; Subroutine definition module, used to define flexibly named subroutine blocks, execute time unit macro definition and signal voltage parameter setting; The port configuration module is used to set the input port that can be connected to the external signal source and the output port that outputs the processing results; Signal initialization module, used to create signal variables and assign initial values, and build basic data for signal processing; Dynamic processing module, used to perform input signal edge detection and timeout judgment, dynamically adjust the output signal according to the judgment results, and perform splicing and multiple expansion processing on internal signals; The subroutine definition module is the starting point: the subroutine definition module starts work, defines the flexibly named subroutine blocks, and performs the time unit macro definition and signal voltage parameter settings. After these settings are completed, the determined rules and parameters will serve as the basis for the work of subsequent modules and will be passed to the port configuration module and the dynamic processing module; for example, the time unit macro definition and signal voltage parameters will affect the processing and output of the signal in the dynamic processing module.
[0040] The Port Configuration Module takes over: After receiving relevant information from the Subroutine Definition Module, the Port Configuration Module sets the input ports that can connect to external signal sources and the output ports that can output processed results. Once the port configuration is complete, the port settings are provided to the Dynamic Processing Module, so that the Dynamic Processing Module knows which input ports to receive signals from and which output ports to output the processed signals.
[0041] The signal initialization module operates in parallel: while the subroutine definition module is running, it begins creating signal variables and assigning initial values, building the basic data for signal processing. This initialized signal variable data is then passed to the dynamic processing module, providing the initial state data for signal processing in that module.
[0042] Dynamic processing module core processing: As the core processing module, the dynamic processing module receives parameter setting information from the subroutine definition module, port setting information from the port configuration module, and signal variable initial data from the signal initialization module; Based on these inputs, the dynamic processing module performs input signal edge detection and timeout judgment, dynamically adjusts the output signal according to the judgment results, and splices and multiplies the internal signal. During the processing process, the dynamic processing module will continuously calculate and judge based on the input signal and internal signal status to generate the processing results.
[0043] Complete the running process of the subroutine and output the final generated signal through the output port (set by the port configuration module), thereby completing the entire signal generation task.
[0044] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements will not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the various embodiments of the present invention.
Claims
1. A method for rapidly generating a signal, characterized in that: The following steps are involved: Step 1: Subroutine definition and signal parameter setting; Step 2: The subroutine is provided with two input ports for receiving external signals, namely port 1 and port 2; There is an output port for outputting the signal processed by the subroutine, which is port three; Step 3: Initialize the signal and define signal variable 1, signal variable 2 and assignment variable 3, then assign a value to assignment variable 3; Step 4: Start signal processing: Determine whether a rising edge occurs on port 1 or a falling edge occurs on port 2; If a rising edge occurs on port 1 or a falling edge occurs on port 2, proceed to step 5; If there is no rising edge on port 1 or no falling edge on port 2, wait for a rising edge on port 1 or a falling edge on port 2; Step 5: Process the assignment variable 3, assign the concatenated and multiplied values to the signal variable 1, and the signal variable 1 outputs the result through port 3; Step 6: While processing the signal, determine whether the assignment time of the signal variable 1 is greater than the set time threshold T; If it is greater, assign port 3 to X and terminate the thread; If it is less than or equal to, assign port 3 to Y and return to step 5; Step 7: Complete the writing of the subroutine main code and end the subroutine.
2. The method for rapidly generating a signal according to claim 1, wherein: The steps for step one are as follows: Step A1, define a subroutine block named "name"; Step A2: Define a macro in the subroutine to specify the time unit conversion relationship as 1pt representing 200ps; Step A3: Set the maximum voltage value Vmax and the minimum voltage value Vmin of the signal in the subroutine.
3. The method for rapidly generating a signal according to claim 2, wherein: The maximum voltage value Vmax is 1V, and the minimum voltage value Vmin is -2V.
4. The method for rapidly generating a signal according to claim 1, wherein: The steps in step three are as follows: Step B1, start writing the main code of the subroutine; Step B2, define signal variable 1, signal variable 2 and assignment variable 3; Step B3: Assign a value to the assignment variable three.
5. The method for rapidly generating a signal according to claim 4, wherein: Define the assignment variables three as fun(a), fun(b), fun(c), and fun(d).
6. The method for rapidly generating a signal according to claim 5, wherein: Assign the signal fun(a) to W.
7. The method for rapidly generating a signal according to claim 5, wherein: Assign the signals fun(b), fun(c), and fun(d) to Q.
8. The method for rapidly generating a signal according to claim 6, wherein: W is 0 or 1, and Q is 0 or 1.
9. The method for rapidly generating a signal according to claim 1, wherein: X is 0 or 1.
10. The method for rapidly generating a signal according to claim 1, wherein: Y is 0 or 1.