USB awakening method and system supporting deep sleep of system

Abstract

The invention relates to the technical field of USB awakening, in particular to a USB awakening method and system supporting deep sleep of a system, and the method comprises the steps: controlling a pseudo-static random access memory to enter a self-refreshing power-saving mode and a power domain not to be powered off under the condition that the system meets a deep sleep entering condition; controlling the chip to enter a deep sleep state based on the power management module; under the condition that the chip enters the deep sleep state, polling and judging whether an awakening event exists or not, and generating and outputting an awakening instruction if the awakening event is continuously queried for multiple times; based on the wake-up instruction, controlling a target pin of the common input / output pin module to actively generate an interrupt signal so as to wake up the power management module; and in the awakening state of the power management module, the control chip quits the deep sleep state and enters the operation state. According to the method, the deep sleep USB awakening function is achieved through the software technology, and meanwhile the requirement for extremely low power consumption is met.

Description

Technical Field

[0001] The present invention relates to the technical field of USB wake-up, and in particular to a USB wake-up method and system supporting system deep sleep in the technical field of USB wake-up. Background Art

[0002] The market requires chips to support Universal Serial Bus Resume (USB Resume) wake-up from deep sleep, while also requiring extremely low power consumption during deep sleep. Related technologies do not support USB Resume during deep sleep in normal chip platforms. While USB Resume is supported in non-deep sleep modes, the power consumption is high and the current consumption differs significantly from market customer requirements.

[0003] To address the issue of USB wakeup issues during system deep sleep, related technologies have redesigned the Application Specific Integrated Circuit (ASIC) within the System-on-Chip (SoC). This approach connects the USB interrupt signal as a wakeup source to the chip's PMU module, waking the chip platform and meeting application requirements. However, waking the chip platform through the SoC's ASIC design is expensive and requires re-designing the ASIC chip design, verification, testing, and production cycle. This, coupled with significant chip cycles, is both costly and time-consuming. Summary of the Invention

[0004] The purpose of the present invention is to provide a USB wake-up method, system and storage medium that support system deep sleep. The technical solutions adopted are as follows: In a first aspect, an embodiment of the present invention provides a USB wake-up method supporting system deep sleep, the method comprising: When the USB wake-up system supporting system deep sleep meets the deep sleep entry condition, controlling the pseudo-static random access memory in the USB wake-up system supporting system deep sleep to enter a self-refresh power saving mode and the AP / AON chip subsystem power domain not to be powered off under the deep sleep condition; The power management module in the USB wake-up system supporting system deep sleep controls the corresponding chip to enter a deep sleep state; When the chip enters a deep sleep state, polling is performed to determine whether a wake-up event exists, and if a wake-up event is found multiple times in succession, a wake-up instruction is generated and output; Based on the wake-up instruction, controlling the target pin of the common input / output pin module to actively generate an interrupt signal to wake up the power management module; In the awakened state of the power management module, the chip is controlled to exit the deep sleep state and enter the running state through the pseudo-static random access memory and the common input and output pin module.

[0005] In a second aspect, an embodiment of the present invention provides a USB wake-up system supporting system deep sleep, the system comprising: The AP side code module is used to control the pseudo-static random access memory to enter the self-refresh power saving mode and the AP / AON chip subsystem power domain to not be powered off under the deep sleep condition when the system meets the deep sleep condition; Power management module, used to control the chip to enter deep sleep state; A polling module is used to poll and determine whether there is a wake-up event when the chip enters a deep sleep state, and if the wake-up event is queried multiple times in succession, generate and output a wake-up instruction; A common input / output pin module, configured to respond to the wake-up instruction and actively generate an interrupt signal based on a target pin of the common input / output pin module to wake up the power management module; The power management module is used to control the chip to exit the deep sleep state and enter the running state through the pseudo-static random access memory and the common input and output pin module in the awake state.

[0006] In a third aspect, a computer program product is provided, which includes: a computer program code, which, when executed on a computer, causes the computer to execute the method of the first aspect.

[0007] In a fourth aspect, a computer-readable storage medium is provided, which stores a computer program code. When the computer program code is run on a computer, the computer executes the method of the first aspect.

[0008] The present invention has the following beneficial effects: In a USB wakeup system supporting system deep sleep, when the system meets deep sleep conditions, the pseudo static random access memory (PSRAM) is controlled to enter a self-refresh power saving mode, and the AP / AON chip subsystem power domain is not powered down during deep sleep. This allows for extremely low system power consumption while supporting USB wakeup from deep sleep. By configuring a power management module to control the corresponding chip to enter a deep sleep state, system power consumption is reduced. Subsequently, polling is performed to determine whether a wakeup event has occurred. If a wakeup event is detected multiple times in a row, a wakeup command is generated and output. This continuous polling to determine whether a wakeup event has occurred avoids false triggering, thereby improving the accuracy of the query wakeup. The wakeup command then controls the target pin of the general input / output pin module to actively generate an interrupt signal to wake up the power management module. In this awakened state, the power management module controls the chip through the pseudo static random access memory and general input / output pin modules to exit the deep sleep state and enter the operating state. In this way, the wake-up function is supported by polling, which facilitates the expansion of polling objects and improves the accuracy of queries; by putting the chip in an extremely low power state and placing the polling state action in IRAM for execution, the PSRAM enters the self-refresh power saving mode, thereby achieving the system's extremely low power consumption target requirements; in this way, the system's deep sleep USB wake-up function can be achieved through software technology while also meeting the dual goals of extremely low power consumption requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In order to more clearly illustrate the technical solutions and advantages of the embodiments of the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the prior art descriptions. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0010] Figure 1 This is a schematic diagram of the implementation flow of a USB wake-up method supporting system deep sleep provided by an embodiment of the present invention; Figure 2 This is another implementation flowchart of a USB wake-up method supporting system deep sleep provided by an embodiment of the present invention; Figure 3 This is a schematic diagram of an implementation framework of a USB wake-up method supporting system deep sleep provided by an embodiment of the present invention; Figure 4 This is a schematic diagram of the structure of a USB wake-up system supporting system deep sleep provided by an embodiment of the present invention; Figure 5It is a structural diagram of a computer device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0011] To further illustrate the technical means and effectiveness of the present invention to achieve its intended purpose, the following, in conjunction with the accompanying drawings and preferred embodiments, describes in detail the specific implementation, structure, features, and effectiveness of a USB wake-up method for supporting system deep sleep, according to the present invention. In the following description, different references to "one embodiment" or "another embodiment" do not necessarily refer to the same embodiment. Furthermore, specific features, structures, or characteristics of one or more embodiments may be combined in any suitable manner.

[0012] In the description of the embodiments of the present invention, unless otherwise specified, " / " means or, for example, A / B can mean A or B: "and / or" in the text is only a description of the association relationship of associated objects, indicating that there can be three relationships, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, in the description of the embodiments of the present invention, "multiple" refers to two or more than two.

[0013] In the following, the terms "first" and "second" are used for descriptive purposes only and should not be understood to imply or suggest relative importance or implicitly indicate the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features.

[0014] Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.

[0015] The reason why the USB cannot wake up the chip is that the USB Data Positive (DP) and Data Minus (DM) are not connected to the chip's Power Management Unit (PMU) as wake-up signal sources. During deep sleep, the chip cannot detect the USB RESUME action, resulting in the USB host's RESUME action failing to wake up the chip platform.

[0016] Due to typical application scenarios, some SoCs do not require USB RESUME. To control costs and simplify chip and hardware design, these chips do not support the deep-sleep USB RESUME function in their ASIC chip designs. This makes these SoCs unable to be directly applied to application scenarios with USB RESUME requirements, such as consumer and industrial electronic products that need to support USB host control.

[0017] This problem was encountered when applying an industrial chip to a POS device that required USB RESUME support. Traditional solutions, requiring a complete redesign of the chip, would have not only resulted in high product costs but also failed to meet market demand for delivery time.

[0018] To address this issue, an embodiment of the present invention proposes a system low-power control solution that supports the USB wake-up function of the system in deep sleep. By designing and implementing a set of software technical solutions, the chip is put into deep sleep, and the RESUME function is supported by querying the status of USB DP and DM, thereby meeting the application scenario requirements of the product.

[0019] Compared with the chip redesign solution, this technical solution has the same power consumption level performance, but does not have the negative impact of the above chip design solution, which greatly saves various resource costs such as labor cost, time cost, opportunity cost, etc., so that the product can be quickly brought to the market. The embodiment of the present invention is not only applicable to AP-side chips, but also to CP-side chips; not only to the consumer electronics field, but also to the industrial electronics field, with rich applicable scenarios. At the same time, not only can specific USB registers be polled, but the polling objects can be expanded. For example, polling of other specific registers, RAM values, IO pin level status, etc. can be expanded. In addition, it is not only applicable to USB RESUME function scenarios, but can also be extended to other communication interface types, including but not limited to UART / I2C / SPI / PCI, and any other module wake-up solutions that do not connect the module signal to the chip PMU module, and are applicable to a wide range of application demand scenarios.

[0020] The following describes in detail a specific solution of a USB wake-up method supporting system deep sleep provided by the present invention in conjunction with the accompanying drawings. Figure 1 , which shows a schematic diagram of an implementation flow of a USB wake-up method supporting system deep sleep provided by an embodiment of the present invention, the method comprising: 101. When the USB wake-up system supporting system deep sleep meets the conditions for entering deep sleep, control the pseudo-static random access memory in the USB wake-up system supporting system deep sleep to enter a self-refresh power saving mode and the AP / AON chip subsystem power domain does not power off under the deep sleep conditions.

[0021] Here, the system determines whether it meets the conditions for entering deep sleep by analyzing whether it is in a low-power state, such as idle or non-task processing. If the system meets the conditions for entering deep sleep, the USB is connected, and the USB host has entered sleep mode, the USB enters the SUSPEND phase. Simultaneously, code jumps to IRAM, causing the pseudo-static random access memory to enter self-refresh power-saving mode. The AP / AON chip subsystem power domain is controlled to prevent power loss during these deep sleep conditions.

[0022] In some possible implementations, when the system meets the conditions for entering deep sleep, the application processor (AP) in the USB wake-up system that supports system deep sleep is controlled to jump to the on-chip random access memory to run, so that the pseudo-static random access memory enters the self-refresh power saving mode; and based on the input self-refresh configuration information, the pseudo-static random access memory is controlled to enter the self-refresh mode, so that the application processor turns off the clock of the coprocessor (CP) and controls the AP / AON chip subsystem power domain so that it does not power off in the deep sleep state.

[0023] Here, the self-refresh configuration information represents the configuration of the PSRAM. This information may include configuring memory parameters to provide a low-power operating mode. Low-power operating mode can be understood as a system in which all components operate without processing tasks. When the system meets the conditions for entering deep sleep, the AP-side code jumps to the on-chip IRAM, allowing the PSRAM to enter self-refresh power-saving mode. By configuring the PSRAM to enter self-refresh mode, the AP CPU (Central Processing Unit) shuts down the CP CPU clock, and the AP / AON chip subsystem power domain is configured to maintain power during deep sleep.

[0024] 102 , controlling a corresponding chip to enter a deep sleep state based on a power management module in the USB wake-up system supporting system deep sleep.

[0025] Here, the low-power mode configuration information is input to control the IDLE module (used to control the chip to enter idle and working modes) to put the corresponding chip into a deep sleep state. Among them, the low-power mode configuration information is used to configure the IDLE mode, thereby controlling the entire chip to enter a low-power mode, that is, a deep sleep state.

[0026] The low-power mode configuration information is configured in the IDLE module to put the chip into a deep sleep state. The IDLE module also sequentially shuts down the first clocks of the application processor and the coprocessor and switches the bus operating clock to a second clock. The first clock is a 26-megahertz (MHz) phase-locked loop (PLL) clock, and the second clock is a 32-kilohertz (kHz) clock.

[0027] 103 , when the chip enters a deep sleep state, polling is performed to determine whether a wake-up event occurs. If a wake-up event is detected multiple times in succession, a wake-up instruction is generated and output.

[0028] Here, after the control chip enters the deep sleep state, it checks whether there is a wake-up event through a loop operation until a wake-up event is generated multiple times in a row and a wake-up instruction is output. The wake-up instruction is used to start the system wake-up process.

[0029] In some possible implementations, the above step 103 may be implemented by the following steps 131 and 132 (not shown): 131 , when the chip enters a deep sleep state, query a preset polling object multiple times continuously based on the second clock whether there is a wake-up event.

[0030] The preset polling object can be various register types, such as USB monitoring registers, RAM values, and I / O pin status. For example, if the preset polling object is a USB monitoring register, the USB monitoring register is queried three times consecutively to determine whether a USB wakeup event has occurred. The host computer wakes up via the DP / DM signal on the USB line. This wakeup signal persists and can be polled by the ARM CPU.

[0031] 132. If no wake-up event is found, query again at a preset interval whether there is a wake-up event, until a wake-up event is found multiple times in succession, and generate the wake-up instruction.

[0032] If there's no USB wake-up event, the system waits for a preset period of time before continuing to query the USB monitoring register. If a USB wake-up event occurs, a wake-up command is generated and the USB wake-up process is executed. Because the PSRAM is in self-refresh power-saving mode, the ARM CPU polls based on a 32K clock, resulting in a very low CPU frequency and low IRAM power consumption, resulting in minimal power consumption. By repeatedly querying for the presence of a wake-up event, false positives caused by signal jitter are avoided, thereby improving wake-up accuracy. This achieves the system's ultra-low power requirements by maintaining the chip in an extremely low-power state and executing the ARM CPU polling state actions within the IRAM.

[0033] 104 . Based on the wake-up instruction, control the target pin of the common input / output pin module to actively generate an interrupt signal to wake up the power management module.

[0034] Here, after a wake-up event is polled, the target pin of the common input / output pin module is forced to actively generate an interrupt signal by configuring the input / output multiplexer (IOMUX) input / output pin register to wake up the power management module.

[0035] In some possible implementations, first, input forced wakeup configuration information is obtained. The forced wakeup configuration information may be a high-level voltage signal input into an IOMUX register, which is used to force a target pin of a general input / output pin module to actively generate an interrupt signal. The target pin may be a GPIO pin selected by configuring a GPIO module, and the pin is used as a wakeup source.

[0036] Then, based on the forced awakening configuration information, the target pin of the common input / output pin module is forced to actively generate an interrupt signal to awaken the power management module.

[0037] Here, by configuring the forced wake-up configuration information in the IOMUX register, the GPIO pin is forced to generate a wake-up interrupt, and the GPIO module generates an interrupt signal to wake up the IDLE module, so that the IDLE module exits the deep sleep state.

[0038] In some possible implementations, after the GPIO module actively generates an interrupt signal, the GPIO module responds to the interrupt signal by querying the status value of a status register in the power management module; if the status value of the status register meets a preset threshold, the power management module is determined to have exited the deep sleep state. For example, the IDLE module status register is queried, and if the status value of the status register is 0, indicating that the IDLE module has completely exited the deep sleep state, the IDLE module is determined to be awakened.

[0039] 105. In the awakened state of the power management module, the chip is controlled to exit the deep sleep state and enter the running state through the pseudo-static random access memory and the common input and output pin module.

[0040] In some possible implementations, the above step 105 can be performed by Figure 2 The steps shown achieve: 201 , in the awakened state of the power management module, controlling the chip to exit the deep sleep state based on the interrupt signal actively generated by the common input / output pin module.

[0041] Here, after polling for a wake-up event, the IOMUX register is configured to force the GPIO module's target pin to generate a wake-up interrupt. The GPIO module generates an interrupt signal to wake up the IDLE module, which then controls the chip to exit deep sleep.

[0042] 202 : Provide the first clock to the application processor and the coprocessor based on the power management module.

[0043] 203 : Switch the bus operation clock to the first clock to generate an interrupt signal.

[0044] Here, the IDLE module controls the chip to exit the deep sleep state, provides 26M / PLL clock to the AP CPU and CP CPU in sequence, switches the bus operation clock to the PLL clock, and generates an interrupt signal at the same time.

[0045] 204 , in response to the interrupt signal, control the chip to exit the deep sleep state and enter the running state based on the pseudo-static random access memory.

[0046] Here, after the IDLE module generates an interrupt signal, the chip completely exits the deep sleep state and operates normally by removing the forced interrupt state of the GPIO module and controlling the pseudo-static random access memory to exit the self-refresh mode.

[0047] In steps 201 to 204, after a wake-up event is detected, the IOMUX register is configured to force the GPIO pin to generate a wake-up interrupt. The GPIO module generates an interrupt signal, waking up the IDLE module. The IDLE module controls the chip to exit deep sleep. The 26M / PLL clock is sequentially provided to the AP / CP CPU, the bus operating clock switches to the PLL clock, and the IDLE module generates an interrupt signal. The IDLE module status register is queried. If the value is 0, it indicates that the IDLE module has completely exited deep sleep. The IOMUX register is then configured to remove the forced GPIO interrupt status. By configuring the PSRAM to exit forced self-refresh, the APCPU releases the CP CPU clock and sends an interrupt to wake up the CP CPU. Operation then jumps from the IRAM to the PSRAM, thereby exiting the deep sleep state and entering operation. This significantly saves various resource costs, including labor costs, time costs, and opportunity costs.

[0048] In some possible implementations, in response to an interrupt signal generated by an IDLE module, the general input / output pin register is configured based on the input forced interrupt configuration information so that the general input / output pin register ends the forced interrupt state of the general input / output pin module; for example, the forced interrupt configuration information is configured in the IOMUX register so that the IOMUX register can forcibly end the forced interrupt state of the general input / output pin module, that is, forcibly end the forced interrupt state on the GPIO target pin. Thereafter, based on the input mode configuration information, the pseudo-static random access memory is controlled to exit the self-refresh mode; for example, the pseudo-static random access memory is configured using the input mode configuration information so that the pseudo-static random access memory exits the self-refresh mode. The mode configuration information is used to adjust the operating mode of the pseudo-static random access memory. Finally, the application processor is used to release the clock of the coprocessor and send an interrupt wake-up signal to the coprocessor, and jump to the pseudo-static random access memory so that the chip exits the deep sleep state and enters the running state. For example, the AP CPU releases the CP CPU clock and sends an interrupt to wake up the CP CPU. At the same time, the AP side code jumps from the on-chip IRAM to the PSRAM to run, exiting the deep sleep state, allowing the chip to operate normally and provide the PLL / 26M clock normally. In this way, the embodiment of the present invention is not only applicable to the USB RESUME function scenario, but can also be expanded to other communication interface types, including but not limited to UART / I2C / SPI / PCI, and any other module wake-up scheme that does not connect the module signal to the chip PMU module, and is applicable to a wide range of application scenarios. It is also applicable not only to AP side chips, but also to CP side chips; not only to the consumer electronics field, but also to the industrial electronic product field, with a wide range of applicable scenarios.

[0049] In an embodiment of the present invention, in a USB wakeup system supporting system deep sleep, when the system meets the conditions for entering deep sleep, the pseudo-static random access memory (PSRAM) is controlled to enter a self-refresh power-saving mode, and the AP / AON chip subsystem power domain is not powered down under deep sleep conditions. This allows for extremely low system power consumption while supporting USB wakeup from system deep sleep. The power management module is configured to control the corresponding chip to enter a deep sleep state, thereby reducing system power consumption. Subsequently, polling is performed to determine whether a wakeup event has occurred. If a wakeup event is detected multiple times in a row, a wakeup instruction is generated and output. By repeatedly polling to determine whether a wakeup event has occurred, false triggering can be avoided, thereby improving the accuracy of the query wakeup. The wakeup instruction is then used to control the target pin of the general input / output pin module to actively generate an interrupt signal to wake up the power management module. In this way, when in the wakeup state, the power management module, through the pseudo-static random access memory and general input / output pin modules, controls the chip to exit the deep sleep state and enter the running state. In this way, the wake-up function is supported by polling, which facilitates the expansion of polling objects and improves the accuracy of queries; by putting the chip in an extremely low power state and placing the polling state action in IRAM for execution, the PSRAM enters the self-refresh power saving mode, thereby achieving the system's extremely low power consumption target requirements; in this way, the system's deep sleep USB wake-up function can be achieved through software technology while also meeting the dual goals of extremely low power consumption requirements.

[0050] The USB wake-up method supporting system deep sleep provided by the embodiment of the present invention can be achieved by Figure 3 The steps shown are implemented, where the system enters low-power sleep control process as follows: First, the system meets the conditions for entering deep sleep, and the USB enters SUSPEND.

[0051] Second, the AP side code jumps to the on-chip IRAM to run so that the PSRAM enters the self-refresh power saving mode.

[0052] Third, configure the PSRAM to enter self-refresh mode, the AP CPU turns off the CP CPU clock, and configure the AP / AON power domain to not power down in deep sleep state.

[0053] Fourth, configure the GPIO module and select the target pin of the GPIO module as the wake-up source.

[0054] When the system enters the low-power sleep control stage, during the execution of steps 1 to 4, the ASIC hardware status of the system is as follows: Figure 3 As shown, "The chip is operating normally and the PLL / 26M clock is provided normally."

[0055] Fifth, configure the IDLE module to enter deep sleep state.

[0056] At this time, the ASIC hardware state of the system is IDLE. The module control chip enters deep sleep state, and the PLL / 26M clock is shut down in sequence: AP / CP CPU, and the bus operation clock is switched to 32K clock.

[0057] Sixth, loop operation and wait for USB wake-up event to occur: Query the USB monitoring register to determine whether USB wakeup has occurred. If USB wakeup has not occurred, wait for a while and then query the USB monitoring register again. If USB wakeup has occurred after three consecutive queries, the USB wakeup process will be executed.

[0058] After polling for a wake-up event, the system enters the USB RESUME wake-up control process, which can be achieved through the following process: First, configure the IOMUX register to force the target pin of the GPIO module to generate a wake-up interrupt.

[0059] Second, the GPIO module generates an interrupt signal to wake up the IDLE module.

[0060] Here, after the GPIO module generates an interrupt signal and wakes up the IDLE module, the hardware status of the system is as follows: Figure 3 As shown, the IDLE module controls the chip to exit the deep sleep state, and the 26M / PLL clock is provided in sequence to: AP / CP CPU, the bus operation clock is switched to the PLL clock, and a wake-up interrupt is generated.

[0061] Third, query the IDLE module status register. If the value is 0, it means that the IDLE module has completely exited the deep sleep state.

[0062] Fourth, configure the IOMUX register to remove the forced interrupt status of GPIO.

[0063] Fifth, configure the PSRAM to exit the forced self-refresh state, the AP CPU releases the CP CPU clock, and sends an interrupt to wake up the CP CPU.

[0064] Sixth, jump to run on PSRAM.

[0065] Seventh, the chip exits deep sleep state and runs normally, and the PLL / 26M clock is provided normally.

[0066] In an embodiment of the present invention, a software solution is used to achieve the dual goals of implementing a deep-sleep USB RESUME function while simultaneously meeting market requirements for ultra-low power consumption. From a user's perspective, system functionality and power consumption are comparable to those achieved by directly waking the chip with USB hardware. The RESUME function is supported by polling specific USB registers through the ARM CPU. Furthermore, the polling targets can be expanded to include, for example, polling other specific registers, RAM values, IO pin levels, and so on. Furthermore, the chip design requires connecting the ultra-low-power clock 32K to the AP and bus clocks to ensure the chip operates in a low-power state. By placing the chip in an ultra-low-power state and routing the ARM CPU polling state actions to the IRAM, the PSRAM enters a self-refresh power-saving mode, ultimately achieving the system's ultra-low power consumption target. While the method provided in this embodiment of the present invention is applicable to the USB RESUME function solution, it can also be expanded to other communication interface types, including but not limited to UART, I2C, SPI, PCI, and any other module wakeup scheme that does not connect module signals to the chip's PMU.

[0067] The embodiment of the present invention provides a USB wake-up system that supports system deep sleep. Figure 4 , which shows a schematic structural diagram of a USB wake-up system supporting system deep sleep provided by an embodiment of the present invention. The system 400 includes: The AP side code module 401 is used to control the pseudo-static random access memory to enter the self-refresh power saving mode and the AP / AON chip subsystem power domain to not be powered off under the deep sleep condition when the system meets the deep sleep condition; The power management module 402 is used to control the chip to enter a deep sleep state; A polling module 403 is configured to poll to determine whether a wake-up event exists when the chip enters a deep sleep state, and generate and output a wake-up instruction if a wake-up event is found multiple times in a row; A common input / output pin module 404 is configured to, in response to the wake-up instruction, actively generate an interrupt signal based on a target pin of the common input / output pin module to wake up the power management module; The power management module 402 is used to control the chip to exit the deep sleep state and enter the running state through the pseudo-static random access memory and the common input and output pin module in the awake state.

[0068] In some possible implementations, the power management module 402 is further configured to enter a deep sleep state based on the input low power mode configuration information, so as to enable the corresponding chip to enter the deep sleep state.

[0069] In some possible implementations, the power management module 402 is further configured to shut down the first clocks of the application processor and the coprocessor, and control the bus operation clock to switch to the second clock.

[0070] In some possible implementations, the polling module 403 is also used to query the preset polling object based on the second clock whether there is a wake-up event when the chip enters a deep sleep state; if no wake-up event is found, query again whether there is a wake-up event at a preset interval until a wake-up event is found multiple times in a row, and generate the wake-up instruction.

[0071] In some possible implementations, the AP-side code module 401 is also used to control the application processor in the USB wake-up system that supports system deep sleep to jump to the on-chip random access memory to run when the system meets the conditions for entering deep sleep, so that the pseudo-static random access memory enters the self-refresh power saving mode; based on the input self-refresh configuration information, control the pseudo-static random access memory to enter the self-refresh mode, so that the application processor turns off the coprocessor clock and controls the AP / AON chip subsystem power domain not to power off in the deep sleep state.

[0072] In some possible implementations, the power management module 402 is further used to obtain input forced wake-up configuration information; based on the forced wake-up configuration information, force the target pin of the ordinary input and output pin module to actively generate an interrupt signal to wake up the power management module.

[0073] In some possible implementations, the power management module 402 is also used to control the chip to exit the deep sleep state based on the interrupt signal generated by the general input and output pin module when the power management module is awake; provide the first clock to the application processor and the coprocessor based on the power management module; switch the bus operating clock to the first clock to generate an interrupt signal; and in response to the interrupt signal, control the chip to exit the deep sleep state and enter the operating state based on the pseudo-static random access memory.

[0074] In some possible implementations, the power management module 402 is further used to respond to the interrupt signal and query the status value of the status register in the power management module; if the status value of the status register meets a preset threshold, it is determined that the power management module exits the deep sleep state.

[0075] In some possible implementations, the power management module 402 is also used to respond to the interrupt signal, configure the ordinary input / output pin register based on the input forced interrupt configuration information, so that the ordinary input / output pin register ends the forced interrupt state of the ordinary input / output pin module; based on the input mode configuration information, control the pseudo-static random access memory to exit the self-refresh mode; use the application processor to release the clock of the coprocessor and send an interrupt wake-up signal to the coprocessor, and jump to the pseudo-static random access memory, so that the chip exits the deep sleep state and enters the running state.

[0076] Optionally, the transmission medium may be a wired link (such as, but not limited to, coaxial cable, optical fiber, and digital subscriber line (DSL)) or a wireless link (such as, but not limited to, wireless Fidelity (WIFI), Bluetooth, and mobile device network). It should be noted that the system provided in the above embodiment is only illustrated by the division of the above functional modules. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the computer device can be divided into different functional modules to complete all or part of the functions described above. In addition, the method embodiments provided in the above embodiments belong to the same concept. The specific implementation process is detailed in the method embodiments and will not be repeated here.

[0077] Figure 5 Schematic diagram of the structure of a computer device provided by an embodiment of the present invention. Figure 5 As shown, the computer device 500 includes: a memory 501, a processor 502, and a computer program 503 stored in the memory 501 and running on the processor 502, wherein when the processor 502 executes the computer program 503, the computer device can execute any one of the USB wake-up methods that support system deep sleep described above.

[0078] In addition, an embodiment of the present invention also protects a system, which may include a memory and a processor, wherein the memory stores an executable program code, and the processor is used to call and execute the executable program code to perform a USB wake-up method that supports system deep sleep provided by an embodiment of the present invention. This embodiment can divide the system into functional modules according to the above method example. For example, it can correspond to each functional module, or two or more functions can be integrated into one processing module, and the above integrated module can be implemented in the form of hardware. It should be noted that the division of modules in this embodiment is schematic, which is only a logical function division, and there may be other division methods in actual implementation. It should be noted that all relevant contents of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module, and will not be repeated here.

[0079] It should be understood that the system provided in this embodiment is used to execute the above-mentioned USB wake-up method that supports system deep sleep, and therefore can achieve the same effect as the above-mentioned implementation method. In the case of an integrated unit, the system may include a processing module and a storage module. Specifically, when the system is applied to a device, the processing module can be used to control and manage the actions of the device. The storage module can be used to support the device in executing mutual program codes, etc. Specifically, the processing module can be a processor or a controller, which can implement or execute various exemplary logic blocks, modules and circuits described in conjunction with the contents disclosed in the present invention. The processor can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of digital signal processing (DSP) and a microprocessor, etc., and the storage module can be a memory.

[0080] In addition, the system provided by the embodiments of the present invention may be specifically a chip, component, or module. The chip may include a connected processor and memory; the memory is used to store instructions. When the processor calls and executes the instructions, the chip can execute the USB wake-up method for supporting system deep sleep provided by the above embodiment. This embodiment also provides a computer-readable storage medium storing computer program code. When the computer program code is executed on a computer, it causes the computer to execute the above-mentioned method steps to implement the USB wake-up method for supporting system deep sleep provided by the above embodiment.

[0081] This embodiment also provides a computer program product. When the computer program product is executed on a computer, it causes the computer to execute the above-mentioned steps to implement a USB wake-up method for supporting system deep sleep provided by the above embodiment. The system, computer-readable storage medium, computer program product, or chip provided in this embodiment are all used to execute the corresponding method provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects of the corresponding method provided above, and will not be repeated here. Through the description of the above embodiments, those skilled in the art will understand that for the convenience and simplicity of description, only the division of the above-mentioned functional modules is used as an example. In actual application, the above-mentioned functions can be distributed to different functional modules as needed, that is, the internal structure of the system is divided into different functional modules to complete all or part of the functions described above. In the embodiments provided by the present invention, it should be understood that the disclosed systems and methods can be implemented in other ways. For example, the system embodiments described above are merely illustrative. For example, the division of modules or units is only a logical function division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not implemented. On the other hand, the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, system or unit, which may be electrical, mechanical or other forms.

[0082] It should be noted that the above-mentioned order of the embodiments of the present invention is for description only and does not represent the advantages and disadvantages of the embodiments. The processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multi-task processing and parallel processing are also possible or may be advantageous. The various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referenced to each other. Each embodiment focuses on the differences from other embodiments. The above content is only a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of changes or replacements within the technical scope disclosed by the present invention, which should be covered within the scope of protection of the present invention.

Claims

1. A USB wake-up method supporting system deep sleep, characterized in that: The USB wakeup method for supporting a system in deep sleep mode includes: When the USB wake-up system supporting system deep sleep meets the deep sleep entry condition, controlling the pseudo-static random access memory in the USB wake-up system supporting system deep sleep to enter a self-refresh power saving mode and the AP / AON chip subsystem power domain not to be powered off under the deep sleep condition; The power management module in the USB wake-up system supporting system deep sleep controls the corresponding chip to enter a deep sleep state; When the chip enters a deep sleep state, polling is performed to determine whether a wake-up event exists, and if a wake-up event is found multiple times in succession, a wake-up instruction is generated and output; Based on the wake-up instruction, controlling the target pin of the common input / output pin module to actively generate an interrupt signal to wake up the power management module; In the awakened state of the power management module, the chip is controlled to exit the deep sleep state and enter the running state through the pseudo-static random access memory and the common input and output pin module.

2. The USB wakeup method supporting system deep sleep according to claim 1, characterized in that: The power management module in the USB wake-up system supporting system deep sleep controls the corresponding chip to enter a deep sleep state, including: Based on the input low power mode configuration information, the power management module is controlled to make the chip enter a deep sleep state.

3. The USB wakeup method supporting system deep sleep according to claim 2, characterized in that: When the chip enters a deep sleep state, polling is performed to determine whether a wake-up event exists. If a wake-up event is found multiple times in succession, before generating and outputting a wake-up instruction, the method further includes: The power management module is used to shut down the first clocks of the application processor and the coprocessor, and control the bus operation clock to switch to the second clock.

4. The USB wakeup method supporting system deep sleep according to claim 3, characterized in that: When the chip enters a deep sleep state, polling to determine whether there is a wake-up event, and if a wake-up event is found multiple times in a row, generating and outputting a wake-up instruction, including: When the chip enters a deep sleep state, querying a preset polling object multiple times based on the second clock whether there is a wake-up event; If no wake-up event is found, the system queries again at a preset interval whether a wake-up event exists, until a wake-up event is found multiple times in succession, and generates the wake-up instruction.

5. The USB wakeup method supporting system deep sleep according to claim 1, characterized in that: When the USB wake-up system supporting system deep sleep meets the deep sleep condition, controlling the pseudo-static random access memory in the USB wake-up system supporting system deep sleep to enter the self-refresh power saving mode and the AP / AON chip subsystem power domain not to be powered off under the deep sleep condition, including: When the system meets the deep sleep condition, controlling the application processor in the USB wake-up system supporting the system deep sleep to jump to the on-chip random access memory to execute, so that the pseudo-static random access memory enters the self-refresh power saving mode; Based on the input self-refresh configuration information, the pseudo-static random access memory is controlled to enter a self-refresh mode, so that the application processor turns off the clock of the coprocessor and controls the AP / AON power domain to not be powered off in the deep sleep state.

6. The USB wakeup method supporting system deep sleep according to claim 1, characterized in that: Before the power management module is in the awakened state, controlling the chip to exit the deep sleep state and enter the running state through the pseudo-static random access memory and the normal input / output pin module, the method further includes: Get the input forced wakeup configuration information; Based on the forced wake-up configuration information, the target pin of the common input / output pin module is forced to actively generate an interrupt signal to wake up the power management module.

7. The USB wakeup method supporting system deep sleep according to claim 6, characterized in that: In the awakened state of the power management module, controlling the chip to exit the deep sleep state and enter the running state through the pseudo-static random access memory and the common input and output pin module includes: In the awake state of the power management module, controlling the chip to exit the deep sleep state based on the interrupt signal generated by the common input and output pin module; providing a first clock to the application processor and the coprocessor based on the power management module; Switching the bus operating clock to the first clock to generate an interrupt signal; In response to the interrupt signal, the chip is controlled based on the pseudo-static random access memory to exit the deep sleep state and enter the running state.

8. The USB wakeup method supporting system deep sleep according to claim 7, characterized in that: The method further comprises: In response to the interrupt signal, querying a status value of a status register in the power management module; If the status value of the status register meets a preset threshold, it is determined that the power management module exits the deep sleep state.

9. The USB wakeup method supporting system deep sleep according to claim 7, characterized in that: The step of responding to the interrupt signal and controlling the chip to exit the deep sleep state and enter the running state based on the pseudo-static random access memory includes: In response to the interrupt signal, configuring the common input / output pin register based on the input forced interrupt configuration information so that the common input / output pin register ends the forced interrupt state of the common input / output pin module; Based on the input mode configuration information, controlling the pseudo-static random access memory to exit the self-refresh mode; The application processor is used to release the clock of the coprocessor and send an interrupt wake-up signal to the coprocessor, and jump to the pseudo-static random access memory, so that the chip exits the deep sleep state and enters the running state.

10. A USB wake-up system supporting system deep sleep, characterized in that: The USB wake-up system supporting system deep sleep includes: The AP side code module is used to control the pseudo-static random access memory to enter the self-refresh power saving mode and the AP / AON chip subsystem power domain to not be powered off under the deep sleep condition when the system meets the deep sleep condition; Power management module, used to control the chip to enter deep sleep state; A polling module is used to poll and determine whether there is a wake-up event when the chip enters a deep sleep state, and if the wake-up event is queried multiple times in succession, generate and output a wake-up instruction; A common input / output pin module, configured to respond to the wake-up instruction and actively generate an interrupt signal based on a target pin of the common input / output pin module to wake up the power management module; The power management module is used to control the chip to exit the deep sleep state and enter the running state through the pseudo-static random access memory and the common input and output pin module in the awake state.

Images