Autonomous power-on circuit, control method and control device after satellite separation from rocket

Abstract

This application provides an autonomous power-on circuit, its control method, and control device after satellite separation from the launch vehicle. The autonomous power-on circuit includes: a power bus, a satellite battery pack, a PMOS transistor, and an NMOS transistor. The power bus is connected to the satellite load equipment, the satellite battery pack, the PMOS transistor, and the NMOS transistor. The satellite battery pack is connected to both the PMOS transistor and the NMOS transistor. After separation, the PMOS transistor is turned on, and the satellite battery pack supplies power to the satellite load equipment via the PMOS transistor and the power bus, completing the connection of the satellite battery pack. After connection, the satellite load equipment turns on the NMOS transistor and turns off the PMOS transistor, and the satellite battery pack supplies power to the satellite load equipment via the NMOS transistor and the power bus. The autonomous power-on circuit has a simple and reliable structure, reduces the conduction loss of the PMOS transistor, improves energy transmission efficiency, and thus improves the overall reliability of the launch mission.

Description

Technical Field

[0001] This application relates to the field of satellite energy system technology, and in particular to an autonomous power-on circuit after satellite separation from rocket, its control method and control device. Background Technology

[0002] With the rapid development of the satellite industry, the design of energy systems has set forth the goals of increasing cost, power density, and efficiency. By designing a reasonable and feasible autonomous power-on circuit after satellite-launch separation, it is possible to achieve satellite active phase without power after docking with the launch vehicle, and satellite autonomous power-on after separation. This reduces the need for joint testing at the satellite launch site and is beneficial for the high power density, reliability, and safety design of satellite energy systems.

[0003] Existing technologies commonly use two types of satellite autonomous power-up circuits after separation from the launch vehicle. One type uses a P-channel metal-oxide-semiconductor (PMOS) transistor as a battery discharge switch. During separation, a limit switch opens, turning on the PMOS transistor to power the satellite autonomously. However, this method is limited to small satellite power systems with power ratings of only a few hundred watts due to the high conduction losses of the PMOS transistor. The other type uses an external delay circuit. A reset timing circuit monitors the time of separation, and once a set time condition is met, the satellite autonomous power-up circuit directly powers the satellite. However, this method has significant drawbacks. During the rocket's active phase, the system timer needs to be continuously powered in advance. If the rocket launch is delayed for other reasons, this pre-powering poses a significant risk to the overall operation of the satellite. Summary of the Invention

[0004] To address at least one problem in the prior art, this application proposes an autonomous power-on circuit, its control method, and control device after satellite-launch separation. The autonomous power-on circuit has a simple and reliable structure, requires no external delay circuit, reduces the conduction loss of PMOS transistors, improves energy transmission efficiency, and thus improves the overall reliability of the launch mission.

[0005] To address the aforementioned technical problems, this application provides the following technical solution:

[0006] In a first aspect, this application provides an autonomous power-on circuit after satellite separation from launch vehicle, comprising:

[0007] Power bus, satellite battery pack, PMOS transistor and N-channel metal-oxide-semiconductor field-effect transistor (NMOS transistor);

[0008] Power bus, satellite battery pack, PMOS transistors and NMOS transistors;

[0009] The power bus is connected to the satellite load equipment, the satellite battery pack, the PMOS transistor and the NMOS transistor respectively, and the satellite battery pack is connected to the PMOS transistor and the NMOS transistor respectively.

[0010] After the satellite separates from the rocket, the PMOS transistor is turned on, and the satellite battery pack supplies power to the satellite load equipment via the PMOS transistor and the power bus, thus completing the connection of the satellite battery pack.

[0011] After the satellite battery pack is connected, the satellite load device turns on the NMOS transistor and turns off the PMOS transistor, and the satellite battery pack supplies power to the satellite load device through the NMOS transistor and the power bus.

[0012] In one embodiment, the autonomous power-on circuit after satellite separation from rocket further includes: a relay and a satellite-rocket separation limit switch;

[0013] The source of the PMOS transistor is directly connected to the satellite battery pack, and the gate of the PMOS transistor is connected to the satellite battery pack via a relay, a satellite-rocket separation limit switch and the power bus connected in sequence.

[0014] After the star-rocket separation, the relay is in the ON state, the star-rocket separation limit switch is closed, and the PMOS transistor is turned on.

[0015] After the satellite battery pack is connected, the satellite load device turns on the NMOS transistor and disconnects the PMOS transistor by disconnecting the relay.

[0016] In one embodiment, the autonomous power-on circuit after satellite separation from rocket further includes: a diode;

[0017] The positive terminal of the diode is connected to the PMOS transistor, and the negative terminal of the diode is connected to the power bus.

[0018] In one embodiment, a circuit consisting of a resistor and a first capacitor connected in series is provided between the gate and drain of the PMOS transistor, and a second capacitor is provided between the gate and source of the PMOS transistor.

[0019] In one embodiment, the autonomous power-on circuit after satellite separation from rocket further includes a drive circuit connected to the NMOS transistor, wherein the satellite payload device turns on the NMOS transistor through the drive circuit.

[0020] Secondly, a control method for an autonomous power-on circuit after satellite-rocket separation, applied to the autonomous power-on circuit, the control method comprising:

[0021] After the satellite battery pack is connected, the NMOS transistor is turned on and the PMOS transistor is turned off. The satellite battery pack supplies power to the satellite load equipment via the NMOS transistor and the power bus.

[0022] The connection of the satellite battery pack means that after the satellite separates from the rocket, the PMOS transistor is turned on, and the satellite battery pack supplies power to the satellite load equipment via the PMOS transistor and the power bus.

[0023] In one embodiment, the control method further includes:

[0024] During the final power-on phase on the ground, the relay is activated, the star-rocket separation limit switch is in the open state, causing the PMOS transistor to disconnect.

[0025] In one embodiment, the control method further includes:

[0026] If it is determined that the voltage of the satellite battery pack has dropped to the over-discharge protection threshold, then the NMOS transistor is disconnected.

[0027] In one embodiment, after disconnecting the NMOS transistor, the method further includes:

[0028] When the voltage difference between the power bus and the satellite battery pack is greater than the on-state voltage of the body diode of the NMOS transistor, the satellite solar cells charge the satellite battery pack through the body diode of the NMOS transistor.

[0029] Thirdly, this application provides a control device for the autonomous power-on circuit after satellite separation from launch vehicle, comprising:

[0030] The power supply module is used to turn on the NMOS transistor and turn off the PMOS transistor after the satellite battery pack is connected. The satellite battery pack supplies power to the satellite load equipment through the NMOS transistor and the power bus.

[0031] The connection of the satellite battery pack means that after the satellite separates from the rocket, the PMOS transistor is turned on, and the satellite battery pack supplies power to the satellite load equipment via the PMOS transistor and the power bus.

[0032] Fourthly, this application provides an electronic device, including a memory, a processor, and a computer program stored in the memory, wherein the processor executes the computer program to implement the steps of the method.

[0033] Fifthly, this application provides a computer-readable storage medium storing a computer program / instructions that, when executed by a processor, implement the steps of the method.

[0034] Sixthly, this application provides a computer program product, including a computer program / instructions that, when executed by a processor, implement the steps of the method.

[0035] As can be seen from the above technical solution, this application provides an autonomous power-on circuit, its control method, and control device after satellite separation from the launch vehicle. The autonomous power-on circuit includes: a power bus, a satellite battery pack, a PMOS transistor, and an NMOS transistor; the power bus is connected to the satellite load equipment, the satellite battery pack, the PMOS transistor, and the NMOS transistor respectively; the satellite battery pack is connected to the PMOS transistor and the NMOS transistor respectively; after satellite separation from the launch vehicle, the PMOS transistor is turned on, and the satellite battery pack supplies power to the satellite load equipment via the PMOS transistor and the power bus, completing the connection of the satellite battery pack; after the connection of the satellite battery pack is completed, the satellite load equipment turns on the NMOS transistor and disconnects the PMOS transistor, and the satellite battery… The system supplies power to the satellite payload via the NMOS transistor and the power bus. The autonomous power-on circuit has a simple and reliable structure, requires no external delay circuit, reduces the conduction loss of the PMOS transistor, improves energy transmission efficiency, and thus improves the overall reliability of the launch mission. Specifically, the PMOS transistor is only used at the initial stage of power supply, and the power supply is then interrupted, which reduces the conduction loss of the PMOS transistor and improves energy transmission efficiency by utilizing the low conduction loss of the NMOS transistor. It also avoids reliance on power devices such as power relays and power limit switches, and reduces the size and weight of the autonomous power-on circuit while reducing the conduction loss of the PMOS transistor. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a first structural block diagram of the autonomous power-on circuit after the satellite separates from the launch vehicle in the embodiments of this application;

[0038] Figure 2This is a second structural block diagram of the autonomous power-on circuit after the satellite separates from the launch vehicle in the embodiments of this application;

[0039] Figure 3 This is a third structural block diagram of the autonomous power-on circuit after the satellite separates from the launch vehicle in the embodiments of this application;

[0040] Figure 4 This is the fourth structural block diagram of the autonomous power-on circuit after satellite separation from rocket in the embodiments of this application;

[0041] Figure 5 This is a schematic diagram of the autonomous power-on circuit after the satellite separates from the launch vehicle in an application example of this application;

[0042] Figure 6 This is a first flowchart illustrating the control method of the autonomous power-on circuit after satellite separation from rocket in the embodiments of this application;

[0043] Figure 7 This is a second flowchart illustrating the control method of the autonomous power-on circuit after satellite separation from rocket in the embodiments of this application;

[0044] Figure 8 This is a schematic diagram of the autonomous power-on circuit after the satellite separates from the launch vehicle in an application example of this application;

[0045] Figure 9 This is a structural block diagram of the control device for the autonomous power-on circuit after the satellite separates from the rocket in the embodiments of this application;

[0046] Figure 10 This is a schematic block diagram of the system configuration of an electronic device according to an embodiment of this application. Detailed Implementation

[0047] To enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0048] With the rapid development of satellite miniaturization technology, multi-satellite launches will become the primary means of uplink for microsatellites. Simultaneously, because small commercial satellites generally have limited battery capacity, they cannot meet the long-term power requirements of the satellite in the launch area and at the active end. Therefore, the active segment of the satellite rocket has changed from the traditional powered-on state to one where the rocket is de-energized and then autonomously powered after separation. Traditional battery pack discharge switch designs use power relays or contactors, weighing several hundred grams. Relay mechanical contacts typically have a lifespan of 100,000 cycles, while contactors often only last 5,000 to 10,000 cycles. Furthermore, the electric arc generated during load switching can easily corrode the contacts and even cause them to fail.

[0049] Based on this, in order to solve the problems existing in the prior art, this application provides an autonomous power-on circuit, its control method, and control device after satellite separation from the launch vehicle. In the design of the battery discharge switch, the low conduction loss of NMOS transistors can improve energy transmission efficiency. At the same time, adding a diode to the autonomous power-on PMOS circuit enables the circuit to have unidirectional conduction, which can overcome the problem of PMOS transistor burnout and short-circuit failure that may occur when charging the battery pack after disconnecting the discharge switch in an emergency of the energy system. For the first time, a scheme of PMOS transistors connected in parallel with NMOS transistors is used in the design of satellite battery pack discharge switch and autonomous access switch. Compared with traditional schemes, the weight can be reduced by at least 50%. At the same time, it can overcome the lifespan and reliability problems of relay mechanical contacts. Furthermore, for satellites of different power levels, only the number of MOS transistors needs to be changed, without adding relays or contactors, which will not significantly increase the system weight and has a significant energy density advantage. Through simple and reliable circuit design, the power bus can be autonomously connected after the microsatellite is separated from the rocket. Furthermore, more reliable designs are adopted in the control process for enabling autonomous connection and the battery charging path under abnormal power system conditions. This can avoid dependence on power devices and reduce the problem of high conduction loss of PMOS transistors. This has certain practical significance in improving energy transmission efficiency, reducing the size and weight of microsatellites, and improving the overall mission reliability.

[0050] To address the problems existing in the prior art, this application provides an autonomous power-on circuit, its control method, and control device after satellite separation from the launch vehicle. The autonomous power-on circuit incorporates an NMOS transistor. By utilizing the low conduction loss of the NMOS transistor, the conduction loss of the PMOS transistor can be reduced, improving energy transmission efficiency. It also overcomes the risks of increased satellite weight and size, or reduced overall launch mission reliability, resulting from reliance on power devices or timers in existing technologies. The simple and reliable circuit design enables autonomous access to the power bus after separation of the microsatellite from the launch vehicle. Furthermore, the control flow enabling the autonomous access state and the battery charging path under abnormal power system conditions employ more reliable designs. This has practical significance in reducing the size and weight of microsatellites and improving overall mission reliability.

[0051] The following examples illustrate this in detail.

[0052] To reduce the conduction loss of the PMOS transistor, improve energy transmission efficiency, and thus enhance the overall reliability of the launch mission, this embodiment provides an autonomous power-on circuit after the satellite separates from the launch vehicle, such as... Figure 1 As shown, the autonomous power-on circuit specifically includes the following components:

[0053] The system includes a power bus 1, a satellite battery pack 2, a PMOS transistor 3, and an NMOS transistor 4; the satellite battery pack and the power bus are both connected to the PMOS transistor; the power bus is connected to the satellite load equipment, the satellite battery pack, the PMOS transistor, and the NMOS transistor, respectively, and the satellite battery pack is connected to the PMOS transistor and the NMOS transistor, respectively.

[0054] After the satellite separates from the rocket, the PMOS transistor is turned on, and the satellite battery pack supplies power to the satellite load device via the PMOS transistor and the power bus, completing the connection of the satellite battery pack. After the connection of the satellite battery pack is completed, the satellite load device turns on the NMOS transistor and turns off the PMOS transistor, and the satellite battery pack supplies power to the satellite load device via the NMOS transistor and the power bus.

[0055] Specifically, the satellite load equipment may include onboard power distribution equipment and a satellite service computer, etc. After the satellite battery pack is connected, the service computer in the satellite load equipment can turn on the NMOS transistor and turn off the PMOS transistor. The current provided by the satellite battery pack can flow to the power bus through the PMOS transistor, and the power bus supplies power to the satellite load equipment. After a preset time, the service computer can turn on the NMOS transistor and turn off the PMOS transistor, and the current provided by the satellite battery pack can flow to the power bus through the NMOS transistor, and the power bus supplies power to the satellite load equipment. The preset time is very short and can be set according to actual conditions.

[0056] Specifically, the autonomous power-on circuit may include one or more PMOS transistors connected in parallel, and the autonomous power-on circuit may include one or more NMOS transistors connected in parallel. The number of PMOS transistors and NMOS transistors can be set according to the power demand after the satellite-rocket separation and the maximum power demand of the mission mode, respectively. This application does not impose any restrictions on this.

[0057] Furthermore, to improve the reliability of PMOS transistor turn-on and turn-off, such as Figure 2 As shown, the autonomous power-on circuit after satellite-rocket separation further includes: a relay 5 and a satellite-rocket separation limit switch 6; the source of the PMOS transistor is directly connected to the satellite battery pack, and the gate of the PMOS transistor is connected to the satellite battery pack via the relay, the satellite-rocket separation limit switch, and the power bus connected in sequence; after satellite-rocket separation, the relay is in the ON state, and the satellite-rocket separation limit switch is closed, causing the PMOS transistor to conduct; after the satellite battery pack is connected, the satellite load device turns on the NMOS transistor and disconnects the PMOS transistor by disconnecting the relay.

[0058] Specifically, the mechanical part of the satellite-rocket separation limit switch is controlled by the mechanical interface between the satellite and the separation device. When the satellite separates, the contacts of the satellite-rocket separation limit switch close. When the satellite separates, the relay remains in the ON state, and the satellite-rocket separation limit switch closes, which can turn on the PMOS transistor.

[0059] Furthermore, in order to improve the reliability of the autonomous power-on circuit, such as Figure 3 As shown, the positive and negative lines of the power bus can be connected via a filter capacitor 7.

[0060] Specifically, the relay can be connected to the gate of the PMOS transistor and one end of the satellite-rocket separation limit switch, respectively. The other end of the satellite-rocket separation limit switch is connected to the negative terminal 22 of the satellite battery pack via the negative line 12 of the power bus. The source of the PMOS transistor is connected to the positive terminal 51 of the satellite battery pack, and the drain of the PMOS transistor and the source of the NMOS transistor are both connected to the positive line 11 of the power bus. The drain of the NMOS transistor is connected to the positive terminal 21 of the satellite battery pack. The positive line of the power bus and the negative terminal of the satellite battery pack can be connected to the satellite load equipment. Figure 4 As shown, a sampling resistor 8 can be provided on the negative line of the power bus, and the satellite load device can be connected to the negative terminal of the satellite battery pack via the sampling resistor. The negative line of the power bus is grounded. The positive terminal of the satellite battery pack can supply current to the positive line of the power bus through the source and drain of the NMOS transistor. The positive line of the power bus supplies current to the satellite load device, and the satellite load device can supply current back to the negative terminal of the satellite battery pack.

[0061] Specifically, when there are multiple PMOS transistors connected in parallel, and multiple NMOS transistors connected in parallel, the relay can connect the gate of each PMOS transistor to one end of the satellite-rocket separation limit switch. The other end of the satellite-rocket separation limit switch is connected to the negative terminal of the satellite battery pack via the negative line of the power bus. The source of each PMOS transistor is connected to the positive terminal of the satellite battery pack, and the drain of each PMOS transistor is connected to the positive line of the power bus. The source of each NMOS transistor is connected to the positive line of the power bus, and the drain of each NMOS transistor is connected to the positive terminal of the satellite battery pack. During satellite-rocket separation, the relay remains on, the satellite-rocket separation limit switch closes, causing each PMOS transistor to conduct. The satellite battery pack supplies power to the satellite load device via each PMOS transistor and the power bus. The satellite load device drives each NMOS transistor to conduct, disconnects the relay, causing each PMOS transistor to disconnect. The satellite battery pack then supplies power to the satellite load device via each NMOS transistor and the power bus.

[0062] To ensure the circuit has unidirectional conductivity and avoid potential PMOS transistor burnout and short-circuit failure during battery charging after the discharge switch is disconnected in an emergency, such as... Figure 4 As shown, in one embodiment, the autonomous power-on circuit after satellite separation from rocket further includes: a diode 9; the positive terminal of the diode is connected to the PMOS transistor, and the negative terminal of the diode is connected to the power bus.

[0063] Specifically, if there are multiple PMOS transistors, the drain of each PMOS transistor can be connected to the positive line of the power bus via its corresponding diode. The anode of the diode is connected to the drain of its corresponding PMOS transistor, and the cathode of the diode is connected to the power bus. This avoids the situation where, after the NMOS transistor is turned off, some current flows through the PMOS transistor, and as the temperature rises, the on-state voltage drop decreases, and the current gradually increases, causing the PMOS transistor to burn out. The diode can be a Schottky diode, and the conduction direction of the Schottky diode is from the drain of the PMOS transistor to the positive line of the power bus.

[0064] In order to slow down the turn-on speed of the PMOS transistor and reduce the surge current, in one embodiment, a circuit consisting of a resistor and a first capacitor connected in series is provided between the gate and drain of the PMOS transistor, and a second capacitor is provided between the gate and source of the PMOS transistor.

[0065] Specifically, the first capacitor is the capacitance between the gate and drain of the PMOS transistor, and the second capacitor is the capacitance between the gate and source of the PMOS transistor.

[0066] To improve the reliability of NMOS transistor on / off control, in one embodiment, the autonomous power-on circuit after satellite-rocket separation further includes a driving circuit connected to the NMOS transistor, through which the satellite payload device turns on the NMOS transistor.

[0067] Specifically, the driving circuit can be a radiation-resistant, magnetically isolated integrated driving circuit. The driving circuit can be connected to a satellite payload device, which can then control the on / off state of the NMOS transistor.

[0068] To further illustrate this solution, this application provides an application example of an autonomous power-on circuit after satellite-rocket separation. In this application example, the autonomous power-on circuit includes: an autonomous PMOS circuit, a battery pack charging / discharging circuit, and a sampling and driving circuit. The autonomous PMOS circuit may include: satellite-rocket separation switches S1 and S2, relay K, autonomous PMOS transistors Q19-Q21, and diodes D1-D3. The battery pack charging / discharging circuit may include: a filter capacitor, NMOS transistors Q1-Q18, a battery pack, and a power bus. The sampling and driving circuit may include: a driving circuit and a sampling resistor. The function implemented by the satellite-rocket separation switches is equivalent to the function implemented by the aforementioned satellite-rocket separation limit switches. The function implemented by the autonomous PMOS transistors is equivalent to the function implemented by the aforementioned PMOS transistors.

[0069] like Figure 5As shown, one set of contacts of relay K is connected to the gate of PMOS transistors Q19-Q21 via a drive resistor and a filter capacitor. The other set of contacts is connected to the satellite-rocket separation limit switches (S1, S2). S1 and S2 are initially open, and are closed at the moment of separation and thereafter. The other end of the satellite-rocket separation limit switches is connected to the negative bus (i.e., the negative line of the power bus), and is connected to the negative battery terminal (i.e., the negative terminal of the satellite battery pack) via a sampling resistor R0. The PMOS transistors Q19-Q21 (…) Figure 5 Only two PMOS transistors are shown in the image. The sources of the three PMOS transistors are connected to the positive terminal of the battery (i.e., the positive terminal of the battery pack), and their drains are connected in series with diodes D1-D3 respectively. Figure 5 Only two diodes are shown in the image. After connecting to the positive line of the power bus, the positive terminals of diodes D1-D3 are connected to the drain of the self-connected PMOS transistor, and the negative terminals are connected to the positive line of the power bus; the NMOS transistors Q1-Q18 for charging and discharging the battery pack ( Figure 5 The diagram shows only two NMOS transistors connected in parallel. The drain of the NMOS transistors is connected to the positive terminal of the battery pack, and the source is connected to the positive line of the power bus. A bus filter capacitor C0 is connected in parallel between the positive and negative lines of the bus. The NMOS transistors for charging and discharging the battery pack use independent isolation drivers to achieve high-side driving.

[0070] The autonomous PMOS circuit consists of three P-channel MOSFETs connected in parallel, with two backup relays (K). The drive circuit uses a resistor divider. During the autonomous PMOS turn-on process, inrush current occurs. To suppress this inrush, a capacitor C2 is designed between the gate (G) and source (S) of each PMOS transistor. An RC snubber circuit, consisting of a resistor R and capacitor C1 connected in series, is designed between the gate (G) and drain (D) to slow down the PMOS transistor turn-on speed and reduce inrush current. Capacitor C1 can be considered equivalent to the first capacitor mentioned above, and C2 can be considered equivalent to the second capacitor mentioned above.

[0071] The battery pack discharge switch is implemented using 18 NMOS transistors connected in parallel. An anti-radiation magnetically isolated integrated drive circuit is used to control the on / off state of the NMOS transistors. The number of autonomously connected PMOS transistors, diodes, and battery pack charging / discharging NMOS transistors can be adjusted according to the power requirements after satellite-rocket separation and the maximum power requirements of the mission mode, respectively.

[0072] To reduce the conduction loss of PMOS transistors, improve energy transmission efficiency, and thus enhance the overall reliability of the launch mission, this application provides a control method for the autonomous power-on circuit after satellite-rocket separation. This method is applied to the autonomous power-on circuit, and the executing entity can be a satellite-based computer. The control device for the autonomous power-on circuit after satellite-rocket separation can be deployed within the satellite-based computer. Figure 6 As shown, the control method includes:

[0073] Step 101: After the satellite battery pack is connected, the NMOS transistor is turned on and the PMOS transistor is turned off. The satellite battery pack supplies power to the satellite load equipment via the NMOS transistor and the power bus. Here, connecting the satellite battery pack means that after the satellite separates from the rocket, the PMOS transistor is turned on and the satellite battery pack supplies power to the satellite load equipment via the PMOS transistor and the power bus.

[0074] Specifically, after satellite separation, the limit switch contacts close, allowing the gate of the PMOS transistor to connect to the negative line of the power bus. The gate voltage is pulled down from a floating state to a negative voltage, and the PMOS transistor turns on. After the PMOS transistor turns on, the positive terminal of the battery pack is connected to the positive line of the power bus through the source and drain of the PMOS transistor. The current provided by the battery pack flows from the source to the drain of the PMOS transistor, which can supply power to the initial power-on equipment such as the satellite's operational computer through the onboard power distribution equipment according to the satellite's initial power distribution status.

[0075] Specifically, the drive circuit can receive control signals from the satellite's onboard computer to drive the NMOS transistor to conduct. After the NMOS transistor is turned on, the PMOS transistor is short-circuited, and the onboard computer sends a relay disconnect command to disable the autonomous power-on function. The PMOS transistor is then turned off, which can prevent abnormal NMOS transistor control function during battery charging and discharging caused by limit switch failure. The preset duration can be set according to actual conditions, and this application does not limit it.

[0076] like Figure 7 As shown, in one embodiment, prior to step 101, the method further includes:

[0077] Step 001: During the final power-on phase on the ground, the relay is turned on, the star-rocket separation limit switch is in the open state, causing the PMOS transistor to disconnect.

[0078] Specifically, the last power-on phase on the ground can refer to the last time the ground is powered on; during the last power-on phase on the ground, the relay is turned on, the star-rocket separation limit switch remains open, which can turn off the PMOS transistor and enable the autonomous access function of the power bus.

[0079] In one embodiment, prior to step 001, the method further includes: disconnecting the relay during the satellite ground testing phase.

[0080] Specifically, during the satellite ground testing phase, disconnecting the relay can disable the autonomous access function of the power bus, thereby reducing the satellite launch site joint testing process.

[0081] To improve the overall reliability of the energy system in an emergency, in one embodiment, after step 101, the method further includes:

[0082] Step 102: If it is determined that the voltage of the satellite battery pack has dropped to the over-discharge protection threshold, then disconnect the NMOS transistor.

[0083] Specifically, the voltage of the satellite battery pack can be acquired in real time, and if the voltage drops to the over-discharge protection threshold, the NMOS transistor can be disconnected to prevent the battery pack from discharging.

[0084] To improve the overall reliability of the energy system in an emergency, in one embodiment, the method further includes the following after step 102:

[0085] When the voltage difference between the power bus and the satellite battery pack is greater than the on-state voltage of the body diode of the NMOS transistor, the satellite solar cells charge the satellite battery pack through the body diode of the NMOS transistor.

[0086] Specifically, the voltages of the power bus, the satellite battery pack, and the forward voltage of the body diode of the NMOS transistor can be obtained. Based on these voltages, it can be determined whether the voltage difference between the power bus and the satellite battery pack is greater than the forward voltage of the body diode of the NMOS transistor. After the satellite solar cells charge the satellite battery pack through the body diode of the NMOS transistor, if the voltage of the satellite battery pack rises to a normal level, the NMOS transistor is closed. The satellite solar cells can be connected to the body diode of the NMOS transistor.

[0087] To further illustrate this solution, and in conjunction with the application example of the autonomous power-on circuit after satellite-rocket separation described above, this application provides an application example of a control method for the autonomous power-on circuit after satellite-rocket separation, as detailed below:

[0088] Step 1: After separation from the rocket, the satellite's battery pack will autonomously connect to the launch vehicle.

[0089] Two parallel backup relays, K1 and K2, act as enable switches for the autonomous power-on circuit. During satellite ground testing, relays K1 and K2 are disconnected, disabling the autonomous power bus connection function. During the final ground power-on, relays K1 and K2 are activated. At this time, the gate of the autonomous connection PMOS transistor is connected to the negative power bus line via limit switches S1 and S2. The fixed points of the contacts of limit switches S1 and S2 are connected to the negative power bus line and remain disconnected until satellite-rocket separation, leaving the gate of the autonomous connection PMOS transistor floating and the PMOS off. In this state, the autonomous power bus connection function is enabled. The autonomous power-on circuit after satellite-rocket separation can be represented as the satellite power bus autonomous connection circuit. The aforementioned relay K can be composed of relays K1 and K2.

[0090] The mechanical parts of limit switches S1 and S2 are controlled by the mechanical interface between the satellite and the separation device. When the satellite separates, the contacts of limit switches S1 and S2 close, so that the gate of the autonomous PMOS transistor is connected to the negative line of the power supply bus. The gate voltage is pulled down from the floating state to the negative voltage, and the PMOS transistor is turned on. Because there are RC snubber circuits between the gate and source of the PMOS transistor and between the gate and drain, the conduction speed of the PMOS transistor is reduced, effectively suppressing the generation of surge current.

[0091] After the PMOS transistor is turned on autonomously, the positive terminal of the battery pack is connected to the positive line of the power bus through the source (S) and drain (D) terminals of the PMOS transistor. Current flows from the source (S) terminal of the PMOS transistor to the drain terminal. Based on the initial power distribution status of the satellite, power is supplied to the initial power-on equipment such as the satellite computer through the onboard power distribution equipment.

[0092] At this point, the satellite's battery pack has been autonomously connected after separation from the rocket. When in use, the number of autonomously connected PMOS transistors can be adjusted according to the initial power demand.

[0093] Step 2: Support the power needs of the satellite mission.

[0094] After the battery pack completes autonomous connection, the battery pack charging and discharging NMOS transistor driver receives the control signal from the satellite's onboard computer and drives the parallel NMOS transistors Q1-Q18 to conduct. After the battery pack charging and discharging NMOS transistors are turned on, the autonomous connection PMOS transistor is short-circuited. The onboard computer will send relays K1 and K2 to disconnect, thereby disabling the autonomous power-on function and turning off the autonomous connection PMOS transistor. This prevents abnormal control function of the battery pack charging and discharging NMOS transistors caused by limit switch failure.

[0095] At this point, the satellite power bus has been established, which can support the power demand during satellite missions. When in use, the number of NMOS transistors for charging and discharging the battery pack can be adjusted according to the maximum power consumption during satellite missions.

[0096] Step 3: Control of the autonomous power-on circuit under abnormal conditions.

[0097] In an emergency situation where the satellite's power system malfunctions, causing the battery voltage to drop to the over-discharge protection threshold and the battery charge / discharge NMOS transistor to disconnect, a stable and reliable charging path can be provided for the battery pack. During this emergency, the satellite's solar cells charge the battery pack. Once the battery pack voltage rises to a normal level, the battery charge / discharge NMOS transistor is closed again, exiting the over-discharge protection state. The function of the battery charge / discharge NMOS transistor is equivalent to that of the aforementioned NMOS transistor.

[0098] like Figure 5 As shown, the battery charging / discharging NMOS transistor and the autonomous access PMOS transistor are connected in parallel between the positive terminal of the battery pack and the positive line of the power bus. During normal operation, the battery pack discharges to the power bus through the NMOS transistor. When the satellite energy system enters an emergency state, the battery pack voltage drops and triggers the over-discharge protection function. The NMOS transistor then turns off to prevent the battery pack from discharging. When the voltage difference between the power bus and the battery pack is greater than the forward voltage of the NMOS transistor's body diode, the satellite solar cells can charge the battery pack through the NMOS transistor's body diode.

[0099] Since the autonomous access PMOS transistor is only used for battery access during the satellite's initial power-up, when satellite power consumption is relatively low, surface-mount devices in SMD packages were selected, and the thermal design of the PMOS transistor was based on the satellite's initial power consumption. The battery charging / discharging NMOS transistor and the autonomous access PMOS transistor are connected in parallel, as are the body diodes of the NMOS and PMOS transistors. The forward voltage drop of the body diode has a negative temperature coefficient. To prevent current from flowing through the PMOS transistor after the NMOS transistor disconnects in an emergency, and to avoid the PMOS transistor burning out due to the decreasing forward voltage drop and increasing current as temperature rises, the following measures are taken. Figure 8 As shown, in this application example, a Schottky diode is placed at the drain of the self-connected PMOS transistor. The diode conducts from the drain of the PMOS transistor towards the power bus, preventing the battery charging current from flowing through the diode mounted on the self-connected PMOS transistor. Figure 8 In the diagram, IRF5M5210 can represent a PMOS transistor, and JHCS10N56NAR1 can represent an NMOS transistor.

[0100] To reduce the conduction loss of PMOS transistors, improve energy transmission efficiency, and thus enhance the overall reliability of the launch mission, this application provides an embodiment of a control device for the autonomous power-on circuit after satellite-launch separation, which is used to implement all or part of the control method for the autonomous power-on circuit after satellite-launch separation. See [link to embodiment]. Figure 9 The control device for the autonomous power-on circuit after satellite separation from rocket specifically includes the following components:

[0101] Power supply module 01 is used to turn on the NMOS transistor and turn off the PMOS transistor after the satellite battery pack is connected. The satellite battery pack supplies power to the satellite load equipment through the NMOS transistor and the power bus. The connection of the satellite battery pack is completed after the satellite is separated from the rocket. The PMOS transistor is turned on and the satellite battery pack supplies power to the satellite load equipment through the PMOS transistor and the power bus.

[0102] The embodiments of the control device for the autonomous power-on circuit after satellite separation provided in this specification can be used to execute the processing flow of the embodiments of the control method for the autonomous power-on circuit after satellite separation described above. Its functions will not be repeated here, but can be referred to the detailed description of the embodiments of the control method for the autonomous power-on circuit after satellite separation described above.

[0103] Figure 10 This is a schematic diagram of the physical structure of an electronic device provided in an embodiment of the present invention, such as... Figure 10 As shown, the electronic device includes: a memory 1001, a processor 1002, and a computer program stored in the memory 1001 and executable on the processor 1002. When the processor 1002 executes the computer program, it implements the following method:

[0104] After the satellite battery pack is connected, the NMOS transistor is turned on and the PMOS transistor is turned off. The satellite battery pack supplies power to the satellite load equipment via the NMOS transistor and the power bus.

[0105] The connection of the satellite battery pack means that after the satellite separates from the rocket, the PMOS transistor is turned on, and the satellite battery pack supplies power to the satellite load equipment via the PMOS transistor and the power bus.

[0106] This embodiment discloses a computer program product, which includes a computer program that, when executed by a processor, implements the following method:

[0107] After the satellite battery pack is connected, the NMOS transistor is turned on and the PMOS transistor is turned off. The satellite battery pack supplies power to the satellite load equipment via the NMOS transistor and the power bus.

[0108] The connection of the satellite battery pack means that after the satellite separates from the rocket, the PMOS transistor is turned on, and the satellite battery pack supplies power to the satellite load equipment via the PMOS transistor and the power bus.

[0109] This embodiment provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the following method:

[0110] After the satellite battery pack is connected, the NMOS transistor is turned on and the PMOS transistor is turned off. The satellite battery pack supplies power to the satellite load equipment via the NMOS transistor and the power bus.

[0111] The connection of the satellite battery pack means that after the satellite separates from the rocket, the PMOS transistor is turned on, and the satellite battery pack supplies power to the satellite load equipment via the PMOS transistor and the power bus.

[0112] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0113] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0114] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0115] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0116] In the description of this specification, the references to terms such as "an embodiment," "a specific embodiment," "some embodiments," "for example," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0117] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. An autonomous power-on circuit after satellite separation from launch vehicle, characterized in that, include: Power bus, satellite battery pack, PMOS transistors and NMOS transistors; The power bus is connected to the satellite load equipment, the satellite battery pack, the PMOS transistor and the NMOS transistor respectively, and the satellite battery pack is connected to the PMOS transistor and the NMOS transistor respectively. After the satellite separates from the rocket, the PMOS transistor is turned on, and the satellite battery pack supplies power to the satellite load equipment via the PMOS transistor and the power bus, thus completing the connection of the satellite battery pack. After the satellite battery pack is connected, the satellite load device turns on the NMOS transistor and turns off the PMOS transistor. The satellite battery pack supplies power to the satellite load device through the NMOS transistor and the power bus. The autonomous power-on circuit after satellite separation from rocket also includes: a relay and a satellite-rocket separation limit switch; The source of the PMOS transistor is directly connected to the satellite battery pack, and the gate of the PMOS transistor is connected to the satellite battery pack via a relay, a satellite-rocket separation limit switch and the power bus connected in sequence. After the star-rocket separation, the relay is in the ON state, the star-rocket separation limit switch is closed, and the PMOS transistor is turned on; disconnecting the PMOS transistor includes disconnecting the PMOS transistor by disconnecting the relay.

2. The autonomous power-on circuit after satellite-rocket separation according to claim 1, characterized in that, Also includes: diode; The positive terminal of the diode is connected to the PMOS transistor, and the negative terminal of the diode is connected to the power bus.

3. The autonomous power-on circuit after satellite-rocket separation according to claim 1, characterized in that, The PMOS transistor has a circuit consisting of a resistor and a first capacitor connected in series between its gate and drain, and a second capacitor between its gate and source.

4. The autonomous power-on circuit after satellite-rocket separation according to claim 1, characterized in that, Also includes: A driving circuit is provided, which is connected to the NMOS transistor, and the satellite payload device turns on the NMOS transistor through the driving circuit.

5. A control method for an autonomous power-on circuit after satellite separation from launch vehicle, characterized in that, The control method, applied to the autonomous power-on circuit according to any one of claims 1 to 4, comprises: After the satellite battery pack is connected, the NMOS transistor is turned on and the PMOS transistor is turned off. The satellite battery pack supplies power to the satellite load equipment via the NMOS transistor and the power bus. The connection of the satellite battery pack means that after the satellite separates from the rocket, the PMOS transistor is turned on, and the satellite battery pack supplies power to the satellite load equipment via the PMOS transistor and the power bus.

6. The control method according to claim 5, characterized in that, Also includes: During the final power-on phase on the ground, the relay is activated, the star-rocket separation limit switch is in the open state, causing the PMOS transistor to disconnect.

7. The control method according to claim 5, characterized in that, Also includes: If it is determined that the voltage of the satellite battery pack has dropped to the over-discharge protection threshold, then the NMOS transistor is disconnected.

8. The control method according to claim 7, characterized in that, After disconnecting the NMOS transistor, the process further includes: When the voltage difference between the power bus and the satellite battery pack is greater than the on-state voltage of the body diode of the NMOS transistor, the satellite solar cells charge the satellite battery pack through the body diode of the NMOS transistor.

9. A control device for an autonomous power-on circuit after satellite separation from launch vehicle, characterized in that, include: The power supply module is used to turn on the NMOS transistor and turn off the PMOS transistor after the satellite battery pack is connected. The satellite battery pack supplies power to the satellite load equipment through the NMOS transistor and the power bus. The connection of the satellite battery pack means that after the satellite is separated from the rocket, the PMOS transistor is turned on, and the satellite battery pack supplies power to the satellite load equipment through the PMOS transistor and the power bus. After the star and rocket separate, the relay is in the ON state, the star and rocket separation limit switch is closed, and the PMOS transistor is turned on; disconnecting the PMOS transistor includes disconnecting the PMOS transistor by disconnecting the relay.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory, characterized in that, The processor executes the computer program to implement the steps of the method according to any one of claims 5 to 8.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program / instructions that, when executed by a processor, implement the steps of the method according to any one of claims 5 to 8.

12. A computer program product comprising a computer program / instructions, characterized in that, When the computer program / instructions are executed by the processor, they implement the steps of the method according to any one of claims 5 to 8.

Images