Printed circuit board surface defect detection method based on improved YOLOv8

By improving the YOLOv8 network architecture and adopting LDConv, BiFPN and Inner-CIOU loss functions, the problems of insufficient efficiency and accuracy in PCB inspection are solved, and efficient and accurate small defect detection is achieved.

CN120765623APending Publication Date: 2025-10-10HUBEI ENG UNIV
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Patent Information

Application Number
CN202510948699.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-10
Publication Date
2025-10-10

AI Technical Summary

Technical Problem

Existing PCB inspection methods have low detection efficiency and insufficient accuracy, especially in the detection of complex structures and small-size defects. In addition, existing deep learning models face challenges in processing speed and parameter quantity.

Method used

It adopts an improved YOLOv8 network architecture, replaces the convolution modules of the backbone and neck networks with linear deformable convolution (LDConv), adds a bidirectional feature pyramid network (BiFPN) and Inner-CIOU loss function, optimizes feature extraction and bounding box regression, and improves the detection accuracy and speed of the model.

Benefits of technology

It improves the ability to extract complex detail features of PCB surfaces, reduces the number of model parameters and inference time, significantly enhances the detection performance of small defect targets, and achieves high-precision and efficient defect detection.

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Abstract

The invention relates to an improved YOLOv8-based printed circuit board surface defect detection method, which comprises the following steps of S100, acquiring a PCB surface defect data set, cutting an original image in the PCB surface defect data set into an image with preset pixels, and generating a label file in a YOLO format through a labeling tool; s200, dividing the marked PCB surface defect data set into a training set, a verification set and a test set according to a manually preset proportion; s300, executing a YOLOv8 network architecture improvement process, and further obtaining an improved PCB surface defect detection model; and S400, training the training set by using the improved PCB surface defect detection model, and evaluating the detection precision, speed and parameter quantity of the model through the verification set and the test set. According to the method, the detection precision and speed of the model on the surface defects of the PCB are improved on the basis of reducing the network parameter quantity.
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Description

Technical Field

[0001] The present invention relates to the field of computer vision and industrial quality inspection technology, and in particular to a printed circuit board surface defect detection method based on improved YOLOv8. Background Art

[0002] As a core component of electronic devices, printed circuit boards (PCBs) are the foundation of the modern electronics industry. With the development of industries such as 5G communications, new energy vehicles, the Internet of Things, and artificial intelligence, the PCB industry is experiencing sustained growth. However, global economic uncertainty and regionalized industrial policies are also forcing the industry to adjust its supply chain and face cost pressures. As PCBs become increasingly complex, the industry demands higher precision and efficiency in defect detection.

[0003] The current mainstream PCB board inspection methods are: Manual Visual Inspection (MVI) and Automated Optical Inspection (AOI).

[0004] In recent years, deep learning, particularly convolutional neural networks (CNNs), has become popular for object detection in computer vision. Object detection techniques using deep learning are primarily categorized into two approaches: two-stage and one-stage. Two-stage detection involves generating potential candidate boxes and then classifying them using a CNN. Common algorithms include R-CNN and Faster R-CNN.

[0005] The defects of the prior art are: Manual visual inspection uses the human eye and a magnifying glass to observe the appearance of the PCB and check for soldering defects, scratches, etc. This inspection process is inefficient, relies on manual experience, and is prone to fatigue, leading to missed inspections. It is not suitable for high-precision, small-sized, complex PCBs.

[0006] Optical inspection uses high-resolution cameras to capture PCB images and uses algorithms to identify defects such as solder joints, shorts, and opens. However, its ability to identify defects on reflective surfaces and complex structures is limited, and it is easily affected by PCB material and lighting conditions, making it unable to detect internal structural defects.

[0007] While Faster R-CNN is accurate, its processing speed is slow due to its Region Proposal Network (RPN) component, posing challenges for real-time applications. Single-stage detection methods such as SSD and the YOLO family directly transform object localization into a regression problem without using candidate box sampling. Compared to multi-stage methods, these methods offer higher accuracy and faster training by capturing essential image features in a single step. However, because SSD relies on low-resolution features, it can struggle to detect small objects. Summary of the Invention

[0008] To address the above problems, the present invention provides a printed circuit board surface defect detection method based on an improved YOLOv8. Its purpose is to enhance the model's ability to extract complex and detailed features of the PCB surface, while maintaining detection accuracy while reducing the number of model parameters and inference time; enhance the information transfer between features of different scales, improve the detection performance of small defect targets; and accurately optimize the position and shape of the target bounding box.

[0009] In order to solve the above problems, the technical solution provided by the present invention is: A printed circuit board surface defect detection method based on improved YOLOv8 includes the following steps: S100. Obtain a PCB surface defect dataset, crop the original image in the PCB surface defect dataset into an image of preset pixels, and generate a label file in YOLO format using a labeling tool; S200. Dividing the annotated PCB surface defect dataset into a training set, a validation set, and a test set according to a manually preset ratio; S300. Execute the YOLOv8 network architecture improvement process to obtain an improved PCB surface defect detection model; S400. Use the improved PCB surface defect detection model to train the training set, and evaluate the detection accuracy, speed and parameter quantity of the model through the validation set and the test set.

[0010] Preferably, the defect types of the PCB surface defect dataset include missing holes, rat bites, open circuits, short circuits, strays and false copper.

[0011] Preferably, the division ratio of the training set, the validation set and the test set is 8:1:1.

[0012] Preferably, the YOLOv8 network architecture improvement process includes the following: replacing the standard convolution modules of the YOLOv8 backbone network and the neck network with linear deformable convolutions; adding a bidirectional feature pyramid network to the neck network; and using the Inner-CIOU loss function as the bounding box regression loss function.

[0013] Preferably, the linear deformable convolution feature extraction comprises the following steps: Sa100. Generate initial sampling coordinates based on the number of convolution kernel parameters; the initial sampling coordinates are expressed as follows: in: Used to represent the initial sampling coordinates; Used to characterize the initial shape; Used to characterize new sampling coordinates; Sa200. Obtain the offset of the corresponding kernel by convolution operation; the dimension of the offset is expressed as follows: Wherein: dim is used to represent the dimension; B is used to represent the batch size; N is used to represent the number of parameters of the convolution kernel; H is used to represent the height of the feature map; W is used to represent the width of the feature map; Sa300. Superimpose the offset to the initial sampling coordinates to generate new sampling coordinates corresponding to the convolution; Sa400. Dynamic features are extracted through bilinear interpolation.

[0014] Preferably, the optimized feature fusion of the bidirectional feature pyramid network comprises the following steps: Sb100. Construct a top-down and bottom-up bidirectional connection path; the top-down connection path is: starting from the highest layer feature map, upsampling the upper layer features by 2 times, then connecting them laterally with the next layer feature map, and finally adding the upsampled features and the laterally connected features element-by-element; the bottom-up connection path is: downsampling the lower layer features by 2 times, then connecting them laterally with the previous layer feature map, and finally adding the downsampled features and the laterally connected features element-by-element; Sb200. Perform weighted fusion on the shallow feature map, the middle feature map, and the deep feature map; the feature fusion formula of weighted fusion is expressed as follows: in: Used to represent learnable weights; Used to characterize constants used to prevent numerical instabilities; Used to represent the input feature map; Used to represent additional convolution operations; Used to represent the output feature map after weighted fusion; Sb300. Set the initial value of the learnable weight to 1.0; activate it through ReLU and ensure that the weight is non-negative, and then automatically adjust it through backpropagation.

[0015] Preferably, the Inner-CIOU loss function is expressed as follows: in: Used to characterize the Inner-CIOU loss function; Used to characterize the CIOU loss function; Used to characterize the intersection and concatenation ratio of predicted and true frames; Used to characterize the intersection-over-union ratio between the auxiliary bounding box and the true annotation box; Expressed as follows: in: Used to characterize the ground truth left box; Used to characterize the ground truth right box; Used to represent the ground truth upper box; Used to represent the left anchor point; Used to represent the right anchor point; Used to represent the upper anchor point; Used to represent the width of the real box; Used to represent the height of the real frame; Used to represent the width of the prediction box; Used to represent the height of the prediction box; The scaling factor used to represent the generated auxiliary bounding boxes.

[0016] Preferably, the scaling factor has a value range of [0.5, 1.5].

[0017] Preferably, in step S400, using the improved PCB surface defect detection model to train the training set comprises the following steps: Sc100. Use the SGD optimizer with an initial learning rate of 0.01, a momentum of 0.937, and a weight decay of 0.0005. Sc200. Set the batch size to 8 and the total number of training rounds to 150; Sc300. Mosaic data augmentation was enabled for the first 140 epochs of training and disabled for the last 10 epochs to stabilize training.

[0018] Preferably, the indicator of the detection accuracy of the evaluation model is the average precision, which is expressed as follows: Among them: TP is used to represent the number of correctly predicted targets; FP is used to represent the number of incorrectly predicted targets; FN is used to represent the number of incorrectly predicted targets; The speed of the model is evaluated in frames per second, which is expressed as follows: Among them: FPS is used to represent the number of frames per second; Latency is used to represent the time it takes for the network to predict an image; The parameter quantity of the evaluation model is measured in gigaflops per second; the FLOPs of the convolutional layer is expressed as follows: in: Used to characterize the width of the convolution kernel; Used to characterize the height of the convolution kernel; Used to characterize the number of input channels; Used to characterize the number of output channels; Used to represent the height of the output feature map; Used to represent the width of the output feature map; The Gigaflops is the sum of the FLOPs of all layers in the network divided by 10 9 The Gigafloating-point operations per second are used to measure the computational throughput of a model or hardware per unit time, reflecting the computational complexity of the algorithm.

[0019] Compared with the prior art, the present invention has the following advantages: 1. The linear variable convolution (LDConv) replaces the original convolution module in the YOLOv8 backbone network and the neck network. LDConv dynamically adjusts the convolution kernel weights based on changes in input features, better adapting to the diversity of PCB defects. This improves the model's ability to extract complex surface details, while maintaining detection accuracy while reducing model parameter count and inference time.

[0020] 2. A bidirectional feature pyramid network (BiFPN) was added to the neck network of YOLOv8. BiFPN effectively enhances the information transfer between features of different scales by optimizing the multi-scale feature fusion method and introducing learnable fusion weights, significantly improving the detection performance of small defect targets.

[0021] 3. Use Inner-CIoU instead of CIoU as the bounding box regression loss function. Inner-CIoU is an improved target detection box regression loss function that can more accurately optimize the position and shape of the target bounding box. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A schematic flow chart of the implementation steps of a specific embodiment of the present invention; Figure 2Schematic diagram of the improved YOLOv8 network model structure of a specific embodiment of the present invention; Figure 3 Schematic diagram of the LDConv module of a specific embodiment of the present invention; Figure 4 A schematic diagram of a BiFPN module according to a specific embodiment of the present invention; Figure 5 Schematic diagram of loss function parameters for a specific embodiment of the present invention; Figure 6 A schematic diagram of a model verification curve diagram of a specific embodiment of the present invention; Figure 7 Schematic diagram of a model PR curve diagram of a specific embodiment of the present invention. DETAILED DESCRIPTION

[0023] The present invention is further illustrated below with reference to specific examples. It should be understood that these examples are only used to illustrate the present invention and are not used to limit the scope of the present invention. After reading the present invention, modifications of various equivalent forms of the present invention made by those skilled in the art all fall within the scope defined by the claims attached to this application.

[0024] This invention application claims protection for a printed circuit board surface defect detection method based on improved YOLOv8, such as Figure 1 As shown, the following steps are included: S100. Obtain a PCB surface defect dataset, crop the original images in the PCB surface defect dataset into images with preset pixels, and generate a label file in YOLO format using a labeling tool.

[0025] S200. Divide the annotated PCB surface defect dataset into a training set, a validation set, and a test set according to a manually preset ratio.

[0026] S300. Execute the YOLOv8 network architecture improvement process to obtain an improved PCB surface defect detection model.

[0027] S400. Use the improved PCB surface defect detection model to train the training set, and evaluate the model's detection accuracy, speed, and parameter count through the validation set and test set.

[0028] It should be noted that the defect types in the PCB surface defect dataset include missing holes, rat bites, open circuits, short circuits, stray circuits, and counterfeit copper. The PCB surface defect dataset was downloaded from the official website of the Peking University Intelligent Robotics Open Laboratory. The original dataset was converted into a dataset that conforms to the YOLO data format.

[0029] In this specific embodiment, the ratio of the training set, validation set, and test set is 8:1:1, the total sample size is 10,668 images, and the original image size is cropped to 640×640 pixels. The data set is shown in Table 1: Table 1. Dataset details It should be noted that the YOLOv8 network architecture improvement process includes the following: replacing the standard convolution modules of the YOLOv8 backbone network and neck network with linear deformable convolutions; adding a bidirectional feature pyramid network to the neck network; and using the Inner-CIOU loss function as the bounding box regression loss function.

[0030] It should be noted that linear deformable convolution feature extraction includes the following steps: Sa100. Generate initial sampling coordinates based on the number of convolution kernel parameters; the initial sampling coordinates are expressed as follows: (1) in: Used to characterize the initial sampling coordinates; Used to characterize the initial shape; Used to characterize new sampling coordinates.

[0031] Sa200. Obtain the offset of the corresponding kernel through convolution operation; the dimension of the offset is expressed as follows: (2) Among them: dim is used to represent the dimension; B is used to represent the batch size; N is used to represent the number of parameters of the convolution kernel; H is used to represent the height of the feature map; W is used to represent the width of the feature map.

[0032] Sa300. Add the offset to the initial sampling coordinates to generate new sampling coordinates corresponding to the convolution.

[0033] Sa400. Dynamic features are extracted through bilinear interpolation.

[0034] It's important to note that, currently, standard convolution sampling locations are fixed, which means convolution can only extract local information and cannot capture information at other locations. Deformable convolution uses a convolution operation to learn an offset to adjust the initial sampling grid pattern, which to some extent compensates for the shortcomings of convolution operations. However, standard and deformable convolutions use regular sampling grids, which do not allow convolution kernels with an arbitrary number of parameters. Furthermore, as the size of the convolution kernel increases, the number of parameters also increases exponentially, which places a heavy strain on the hardware environment. Therefore, we introduce a new linear deformable convolution (LDConv).

[0035] It should be further explained that the focus of step Sa100 is to generate the corresponding sampling coordinates on the feature map for a convolution kernel with N parameters. The focus of step Sa200 is to generate different sample shapes for convolution at different locations in the feature map. Through the above steps of linear deformable convolution, LDConv can complete convolution operations of any size to extract features. The structure diagram of LDConv is shown in the figure below. Figure 3 shown.

[0036] It should be further explained that the linear deformable convolution (LDConv) replaces all convolution blocks except the first convolution module in the backbone of the YOLOv8 network architecture.

[0037] It should be noted that the optimized feature fusion of the bidirectional feature pyramid network includes the following steps: Sb100. Construct a top-down and bottom-up bidirectional connection path; the top-down connection path is: starting from the highest-level feature map, upsample the upper-level features by 2, then connect them laterally with the feature map of the next layer, and finally add the upsampled features and the laterally connected features element-by-element; the bottom-up connection path is: downsample the lower-level features by 2, then connect them laterally with the feature map of the previous layer, and finally add the downsampled features and the laterally connected features element-by-element.

[0038] Sb200. Perform weighted fusion on the shallow feature map, the middle feature map, and the deep feature map; the feature fusion formula of weighted fusion is expressed as follows: (3) in: Used to represent learnable weights; Used to characterize constants used to prevent numerical instabilities; Used to represent the input feature map; Used to represent additional convolution operations; Used to represent the output feature map after weighted fusion.

[0039] Sb300. Initialize the learnable weights to 1.0; activate them via ReLU and ensure they are non-negative, then automatically adjust them via backpropagation.

[0040] It needs to be further explained that the bidirectional feature pyramid network (BiFPN) is an improved feature pyramid network (FPN) specially designed for multi-scale feature fusion in object detection tasks. The main goal of BiFPN is to effectively fuse features of different scales while improving computational efficiency and enhancing detection accuracy. FPN uses a top-down structure to fuse high-level semantic information with low-level detailed information to improve detection accuracy. The traditional FPN structure usually consists of a top-down pathway and a bottom-up pathway. The former enlarges the size of high-level feature maps through upsampling and then fuses them with low-level feature maps. This way, the semantic information of high-level features can be combined with the detailed information of low-level features, helping the detector better handle multi-scale objects. The latter is to process features of different layers and then connect them horizontally to fuse the features. Convolution operations are usually used to adjust low-level features so that they have similar sizes to high-level feature maps for effective fusion. However, traditional FPN still has some problems in feature fusion, especially in how to effectively use features at different levels and balance features at different scales. BiFPN introduces bidirectional feature fusion, which simultaneously fuses features from top to bottom and bottom to top. The structure diagram of the bidirectional feature pyramid (BiFPN) network is shown in Figure 4 This mechanism can more comprehensively combine information at different levels, making the network's understanding of details and global information more in-depth. This bidirectional feature fusion improves the network's multi-scale perception ability, especially when facing objects with varying shapes, it can better capture features of objects at different scales. BiFPN also introduces a weighted fusion mechanism, which does not simply concatenate or average features when fusing them, but instead uses learnable weights to weight different feature maps. The purpose of this is to allow the network to automatically learn the importance of features at different levels, prioritizing features that are most helpful for the current task, thereby improving detection accuracy.

[0041] It needs to be further explained that the bidirectional feature pyramid network (BiFPN) replaces all connection modules in the neck network of the YOLOv8 network architecture.

[0042] It needs to be explained that the Inner-CIOU loss function is expressed as formula 4: (4) Where: is used to represent the Inner-CIOU loss function; is used to represent the CIOU loss function; Used to characterize the intersection and concatenation ratio of predicted and true frames; It is used to represent the intersection-over-union ratio between the auxiliary bounding box and the true annotation box.

[0043] According to formula 5: (5) in: Used to characterize the ground truth left box; Used to characterize the ground truth right box; Used to represent the ground truth upper box; Used to represent the left anchor point; Used to represent the right anchor point; Used to represent the upper anchor point; Used to represent the width of the real box; Used to represent the height of the real frame; Used to represent the width of the prediction box; Used to represent the height of the prediction box; The scaling factor used to represent the generated auxiliary bounding boxes.

[0044] In this specific embodiment, the scaling factor has a value range of [0.5, 1.5].

[0045] It should be further explained that in the task of detecting surface defects on PCB boards, the proportion of categories such as cold solder joints, breakpoints, and open circuits, which are characterized by small defect features, is significant. Detecting these tiny defect features is crucial for the overall detection task. Traditional loss functions only consider the IoU intersection between the predicted value and the true value bounding box when calculating. Therefore, by designing a suitable loss function, the accuracy of model detection can be improved. YOLOv8 uses DF Loss and CIoU Loss REF _Ref196082894 \r \h \* MERGEFORMAT

[26] Calculate the bounding box regression loss. CIoU uses a monotonic focus mechanism, which has a slow convergence rate. This may degrade the performance of the model. The calculation method of CIoU is expressed as Equation 6: (6) Where: b A and b B They represent the centers of the predicted true bounding box and the ground truth bounding box respectively, ρ represents the Euclidean distance between the two points, c represents the diagonal length of the minimum bounding rectangle of the predicted true bounding box and the ground truth bounding box; α is a balance parameter used to calculate the consistency of the aspect ratio between the predicted box and the target box.

[0046] It needs to be further pointed out that Inner-CIoU enhances the generalization of the existing loss function by using different scale auxiliary bounding boxes for different data sets and detectors, rather than adding a new loss term based on the original loss function. For small target scenes such as PCB surface defects, the scale factor ratio in InnerCIoU Loss is set to 1.1.

[0047] It needs to be pointed out that the training of the training set in step S400 using the improved PCB surface defect detection model includes the following steps: Sc100. Use the SGD optimizer, set the initial learning rate to 0.01, the momentum to 0.937, and the weight decay to 0.0005.

[0048] Sc200. Set the batch size to 8 and the total training rounds to 150.

[0049] Sc300. Enable Mosaic data augmentation in the first 140 training rounds, and disable it in the last 10 training rounds to stabilize training.

[0050] It needs to be pointed out that in the PCB defect detection model improved by the YOLOv8 algorithm, the original image is sent from the input end to the backbone network for feature extraction, and then the extracted features are fused in the neck network, and then the fused features are sent to the shallow feature detection head for detection to obtain the detection result.

[0051] It needs to be pointed out that the training of the training set using the improved model first builds an experimental environment, and the experimental environment information is shown in Table 2.

[0052] Table 2 Experimental environment information table It needs to be pointed out that the evaluation indicators used by the present application include mean average precision (mAP), gigaflops per second (GFLOPs), and frames per second (FPS). Among them, precision and recall are used as basic indicators, and F1 score and mAP calculated based on precision and recall are used as final evaluation indicators for measuring the recognition accuracy of the model.

[0053] It needs to be further pointed out that the indicator for evaluating the detection accuracy of the model is the average precision, which is expressed as formula 7: (7) Where: TP represents the number of correctly predicted targets; FP represents the number of incorrectly predicted targets; and FN represents the number of incorrectly predicted targets.

[0054] The indicator for evaluating the speed of the model is the frames per second, which is expressed as formula 8: (8) Among them: FPS is used to represent the number of frames per second; Latency is used to represent the time it takes for the network to predict an image.

[0055] The parameter count of the model is measured in gigaflops per second. The FLOPs of the convolutional layer is expressed as follows: (9) in: Used to characterize the width of the convolution kernel; Used to characterize the height of the convolution kernel; Used to characterize the number of input channels; Used to characterize the number of output channels; Used to represent the height of the output feature map; Used to represent the width of the output feature map.

[0056] A gigaflop is the sum of the FLOPs of all layers in the network divided by 10. 9 Giga floating-point operations per second is used to measure the computational throughput of a model or hardware per unit time, reflecting the computational complexity of the algorithm.

[0057] It's important to note that GFLOPs measures the complexity of a model or algorithm, while Params indicates model size. Generally, smaller Params and GFLOPs indicate lower computational requirements and are easier to build on lower-end devices with lower hardware performance requirements. FPS refers to the number of frames detected per second, which is affected by the algorithm's weight and the experimental hardware configuration.

[0058] Example 2: To verify the superior performance of LDConv in the improved YOLOv8 model, an ablation experiment was designed, with the experimental results shown in Table 3. LDConv-B replaces the Conv module in the backbone network with an LDConv module, while keeping the backbone network unchanged. LDConv-N replaces the Conv module in the neck network with an LDConv module, while keeping the convolution module in the backbone network unchanged. LDConv-A replaces the Conv modules in the backbone network and the neck network after the first Conv module with an LDConv module.

[0059] Table 3 Impact of LDConv on the model Example 3: This example is based on the PCB defect detection method based on the improved YoloV8 model proposed in Example 1. The same PCB dataset is used for training and testing. To verify the accuracy of the proposed improved algorithm, experiments were conducted by comparing it with other different detection methods: FASTR-CNN, SDD, YOLOV5s, YOLOV8n, and YOLOv8-LDBI. The experimental results are shown in Table 4. By comparing it with traditional methods, deep learning methods, and other YOLO series methods, although some individual evaluation indicators are slightly lower than those of other methods, this method has a relatively good performance in detection accuracy and overall network performance.

[0060] Table 4 Experimental comparison results with other detection methods Through the visualization analysis of the results, from the verification curve of the model, it can be seen that the relevant curve has good convergence, which proves that the present invention has high reliability in the process of PCB surface defect detection. The verification curve is as follows: Figure 6 As shown. Through the analysis of the precision recall (PR) curve of the model, it can be observed that the invention can still maintain a high detection accuracy under the condition of high recall rate. Figure 7 shown.

[0061] In summary, this paper addresses key challenges in PCB surface defect detection, such as the difficulty in extracting small target features, insufficient multi-scale information fusion, and limited bounding box regression accuracy. By proposing a detection method based on an improved YOLOv8, this method significantly enhances the detection capability of subtle defects while ensuring real-time performance, providing an effective solution for intelligent detection of PCB surface defects.

[0062] In the foregoing detailed description, various features are grouped together in a single embodiment to simplify the disclosure. This method of disclosure should not be interpreted as reflecting an intention that embodiments of the claimed subject matter require more features than are expressly recited in each claim. On the contrary, as reflected in the appended claims, the invention comprises less than all the features of any individual disclosed embodiment. The appended claims are hereby expressly incorporated into the detailed description, with each claim standing on its own as a separate preferred embodiment of the invention.

[0063] The foregoing description of the exemplary embodiments includes the best mode known to the inventors of practicing the application. Of course, variations on described embodiments can become apparent to those of ordinary skill in the art once the nature of the application has been disclosed herein. For instance, the application as disclosed can be used with other types of devices and systems. Accordingly, the scope of the application should be considered in terms of the following claims, by themselves and in conjunction with their full scope of equivalents.

[0064] The above description includes one or more examples of the embodiments. Of course, not all possible combinations of components or methods described above can be claimed as embodiments. One of ordinary skill in the art can recognize that modifications and permutations of the described embodiments are also possible. It is intended to claim as the application all such modifications and permutations that come within the scope of the following claims and their equivalents. Moreover, any and all terms used herein are intended to be interpreted in the broadest possible way in accordance with the principles of the present disclosure. Furthermore, the use of the terms "including", "containing", "comprising", "having" and the like are not intended to be limiting and are understood to mean "comprising" or "including but not limited to". Additionally, the use of the term "or" is intended to mean "non-exclusive or". That is, "A or B" means "A or B or both".

[0065] The above detailed description has shown, described, and pointed out the aspects of the application in connection with the illustrative embodiments. However, it will be understood that various changes and modifications can be made to the illustrated embodiments, by those skilled in the art, without departing from the scope of the application. Thus, the scope of the present application should not be limited to the particular described embodiments but should be given the full scope that the application fully deserves based on the disclosure herein.

Claims

1. A printed circuit board surface defect detection method based on improved YOLOv8, characterized by: The following steps are involved: S100. Obtain a PCB surface defect dataset, crop the original image in the PCB surface defect dataset into an image of preset pixels, and generate a label file in YOLO format using a labeling tool; S200. Dividing the annotated PCB surface defect dataset into a training set, a validation set, and a test set according to a manually preset ratio; S300. Execute the YOLOv8 network architecture improvement process to obtain an improved PCB surface defect detection model; S400. Use the improved PCB surface defect detection model to train the training set, and evaluate the detection accuracy, speed and parameter quantity of the model through the validation set and the test set.

2. The printed circuit board surface defect detection method based on improved YOLOv8 according to claim 1 is characterized in that: The defect types of the PCB surface defect dataset include missing holes, rat bites, open circuits, short circuits, strays, and false copper.

3. The printed circuit board surface defect detection method based on improved YOLOv8 according to claim 2, characterized in that: The division ratio of the training set, the validation set and the test set is 8:1:

1.

4. The printed circuit board surface defect detection method based on improved YOLOv8 according to claim 1, characterized in that: The YOLOv8 network architecture improvement process includes the following: replacing the standard convolution modules of the YOLOv8 backbone network and the neck network with linear deformable convolutions; adding a bidirectional feature pyramid network to the neck network; and adopting the Inner-CIOU loss function as the bounding box regression loss function.

5. The printed circuit board surface defect detection method based on improved YOLOv8 according to claim 4 is characterized in that: The linear deformable convolution feature extraction includes the following steps: Sa100. Generate initial sampling coordinates based on the number of convolution kernel parameters; the initial sampling coordinates are expressed as follows: in: Used to represent the initial sampling coordinates; Used to characterize the initial shape; Used to characterize new sampling coordinates; Sa200. Obtain the offset of the corresponding kernel through convolution operation; the dimension of the offset is expressed as follows: Wherein: dim is used to represent the dimension; B is used to represent the batch size; N is used to represent the number of parameters of the convolution kernel; H is used to represent the height of the feature map; W is used to represent the width of the feature map; Sa300. Superimpose the offset to the initial sampling coordinates to generate new sampling coordinates corresponding to the convolution; Sa400. Dynamic features are extracted through bilinear interpolation.

6. The printed circuit board surface defect detection method based on improved YOLOv8 according to claim 4, characterized in that: The optimized feature fusion of the bidirectional feature pyramid network includes the following steps: Sb100. Construct a top-down and bottom-up bidirectional connection path; the top-down connection path is: starting from the highest layer feature map, upsampling the upper layer features by 2 times, then connecting them laterally with the next layer feature map, and finally adding the upsampled features and the laterally connected features element-by-element; the bottom-up connection path is: downsampling the lower layer features by 2 times, then connecting them laterally with the previous layer feature map, and finally adding the downsampled features and the laterally connected features element-by-element; Sb200. Perform weighted fusion on the shallow feature map, the middle feature map, and the deep feature map; the feature fusion formula of weighted fusion is expressed as follows: in: Used to represent learnable weights; Used to characterize constants used to prevent numerical instabilities; Used to represent the input feature map; Used to represent additional convolution operations; Used to represent the output feature map after weighted fusion; Sb300. Set the initial value of the learnable weight to 1.0; activate it through ReLU and ensure that the weight is non-negative, and then automatically adjust it through backpropagation.

7. The printed circuit board surface defect detection method based on improved YOLOv8 according to claim 4, characterized in that: The Inner-CIOU loss function is expressed as follows: in: Used to characterize the Inner-CIOU loss function; Used to characterize the CIOU loss function; Used to characterize the intersection and concatenation ratio of predicted and true frames; Used to characterize the intersection-over-union ratio between the auxiliary bounding box and the true annotation box; Expressed as follows: in: Used to characterize the ground truth left box; Used to characterize the ground truth right box; Used to represent the ground truth upper box; Used to represent the left anchor point; Used to represent the right anchor point; Used to represent the upper anchor point; Used to represent the width of the real box; Used to represent the height of the real frame; Used to represent the width of the prediction box; Used to represent the height of the prediction box; The scaling factor used to represent the generated auxiliary bounding boxes.

8. The printed circuit board surface defect detection method based on improved YOLOv8 according to claim 7, characterized in that: The scaling factor has a value range of [0.5, 1.5].

9. The printed circuit board surface defect detection method based on improved YOLOv8 according to claim 1, characterized in that: In step S400, using the improved PCB surface defect detection model to train the training set includes the following steps: Sc100. Use the SGD optimizer with an initial learning rate of 0.01, a momentum of 0.937, and a weight decay of 0.0005. Sc200. Set the batch size to 8 and the total number of training rounds to 150; Sc300. Mosaic data augmentation was enabled for the first 140 epochs of training and disabled for the last 10 epochs to stabilize training.

10. The printed circuit board surface defect detection method based on improved YOLOv8 according to claim 9, characterized in that: The indicator of the detection accuracy of the evaluation model is the average precision, which is expressed as follows: Among them: TP is used to represent the number of correctly predicted targets; FP is used to represent the number of incorrectly predicted targets; FN is used to represent the number of incorrectly predicted targets; The speed of the model is evaluated in frames per second, which is expressed as follows: Among them: FPS is used to represent the number of frames per second; Latency is used to represent the time it takes for the network to predict an image; The parameter quantity of the evaluation model is measured in gigaflops per second; the FLOPs of the convolutional layer is expressed as follows: in: Used to characterize the width of the convolution kernel; Used to characterize the height of the convolution kernel; Used to characterize the number of input channels; Used to characterize the number of output channels; Used to represent the height of the output feature map; Used to represent the width of the output feature map; The Gigaflops is the sum of the FLOPs of all layers in the network divided by 10 9 The Gigafloating-point operations per second are used to measure the computational throughput of a model or hardware per unit time, reflecting the computational complexity of the algorithm.

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