An annealing method of an oxide film

By using a staged gradient heating annealing method, the problem of uneven release of residual stress in silicon oxide films was solved, which improved the reliability and etching stability of semiconductor devices and met the shrinkage requirements of advanced process technology.

CN120767192BActive Publication Date: 2026-04-14BEIJING INTEGRATED CIRCUIT EQUIPMENT INNOVATION CENTER CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
BEIJING INTEGRATED CIRCUIT EQUIPMENT INNOVATION CENTER CO LTD
Filing Date
2025-07-04
Publication Date
2026-04-14

AI Technical Summary

Technical Problem

In the existing technology, the furnace tube annealing process for chemical vapor deposition of silicon oxide thin films cannot release residual stress at different levels in stages, resulting in thermal stress concentration caused by differences in thermal expansion coefficients, producing microcracks or interface delamination defects, which affect the reliability of semiconductor devices and wet etching rate.

Method used

A staged gradient heating annealing method is adopted, including a stress release stage, a structural reorganization stage, a pre-densification stage, and a steady-state densification stage. By using different atmospheres and heating rates, residual stress is gradually released, thermal stress concentration is alleviated, and the thin film structure is optimized.

Benefits of technology

It enables the phased release of residual stress at different levels, reduces microcracks and interface delamination defects, improves the reliability and etching stability of semiconductor devices, and adapts to different shrinkage rate requirements.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application relates to the technical field of semiconductor annealing, in particular to an annealing method for an oxide film, which comprises the following stages: a stress release stage: under an inert gas atmosphere, heating to a first temperature at a first heating rate and keeping the temperature for a first time length; a structure recombination stage: under a mixed gas atmosphere of oxygen and inert gas, heating from the first temperature to a second temperature at a second heating rate and keeping the temperature for a second time length; a pre-densification stage: under the mixed gas atmosphere of oxygen and inert gas, heating from the second temperature to a third temperature at a third heating rate and keeping the temperature for a third time length; and a steady-state densification stage: under an inert gas atmosphere, heating from the third temperature to a fourth temperature at a fourth heating rate and keeping the temperature for a fourth time length. The annealing method for the oxide film provided by the application realizes the release of residual stresses of different levels in stages by adopting staged step heating, can relieve instantaneous thermal stress concentration, reduce defects, and improve the reliability of semiconductor devices.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor annealing technology, and more specifically, to an annealing method for oxide films. Background Technology

[0002] In semiconductor device manufacturing, Chemical Vapor Deposition (CVD) is a process that utilizes gaseous or vaporous substances to react at the gas phase or gas-solid interface to form solid deposits. CVD silicon oxide thin films are widely used in semiconductor devices as gate dielectric layers, passivation layers, or shallow trench isolation layers, and their performance is highly dependent on the annealing process. During CVD, the decomposition of precursors (such as silanes and TEOS) may leave residual hydrogen (H) in the form of Si-H or Si-OH, leading to poor film chemical stability. Annealing can remove free hydrogen (H), reconstruct the amorphous silicon oxide network (optimize Si-O-Si bond angles), thereby increasing film density and adjusting the thermal expansion coefficient to match the substrate through shrinkage. It can also reduce the density of defect states at the Si / SiO2 interface (such as dangling bonds), thus improving the electrical reliability of semiconductor devices.

[0003] In the furnace tube annealing process of chemical vapor deposition (CVD) silicon oxide thin films, the difference in film shrinkage rate caused by thermal stress release directly affects device performance and yield. However, related technologies typically employ single-temperature annealing, which has the following drawbacks: it cannot release residual stress at different levels; and the difference in thermal expansion coefficients caused by sudden temperature changes can superimpose instantaneous thermal stress, leading to stress concentration within the film and causing microcracks or interface delamination defects in the semiconductor device, thus reducing its reliability. Summary of the Invention

[0004] This invention aims to at least solve the technical problems existing in related technologies, and proposes an annealing method for oxide films that can release residual stress in stages; it can alleviate instantaneous thermal stress concentration, reduce defects such as microcracks or interface delamination, and improve the reliability of semiconductor devices.

[0005] This invention provides an annealing method for an oxide film, applicable to semiconductor devices, the annealing method comprising:

[0006] Stress relief stage: Under an inert gas atmosphere, the temperature is increased to a first temperature at a first heating rate and held for a first duration;

[0007] Structural restructuring stage: In a mixed gas atmosphere of oxygen and inert gas, the temperature is increased from the first temperature to the second temperature at a second heating rate, and held at that temperature for a second duration;

[0008] Pre-densification stage: In a mixed gas atmosphere of oxygen and inert gas, the temperature is increased from the second temperature to the third temperature at a third heating rate, and held at that temperature for a third duration.

[0009] Steady-state densification stage: Under an inert gas atmosphere, the temperature is increased from the third temperature to the fourth temperature at a fourth heating rate, and held at that temperature for a fourth duration.

[0010] Optionally, the structural reorganization stage is a stepped heating stage, which has N sub-heating stages, where N≥2.

[0011] Optionally, the sub-heating stage includes the following steps:

[0012] For each increase in sub-temperature, the temperature is maintained for a fifth time; wherein, the sub-temperature = (second temperature - first temperature) / N, N ≥ 2.

[0013] Optionally, the oxide film has a target shrinkage rate, and the third temperature is determined based on the target shrinkage rate.

[0014] Optionally, the target shrinkage rate includes a first shrinkage rate and a second shrinkage rate, and the third temperature includes a third lower limit temperature and a third upper limit temperature, wherein the third lower limit temperature corresponds to the first shrinkage rate and the third upper limit temperature corresponds to the second shrinkage rate;

[0015] Wherein, the first shrinkage rate is less than the second shrinkage rate, and the third lower limit temperature is less than the third upper limit temperature.

[0016] Optionally, the first shrinkage rate ranges from 4% to 6%, and the second shrinkage rate ranges from 7% to 9%.

[0017] The third lower limit temperature ranges from 600±5℃, and the third upper limit temperature ranges from 700±5℃.

[0018] Optionally, the target shrinkage rate satisfies the following formula:

[0019] ;

[0020] Where S is the target shrinkage rate, in %; T3 is the third temperature, in °C; t2 is the second temperature, in min; P is the actual pressure of the annealing chamber, in Torr; P0 is the initial pressure of the annealing chamber, in Torr; m1, m2, and m3 are process coefficients.

[0021] Optionally, the fourth duration includes a first time period and a second time period set sequentially. During the first time period, HCl gas is introduced into the inert gas atmosphere to remove metal impurities and residual H. During the second time period, an inert gas atmosphere is used.

[0022] Optionally, the first heating rate K1, the second heating rate K2, the third heating rate K3, and the fourth heating rate K4 satisfy: K1 < K4, K2 < K4, and K3 < K4.

[0023] Optionally, the first heating rate ranges from 2℃ / min to 3℃ / min; the first temperature ranges from 195℃ to 205℃; and the first duration ranges from 15min to 25min.

[0024] And / or, the second heating rate ranges from 3℃ / min to 5℃ / min; the second temperature ranges from 395℃ to 405℃; the second duration ranges from 30min to 45min; and the oxygen content in the oxygen and inert gas mixture is 4% to 6%.

[0025] And / or, the third heating rate ranges from 2℃ / min to 4℃ / min; the third temperature ranges from 595℃ to 705℃; and the third duration ranges from 20min to 40min.

[0026] And / or, the fourth heating rate ranges from 17℃ / min to 20℃ / min; the fourth temperature ranges from 1000℃ to 1200℃; and the fourth duration ranges from 30min to 60min.

[0027] The annealing method for oxide films provided by this invention, applied to semiconductor devices, has at least the following beneficial technical effects:

[0028] Firstly, a phased, stepped heating method is adopted to release residual stress at different levels in stages, thereby improving the uniformity of semiconductor devices.

[0029] Secondly, by adopting a phased, stepped heating method, the temperature will not change abruptly, which can alleviate the concentration of instantaneous thermal stress, reduce defects such as microcracks or interface delamination, and improve the reliability of semiconductor devices.

[0030] Thirdly, it promotes the release of free hydrogen, achieves efficient removal of free hydrogen, reduces porosity defects caused by hydrogen accumulation during subsequent high-temperature processing, and reduces or even avoids the formation of weak bonding regions between residual hydrogen and the film, thereby preventing abnormal increases in wet etching rate. Attached Figure Description

[0031] Figure 1 A schematic diagram of the annealing curve for the annealing method of silicon oxide thin film for semiconductor devices in related technologies;

[0032] Figure 2A schematic diagram of the annealing curve of an oxide film annealing method provided in an embodiment of the present invention;

[0033] Figure 3 This is a schematic diagram illustrating the removal of H in an annealing method for an oxide film provided in an embodiment of the present invention.

[0034] Explanation of reference numerals in the attached figures:

[0035] 01. Stress release stage; 02. Structural reorganization stage; 03. Pre-densification stage; 04. Steady-state densification stage; K1. First heating rate; T1. First temperature; t1. First duration; K2. Second heating rate; T2. Second temperature; t2. Second duration; K3. Third heating rate; T3. Third temperature; T 31 The third lower limit temperature; T 32 1. Third upper limit temperature; t3. Third duration; K4. Fourth heating rate; T4. Fourth temperature; t4. Fourth duration; ΔT. Sub-temperature; t5. Fifth duration; S. Target shrinkage rate; S1. First shrinkage rate; S2. Second shrinkage rate; P. Actual pressure in the annealing chamber; P0. Initial pressure in the annealing chamber. Detailed Implementation

[0036] Semiconductor annealing is a crucial step in semiconductor manufacturing, involving heating followed by slow cooling to alter the internal structure and properties of semiconductor materials. This process optimizes the atomic arrangement of the semiconductor material, thereby eliminating internal stress, reducing defects, and improving the material's stability and electrical properties. Residual stress, in particular, is the stress that exists within the material in equilibrium when no external factors are present. Residual stress is categorized into macroscopic densification residual stress and microscopic bonding residual stress. Low temperatures (200℃–500℃) can only release localized microscopic bonding residual stress, having limited effect on macroscopic densification residual stress. While high temperatures (>800℃) can release macroscopic densification residual stress, the microscopic bonding residual stress gradient remaining at low temperatures can exacerbate local defects at higher temperatures, leading to uneven internal stress distribution.

[0037] Please see Figure 1The annealing method for silicon oxide thin films of semiconductor devices in related technologies includes the following steps: placing the semiconductor device in a vertical furnace tube, with the silicon oxide thin film deposition thickness of the semiconductor device set to 100 nm to 500 nm; under an inert gas atmosphere, raising the temperature inside the furnace tube from room temperature to 500 °C at a heating rate of 3 °C / min to 5 °C / min, and then raising the temperature inside the furnace from 500 °C to a target temperature T0 at a heating rate of 1 °C / min to 2 °C / min; wherein, the target temperature T0 is based on the requirements of the semiconductor device. For density selection, under normal density conditions, the target temperature T0 ranges from 800℃ to 900℃, and under high density conditions, the target temperature T0 ranges from 1000℃ to 1100℃. The holding time at the target temperature T0 is 60min to 180min, and the holding time is adjusted based on the target shrinkage rate S of the semiconductor device. Then, the furnace temperature is cooled from the target temperature T0 to 500℃ at a cooling rate of less than or equal to 2℃ / min, and then the furnace temperature is naturally cooled from 500℃ to room temperature. This annealing method rapidly raises the furnace tube temperature from the room temperature to the target temperature T0, where T0 ≥ 800℃. However, this method has several drawbacks. First, it cannot release residual stress at different levels in stages; it can only release macroscopic densification residual stress. Second, the sudden temperature change causes a difference in the coefficient of thermal expansion, which superimposes instantaneous thermal stress, leading to stress concentration within the film and the formation of defects. These defects are prone to microcracks or interface delamination. For example, in high aspect ratio structures (aspect ratio > 40:1) of dynamic random access memory (DRAM), uneven stress release can easily lead to microcracks on the sidewalls, resulting in decreased device reliability. Third, low hydrogen diffusion efficiency leads to residual hydrogen forming weak bonding regions with the film, resulting in poor film chemical stability. In HF solution, these weakly bonded regions are preferentially etched, significantly increasing the wet etching rate (e.g., the etching rate of Flowable Chemical Vapor Deposition (FCVD) films in HF is 3 to 5 times that of traditional CVD films), impacting device integration processes.

[0038] To address the technical problem of single-temperature annealing methods for silicon oxide thin films in semiconductor devices, which fail to release residual stress at different levels in stages and cause stress concentration within the film, leading to defects and decreased reliability, this invention provides an annealing method for oxide films. This method primarily employs a staged gradient temperature annealing approach, which can release residual stress in stages. This alleviates instantaneous thermal stress concentration, reduces microcracks or interface delamination defects, and improves the reliability of semiconductor devices, as detailed below.

[0039] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the following description is provided in conjunction with the accompanying drawings. Figure 2 Specific embodiments of the present invention will be described in detail below.

[0040] Please see Figure 2 This invention provides an annealing method for an oxide film, applicable to semiconductor devices. The annealing method includes the following steps:

[0041] (1) Stress relief stage A: Under an inert gas atmosphere, such as argon, nitrogen, or other inert gases, air and oxygen in the annealing chamber can be effectively discharged to prevent oxidation of the semiconductor during the annealing process. The temperature is raised to a first temperature T1 at a first heating rate K1 and held for a first duration t1. In this stage, the temperature is raised to the first temperature T1 by heating, such as... Figure 3 As shown, this process promotes the release of physically adsorbed free hydrogen (such as H2 and H2O) in semiconductor devices, reducing porosity defects caused by hydrogen accumulation during subsequent high-temperature processing; and relaxes residual stress through internal local plastic deformation or local stress relaxation, thereby reducing local micro-bonding residual stress.

[0042] (2) Structural Reorganization Stage B: Under a mixed gas atmosphere of oxygen and inert gas, the temperature is increased from the first temperature T1 to the second temperature T2 at a second heating rate K2 and held for a second duration t2. During this stage, the semiconductor device undergoes microstructural reorganization, such as Si-O-Si network reconstruction, which initiates thin film densification. The shrinkage rate initially reaches 1% to 3% during this stage. The plastic deformation energy stored in the stress release stage A is released, which promotes lattice adjustment and defect repair. In addition, oxygen is introduced during this process, which can introduce oxygen atoms. These oxygen atoms react with defects in the semiconductor device to form oxides, thereby repairing lattice defects and improving the electrical performance of the semiconductor device.

[0043] (3) Pre-densification stage C: Under the mixed gas atmosphere of oxygen and inert gas, the temperature is increased from the second temperature T2 to the third temperature T3 at the third heating rate K3, and held for a third time t3; in this stage, the temperature is increased to accelerate the diffusion of oxygen atoms, further eliminate internal micropores and optimize the grain boundary distribution.

[0044] (4) Steady-state densification stage D: Under an inert gas atmosphere, the temperature is increased from the third temperature T3 to the fourth temperature T4 at a fourth heating rate K4, and held at this temperature for a fourth time t4. During this stage, the high temperature is maintained to promote grain boundary migration and macroscopic densification, release the residual stress of macroscopic densification, promote the semiconductor device to reach a steady-state densified structure, suppress subsequent deformation or stress rebound, and improve the mechanical properties of the semiconductor device.

[0045] The annealing method for oxide films provided in this invention, applied to semiconductor devices, has the following beneficial technical effects:

[0046] Firstly, a phased, stepped heating method is adopted to release residual stress at different levels in stages, thereby improving the uniformity of semiconductor devices. Specifically, in stress release stage A, local micro-bonding residual stress is released; in structural reorganization stage B, oxygen is introduced to react with defects in the semiconductor device, forming oxides to repair lattice defects; in pre-densification stage C, the temperature continues to rise, accelerating the diffusion of oxygen atoms, further eliminating internal micropores and optimizing grain boundary distribution; in steady-state densification stage D, macroscopic densification residual stress is released.

[0047] Secondly, by adopting a phased, stepped heating method, the temperature will not change abruptly, which can alleviate the concentration of instantaneous thermal stress, reduce defects such as microcracks or interface delamination, and improve the reliability of semiconductor devices.

[0048] Thirdly, it promotes the release of free hydrogen, achieves efficient removal of free hydrogen, reduces porosity defects caused by hydrogen accumulation during subsequent high-temperature processing, and reduces or even avoids the formation of weak bonding regions between residual hydrogen and the film, thereby preventing abnormal increases in wet etching rate.

[0049] Please see Figure 2 In this embodiment of the invention, the structural recombination stage B is a stepped heating stage, which has N sub-heating stages, where N ≥ 2. For example, N can be 2, 3, 4, or other numbers. Figure 2 As shown, N is 4. With this setting, during the structural reorganization stage, the temperature is gradually increased in stages. On the one hand, this avoids lattice abrupt changes caused by sudden temperature variations, thus homogenizing the temperature gradient inside the semiconductor device, effectively reducing thermal stress concentration, and thereby reducing the risk of cracking in the semiconductor device. This is suitable for the uniform densification of high aspect ratio structures. On the other hand, as the temperature rises, surface defects are repaired first, followed by deep lattice damage, achieving sequential repair of defects at different energy levels.

[0050] Please see Figure 2 In this embodiment of the invention, the sub-heating stage includes the following steps:

[0051] For each step of heating to a sub-temperature ΔT, a fifth holding time t5 is applied; where sub-temperature ΔT = (second temperature T2 - first temperature T1) / N, N ≥ 2. For example, the second temperature T2 is 400℃, the first temperature T1 is 200℃, N is 4, and sub-temperature ΔT is 50℃. This setup, with each sub-heating stage held for a fifth holding time t5, allows the film to gradually release local residual stress in a metastable state; the stepped heating promotes local SI-O network reorganization, reducing porosity; and the stepped heating avoids the formation of micropores due to rapid H escape.

[0052] In this embodiment of the invention, the oxide film has a target shrinkage rate S, and the third temperature T3 is determined based on the target shrinkage rate S.

[0053] In this embodiment of the invention, the target shrinkage rate S includes a first shrinkage rate S1 and a second shrinkage rate S2, and the third temperature T3 includes a third lower limit temperature T. 31 and the third upper limit temperature T 32 The third lower limit temperature T 31 Corresponding to the first shrinkage rate S1, the third upper limit temperature T 32 Corresponding to the second shrinkage rate S2; wherein, the first shrinkage rate S1 is less than the second shrinkage rate S2, and the third lower limit temperature T 31 Less than the third upper limit temperature T 32 This setup allows for adjustment of the shrinkage rate by setting different temperatures, thus meeting the varying shrinkage rates required for oxide films in semiconductor devices during advanced manufacturing processes.

[0054] In this embodiment of the invention, the first shrinkage rate S1 ranges from 4% to 6%, and the second shrinkage rate S2 ranges from 7% to 9%.

[0055] Third lower limit temperature T 31 The value range is 600±5℃, and the third upper limit temperature T 32 The value range is 700±5℃.

[0056] In this embodiment of the invention, the target shrinkage rate S satisfies the following formula:

[0057] ;

[0058] Where S is the target shrinkage rate, in %; T3 is the third temperature, in °C; t2 is the second duration, in min; P is the actual pressure in the annealing chamber; P0 is the initial pressure in the annealing chamber; m1, m2, and m3 are process coefficients, for example, m1=0.024, m2=0.78, and m3=1.2.

[0059] In this embodiment of the invention, the fourth duration t4 includes a first time period and a second time period set sequentially. During the first time period, HCl gas is introduced into an inert gas atmosphere to remove metal impurities and residual H; during the second time period, an inert gas atmosphere is used. This arrangement allows the introduction of HCl gas, which can react with the hydroxyl groups on the film surface, reducing interfacial charge trapping.

[0060] In this embodiment of the invention, the first heating rate K1, the second heating rate K2, the third heating rate K3, and the fourth heating rate K4 satisfy: K1 < K4, K2 < K4, and K3 < K4. This configuration ensures that the first heating rate K1 is relatively low during the stress release stage, guaranteeing a smooth escape of free hydrogen; the second heating rate K2 is relatively low during the structural reorganization stage, enabling lattice order adjustment and defect repair; and the pre-densification stage...

[0061] The third heating rate K3 is relatively low, which initially causes pore shrinkage and avoids premature pore closure; the fourth heating rate K4 in the steady-state densification stage is relatively high, which can increase the atomic diffusion rate, thereby accelerating grain boundary migration and promoting pore closure.

[0062] In this embodiment of the invention, the first heating rate K1 ranges from 2℃ / min to 3℃ / min; the first temperature T1 ranges from 195℃ to 205℃; and the first duration t1 ranges from 15min to 25min. Preferably, the first heating rate K1 ranges from 2℃ / min to 3℃ / min; the first temperature T1 ranges from 198℃ to 202℃; and the first duration t1 ranges from 20min to 25min.

[0063] In this embodiment of the invention, the second heating rate K2 ranges from 3℃ / min to 5℃ / min; the second temperature T2 ranges from 395℃ to 405℃; the second duration t2 ranges from 30min to 45min; and the proportion of oxygen in the mixed atmosphere of oxygen and inert gas is 4% to 6%. Preferably, the second heating rate K2 ranges from 4℃ / min to 5℃ / min; the second temperature T2 ranges from 398℃ to 402℃; and the second duration t2 ranges from 35min to 45min.

[0064] In this embodiment of the invention, the third heating rate K3 ranges from 2℃ / min to 4℃ / min; the third temperature T3 ranges from 595℃ to 705℃; and the third duration t3 ranges from 20min to 40min. Preferably, the second heating rate K2 ranges from 2℃ / min to 3℃ / min; the second temperature T2 ranges from 598℃ to 702℃; and the second duration t2 ranges from 25min to 35min.

[0065] In this embodiment of the invention, the fourth heating rate K4 ranges from 17℃ / min to 20℃ / min; the fourth temperature T4 ranges from 1000℃ to 1200℃; and the fourth duration t4 ranges from 30min to 60min. Preferably, the fourth heating rate K4 ranges from 19℃ / min to 20℃ / min; the fourth temperature T4 ranges from 1100℃ to 1200℃; and the fourth duration t4 ranges from 50min to 60min.

[0066] To further illustrate the present invention, the annealing method for an oxide film provided by the present invention will be described in more detail below with reference to Embodiment 1, Embodiment 2 and Embodiment 3, but these should not be construed as limiting the scope of protection of the present invention.

[0067] Example 1

[0068] Referring to Table 1, an annealing method for an oxide film, applied to semiconductor devices, includes the following steps:

[0069] (1) Stress relief stage A: Under an inert gas atmosphere, the temperature is raised to the first temperature T1 of 200℃ at a first heating rate K1 of 3℃ / min, and held for a first duration t1 of 25min.

[0070] (2) Structural Reorganization Stage B: Under a mixed gas atmosphere of oxygen and inert gas, the temperature is raised from the first temperature T1 of 200℃ to the second temperature T2 of 400℃ at a second heating rate K2 of 3℃ / min, and held for a second duration t2 of 45min.

[0071] (3) Pre-densification stage C: In a mixed gas atmosphere of oxygen and inert gas, the temperature is raised from the second temperature T2 of 400℃ to the third temperature T3 of 700℃ at a third heating rate K3 of 3℃ / min, and the temperature is held for a third time t3 of 20min.

[0072] (4) Steady-state densification stage D: The temperature is increased from the third temperature T3 of 700℃ to the fourth temperature T4 of 1100℃ at the fourth heating rate K4 of 20℃ / min, and the temperature is held for the fourth time t4 of 60min; the first time period is 30min, and a mixed gas atmosphere of HCl and inert gas is used to remove metal impurities and residual H; the second time period is 30min, and an inert gas atmosphere is used to maintain stable densification.

[0073] See Table 2 for shrinkage rate test: The actual shrinkage rate of the oxide film of the semiconductor device obtained by annealing in this embodiment is 8.1 ± 0.4%.

[0074] Example 2

[0075] Referring to Table 1, an annealing method for an oxide film, applied to semiconductor devices, includes the following steps:

[0076] (1) Stress relief stage A: Under an inert gas atmosphere, the temperature is raised to the first temperature T1 of 200℃ at a first heating rate K1 of 3℃ / min, and held for a first duration t1 of 20min.

[0077] (2) Structural Reorganization Stage B: Under a mixed gas atmosphere of oxygen and inert gas, the temperature is raised from the first temperature T1 of 200℃ to the second temperature T2 of 400℃ at a second heating rate K2 of 3℃ / min, and held for a second duration t2 of 30min.

[0078] (3) Pre-densification stage C: Under the mixed gas atmosphere of oxygen and inert gas, the temperature is increased from the second temperature T2 of 400℃ to the third temperature T3 of 600℃ at a rate of 3℃ / min, and the temperature is held for the third time t3 of 20min.

[0079] (4) Steady-state densification stage D: The temperature is increased from the third temperature T3 of 600℃ to the fourth temperature T4 of 1100℃ at the fourth heating rate K4 of 20℃ / min, and the temperature is held for the fourth time t4 of 60min; the first time period is 30min, and a mixed gas atmosphere of HCl and inert gas is used to remove metal impurities and residual H; the second time period is 30min, and an inert gas atmosphere is used to maintain stable densification.

[0080] See Table 2 for shrinkage rate test: The actual shrinkage rate of the semiconductor device obtained by annealing in this embodiment is 4.7 ± 0.3%.

[0081] Example 3

[0082] Referring to Table 1, an annealing method for an oxide film, applied to semiconductor devices, includes the following steps:

[0083] (1) Stress relief stage A: Under an inert gas atmosphere, the temperature is raised to the first temperature T1 of 200℃ at a first heating rate K1 of 3℃ / min, and held for a first duration t1 of 25min.

[0084] (2) Structural Reorganization Stage B: Under a mixed gas atmosphere of oxygen and inert gas, the temperature is raised from the first temperature T1 of 200℃ to the second temperature T2 of 405℃ at a second heating rate K2 of 3℃ / min, and held for a second duration t2 of 45min.

[0085] (3) Pre-densification stage C: Under the mixed gas atmosphere of oxygen and inert gas, the temperature is raised from the second temperature T2 of 405℃ to the third temperature T3 of 605℃ at the third heating rate K3 of 3℃ / min, and the temperature is held for the third time t3 of 40min.

[0086] (4) Steady-state densification stage D: The temperature is increased from the third temperature T3 of 605℃ to the fourth temperature T4 of 1200℃ at the fourth heating rate K4 of 20℃ / min, and the temperature is held for the fourth time t4 of 60min; in the first time period of 30min, a mixed gas atmosphere of HCl and inert gas is used to remove metal impurities and residual H; in the second time period of 30min, an inert gas atmosphere is used to maintain stable densification.

[0087] See Table 2 for shrinkage rate test: The actual shrinkage rate of the semiconductor device obtained by annealing in this embodiment is 6.2 ± 0.3%.

[0088] Table 1: Comparison of relevant parameters for each embodiment.

[0089]

[0090] Table 2: Comparison of actual shrinkage rates for each embodiment.

[0091]

[0092] In summary, compared with the single-temperature annealing method used in related technologies, the oxide film annealing method provided in this embodiment of the invention can release residual stress in stages by adopting a staged gradient heating annealing method; it can alleviate instantaneous thermal stress concentration, reduce defects such as microcracks or interface delamination, thereby improving the reliability of semiconductor devices; and it can adjust the shrinkage rate by setting different temperatures, thereby adapting to the different shrinkage rates required for oxide films in advanced process technologies.

[0093] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to the embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An annealing method for an oxide film, characterized in that, The annealing method, applied to semiconductor devices, includes: Stress relief stage: Under an inert gas atmosphere, the temperature is increased to a first temperature T1 at a first heating rate K1 and held for a first duration t1; Structural reorganization stage: In a mixed gas atmosphere of oxygen and inert gas, the temperature is increased from the first temperature T1 to the second temperature T2 at a second heating rate K2, and held at that temperature for a second duration t2. Pre-densification stage: In a mixed gas atmosphere of oxygen and inert gas, the temperature is increased from the second temperature T2 to the third temperature T3 at a third heating rate K3, and held at that temperature for a third time t3. Steady-state densification stage: Under an inert gas atmosphere, the temperature is increased from the third temperature T3 to the fourth temperature T4 at a fourth heating rate K4, and held at that temperature for a fourth time t4. The oxide film has a target shrinkage rate S, and the third temperature T3 is determined based on the target shrinkage rate S. The target shrinkage rate S includes a first shrinkage rate S1 and a second shrinkage rate S2, and the third temperature T3 includes a third lower limit temperature T. 31 and the third upper limit temperature T 32 The third lower limit temperature T 31 Corresponding to the first shrinkage rate S1, the third upper limit temperature T 32 Corresponding to the second shrinkage rate S2; Wherein, the first shrinkage rate S1 is less than the second shrinkage rate S2, and the third lower limit temperature T 31 Less than the third upper limit temperature T 32 ; The first shrinkage rate S1 ranges from 4% to 6%, and the second shrinkage rate S2 ranges from 7% to 9%.

2. The annealing method for the oxide film according to claim 1, characterized in that, The structural reorganization stage is a stepped heating stage, which has N sub-heating stages, where N≥2.

3. The annealing method for the oxide film according to claim 2, characterized in that, The sub-heating stage includes the following steps: For each increase in neutron temperature ΔT, the temperature is maintained for a fifth time t5; wherein, the neutron temperature ΔT = (the second temperature T2 - the first temperature T1) / N, and N ≥ 2.

4. The annealing method for the oxide film according to claim 1, characterized in that, The third lower limit temperature T 31 The value range is 600±5℃, and the third upper limit temperature T 32 The value range is 700±5℃.

5. The annealing method for the oxide film according to any one of claims 1-3, characterized in that, The fourth duration t4 includes a first time period and a second time period set sequentially. During the first time period, HCl gas is introduced into the inert gas atmosphere to remove metal impurities and residual H. During the second time period, an inert gas atmosphere is used.

6. The annealing method for the oxide film according to claim 1, characterized in that, The first heating rate K1, the second heating rate K2, the third heating rate K3, and the fourth heating rate K4 satisfy: K1 < K4, K2 < K4, and K3 < K4.

7. The annealing method for the oxide film according to claim 1 or 6, characterized in that, The first heating rate K1 ranges from 2℃ / min to 3℃ / min; the first temperature T1 ranges from 195℃ to 205℃; and the first duration t1 ranges from 15min to 25min. And / or, the second heating rate K2 ranges from 3℃ / min to 5℃ / min; the second temperature T2 ranges from 395℃ to 405℃; the second duration t2 ranges from 30min to 45min; and the oxygen content in the oxygen and inert gas mixture is 4% to 6%. And / or, the value of the third heating rate K3 is in the range of 2℃ / min to 4℃ / min; the value of the third temperature T3 is in the range of 595℃ to 705℃; and the value of the third duration t3 is in the range of 20min to 40min. And / or, the fourth heating rate K4 ranges from 17℃ / min to 20℃ / min; the fourth temperature T4 ranges from 1000℃ to 1200℃; and the fourth duration t4 ranges from 30min to 60min.

Citation Information

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