A method for manufacturing a novel circuit cover hole on a ceramic substrate

Abstract

The application discloses a kind of novel line cover plate hole manufacturing method on ceramic substrate, step 10, first photoresist coating;Step 20, first exposure development;Step 30, first plating treatment;Step 40, the first photoresist layer located in first exposure area and the first plating metal layer attached on the first photoresist layer are removed;Step 50, second photoresist coating;Step 60, second exposure development;Step 70, second plating treatment;Step 80, the second photoresist layer located in second exposure area and the second plating metal layer attached on the surface of second photoresist layer are removed.By using two mask plates and carrying out twice exposure, it is guaranteed that detection electrical signal is smoothly transmitted, and the situation that the line cover plate hole is too large, the electrical connection probe does not contact with the line cover plate, and the false judgment of substrate circuit detection is avoided.

Description

TECHNICAL FIELD

[0001] The application relates to the technical field of semiconductor detection, in particular to a novel circuit cover hole manufacturing method on a ceramic substrate. BACKGROUND

[0002] A probe card connects a space transformer and a PCB (space transformer: sends and receives tester signals) through an Interposer pin (electrical connection probe) to perform electric signal transmission and reception, but contact failure between the Interposer pin (electrical connection probe) and the STF occurs from time to time, and the failure rate is 0.5%. When one of the tens of thousands of pins (probes) has contact failure, the probe card (probe card) also has failure, so this is a part that needs to be improved. The main reason for the failure is that the air hole Via cover (circuit cover) does not have good matching with the Interposer (electrical connection), and when the Interposer pin (electrical connection probe) is detected, the Interposer pin probe cannot contact the Via cover (circuit cover) when contacting the center area of the Via cover hole (circuit cover hole), and the electric signal cannot be transmitted, resulting in test failure. Therefore, controlling the size of the Via cover hole (circuit cover hole) can ensure that the Interposer pin (electrical connection probe) can contact the Via cover (circuit cover) at any position of the Via cover hole (circuit cover hole), and complete the electric signal transmission. SUMMARY

[0003] Technical problem: The technical problem to be solved by the application is to provide a novel circuit cover hole manufacturing method on a ceramic substrate, which uses two mask plates and performs twice exposure and electroplating. When detecting the substrate circuit, the electrical connection probe can maintain contact with the circuit cover, thereby ensuring smooth transmission of the detection electric signal and avoiding the misjudgment of the substrate circuit detection caused by the fact that the electrical connection probe cannot contact the circuit cover due to the excessively large circuit cover hole.

[0004] Technical solution: To solve the above technical problems, the technical scheme adopted by the embodiments of the application is:

[0005] A novel circuit cover hole manufacturing method on a ceramic substrate, the steps comprising:

[0006] Step 10, first photoresist coating: using a coating machine to coat the substrate with photoresist for the first time; the photoresist is a negative photoresist; after the first photoresist coating is completed, the entire surface of the substrate is coated with a first photoresist layer;

[0007] Step 20, first exposure and development: using a first mask to expose the substrate treated in step 10 for the first time, and then cleaning; after the first exposure is completed, only the first exposure area of the substrate is still coated with a first photoresist layer;

[0008] Step 30, first electroplating treatment: by applying current, the substrate treated in step 20 is subjected to first electroplating in an electroplating solution; after the first electroplating is completed, the entire surface of the substrate is plated with a first electroplated metal layer, and the first electroplated metal layer in the first exposure area is attached to the first photoresist layer;

[0009] Step 40, after step 30 is completed, the first photoresist layer in the first exposure area and the first electroplated metal layer attached to the first photoresist layer are removed; after the removal is completed, a recess is formed in the first exposure area;

[0010] Step 50, second photoresist coating: using a coating machine to coat the substrate treated in step 40 with photoresist for the second time; after the second photoresist coating is completed, the entire surface of the substrate is coated with a second photoresist layer;

[0011] Step 60, second exposure and development: using a second mask to expose the substrate treated in step 50 for the second time, and then cleaning; after the second exposure is completed, only the second exposure area of the substrate is still coated with a second photoresist layer; the second mask and the first mask have an overlapping area;

[0012] Step 70, second electroplating treatment: by applying current, the substrate treated in step 60 is subjected to second electroplating in an electroplating solution; after the second electroplating is completed, the entire surface of the substrate is plated with a second electroplated metal layer, and the second electroplated metal layer in the second exposure area is attached to the second photoresist layer;

[0013] Step 80, after step 70 is completed, the second photoresist layer in the second exposure area and the second electroplated metal layer attached to the surface of the second photoresist layer are removed; after the removal is completed, a line cover plate hole is formed in the overlapping area of the first exposure and the second exposure.

[0014] As a preferred example, the overlapping area of the first mask and the second mask is a square with a side length of 20 μm.

[0015] As a preferred example, in the step 10 and the step 50, the glue coating machine rotates at a speed of 300-500 RPM, and the glue coating time is 10-15 seconds; after the photoresist is coated, the photoresist is soft-baked under a hot plate at 90-110 DEG C for 60 seconds, and the thickness of the first photoresist layer and the second photoresist layer is 20-30 microns.

[0016] As a preferred example, in the step 20, the first photoresist layer is exposed according to the thickness of the first photoresist layer and the first mask area, the mass concentration of the developing solution is 2.38% during the exposure, the developing time is 30-120 seconds, the developing temperature is 23-25 DEG C, and the exposed area is cleaned, so that the first exposure area required on the substrate is formed.

[0017] As a preferred example, in the step 60, the second photoresist layer is exposed according to the thickness of the second photoresist layer and the second mask area, the mass concentration of the developing solution is 2.38% during the exposure, the developing time is 30-120 seconds, the developing temperature is 23-25 DEG C, and the exposed area is cleaned, so that the second exposure area required on the substrate is formed.

[0018] As a preferred example, in the step 30, the current density of the electroplating is 0.5-1 A / m 3 , the electroplating time is 30-60 minutes, and the first electroplated metal layer on the substrate is dried after the electroplating is completed.

[0019] As a preferred example, in the step 70, the current density of the electroplating is 0.5-1 A / m 3 , the electroplating time is 30-60 minutes, and the second electroplated metal layer on the substrate is dried after the electroplating is completed.

[0020] As a preferred example, during the first exposure and developing, a gap exists between the first mask and the substrate.

[0021] As a preferred example, during the second exposure and developing, a gap exists between the second mask and the substrate.

[0022] Beneficial effects: Compared with the prior art, the technical scheme of the present application has the following beneficial effects: the manufacturing method of the present application uses two masks and performs two times of exposure and electroplating, when the substrate circuit is detected, the electrical connection probe can be in contact with the circuit cover plate, so that the detection of the electrical signal is ensured to be transmitted smoothly, the situation that the circuit cover plate hole is too large and the electrical connection probe is not in contact with the circuit cover plate is avoided, and the accuracy of the electrical connection probe for judging the substrate electrical conductivity is ensured. BRIEF DESCRIPTION OF DRAWINGS

[0023] Figure 1 is a schematic view of the first time that the substrate is coated with a photoresist layer according to the manufacturing method of the present application;

[0024] Figure 2 This is a schematic diagram of the first exposure and cleaning process according to an embodiment of the present invention;

[0025] Figure 3 This is a schematic diagram of the first electroplating and drying process according to an embodiment of the present invention;

[0026] Figure 4 This is a schematic diagram of the photoresist layer and electroplated metal layer in the exposed area after the first electroplating in an embodiment of the present invention.

[0027] Figure 5 This is a schematic diagram of the second coating of photoresist layer on the substrate according to an embodiment of the present invention;

[0028] Figure 6 This is a schematic diagram after the second exposure and cleaning according to an embodiment of the present invention;

[0029] Figure 7 This is a schematic diagram of the second electroplating and drying process according to an embodiment of the present invention;

[0030] Figure 8 This is a schematic diagram of the photoresist layer and electroplated metal layer in the exposed area after the second electroplating in an embodiment of the present invention.

[0031] Figure 9 This is a schematic diagram of the contact between the electrical connection probe and the circuit cover plate according to an embodiment of the present invention;

[0032] Figure 10 This is a schematic diagram of the circuit cover hole formed after two exposures in an embodiment of the present invention;

[0033] Figure 11 This is a schematic diagram of the arrangement of multiple circuit cover holes according to an embodiment of the present invention.

[0034] The figure shows: substrate 1, first photoresist layer 2, first mask 3, first electroplated metal layer 4, recess 5, second mask 6, second electroplated metal layer 7, circuit cover hole 8, electrical connection probe 9, circuit cover 10, and second photoresist layer 11. Detailed Implementation

[0035] The technical solution of the present invention will now be described in detail with reference to the accompanying drawings.

[0036] A method for fabricating a novel circuit cover hole on a ceramic substrate according to an embodiment of the present invention includes the following steps:

[0037] Step 10, as follows Figure 1 As shown, the first photoresist coating is performed: a photoresist coating machine is used to coat the substrate 1 with the first photoresist; the photoresist is a negative photoresist; after the first photoresist coating is completed, all areas on the upper surface of the substrate 1 are coated with the first photoresist layer 2;

[0038] Step 20, as shown, the first exposure development: using the first mask 3 after step 10 on the substrate 1 for the first exposure, and cleaning; the first exposure after the completion of the substrate 1, only the first exposure area is still coated with the first photoresist layer 2; Figure 2

[0039] Step 30, as shown, Figure 3 The first electroplating process: by applying current, step 20 after the substrate 1 in the electroplating solution for the first electroplating; the first electroplating after the completion of the substrate 1 on the surface of the first electroplated metal layer 4, the first electroplated metal layer 4 attached to the first photoresist layer 2 in the first exposure area;

[0040] Step 40, as shown, Figure 4 The step 30 after the completion of the first photoresist layer 2 and attached to the first photoresist layer 2 on the first electroplated metal layer 4 in the first exposure area; after the removal, the first exposure area forms a recess 5;

[0041] Step 50, as shown, Figure 5 The second photoresist coating: using the coating machine after step 40 on the substrate 1 for the second photoresist coating; the second photoresist coating after the completion of the substrate 1 on the surface of all areas coated with the second photoresist layer 11;

[0042] Step 60, as shown, Figure 6 The second exposure development: using the second mask 6 after step 50 on the substrate 1 for the second exposure, and cleaning; the second exposure after the completion of the substrate 1, only the second exposure area is still coated with the second photoresist layer 11; the second mask 6 and the first mask 3 exposure has the overlapping area;

[0043] Step 70, as shown, Figure 7 The second electroplating process: by applying current, step 60 after the substrate 1 in the electroplating solution for the second electroplating; the second electroplating after the completion of the substrate 1 on the surface of the second electroplated metal layer 7, the second electroplated metal layer 7 attached to the second photoresist layer 11 in the second exposure area;

[0044] Step 80, as shown, Figure 8 The step 70 after the completion of the second photoresist layer 11 and attached to the second photoresist layer 11 on the surface of the second electroplated metal layer 7 in the second exposure area; after the removal, the first exposure and the second exposure overlap area forms a line cover plate hole 8.

[0045] ​The method for manufacturing the novel circuit cover plate hole on the ceramic substrate in the above embodiment uses two mask plates and performs twice coating, exposure and electroplating. The first electroplated metal layer 4 and the second electroplated metal layer 7 covering the upper surface of the substrate 1 form the circuit cover plate 10 on the substrate 1. After exposure and electroplating by cooperation of the first mask plate 3 and the second mask plate 6, the circuit cover plate 10 surface forms a plurality of irregularly distributed circuit cover plate holes 8. By cooperation of the first mask plate 3 and the second mask plate 6, the size of the circuit cover plate hole 8 is reduced. According to the size of the tip of the electrical connection probe 9, the size of the overlapping area of the first mask plate 3 and the second mask plate 6 is adjusted. When the electrical connection probe 9 is used to detect the conductivity of the circuit on the substrate 1, because the diameter of the circuit cover plate hole 8 on the circuit cover plate 10 is small, the electrical connection probe 9 can maintain contact with the circuit cover plate 10 during detection, thereby ensuring smooth transmission of the detected electrical signal and avoiding the situation that the electrical connection probe 9 does not contact the circuit cover plate 10 due to the excessively large circuit cover plate hole 8, resulting in a false judgment of the conductivity of the circuit on the substrate 1. This ensures the accuracy of the electrical connection probe 9 in judging the conductivity of the substrate 1.

[0046] During manufacturing, step 10, the first overall photoresist coating is performed on the upper surface of the substrate 1 to form the first photoresist layer 2. The photoresist used is a negative photoresist. After coating, step 20 is performed. In step 20, the first mask plate 3 is placed above the substrate 1 with a gap between the first mask plate 3 and the substrate 1, and the substrate 1 is exposed for the first time. The exposed area is the part of the substrate 1 covered by the first mask plate 3. Then, the first photoresist layer 2 in the unexposed area outside the area covered by the first mask plate 3 is cleaned with a developing solution. The type of developing solution is TMAH developing solution. After exposure and cleaning, the first mask plate 3 is removed. At this time, only the exposed area covered by the first mask plate 3 on the upper surface of the substrate 1 still has the first photoresist layer 2 attached, and the first photoresist layer 2 on the other parts of the substrate 1 has been cleaned off by the developing solution. Then, the substrate 1 is subjected to the first electroplating treatment in step 30. In step 30, the first electroplating operation is performed at room temperature in an electroplating solution to electroplate a layer of conductive metal on the surface of the substrate 1. After the metal electroplating is completed, the electroplated area is dried to ensure that the conductive metal can be attached to the substrate 1. Then, in step 40, the first photoresist layer 2 on the area of the substrate 1 covered by the first mask plate 3 and the first electroplated metal layer 4 attached to the first photoresist layer 2 are removed by a developing solution, thereby forming a recess 5 on the substrate 1. The surface of the recess 5 does not have the first photoresist layer 2 or the first electroplated metal layer 4.

[0047] Then, in step 50, a second photoresist coating is applied to the upper surface of substrate 1 to form a second photoresist layer 11. The photoresist used is a negative photoresist. Before the second photoresist coating, the upper surface of substrate 1, except for the area exposed in the first exposure, is coated with a first electroplated metal layer 4. After coating, step 60 is performed. In step 60, a second mask 6 is placed above substrate 1 with a gap between them, and substrate 1 is exposed a second time. The exposed area is the portion of substrate 1 covered by the second mask 6. Then, the unexposed areas of the second photoresist layer 11 outside the area covered by the second mask 6 are cleaned with a developer. The developer is TMAH developer. After exposure and cleaning, the second mask 6 is removed. At this point, only the exposed area covered by the second mask 6 still has the second photoresist layer 11 attached to the upper surface of substrate 1; the second photoresist layer 11 on the other parts of substrate 1 has been removed by the developer. Then, step 70 is performed. In step 70, a second electroplating operation is performed on substrate 1. This second electroplating operation is carried out at room temperature in an electroplating solution, electroplating a layer of conductive metal onto the surface of substrate 1. After the metal electroplating is completed, the electroplated area is dried to ensure that the conductive metal layer can adhere to substrate 1. Subsequently, in step 80, the second photoresist layer 11 and the second electroplated metal layer 7 attached to the second photoresist layer 11 on the area of ​​substrate 1 covered by the second mask 6 are removed using a developing solution. After removal, a circuit cover hole 8 is formed in the overlapping area of ​​the second mask 6 and the first mask 3. The surface of the circuit cover hole 8 has neither the first photoresist layer 2 nor the second photoresist layer 11, nor the first electroplated metal layer 4 nor the second electroplated metal layer 7.

[0048] The overlapping area of ​​the masking regions of the second mask 6 and the first mask 3 on the substrate 1 is a square with a side length of 20 μm. The areas of the substrate 1 not exposed by either the first mask 3 or the second mask 6 are subjected to two electroplating processes. The areas of the substrate 1 exposed by the first mask 3 and the second mask 6 but not overlapping are subjected to one electroplating process. The overlapping area of ​​the first mask 3 and the second mask 6 is not electroplated. The overlapping area of ​​the first mask 3 and the second mask 6 forms a circuit cover hole 8 with a side length of 20 μm. Compared to performing only one exposure electroplating process, the size of the circuit cover hole 8 is significantly reduced. Figure 9 As shown, area A underwent two electroplating processes, area B underwent one electroplating process, and area 8 of the circuit cover hole was not electroplated. Figure 10 As shown, the circuit cover hole 8 with a smaller side length is formed by two exposure electroplating processes, which ensures that the electrical connection probe 9 can contact any area of ​​the circuit cover hole 8 and also contact the circuit cover 10 to complete the electrical signal detection, thereby improving the accuracy of the detection and avoiding misjudgment.

[0049] After completing the fabrication of hole 8 in a circuit cover plate, repeat the above operations multiple times to obtain the following result.Figure 11 A plurality of irregularly arranged circuit cover plate holes 8 are formed on the circuit cover plate 10.

[0050] As a preferred example, the first mask 3 and the second mask 6 overlap in a square with a side length of 20 μm. The thickness of the electroplated layer is between 10 and 15 μm. When the electroplated layer is 10 μm thick, the electrical connection probe 9 is most difficult to detect. In the electrical connection probe 9, the width of the tip is greater than 20 μm at a height of 10 μm from the tip to the body of the probe. Therefore, the width of the circuit cover plate hole 8 is 20 μm, and the electrical connection probe 9 can successfully contact the circuit cover plate 10 without misjudgment.

[0051] In the circuit cover plate 10 that can be successfully contacted by the existing electrical connection probe 9, N regions are randomly selected, observed by a microscope, and then drawn 1:1 using OMT-1.5D software. The size of the circuit cover plate hole 8 is then measured, and the minimum value is greater than 20 μm. Therefore, the width of the circuit cover plate hole 8 is 20 μm, which allows the electrical connection probe 9 to successfully contact the circuit cover plate 10.

[0052] As a preferred example, in steps 10 and 50, the glue spreading machine has a rotation speed of 300-500 RPM, and the glue spreading time is 10-15 s. After the photoresist is applied, the photoresist is soft-baked at a hot plate at 90-110 °C for 60 s. The thickness of the first photoresist layer 2 and the second photoresist layer 11 is 20-30 μm. Through this step, the desired thickness of the photoresist layer is obtained, and the excess photoresist around the substrate 1 is removed.

[0053] As a preferred example, in step 20, the first photoresist layer 2 is exposed according to the thickness of the first photoresist layer 2 and the area of the first mask 3. During exposure, the mass concentration of the developing solution is 2.38%, the developing time is 30-120 s, the developing temperature is 23-25 °C, and the exposed area is cleaned, thereby forming the desired first exposure area on the substrate 1. Through the set conditions, after the exposure effect is achieved, the excess photoresist on the substrate 1 that is not exposed during the first exposure is removed by cleaning.

[0054] As a preferred example, in step 60, the second photoresist layer 11 is exposed according to the thickness of the second photoresist layer 11 and the area of the second mask 6. During exposure, the mass concentration of the developing solution is 2.38%, the developing time is 30-120 s, the developing temperature is 23-25 °C, and the exposed area is cleaned, thereby forming the desired second exposure area on the substrate 1. Through the set conditions, after the exposure effect is achieved, the excess photoresist on the substrate 1 that is not exposed during the second exposure is removed by cleaning.

[0055] As a preferred example, the current density of the electroplating in step 30 is 0.5-1 A / m 3 After the electroplating, the first electroplated metal layer 4 on the substrate 1 is dried. The drying speed is 500-1000 rpm, and the drying time is 2-3 min. Since the electroplating is performed in a liquid, the substrate 1 needs to be cleaned and dried after the first electroplating. After the electroplating, the moisture of the metal layer on the substrate 1 is removed through the drying process, and the metal layer can be smoothly attached to the surface of the substrate 1, providing the substrate 1 with a conductive medium and ensuring the conductivity of the substrate 1.

[0056] As a preferred example, the current density of the electroplating in step 70 is 0.5-1 A / m 3 After the electroplating, the second electroplated metal layer 7 on the substrate 1 is dried. The drying speed is 500-1000 rpm, and the drying time is 2-3 min. Since the electroplating is performed in a liquid, the substrate 1 needs to be cleaned and dried after the second electroplating. After the electroplating, the moisture of the metal layer on the substrate 1 is removed through the drying process, and the metal layer can be smoothly attached to the surface of the substrate 1, providing the substrate 1 with a conductive medium and ensuring the conductivity of the substrate 1.

[0057] As a preferred example, there is a gap between the first mask plate 3 and the substrate 1 during the first exposure and development. The gap between the first mask plate 3 and the substrate 1 during the exposure ensures that the desired area is formed after the first exposure, and the first mask plate 3 can be smoothly removed for subsequent exposure operations.

[0058] As a preferred example, there is a gap between the second mask plate 6 and the substrate 1 during the second exposure and development. The gap between the second mask plate 6 and the substrate 1 during the exposure ensures that the desired area is formed after the first exposure, and the second mask plate 6 can be smoothly removed for subsequent exposure operations.

[0059] The basic principles, main features, and advantages of the present application are shown and described above. Those skilled in the art should understand that the present application is not limited by the above specific examples, and the above specific examples and descriptions in the specification are only to further illustrate the principles of the present application. Without departing from the spirit and scope of the present application, various changes and improvements can be made to the present application, and these changes and improvements fall within the scope of the claimed present application. The scope of the present application is defined by the claims and their equivalents.

Claims

1. A method for making novel via holes in a ceramic substrate cover plate, characterized by, The steps include: Step 10, first photoresist coating: using a glue machine to perform first photoresist coating on the substrate (1); the photoresist is a negative photoresist; after the first photoresist coating is completed, all areas on the upper surface of the substrate (1) are coated with a first photoresist layer (2); Step 20, first exposure and development: using a first mask plate (3) to perform first exposure on the substrate (1) processed in step 10, and cleaning; after the first exposure is completed, only the first exposure area on the substrate (1) is still coated with the first photoresist layer (2); Step 30, first electroplating treatment: by applying current, performing first electroplating on the substrate (1) processed in step 20 in an electroplating solution; after the first electroplating is completed, the upper surface of the substrate (1) is coated with a first electroplated metal layer (4), and the first electroplated metal layer (4) in the first exposure area is attached to the first photoresist layer (2); Step 40, after the step 30 is completed, the first photoresist layer (2) in the first exposure area and the first electroplated metal layer (4) attached to the first photoresist layer (2) are removed; after the removal is completed, a recess (5) is formed in the first exposure area; Step 50, second photoresist coating: using a glue machine to perform second photoresist coating on the substrate (1) processed in step 40; after the second photoresist coating is completed, all areas on the upper surface of the substrate (1) are coated with a second photoresist layer (11); Step 60, second exposure and development: using a second mask plate (6) to perform second exposure on the substrate (1) processed in step 50, and cleaning; after the second exposure is completed, only the second exposure area on the substrate (1) is still coated with the second photoresist layer (11); the second mask plate (6) has an overlapping area with the first mask plate (3) when exposed; Step 70, second electroplating treatment: by applying current, performing second electroplating on the substrate (1) processed in step 60 in an electroplating solution; after the second electroplating is completed, the upper surface of the substrate (1) is coated with a second electroplated metal layer (7), and the second electroplated metal layer (7) in the second exposure area is attached to the second photoresist layer (11); Step 80, after the step 70 is completed, the second photoresist layer (11) in the second exposure area and the second electroplated metal layer (7) attached to the surface of the second photoresist layer (11) are removed; after the removal is completed, a line cover plate hole (8) is formed in the overlapping area of the first exposure and the second exposure.

2. The method of claim 1, wherein the method is characterized by: The overlapping area of the first mask plate (3) and the second mask plate (6) is a square with a side length of 20 μm.

3. The method of claim 1, wherein the method is characterized by: In the steps 10 and 50, the rotation speed of the glue machine is 300-500 RPM, and the glue coating time is 10-15 s; after the photoresist is coated, soft baking is performed at a hot plate of 90-110 °C for 60 s, and the thickness of the first photoresist layer (2) and the second photoresist layer (11) is 20-30 μm.

4. The method of claim 1, wherein the method is characterized by: In the step 20, the first photoresist layer (2) is exposed according to the thickness of the first photoresist layer (2) and the area of the first mask (3), the mass concentration of the developing solution is 2.38%, the developing time is 30-120s, the developing temperature is 23-25℃, and the exposed area is cleaned, so that the required first exposure area is formed on the substrate (1).

5. The method of claim 1, wherein the method is characterized by: In the step 60, the second photoresist layer (11) is exposed according to the thickness of the second photoresist layer (11) and the area of the second mask (6), the mass concentration of the developing solution is 2.38%, the developing time is 30-120s, the developing temperature is 23-25℃, and the exposed area is cleaned, so that the required second exposure area is formed on the substrate (1).

6. The method of claim 1, wherein the method is characterized by: The current density of the electroplating in the step 30 is 0.5-1 A / m 3 , the electroplating time is 30-60 min, and the first electroplated metal layer (4) on the substrate (1) is dried after the electroplating.

7. The method of claim 1, wherein the method is characterized by: The current density of the electroplating in the step 70 is 0.5-1 A / m 3 , the electroplating time is 30-60 min, and the second electroplating metal layer (7) on the substrate (1) is dried after the electroplating is completed.

8. The method of claim 1, wherein the method is characterized by: In the first exposure and developing, there is a gap between the first mask (3) and the substrate (1).

9. The method of claim 1, wherein the method is characterized by: In the second exposure and developing, there is a gap between the second mask (6) and the substrate (1).

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