Millimeter wave digital power amplifier based on serial transmission line balun synthesis network
The impedance matching of the millimeter-wave digital power amplifier is optimized by connecting a series transmission line balun synthesis network, solving the problems of dynamic impedance adjustment efficiency and linearity, achieving efficient dynamic impedance modulation and power synthesis, and improving the overall efficiency of the millimeter-wave digital power amplifier.
Patent Information
- Application Number
- CN202510867143.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-26
- Publication Date
- 2025-10-10
AI Technical Summary
Millimeter-wave digital power amplifiers have problems with efficiency and linearity degradation in dynamic impedance adjustment. Especially under high-order modulation technology, load impedance mismatch leads to serious deterioration of overall efficiency and linearity, and the high efficiency advantage cannot be reflected.
A series transmission line balun synthesis network is used to achieve dynamic impedance modulation and power synthesis and optimize impedance matching by driving the power distribution network, digital power amplifier unit array, digital control circuit and output power synthesis network.
The overall efficiency of the millimeter-wave digital power amplifier has been improved, with significant efficiency improvements at maximum output power and fallback power levels. The efficiency improvement is basically less than 10 percentage points, meeting high-performance communication requirements.
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Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of millimeter wave digital power amplifier, and particularly relates to a millimeter wave digital power amplifier based on a series transmission line balun synthesis network. BACKGROUND
[0002] With the rapid development of modern wireless technology, complex modulation methods are emerging to adapt to the explosive growth of transmission information, and the communication frequency band is rising and the bandwidth is increasing, which puts higher requirements on the performance of the transmitter as a communication basic device. Moreover, various application scenarios have given rise to numerous communication standards, which requires the transmitter system to support multi-band and multi-mode operation modes; at the same time, like all electronic systems, there is also a trend of integration in the evolution of the transmitter system. Digital power amplifier is an excellent solution that fits this prospect, which directly completes the conversion from digital baseband signal to power amplified radio frequency modulated signal on the same component, and has a theoretical efficiency advantage compared with the traditional power amplifier architecture. Its potential application scenarios mainly face modern digital wireless communication systems with high performance and high integration. Digital power amplifier contains multiple transistor units that can form a large number of switching combination states, and the dynamic active load modulation formed will produce multiple load impedance states. Therefore, realizing multi-state dynamic impedance matching is an important prerequisite for realizing the high efficiency advantage of digital power amplifier, and has become one of the research hotspots in this field.
[0003] However, with the current trend of a large number of power amplifier researches turning to the millimeter wave frequency band with more abundant spectrum bandwidth resources, there are relatively few research results on millimeter wave digital power amplifier. And the increasing demand for data traffic will make future millimeter wave transmitter systems introduce increasingly complex high-order modulation techniques to improve spectrum utilization, and the signal of the millimeter wave digital power amplifier will have a larger dynamic range, which will increase the number of switching power amplifier units. If the large dynamic impedance matching results of the active load modulation are not controlled and optimized, the load impedance of multiple transistor units in multiple states will be mismatched, which will cause serious deterioration of the overall efficiency and linearity of the digital power amplifier, and the digital power amplifier will not be able to realize the high efficiency advantage it should have.
[0004] Therefore, how to design a millimeter wave digital power amplifier to realize dynamic impedance adjustment and make the digital power amplifier have excellent overall efficiency and linearity has become a research focus. SUMMARY
[0005] In view of the problems in the background art, the purpose of the present application is to provide a millimeter wave digital power amplifier based on a series transmission line balun synthesis network, which innovatively uses a series transmission line balun to construct a synthesis network, so that the millimeter wave differential digital power amplifier based on the synthesis network can realize dynamic impedance modulation, improve and balance the impedance matching of the power amplifier at the maximum and partial back-off output power level, thereby improving the overall efficiency of the millimeter wave digital power amplifier.
[0006] To achieve the above-mentioned purpose, the technical scheme of the present application is as follows:
[0007] A millimeter wave digital power amplifier based on a series transmission line balun synthesis network, comprising a driving power distribution network, two digital power amplifier unit arrays, a digital control circuit and an output power synthesis network.
[0008] The power distribution unit is used to distribute the input radio frequency signal to each power unit in the digital power amplifier unit array.
[0009] The digital power amplifier unit array is composed of m power units, which are used to amplify the input radio frequency signal to a specified level.
[0010] The digital control circuit is used to convert the digital baseband signal into a control level, control the on-off of the power units in the corresponding digital power amplifier unit array, so that a specified number of power units are turned on under a specified code word, and a specific output signal amplitude is synthesized, so that amplitude modulation output is realized while power amplification is realized.
[0011] The output power synthesis network comprises two coupled baluns, each coupled balun is composed of two pairs of coupled transmission lines, each pair of coupled transmission lines is composed of four transmission lines; wherein the first transmission line and the second transmission line form the first pair of coupled transmission lines, and the third transmission line and the fourth transmission line form the second pair of coupled transmission lines.
[0012] The first end of the first transmission line and the fourth transmission line in each coupled balun is connected with the differential output of the digital power amplifier unit array, and the second end is connected with the power supply of the digital power amplifier unit array; one end of the second transmission line is connected with one end of the third transmission line.
[0013] The other end of the second transmission line in the first coupled balun serves as the output end of the millimeter wave digital power amplifier, the other end of the third transmission line in the first coupled balun is connected with the other end of the second transmission line in the second coupled balun, and the other end of the third transmission line in the second coupled balun is grounded; the second coupled balun further comprises a bypass tuning capacitor, which is connected in parallel with the second transmission line and the third transmission line of the second coupled balun; the output power synthesis network is used to realize dynamic impedance modulation and power synthesis.
[0014] Further, the driving power distribution network can be realized by passive power dividers, bridges or transformer coupling structures.
[0015] Further, the driving power distribution network comprises a bridge, two first-stage driving amplifiers, two single-ended to differential transformers and two transformer inter-stage matching networks.
[0016] The radio frequency input power is distributed into two paths by the bridge, and the phase difference of the specified compensation line is formed, each path is then input into a first-stage driving amplifier through a single-ended to differential transformer, and finally output to a digital power amplifier unit array through a transformer inter-stage matching network.
[0017] Further, each power unit adopts a differential Cascode structure with a neutralizing capacitor; the Casecode architecture can improve the gain of the digital power amplifier unit and the output impedance of the digital power amplifier unit.
[0018] Further, a series of compensation transmission lines can be added between the third transmission line of the first coupled balun and the second transmission line of the second coupled balun, which is to avoid the influence caused by the mutual coupling between the two coupled baluns.
[0019] Further, a connecting line with appropriate length can be arranged between the two pairs of coupled transmission lines in the coupled balun, which is to separate the two pairs of coupled transmission lines by a sufficient distance to avoid the influence caused by the mutual coupling between them, and also to reserve sufficient space when connecting the digital power amplifier unit array.
[0020] Further, the output powers of the two digital power amplifier unit arrays are the same.
[0021] Further, the even-mode characteristic admittance Y 0e , the odd-mode characteristic admittance Y 0o and the electrical length θ of each transmission line are set according to actual requirements.
[0022] Further, the capacitance value of the bypass tuning capacitor is mainly determined by the capacitance value allowed by the process under the corresponding working frequency band.
[0023] In summary, due to the adoption of the above technical solutions, the present application has the following advantages:
[0024] The application provides a millimeter wave digital power amplifier based on a series transmission line balun synthesis network, adopts a synthesis network based on a series transmission line balun, and can realize active load modulation optimization of the digital power amplifier, improve and balance impedance matching conditions of the digital power amplifier at maximum and partial back-off output power levels, and improve overall efficiency. For the millimeter wave digital power amplifier with 16 digital power amplifier units, the millimeter wave digital power amplifier has a maximum output power of 23.5-24.8 dBm, a maximum PAE of 25.6%-32.9%, a back-off PAE of 17.7%-23.0%, and an efficiency deterioration of less than 10 percentage points at a half code word back-off compared with the efficiency at the maximum power level, and the efficiency is obviously improved. BRIEF DESCRIPTION OF DRAWINGS
[0025] Figure 1 The application provides a system block diagram of a digital power amplifier based on a series transmission line balun.
[0026] Figure 2 The application provides a simplified circuit model of a two-way equal-weight digital power amplifier array through a transmission line network single-end synthesis, wherein (a) is a maximum power level, and (b) is a back-off power level.
[0027] Figure 3 The application provides a theoretical model schematic diagram of a series transmission line balun.
[0028] Figure 4 The application provides a whole circuit diagram of a digital power amplifier based on a series transmission line balun in embodiment 1.
[0029] Figure 5 The application provides a structure diagram of a power unit in a digital power amplifier unit array in embodiment 1.
[0030] Figure 6 The application provides a schematic diagram of a digital power amplifier unit array synthesis mode and an opening sequence in embodiment 1.
[0031] Figure 7 The application provides a circuit diagram of a power synthesis network in embodiment 1.
[0032] Figure 8 The application provides a circuit diagram of a driving power distribution network in embodiment 1.
[0033] Figure 9 The application provides a simulation result diagram of a relationship between a maximum output power, a saturation and a back-off PAE and a frequency of a digital power amplifier in embodiment 1.
[0034] Figure 10 The application provides a simulation result diagram of an output voltage amplitude of a digital power amplifier in embodiment 1. DETAILED DESCRIPTION
[0035] In order to make the objectives, technical solutions and advantages of the present invention more clear, the present invention is further described in detail below in conjunction with the implementation methods and drawings.
[0036] A millimeter wave digital power amplifier based on a series transmission line balun synthesis network, the system block diagram is as follows Figure 1 As shown, it includes a driving power distribution network, two digital power amplifier unit arrays, a digital control circuit and an output power synthesis network;
[0037] The power distribution unit is used to distribute the input radio frequency signal to each power unit in the digital power amplifier unit array;
[0038] The digital power amplifier unit array is composed of m power units, and the power units are used to amplify the input radio frequency signal to a specified level;
[0039] The digital control circuit is used to convert the digital baseband signal into a control level, control the on and off of the power units in the corresponding digital power amplifier unit array, so that a specified number of power units are turned on under a specified codeword, and a specific output signal amplitude is synthesized, thereby achieving amplitude modulation output while amplifying the power;
[0040] The output power synthesis network is used to realize dynamic impedance modulation and power synthesis.
[0041] This paper takes the case of two equal-weighted digital power amplifier units performing differential synthesis through an ideal balun network as an example to explain the principle of the correctness of the designed output synthesis network. When the two digital power amplifier unit arrays are each composed of one power unit, Figure 2 This is a simplified circuit model of two equally weighted digital power amplifier units in the present invention, combined via a single-ended transmission line network. (a) represents the maximum power level, with both digital power amplifier units enabled; (b) represents the fallback power level, with only one digital power amplifier unit enabled. In the figure, n1 and n2 represent the voltage transformation ratios of the two transmission line baluns, respectively.
[0042] At the maximum power level, the output voltages of the two digital power amplifier units are applied to the load Z through the balun network. L On, that is, the output current I on the two balun secondary coils o for:
[0043]
[0044] At this time, the load impedance Z1 seen at the output of the digital power amplifier unit V1 is as follows:
[0045]
[0046] At the fallback power level, the shutdown unit in the millimeter wave band is approximately in an open circuit state. At this time, the input end of the second balun is short-circuited. Ideally, ignoring the residual inductance caused by the unloaded balun, its output end is also ideally short-circuited. It can be considered that only the output voltage of the first power amplifier unit is applied to the load Z through the balun network. L So the output current I' on the secondary coil o And the load impedance Z1' of the power amplifier unit V1 becomes the following two equations respectively:
[0047]
[0048] Comparing Equation 2 with Equation 4, when the two digital power amplifier units are equally weighted (V1=V2), mathematical analysis as shown in Equation 5 shows that the load impedance Z1 of digital power amplifier unit V1 at the maximum power level is always smaller than its load impedance Z1' at the back-off power level.
[0049] This proves that it is theoretically impossible for a millimeter-wave digital power amplifier to maintain optimal efficiency at all power levels under differential synthesis. That is, the output synthesis network composed of coupled line baluns in the existing technology cannot achieve optimal efficiency at all power levels.
[0050]
[0051] According to Equation 5, although the load impedances of the digital power amplifier unit generated by active load modulation at the maximum power level and the back-off power level cannot be equal, by reducing the ratio of n1 to n2, the two load impedance values can be made close. Therefore, the present invention improves and optimizes the transmission line balun synthesis network to improve the dynamic impedance matching of the millimeter-wave digital power amplifier at different power levels.
[0052] The following describes its principle in detail:
[0053] The core components of a transmission line balun are two pairs of identical coupled transmission lines, which are connected by the even-mode characteristic admittance Y 0e , odd mode characteristic admittance Y 0o The coupling coefficient k formed by these three parameters is expressed as follows:
[0054]
[0055] The theoretical model of a transmission line balun formed by two pairs of such coupled transmission lines is as follows: Figure 3 As shown, 1 to 4 represent the four ports of a balun, and the transmission line balun four-port admittance matrix is shown in the following equations 7, 8, and 9:
[0056]
[0057] considerFigure 2 The connection form of the balun 1, the ports 2 and 3 of which are connected to a differential digital power amplifier unit PA1 as a differential input port, wherein Cd is the output parasitic capacitance of PA1, in this case the differential boundary conditions I2=-I3, V2=-V3 and the capacitance admittance term jωCd are added to the admittance matrix of the transmission line balun d By substituting formula 7, the three-port admittance matrix of the transmission line balun can be obtained as formula 8:
[0058]
[0059] Then, the connection form of the balun 2 is considered, which is based on the balun 1 and the port 4 is grounded. According to the properties of the indefinite admittance matrix in the basic network theory, the third row and the third column of the matrix in formula 5 are deleted, and finally the two-port admittance matrix of the transmission line balun is obtained as formula 11:
[0060]
[0061] The synthetic network proposed in the present application introduces a bypass tuning capacitance C2 on the second balun of the original series transmission line balun, and the connection mode is as shown in Figure 2 This is equivalent to adding a capacitance admittance term to the port 1 of the balun 2, and the two-port admittance matrix of the balun 2 is changed from formula 11 to formula 12:
[0062]
[0063] Suppose the unbalanced side load admittance of the balun 2 is Y m , the boundary condition I1=-Y m V1 is substituted into formula 7, and the voltage transformation ratio of the balun 2 is obtained as formula 13:
[0064]
[0065] As can be seen from the above, the introduction of C2 increases the amplitude of n2 (the electrical length θ of the coupled transmission line can also be used to assist in adjustment), and since the parameters of the balun 1 do not change, the ratio of n1 to n2 is effectively reduced at this time, thereby achieving the purpose of approximating the load impedance generated at different power levels, and enabling the synthetic network architecture to have the ability of active load modulation optimization for the millimeter wave digitized power amplifier.
[0066] Embodiment 1
[0067] The present embodiment provides a 24-30GHz high-efficiency digitized power amplifier based on a 65nm CMOS process, which includes 16 digital power amplifier units, a driving power distribution network and an output power synthesis network. The main purpose of the present embodiment is to verify the active load modulation optimization principle of the radio frequency part of the circuit, and therefore no peripheral digital circuit design is included, and the opening and closing of the digital power amplifier units are directly controlled by external control levels. The overall circuit is as shown inFigure 4 shown.
[0068] The digital power amplifier unit adopts a differential cascode structure with a neutralizing capacitor as the basic architecture of a single digital power amplifier unit. The specific architecture is as follows: Figure 5 As shown in the figure, Cn is the neutralization capacitor, and Cb is the common-gate transistor bypass capacitor. The cascode architecture improves the gain of the digital power amplifier unit and its output impedance, preventing excessively low output impedance from being created by connecting a large number of units in parallel. The cross-neutralization capacitor Cn introduced in this architecture offsets the effects of the parasitic capacitance Cgd, improving the stability and gain of the differential power factor unit in the millimeter-wave frequency band.
[0069] The sizes of the MCS (common source) transistor and MCG (common gate) transistor in the designed digital power amplifier unit are both 64μm, the MCS gate bias is 0.5V, the MCG gate bias (i.e., control level) is 1.5V, the drain power supply is 2V, the neutralization capacitor Cn is finally set to 60fF, and the common gate transistor bypass capacitor Cb is 600fF.
[0070] The designed digital power amplifier unit array synthesis method and start sequence are as follows Figure 6 As shown, the eight digital power amplifier units are divided into two columns of four, with direct zero-degree synthesis between the two columns. When turned on, a thermometer code is used, with the two columns of units alternately turned on from near to far from the synthesis point. This ensures a more balanced load impedance as the units are gradually turned on, while also preventing low power output at low power levels due to line losses in units farther from the synthesis point. This simplifies the array topology while maximizing the linear growth of the array output voltage amplitude with the codeword.
[0071] The output power synthesis network is composed of two pairs of series transmission line coupled baluns, and its basic structure is as follows: Figure 7 As shown, the balun-coupled transmission line must have sufficient capacity to withstand high currents. Therefore, the top-layer thick metal in the CMOS process used is prioritized, namely the 0.9μm thick M8 layer metal and the 3.4μm thick M9 layer metal. M8 and M9 broadside coupling is used as the coupling line implementation to achieve a wider coupling coefficient range. A compensation line is added between the two baluns, mainly to reserve the necessary space for actual layout, while also assisting in configuring the port impedance between the two baluns, further increasing design flexibility.
[0072] Through electromagnetic simulation and optimization, the width of all M8, M9 layer metal traces is 12 μm, the actual length of the coupling transmission line in Balun 1 is 90.6 μm, the actual length of the coupling transmission line in Balun 2 is 76.4 μm, and the length of the compensation line between the two baluns is 206.6 μm, which brings a phase difference of 58°-75° between the two digital power amplifier unit arrays within 24-30 GHz; in addition, there is a 49.1 μm long connecting line between the two pairs of coupling transmission lines of each balun, which is used to separate the two pairs of coupling transmission lines to avoid mutual coupling between them, and also to reserve enough space when connecting the digital power amplifier unit array; finally, the power supply terminals of the two baluns are connected to the drain power supply pad through a wide trace with a decoupling capacitor, and two 2.4 pF decoupling capacitors are symmetrically placed on both sides of each balun to form a uniform and sufficient RF ground.
[0073] The driving power distribution network mainly completes the distribution of input RF power single-ended to two differential and compensates for the phase difference in the output synthesis network. The overall architecture of the designed driving power distribution network is shown in Figure 8 The driving power distribution network mainly completes the distribution of input RF power single-ended to two differential and compensates for the phase difference in the output synthesis network. The overall architecture of the designed driving power distribution network is shown in
[0074] Figures 9-10 The layout simulation results of the power amplifier of the application as a 4-bit digital power amplifier are shown. Figure 9 The maximum output power, saturation and back-off PAE of the power amplifier as a 4-bit digital power amplifier are shown, and it can be seen from the figure that the maximum output power is 23.5-24.8 dBm within 24-30 GHz, and the maximum output power of the power amplifier is higher than 24 dBm except for a slight deterioration at 30 GHz, which meets the design expectation; in addition, the maximum PAE is 25.6%-32.9%, and the back-off PAE is 17.7%-23.0%, the efficiency deterioration at the half code word back-off is less than 10 percentage points compared with the efficiency of the maximum power stage, which has shown a significant efficiency improvement. Figure 10 The PAE of the digital power amplifier designed by the application as a 4-bit digital power amplifier is shown. It can be more clearly seen from the figure that the efficiency curve shows the characteristics of a Doherty power amplifier efficiency curve, and the efficiency of the middle and low code words is obviously improved, and the efficiency of the power amplifier fluctuates within 10 percentage points in the interval of the 5th-16th code word. It shows that the design of the whole device effectively improves the overall efficiency of the digital power amplifier.
[0075] The above merely provides the specific implementation of the present application, any feature disclosed in the specification can be replaced by other equivalent or similar purpose alternative features unless specifically described, and all features disclosed or all steps in the method or process can be combined in any manner except for mutually exclusive features and / or steps.
Claims
1. A millimeter wave digital power amplifier based on a series transmission line balun synthesis network, characterized in that: It includes a driving power distribution network, two digital power amplifier unit arrays, a digital control circuit and an output power synthesis network; The power distribution unit is used to distribute the input radio frequency signal to each power unit in the digital power amplifier unit array; The digital power amplifier unit array is composed of m power units, and the power units are used to amplify the input radio frequency signal to a specified level; The digital control circuit is used to convert the digital baseband signal into a control level, control the on and off of the power units in the corresponding digital power amplifier unit array, so that a specified number of power units are turned on under a specified codeword, and a specific output signal amplitude is synthesized, thereby achieving amplitude modulation output while amplifying the power; The output power synthesis network includes two coupled baluns, each coupled balun is composed of two pairs of coupled transmission lines, and each pair of coupled transmission lines is composed of four transmission lines; wherein the first transmission line and the second transmission line form a first pair of coupled transmission lines, and the third transmission line and the fourth transmission line form a second pair of coupled transmission lines; The first ends of the first transmission line and the fourth transmission line in each coupling balun are connected to the differential output of the digital power amplifier unit array, and the second ends are connected to the power supply of the digital power amplifier unit array; one end of the second transmission line is connected to one end of the third transmission line; The other end of the second transmission line in the first coupling balun serves as the output end of the millimeter wave digital power amplifier, the other end of the third transmission line in the first coupling balun is connected to the other end of the second transmission line in the second coupling balun, and the other end of the third transmission line in the second coupling balun is grounded; the second coupling balun also includes a bypass tuning capacitor, which is connected in parallel with the second transmission line and the third transmission line of the second coupling balun; the output power synthesis network is used to realize dynamic impedance modulation and power synthesis.
2. The millimeter wave digital power amplifier according to claim 1, wherein: The driving power distribution network uses a passive power divider, a bridge or a transformer coupling structure to achieve power distribution.
3. The millimeter wave digital power amplifier according to claim 2, wherein: When the driving power distribution network adopts a transformer coupling structure to realize power distribution, the driving power distribution network includes a bridge, two first-stage driving amplifiers, two single-ended to differential transformers and two transformer inter-stage matching networks; The RF input power is distributed into two paths through a bridge, while forming a specified compensation line phase difference. Each path then passes through a single-ended to differential transformer and inputs a first-stage driver amplifier, and finally outputs to a digital power amplifier unit array through a transformer inter-stage matching network.
4. The millimeter wave digital power amplifier according to claim 1, wherein: Each power unit adopts a differential cascode structure with a neutralizing capacitor.
5. The millimeter wave digital power amplifier according to claim 1, wherein: A series compensation transmission line is added between the third transmission line in the first coupled balun and the second transmission line in the second coupled balun.
6. The millimeter wave digital power amplifier according to claim 1, wherein: A connecting line of appropriate length is set between the two pairs of coupled transmission lines in the coupling balun.
7. The millimeter wave digital power amplifier according to claim 1, wherein: The output powers of the two digital power amplifier unit arrays are the same.
8. The millimeter wave digital power amplifier according to claim 1, wherein: The three parameters of each transmission line, even-mode characteristic admittance, odd-mode characteristic admittance and electrical length, are set according to actual needs.
9. The millimeter wave digital power amplifier according to claim 1, wherein: The capacitance of the bypass tuning capacitor is determined by the capacitance allowed by the process in the corresponding frequency band.
Citation Information
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