A radio frequency voltage sensor and plasma source system

Abstract

This invention discloses a radio frequency (RF) voltage sensor and a plasma source system. The RF voltage sensor includes a signal acquisition module and a signal processing circuit. The signal processing circuit includes a rectangular wave pulse detection module, a signal conversion module, a peak hold module, and a computational output module. The input terminal of the rectangular wave pulse detection module receives a pulse synchronization signal. The signal conversion module is connected to the output terminal of the signal acquisition module. The first input terminal of the peak hold module is connected to the output terminal of the signal conversion module, and the second input terminal of the peak hold module is connected to the output terminal of the rectangular wave pulse detection module. The computational output module is connected to the output terminal of the peak hold module. The RF voltage sensor and plasma source system provided by this invention can accurately detect the peak voltage corresponding to a single-stage pulse, and can also stably detect the peak voltage corresponding to multiple-stage pulses, while avoiding the output jumping to zero during pulse shutdown, thus improving the stability and practicality of the measurement.

Description

Technical Field

[0001] This invention relates to the fields of circuit measurement and plasma technology, and in particular to a radio frequency voltage sensor and a plasma source system. Background Technology

[0002] Radio frequency (RF) voltage sensors are used to measure RF peak voltage parameters, reflecting the RF voltage in the circuit under test.

[0003] Peak voltage measurement of multi-stage pulse signals is a core requirement. However, when existing RF voltage sensors acquire multi-stage pulse signals, the output display changes with the pulse transitions (e.g., a two-stage pulse sequence: Pulse1=5V, Pulse2=0V), making it impossible for users to distinguish whether the change in the displayed value is due to voltage differences in the pulse sequence itself or a problem with sensor malfunction. Summary of the Invention

[0004] This invention provides a radio frequency voltage sensor and a plasma source system that can accurately detect the peak voltage corresponding to a single-stage pulse, as well as stably detect the peak voltage corresponding to multiple-stage pulses, and avoid the output from jumping to zero during pulse shutdown, thereby improving the stability and practicality of the measurement.

[0005] According to one aspect of the present invention, a radio frequency voltage sensor is provided, the radio frequency voltage sensor comprising: a signal acquisition module and a signal processing circuit;

[0006] The signal processing circuit includes a rectangular wave pulse detection module, a signal conversion module, a peak hold module, and a calculation output module;

[0007] The input terminal of the rectangular wave pulse detection module receives a pulse synchronization signal;

[0008] The signal conversion module is connected to the output terminal of the signal acquisition module;

[0009] The first input terminal of the peak hold module is connected to the output terminal of the signal conversion module, and the second input terminal of the peak hold module is connected to the output terminal of the rectangular wave pulse detection module.

[0010] The computation output module is connected to the output terminal of the peak hold module;

[0011] Wherein: the signal acquisition module is used to acquire the pulse power signal in the circuit under test; the signal conversion module converts the pulse power signal into a first voltage signal and outputs it to the first input terminal of the peak hold module; the rectangular wave pulse detection module is used to output the rectangular wave pulse signal to the second input terminal of the peak hold module when the pulse synchronization signal is a rectangular wave pulse signal, and is also used to output a constant high level to the second input terminal of the peak hold module when the pulse synchronization signal is a continuous high level; wherein, the pulse synchronization signal is determined according to the pulse power signal; the peak hold module is used to output the currently input first voltage signal when its second input terminal is high level, and the peak hold module is also used to output the first voltage signal corresponding to the most recent high level when its second input terminal is low level; the arithmetic output module amplifies the first voltage signal output by the peak hold module, generates a second voltage signal and outputs it.

[0012] Optionally, the signal acquisition module includes a coaxially arranged module:

[0013] The probe, the first end of which is electrically connected to the circuit under test;

[0014] The metal post is directly electrically connected to the second end of the probe;

[0015] An insulating ring covers the outer periphery of the metal pillar;

[0016] A metal ring covers the insulating ring and is electrically connected to the signal conversion module; wherein the pulse power signal collected by the probe is capacitively coupled to the metal ring via a metal column.

[0017] Optionally, the rectangular wave pulse detection module includes:

[0018] The first NAND gate has its two input terminals electrically connected to each other and receives the pulse synchronization signal;

[0019] The second NAND gate has its two inputs connected in parallel to the output of the first NAND gate, and its output is electrically connected to the second input of the peak hold module.

[0020] Optionally, the rectangular wave pulse detection module is further configured to output a constant high level to the second input terminal of the peak hold module when the pulse synchronization signal is continuously low.

[0021] The rectangular wave pulse detection module includes: a delay unit, an XOR gate, a first NOT gate, and a third NAND gate; wherein, the delay unit receives a pulse synchronization signal at its input terminal; the XOR gate receives the pulse synchronization signal at its first input terminal and its second input terminal is electrically connected to the output terminal of the delay unit; the first NOT gate is electrically connected to the output terminal of the delay unit; the third NAND gate has its first input terminal electrically connected to the output terminal of the first NOT gate, its second input terminal electrically connected to the output terminal of the XOR gate, and its output terminal electrically connected to the second input terminal of the peak hold module.

[0022] Optionally, the signal conversion module includes:

[0023] The step-down unit reduces the pulse power signal output by the metal ring to a third voltage signal;

[0024] The filtering unit filters out high-frequency noise in the third voltage signal to generate a fourth voltage signal;

[0025] The shaping unit shapes the fourth voltage signal into a first voltage signal.

[0026] Optionally, the step-down unit includes a second capacitor and a third capacitor;

[0027] The first terminal of the second capacitor is electrically connected to the metal ring, and the second terminal of the second capacitor is electrically connected to the first terminal of the third capacitor.

[0028] The second terminal of the third capacitor is grounded;

[0029] The filtering unit includes a fourth resistor, a fifth resistor, a fourth capacitor, a sixth resistor, a first inductor, a seventh resistor, a fifth capacitor, and a sixth capacitor;

[0030] The first end of the fourth resistor is electrically connected to the first end of the third capacitor, and the second end of the fourth resistor is grounded.

[0031] The first end of the fifth resistor is electrically connected to the first end of the fourth resistor, and the second end of the fifth resistor is electrically connected to the first end of the fourth capacitor.

[0032] The second terminal of the fourth capacitor is electrically connected to the first terminal of the sixth resistor;

[0033] The second end of the sixth resistor is electrically connected to the first end of the first inductor;

[0034] The second terminal of the first inductor is grounded;

[0035] The first end of the seventh resistor is electrically connected to the first end of the first inductor, and the second end of the seventh resistor is electrically connected to the first end of the fifth capacitor.

[0036] The second terminal of the fifth capacitor is grounded;

[0037] The first terminal of the sixth capacitor is electrically connected to the second terminal of the fifth capacitor, and the second terminal of the sixth capacitor is electrically connected to the second power supply terminal.

[0038] The shaping unit includes a second diode, a third diode, a fourth diode, an eighth resistor, a seventh capacitor, a ninth resistor, and an eighth capacitor;

[0039] The anode of the second diode is electrically connected to the second power supply terminal, and the cathode of the second diode is electrically connected to the anode of the third diode.

[0040] The anode of the third diode is electrically connected to the first terminal of the fifth capacitor, and the cathode of the third diode is electrically connected to the first terminal of the seventh capacitor.

[0041] The first terminal of the seventh capacitor is electrically connected to the third power supply terminal, and the second terminal of the seventh capacitor is grounded.

[0042] The cathode of the fourth diode is electrically connected to the cathode of the second diode, and the anode of the fourth diode is electrically connected to the first terminal of the eighth resistor.

[0043] The second terminal of the eighth resistor is grounded;

[0044] The first terminal of the eighth capacitor is electrically connected to the first terminal of the eighth resistor, and the second terminal of the eighth capacitor is grounded.

[0045] The first end of the ninth resistor is electrically connected to the first end of the eighth resistor, and the second end of the ninth resistor is electrically connected to the first input end of the peak hold module.

[0046] Optionally, the calculation output module includes:

[0047] The first operational amplifier unit receives the output signal from the peak hold module at its non-inverting input terminal, is grounded at its inverting input terminal, and outputs the amplified sixth voltage signal at its output terminal.

[0048] The second operational amplifier unit has its inverting input connected to the output of the first operational amplifier unit, and its output output is a second voltage signal with superimposed bias.

[0049] Optionally, the second end of the probe is provided with an external thread, and the metal post is provided with a matching internal thread, and the second end of the probe is threadedly connected to the metal post.

[0050] Optionally, the insulating ring may be made of polytetrafluoroethylene, perfluoroethylene propylene, ethylene tetrafluoroethylene copolymer, ceramic, or nylon.

[0051] The probe is made of at least one of copper, aluminum, tantalum, and silver.

[0052] The material of the metal pillar includes at least one of copper, aluminum, tantalum and silver;

[0053] The metal ring is made of at least one of copper, aluminum, tantalum, and silver.

[0054] According to another aspect of the present invention, a plasma source system is provided, the plasma source system including a radio frequency power supply module, an impedance matching module, a plasma generator, and a radio frequency voltage sensor provided in any embodiment of the present invention;

[0055] The radio frequency voltage sensor is connected between the impedance matching module and the plasma generator, and is used to monitor the pulse power signal and pulse synchronization signal output by the radio frequency power module in real time.

[0056] This invention provides an RF voltage sensor that receives a pulse synchronization signal corresponding to a pulse power signal. When one cycle of the RF voltage output by the circuit under test includes both non-zero and zero pulse power signals, the pulse synchronization signal is a rectangular wave pulse signal. The first input terminal of the peak hold module in the RF voltage sensor receives a first voltage signal corresponding to the pulse synchronization signal. When the peak hold module receives a high level at its second input terminal, it outputs the currently input first voltage signal. When the peak hold module receives a low level at its second input terminal, its output maintains the first voltage signal corresponding to the previous high level. Therefore, the RF voltage sensor provided in this embodiment does not jump with pulse transitions when acquiring multi-level pulse signals. When one cycle of the RF voltage output by the circuit under test consists entirely of non-zero pulse power signals, the level signal received at the second input terminal of the peak hold module remains high, thereby enabling the operational output module to continuously output a non-zero second level signal. In summary, the radio frequency voltage sensor provided by the embodiments of the present invention can accurately detect the peak voltage corresponding to a single-stage pulse, and can also stably detect the peak voltage corresponding to multiple-stage pulses. It also avoids the output from jumping to zero during the pulse off period, thereby improving the stability and practicality of the measurement.

[0057] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0058] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0059] Figure 1 This is a schematic diagram of the structure of a radio frequency voltage sensor according to an embodiment of the present invention;

[0060] Figure 2 This is a schematic diagram illustrating the timing relationship between a pulse synchronization signal and a pulse power signal according to an embodiment of the present invention.

[0061] Figure 3 This is a schematic diagram illustrating the timing relationship between a pulse synchronization signal and a pulse power signal according to an embodiment of the present invention.

[0062] Figure 4 This is a schematic diagram illustrating the timing relationship between a pulse synchronization signal, a pulse power signal, and a second voltage signal according to an embodiment of the present invention.

[0063] Figure 5 This is a schematic diagram of the structure of a signal acquisition module according to an embodiment of the present invention;

[0064] Figure 6 This is a schematic diagram of the circuit structure of a radio frequency voltage sensor according to an embodiment of the present invention;

[0065] Figure 7 This is a schematic diagram of the circuit structure of another radio frequency voltage sensor provided according to an embodiment of the present invention;

[0066] Figure 8 This is a schematic diagram illustrating the timing relationship of multiple signals according to an embodiment of the present invention;

[0067] Figure 9 This is a schematic diagram of the circuit structure of another radio frequency voltage sensor provided according to an embodiment of the present invention;

[0068] Figure 10 This is another schematic diagram of the timing relationship of multiple signals provided by an embodiment of the present invention;

[0069] Figure 11 This is a schematic diagram of the circuit structure of another radio frequency voltage sensor provided according to an embodiment of the present invention;

[0070] Figure 12 This is a schematic diagram of a plasma source system according to an embodiment of the present invention;

[0071] Among them, 110-signal acquisition module, 120-signal processing circuit, 121-rectangular wave pulse detection module, 122-signal conversion module, 123-peak hold module, 124-operation output module, 111-probe, 112-metal pillar, 113-insulating ring, 114-metal ring, 115-housing, 132-step-down unit, 133-filtering unit, 134-shaping unit, 1231-peak hold unit, 1241-resistance adjustment unit, 1211-delay unit, 1213-differentiating circuit, 100-RF voltage sensor, 200-RF power supply module, 300-impedance matching module, 400-plasma generator. Detailed Implementation

[0072] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0073] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0074] Figure 1 This is a schematic diagram of the structure of a radio frequency voltage sensor according to an embodiment of the present invention. (Refer to...) Figure 1The radio frequency voltage sensor provided in this embodiment includes: a signal acquisition module 110 and a signal processing circuit 120; the signal processing circuit 120 includes a rectangular wave pulse detection module 121, a signal conversion module 122, a peak hold module 123, and a calculation output module 124. The input terminal of the rectangular wave pulse detection module 121 receives a pulse synchronization signal S1; the signal conversion module 122 is connected to the output terminal of the signal acquisition module 110; the first input terminal of the peak hold module 123 is connected to the output terminal of the signal conversion module 122, and the second input terminal of the peak hold module 123 is connected to the output terminal of the rectangular wave pulse detection module 121; the calculation output module 124 is connected to the output terminal of the peak hold module 123; wherein: the signal acquisition module 110 is used to acquire the pulse power signal S2 in the circuit under test; the signal conversion module 122 converts the pulse power signal S2 into a first voltage signal and outputs it to the first input terminal of the peak hold module 123; the rectangular wave pulse detection module 121 is used to detect the pulse synchronization signal S1 in the rectangular wave pulse detection module 121 ... is used to detect the pulse synchronization signal S1 in the rectangular wave pulse detection module 121; the signal conversion module 122 is used to detect the pulse synchronization signal S1 in the rectangular wave pulse detection module 121; the signal conversion module 122 is used to detect the pulse synchronization signal S1 in the rectangular wave pulse detection module 121; the signal conversion module 122 is used to detect the pulse synchronization signal S1 in the rectangular wave pulse detection module 121; the signal conversion module 122 is used to detect When the step signal S1 is a rectangular wave pulse signal, the rectangular wave pulse signal is output to the second input terminal of the peak hold module 123. It is also used to output a constant high level to the second input terminal of the peak hold module 123 when the pulse synchronization signal S1 is continuously high. The pulse synchronization signal S1 is determined according to the pulse power signal S2. The peak hold module 123 is used to output the currently input first voltage signal when its second input terminal is high. The peak hold module 123 is also used to output the first voltage signal corresponding to the most recent high level when its second input terminal is low. The operation output module 124 amplifies the first voltage signal output by the peak hold module 123, generates a second voltage signal, and outputs it.

[0075] Specifically, the radio frequency voltage sensor provided in this embodiment can be used to acquire the pulse power signal S2 in the plasma source system. The pulse power signal S2 is an AC signal, and the first voltage signal and the second voltage signal S3 are DC signals. The calculation output module 124 in the radio frequency voltage sensor provided in this embodiment can be electrically connected to the display module, which can display the value corresponding to the second voltage signal S3. The second voltage signal S3 can be the peak voltage corresponding to the pulse power signal S2.

[0076] The pulse synchronization signal S1 can be either a continuous high level or a rectangular wave pulse signal. The pulse synchronization signal S1 and the pulse power signal S2 can be generated simultaneously by the RF power module, and the pulse synchronization signal S1 is determined based on the pulse power signal S2. When the pulse power signal S2 is not 0, the pulse synchronization signal S1 corresponds to a high level; when the pulse power signal S2 is 0, the pulse synchronization signal S1 corresponds to a low level. If one cycle of the pulse power signal S2 output by the circuit under test includes both a non-zero pulse power signal S2 and a zero pulse power signal S2, then the pulse synchronization signal S1 corresponds to a rectangular wave pulse signal. For example... Figure 2This is a schematic diagram illustrating the timing relationship between a pulse synchronization signal and a pulse power signal according to an embodiment of the present invention. (Refer to...) Figure 2 The pulse power signal S2 has a certain duty cycle, and its corresponding pulse synchronization signal S1 is a rectangular wave pulse signal. From time t1 to time t2, the output of pulse power signal S2 is a sinusoidal radio frequency power signal, and the rectangular wave pulse signal is at a high level to correspond to the pulse output. From time t2 to time t3, there is no radio frequency power signal, and the rectangular wave pulse signal is at a low level to correspond to the pulse being turned off.

[0077] When the output pulse power signal S2 of the circuit under test consists only of a non-zero pulse power signal S2 within one cycle, the pulse synchronization signal S1 can be continuously high. For example, Figure 3 This is a schematic diagram illustrating the timing relationship between a pulse synchronization signal and a pulse power signal according to an embodiment of the present invention. (Refer to...) Figure 3 When the pulse power signal S2 is a continuous sinusoidal RF power signal, that is, the pulse power signal S2 is continuously output, the pulse synchronization signal S1 can be continuously high. When the circuit under test has a continuous pulse power signal S2, the second input terminal of the peak hold module 123 is always high. In this case, the peak hold module 123 outputs the first voltage signal that is currently being input to the first input terminal of the peak hold module 123.

[0078] When the circuit under test does not output the pulse power signal S2, the second input terminal of the peak hold module 123 is at a low level. At this time, in order to avoid the second voltage signal being 0, this embodiment sets the peak hold module 123 to output the first voltage signal corresponding to the most recent high level input to the second input terminal of the peak hold module 123 when its second input terminal is at a low level. For example, Figure 4 This is a schematic diagram illustrating the timing relationship between a pulse synchronization signal, a pulse power signal, and a second voltage signal according to an embodiment of the present invention. (Refer to...) Figure 4 When the output pulse power signal S2 of the circuit under test includes both non-zero pulse power signal S2 and zero pulse power signal S2 within one cycle, the pulse synchronization signal S1 corresponds to a rectangular wave pulse signal, and the second voltage signal S3 outputs the peak value of pulse power signal S2 within one cycle of pulse power signal S2.

[0079] This embodiment provides an RF voltage sensor that receives a pulse synchronization signal corresponding to a pulse power signal. When one cycle of the RF voltage output by the circuit under test includes both non-zero and zero pulse power signals, the pulse synchronization signal is a rectangular wave pulse signal. The first input terminal of the peak hold module in the RF voltage sensor receives the first voltage signal corresponding to the pulse synchronization signal. When the peak hold module receives a high level at its second input terminal, it outputs the currently input first voltage signal. When the peak hold module receives a low level at its second input terminal, its output maintains the first voltage signal corresponding to the previous high level. Therefore, the second voltage signal output by the RF voltage sensor provided in this embodiment does not change with the pulse transitions when acquiring multi-level pulse signals. When one cycle of the RF voltage output by the circuit under test consists entirely of non-zero pulse power signals, the level signal received at the second input terminal of the peak hold module remains high, thereby enabling the operational output module to continuously output a non-zero second level signal. In summary, the RF voltage sensor provided in this embodiment can accurately detect the peak voltage corresponding to a single-stage pulse, as well as stably detect the peak voltage corresponding to multiple-stage pulses, and avoid the output jumping to zero during pulse shutdown, thereby improving the stability and practicality of the measurement.

[0080] Optional, Figure 5 This is a schematic diagram of a signal acquisition module according to an embodiment of the present invention, with reference to... Figure 5 The signal acquisition module 110 includes a probe 111, a metal post 112, an insulating ring 113, and a metal ring 114 arranged coaxially. The first end of the probe 111 is electrically connected to the circuit under test. The metal post 112 is directly electrically connected to the second end of the probe 111. The insulating ring 113 covers the outer periphery of the metal post 112. The metal ring 114 covers the insulating ring 113 and is electrically connected to the signal conversion module 122. The pulse power signal acquired by the probe 111 is capacitively coupled to the metal ring 114 via the metal post 112.

[0081] Specifically, the signal acquisition module 110 may further include a housing 115, which may cover the outer surface of the metal ring 114. The metal ring 114 may be a hollow cylinder. The metal pillar 112, the insulating ring 113, and the metal ring 114 may constitute an equivalent capacitor. The probe 111 transmits the acquired pulse power signal to the metal pillar 112, which couples to the metal ring 114 before transmitting it to the signal conversion module 122. After passing through the metal pillar 112, the insulating ring 113, and the metal ring 114, the pulse power signal is converted into a low-voltage pulse power signal. The equivalent capacitor can reduce the voltage in the pulse power signal in the circuit under test.

[0082] In this embodiment, the equivalent capacitance formed by the metal pillar 112, the insulating ring 113, and the metal ring 114 has strong withstand voltage performance and can withstand high pulse power signals. This makes the RF voltage sensor less susceptible to damage after a sudden change in the pulse power signal, thus improving the reliability of the RF voltage sensor.

[0083] Optional, continue to refer to Figure 5 The insulating ring 113 is made of polytetrafluoroethylene, perfluoroethylene propylene, ethylene tetrafluoroethylene copolymer, ceramic or nylon; the probe 111 is made of at least one of copper, aluminum, tantalum and silver; the metal pillar 112 is made of at least one of copper, aluminum, tantalum and silver; and the metal ring 114 is made of at least one of copper, aluminum, tantalum and silver.

[0084] Specifically, materials such as polytetrafluoroethylene, perfluoroethylene propylene, ethylene tetrafluoroethylene copolymer, ceramics, and nylon are highly reliable, have high and low temperature resistance, and are also resistant to high voltage pulse breakdown.

[0085] Using at least one of copper, aluminum, tantalum, and silver as the material for both probe 111 and metal ring 114 can improve the conductivity of probe 111 and reduce RF impedance. The material of probe 111 can be the same as that of metal ring 114.

[0086] Optional, continue to refer to Figure 5 The second end of the probe 111 is provided with an external thread, and the metal post 112 is provided with a matching internal thread. The second end of the probe 111 is threadedly connected to the metal post 112.

[0087] Specifically, the probe 111 is detachably connected to the metal post 112, which makes it easy to replace the probe 111 individually.

[0088] Optional, Figure 6 This is a schematic diagram of the circuit structure of a radio frequency voltage sensor according to an embodiment of the present invention, for reference. Figure 6 and Figure 1 The rectangular wave pulse detection module 121 includes: a first NAND gate U1 and a second NAND gate U2. The two input terminals of the first NAND gate U1 are electrically connected to each other and receive a pulse synchronization signal S1. The two input terminals of the second NAND gate U2 are connected in parallel to the output terminal of the first NAND gate U1, and its output terminal is electrically connected to the second input terminal of the peak hold module 123.

[0089] Specifically, in this embodiment, the connection method of the first NAND gate U1 and the second NAND gate U2 is configured to ensure that when the input is a rectangular wave pulse signal, the output is a rectangular wave pulse signal, and when the input is a continuous high level, the output is a constant high level. It can also remove noise in the pulse synchronization signal S1.

[0090] Optionally, the rectangular wave pulse detection module 121 is also used to output a constant high level to the second input terminal of the peak hold module 123 when the pulse synchronization signal S1 is continuously low.

[0091] Figure 7 This is a circuit structure diagram of another radio frequency voltage sensor according to an embodiment of the present invention, for reference. Figure 7 and Figure 1 The rectangular wave pulse detection module 121 includes:

[0092] The delay unit 1211 receives the pulse synchronization signal S1 at its input terminal;

[0093] The XOR gate U4 receives the pulse synchronization signal S1 at its first input terminal and is electrically connected to the output terminal of the delay unit 1211 at its second input terminal.

[0094] The input terminal of the first NOT gate U3 is electrically connected to the output terminal of the delay unit 1211;

[0095] The third NAND gate U6 has its first input terminal electrically connected to the output terminal of the first NOT gate U3, its second input terminal electrically connected to the output terminal of the XOR gate U4, and its output terminal electrically connected to the second input terminal of the peak hold module 123.

[0096] Specifically, the delay unit 1211 is used to delay the pulse synchronization signal S1. The delay unit 1211 can delay the pulse synchronization signal S1 by half a cycle. For example, when the duty cycle of the high level in the pulse synchronization signal S1 is 50%, the delay unit 1211 is used to delay the pulse synchronization signal S1 by half a cycle. Figure 8 This is a schematic diagram illustrating the timing relationship of multiple signals according to an embodiment of the present invention. (Refer to...) Figure 8 When the high-level duty cycle of the pulse synchronization signal S1 is 50%, the delay unit 1211 delays the entire pulse synchronization signal S1 by half a cycle to obtain the first delayed signal S4 (the signal output by the output terminal of the delay unit 1211 is the first delayed signal S4). At this time, the rectangular wave pulse detection module 121 outputs the pulse synchronization signal S1 to the second input terminal of the peak hold module 123. When the pulse synchronization signal S1 is continuously high or continuously low, the rectangular wave pulse detection module 121 outputs a constant high level to the second input terminal of the peak hold module 123.

[0097] Figure 9 This is a schematic diagram of the circuit structure of another radio frequency voltage sensor according to an embodiment of the present invention, for reference. Figure 9 The rectangular wave pulse detection module 121 includes:

[0098] The delay unit 1211 receives the pulse synchronization signal S1 at its input terminal;

[0099] The XOR gate U5 receives the pulse synchronization signal S1 at its first input terminal and is electrically connected to the output terminal of the delay unit 1211 at its second input terminal.

[0100] The input terminal of the second NOT gate U7 is electrically connected to the output terminal of the XOR gate U5.

[0101] The input terminal of the first NOT gate U3 is electrically connected to the output terminal of the delay unit 1211;

[0102] The third NAND gate U6 has its first input terminal electrically connected to the output terminal of the second NOT gate U7, its second input terminal electrically connected to the output terminal of the first NOT gate U3, and its output terminal electrically connected to the second input terminal of the peak hold module 123.

[0103] Specifically, the delay unit 1211 can delay the pulse synchronization signal S1 by one cycle, for example, Figure 10 This is another schematic diagram of the timing relationship of multiple signals provided by an embodiment of the present invention, for reference. Figure 10 The delay unit 1211 delays the pulse synchronization signal S1 by one cycle, and the signal output from the output terminal of the delay unit 1211 is recorded as the second delayed signal S5. With this setting, the rectangular wave pulse detection module 121 can output the rectangular wave pulse signal to the second input terminal of the peak hold module 123 when the pulse synchronization signal S1 is a rectangular wave pulse signal, and also output a constant high level to the second input terminal of the peak hold module 123 when the pulse synchronization signal S1 is a continuous high level.

[0104] Optional, continue to refer to Figure 6 , Figure 7 or Figure 9 The signal conversion module includes a step-down unit 132, a filter unit 133, and a shaping unit 134. The step-down unit 132 is used to step down the pulse power signal S2 output by the metal ring 114 into a third voltage signal. The filter unit 133 is used to filter out high-frequency noise in the third voltage signal to generate a fourth voltage signal. The shaping unit 134 is used to shape the fourth voltage signal into a first voltage signal.

[0105] Specifically, the shaping unit 134 transmits the output first voltage signal to the input terminal of the arithmetic output module.

[0106] The pulse power signal acquired from the circuit under test is stepped down by the equivalent capacitance formed by the metal pillar 112, the insulating ring 113 and the metal ring 114, and then stepped down again by the voltage drop unit 132, so as to avoid damage to the filter unit 133 by the high voltage signal.

[0107] The fourth voltage signal is free of noise, thus ensuring that the shaping unit 134 can better shape the fourth voltage signal. The shaped first voltage signal can correspond to the peak value of the pulse power signal when the pulse power signal is not zero.

[0108] Optional, Figure 11 This is a schematic diagram of the circuit structure of another radio frequency voltage sensor according to an embodiment of the present invention, for reference. Figure 11 The rectangular wave pulse detection module 121 includes: a differentiating circuit 1213, a first diode D1, a third NOT gate U8, a first resistor R1, and a fourth NAND gate U9; wherein, the first terminal of the differentiating circuit 1213 is electrically connected to the first terminal of the first resistor R1, the second terminal of the differentiating circuit 1213 is electrically connected to the anode of the first diode D1, the cathode of the first diode D1 is electrically connected to the second terminal of the first resistor R1, the second terminal of the first resistor R1 is electrically connected to the first input terminal of the fourth NAND gate U9; the first terminal of the third NOT gate U8 is electrically connected to the first terminal of the differentiating circuit 1213, the second terminal of the third NOT gate U8 is electrically connected to the second input terminal of the fourth NAND gate U9, and the output terminal of the fourth NAND gate U9 is electrically connected to the second input terminal of the peak hold module.

[0109] Specifically, the differentiating circuit 1213 includes a resistor and a capacitor. The differentiating circuit 1213 is used to convert the rectangular wave pulse signal S1 into a spike pulse signal when the pulse synchronization signal S1 is a rectangular wave pulse signal. It is also used to prevent continuous high or low levels from passing when the pulse synchronization signal S1 is continuously high or continuously low. After passing through the first diode D1, only the high level of the spike pulse signal passes through. The first terminal of the differentiating circuit 1213 is used to receive the pulse synchronization signal S1. The rectangular wave pulse detection module 121 provided in this embodiment can output the rectangular wave pulse signal to the second input terminal of the peak hold module 123 when the pulse synchronization signal S1 is a rectangular wave pulse signal, and also output a constant high level to the second input terminal of the peak hold module 123 when the pulse synchronization signal S1 is continuously high or continuously low.

[0110] Optional, continue to refer to Figure 6 , Figure 7 or Figure 9The step-down unit 132 includes a second capacitor C2 and a third capacitor C3; the first terminal of the second capacitor C2 is electrically connected to the metal ring 114, and the second terminal of the second capacitor C2 is electrically connected to the first terminal of the third capacitor C3; the second terminal of the third capacitor C3 is grounded; the filter unit 133 includes a fourth resistor R4, a fifth resistor R5, a fourth capacitor C4, a sixth resistor R6, a first inductor L1, a seventh resistor R7, a fifth capacitor C5, and a sixth capacitor C6; the first terminal of the fourth resistor R4 is electrically connected to the first terminal of the third capacitor C3, and the second terminal of the fourth resistor R4 is grounded; the fifth resistor R4 is electrically connected to the first terminal of the third capacitor C3, and the second terminal of the fourth resistor R4 is grounded; the fifth resistor R5 is electrically connected to the first terminal of the third capacitor C3, and the second terminal of the third resistor R6 is electrically connected to the first terminal of the third capacitor C3, and the second terminal of the third resistor R7 ... The first terminal of resistor R5 is electrically connected to the first terminal of resistor R4; the second terminal of resistor R5 is electrically connected to the first terminal of capacitor C4; the second terminal of capacitor C4 is electrically connected to the first terminal of resistor R6; the second terminal of resistor R6 is electrically connected to the first terminal of inductor L1; the second terminal of inductor L1 is grounded; the first terminal of resistor R7 is electrically connected to the first terminal of inductor L1; the second terminal of resistor R7 is electrically connected to the first terminal of capacitor C5; the second terminal of capacitor C5 is grounded; the first terminal of capacitor C6 is electrically connected to the second terminal of capacitor C5. The second terminal of the sixth capacitor C6 is electrically connected to the second power supply terminal VCC2; the shaping unit 134 includes a second diode D2, a third diode D3, a fourth diode D4, an eighth resistor R8, a seventh capacitor C7, a ninth resistor R9, and an eighth capacitor C8; the anode of the second diode D2 is electrically connected to the second power supply terminal VCC2, and the cathode of the second diode D2 is electrically connected to the anode of the third diode D3; the anode of the third diode D3 is electrically connected to the first terminal of the fifth capacitor C5, and the cathode of the third diode D3 is electrically connected to the first terminal of the seventh capacitor C7; the seventh The first terminal of capacitor C7 is electrically connected to the third power supply terminal VCC3, and the second terminal of the seventh capacitor C7 is grounded; the cathode of the fourth diode D4 is electrically connected to the cathode of the second diode D2, and the anode of the fourth diode D4 is electrically connected to the first terminal of the eighth resistor R8; the second terminal of the eighth resistor R8 is grounded; the first terminal of the eighth capacitor C8 is electrically connected to the first terminal of the eighth resistor R8, and the second terminal of the eighth capacitor C8 is grounded; the first terminal of the ninth resistor R9 is electrically connected to the first terminal of the eighth resistor R8, and the second terminal of the ninth resistor R9 is electrically connected to the first input terminal of the peak hold module 123.

[0111] Optional, continue to refer to Figure 6 , Figure 7 or Figure 9 The operational output module includes: a first operational amplifier unit, whose non-inverting input receives the output signal of the peak hold module 123, its inverting input is grounded, and its output outputs the amplified sixth voltage signal; and a second operational amplifier unit, whose inverting input is connected to the output of the first operational amplifier unit, and its output Vout outputs the second voltage signal.

[0112] Specifically, the first operational amplifier unit includes: a first operational amplifier, a tenth resistor R10, an eleventh resistor R11, a ninth capacitor C9, a fifth diode D5, and a twelfth resistor R12.

[0113] The second operational amplifier unit includes a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a thirteenth capacitor C13, a fourteenth capacitor C14, a fifteenth capacitor C15, a second operational amplifier, an adjustable resistor RT, a Zener diode DZ, and a resistor adjustment unit 1241.

[0114] The non-inverting input of the first operational amplifier is electrically connected to the output of the peak hold module 123. The inverting input of the first operational amplifier is electrically connected to the first terminal of the tenth resistor R10. The output of the first operational amplifier is electrically connected to the first terminal of the twelfth resistor R12. The second terminal of the tenth resistor R10 is grounded. The first terminal of the eleventh resistor R11 is electrically connected to the first terminal of the tenth resistor R10. The second terminal of the eleventh resistor R11 is electrically connected to the first terminal of the twelfth resistor R12. The first terminal of the ninth capacitor C9 is electrically connected to the first terminal of the tenth resistor R10. The second terminal of the ninth capacitor C9 is electrically connected to the first terminal of the twelfth resistor R12. The anode of the fifth diode D5 is electrically connected to the first terminal of the tenth resistor R10. The cathode of the fifth diode D5 is electrically connected to the first terminal of the twelfth resistor R12. The second terminal of the twelfth resistor R12 is electrically connected to the inverting input of the second operational amplifier.

[0115] The non-inverting input of the second operational amplifier is electrically connected to the first terminal of the tenth capacitor C10, and the second terminal of the tenth capacitor C10 is grounded; the first terminal of the fourteenth resistor R14 is electrically connected to the first terminal of the tenth capacitor C10 and the first terminal of the fifteenth resistor R15, and the second terminal of the fourteenth resistor R14 is electrically connected to the second terminal of the fifteenth resistor R15 and the second terminal of the tenth capacitor C10.

[0116] The first voltage input terminal of the second operational amplifier is electrically connected to the second power supply terminal VCC2, and the second voltage input terminal of the second operational amplifier is electrically connected to the third power supply terminal VCC3. The first terminal of the eleventh capacitor C11 is electrically connected to the first voltage input terminal, and the second terminal of the eleventh capacitor C11 is grounded. The first terminal of the twelfth capacitor C12 is electrically connected to the second voltage input terminal, and the second terminal of the twelfth capacitor C12 is grounded. The output terminal of the second operational amplifier is electrically connected to the first terminal of the thirteenth capacitor C13, and the second terminal of the thirteenth capacitor C13 is electrically connected to the second terminal of the twelfth resistor R12. The cathode of the Zener diode DZ is electrically connected to the third power supply terminal VCC3, and the anode of the Zener diode DZ is electrically connected to the input terminal of the resistor adjustment unit 1241. The output terminal of the resistor adjustment unit 1241 is electrically connected to the first power supply terminal VCC1, the first terminal of the fourteenth capacitor C14, and the adjustable terminal of the adjustable resistor RT; the second terminal of the fourteenth capacitor C14 is grounded. The first terminal of the adjustable resistor RT is electrically connected to the first terminal of the sixteenth resistor R16. The second terminal of the sixteenth resistor R16 is electrically connected to the first terminal of the fourteenth resistor R14. The second terminal of the adjustable resistor RT is electrically connected to the first terminal of the thirteenth resistor R13. The second terminal of the thirteenth resistor R13 is electrically connected to the second terminal of the thirteenth capacitor C13. The first terminal of the thirteenth capacitor C13 is electrically connected to the first terminal of the seventeenth resistor R17. The second terminal of the seventeenth resistor R17 is electrically connected to the first terminal of the fifteenth capacitor C15. The second terminal of the fifteenth capacitor C15 is grounded. The first terminal of the fifteenth capacitor C15 is the output terminal Vout of the RF voltage sensor.

[0117] The peak hold module 123 includes a peak hold unit 1231, an eighteenth capacitor C18, a seventeenth capacitor C17, and a sixteenth capacitor C16. The first input terminal of the peak hold unit 1231 is the first input terminal of the peak hold module, and the second input terminal of the peak hold unit 1231 is the second input terminal of the peak hold module.

[0118] Figure 12 This is a schematic diagram of a plasma source system according to an embodiment of the present invention, with reference to... Figure 12 The plasma source system provided in this embodiment includes an RF power supply module 200, an impedance matching module 300, a plasma generator 400, and an RF voltage sensor 100 provided in any embodiment of the present invention; wherein, the RF voltage sensor 100 is connected between the impedance matching module 300 and the plasma generator 400, and the RF voltage sensor 100 is used to monitor the pulse power signal and pulse synchronization signal output by the RF power supply module 200 in real time.

[0119] Specifically, the impedance matching module 300 is connected between the RF power supply module 200 and the plasma generator 400. The RF power supply module 200 provides RF energy to the plasma generator 400 to ionize the process gas and generate plasma. The impedance matching module 300 is used to achieve impedance matching between the RF power supply module 200 and the plasma generator 400. The impedance matching module 300 may include a fixed capacitor and a fixed inductor connected in series, or it may include a fixed inductor and an adjustable capacitor connected in series, etc.

[0120] The plasma source system provided in this embodiment includes the radio frequency voltage sensor 100 provided in any embodiment of the present invention. Therefore, it has the beneficial effects of the radio frequency voltage sensor 100 provided in any embodiment of the present invention, which will not be described in detail here.

[0121] Optionally, the remote plasma source system provided in this embodiment further includes a directional coupling module and a control module; the control module is electrically connected to the directional coupling module and the radio frequency power supply module; the directional coupling module is used to detect the reverse power in the plasma source system; the control module is used to adjust the output frequency of the radio frequency power supply module according to the reverse power.

[0122] Specifically, the directional coupling module can be electrically connected between the RF power supply module and the impedance matching module. The directional coupling module can send the detected reverse power to the control module. The reverse power can characterize the impedance matching between the RF power supply module and the plasma generator. A large reverse power indicates that the impedance matching between the RF power supply module and the plasma generator does not meet the set requirements.

[0123] The control module can determine the impedance matching between the RF power module and the plasma generator based on the reverse power, and adjust the output power of the RF power module when the reverse power is large in order to reduce the reverse power and thus improve the impedance matching between the RF power module and the plasma generator.

[0124] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0125] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A radio frequency voltage sensor, characterized in that, include: Signal acquisition module and signal processing circuit; The signal processing circuit includes a rectangular wave pulse detection module, a signal conversion module, a peak hold module, and a calculation output module; The input terminal of the rectangular wave pulse detection module receives a pulse synchronization signal; The signal conversion module is connected to the output terminal of the signal acquisition module; The first input terminal of the peak hold module is connected to the output terminal of the signal conversion module, and the second input terminal of the peak hold module is connected to the output terminal of the rectangular wave pulse detection module. The computation output module is connected to the output terminal of the peak hold module; Wherein: the signal acquisition module is used to acquire the pulse power signal in the circuit under test; the signal conversion module converts the pulse power signal into a first voltage signal and outputs it to the first input terminal of the peak hold module; the rectangular wave pulse detection module is used to output the rectangular wave pulse signal to the second input terminal of the peak hold module when the pulse synchronization signal is a rectangular wave pulse signal, and is also used to output a constant high level to the second input terminal of the peak hold module when the pulse synchronization signal is a continuous high level; wherein, the pulse synchronization signal is determined according to the pulse power signal; the peak hold module is used to output the currently input first voltage signal when its second input terminal is high level, and the peak hold module is also used to output the first voltage signal corresponding to the most recent high level when its second input terminal is low level; the arithmetic output module amplifies the first voltage signal output by the peak hold module, generates a second voltage signal and outputs it.

2. The radio frequency voltage sensor according to claim 1, characterized in that, The signal acquisition module includes a coaxially arranged component: The probe, the first end of which is electrically connected to the circuit under test; The metal post is directly electrically connected to the second end of the probe; An insulating ring covers the outer periphery of the metal pillar; A metal ring covers the insulating ring and is electrically connected to the signal conversion module; wherein the pulse power signal collected by the probe is capacitively coupled to the metal ring via a metal column.

3. The radio frequency voltage sensor according to claim 1, characterized in that, The rectangular wave pulse detection module includes: The first NAND gate has its two input terminals electrically connected to each other and receives the pulse synchronization signal; The second NAND gate has its two inputs connected in parallel to the output of the first NAND gate, and its output is electrically connected to the second input of the peak hold module.

4. The radio frequency voltage sensor according to claim 1, characterized in that, The rectangular wave pulse detection module is also used to output a constant high level to the second input terminal of the peak hold module when the pulse synchronization signal is continuously low. The rectangular wave pulse detection module includes: a delay unit, an XOR gate, a first NOT gate, and a third NAND gate; wherein, the delay unit receives a pulse synchronization signal at its input terminal; the XOR gate receives the pulse synchronization signal at its first input terminal and its second input terminal is electrically connected to the output terminal of the delay unit; the first NOT gate is electrically connected to the output terminal of the delay unit; the third NAND gate has its first input terminal electrically connected to the output terminal of the first NOT gate, its second input terminal electrically connected to the output terminal of the XOR gate, and its output terminal electrically connected to the second input terminal of the peak hold module.

5. The radio frequency voltage sensor according to claim 2, characterized in that, The signal conversion module includes: The step-down unit reduces the pulse power signal output by the metal ring to a third voltage signal; The filtering unit filters out high-frequency noise in the third voltage signal to generate a fourth voltage signal; The shaping unit shapes the fourth voltage signal into a first voltage signal.

6. The radio frequency voltage sensor according to claim 5, characterized in that, The step-down unit includes a second capacitor and a third capacitor; The first terminal of the second capacitor is electrically connected to the metal ring, and the second terminal of the second capacitor is electrically connected to the first terminal of the third capacitor; The second terminal of the third capacitor is grounded; The filtering unit includes a fourth resistor, a fifth resistor, a fourth capacitor, a sixth resistor, a first inductor, a seventh resistor, a fifth capacitor, and a sixth capacitor; The first end of the fourth resistor is electrically connected to the first end of the third capacitor, and the second end of the fourth resistor is grounded. The first end of the fifth resistor is electrically connected to the first end of the fourth resistor, and the second end of the fifth resistor is electrically connected to the first end of the fourth capacitor. The second terminal of the fourth capacitor is electrically connected to the first terminal of the sixth resistor; The second end of the sixth resistor is electrically connected to the first end of the first inductor; The second terminal of the first inductor is grounded; The first end of the seventh resistor is electrically connected to the first end of the first inductor, and the second end of the seventh resistor is electrically connected to the first end of the fifth capacitor. The second terminal of the fifth capacitor is grounded; The first terminal of the sixth capacitor is electrically connected to the second terminal of the fifth capacitor, and the second terminal of the sixth capacitor is electrically connected to the second power supply terminal. The shaping unit includes a second diode, a third diode, a fourth diode, an eighth resistor, a seventh capacitor, a ninth resistor, and an eighth capacitor; The anode of the second diode is electrically connected to the second power supply terminal, and the cathode of the second diode is electrically connected to the anode of the third diode. The anode of the third diode is electrically connected to the first terminal of the fifth capacitor, and the cathode of the third diode is electrically connected to the first terminal of the seventh capacitor. The first terminal of the seventh capacitor is electrically connected to the third power supply terminal, and the second terminal of the seventh capacitor is grounded. The cathode of the fourth diode is electrically connected to the cathode of the second diode, and the anode of the fourth diode is electrically connected to the first terminal of the eighth resistor. The second terminal of the eighth resistor is grounded; The first terminal of the eighth capacitor is electrically connected to the first terminal of the eighth resistor, and the second terminal of the eighth capacitor is grounded. The first end of the ninth resistor is electrically connected to the first end of the eighth resistor, and the second end of the ninth resistor is electrically connected to the first input end of the peak hold module.

7. The radio frequency voltage sensor according to claim 1, characterized in that, The operation output module includes: The first operational amplifier unit receives the output signal from the peak hold module at its non-inverting input terminal, is grounded at its inverting input terminal, and outputs the amplified sixth voltage signal at its output terminal. The second operational amplifier unit has its inverting input connected to the output of the first operational amplifier unit, and its output output is a second voltage signal with superimposed bias.

8. The radio frequency voltage sensor according to claim 2, characterized in that, The second end of the probe is provided with an external thread, and the metal post is provided with a matching internal thread. The second end of the probe is threadedly connected to the metal post.

9. The radio frequency voltage sensor according to claim 2, characterized in that, The insulating ring is made of materials including polytetrafluoroethylene, perfluoroethylene propylene, ethylene tetrafluoroethylene copolymer, ceramic, or nylon. The probe is made of at least one of copper, aluminum, tantalum, and silver. The material of the metal pillar includes at least one of copper, aluminum, tantalum and silver; The metal ring is made of at least one of copper, aluminum, tantalum, and silver.

10. A plasma source system, characterized in that, Includes an RF power supply module, an impedance matching module, a plasma generator, and an RF voltage sensor as described in any one of claims 1-9; The radio frequency voltage sensor is connected between the impedance matching module and the plasma generator, and is used to monitor the pulse power signal and pulse synchronization signal output by the radio frequency power module in real time.

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