Signal group delay calculation method
The time-frequency domain alignment and compensation are performed through the signal group delay calculation method, which solves the problem of high PAPR affecting the accuracy of signal group delay measurement, realizes accurate signal group delay measurement under low PAPR conditions, supports different frequency signal combinations and waveforms, and is suitable for distance correction of TOF positioning method.
Patent Information
- Application Number
- CN202410426598.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-10
- Publication Date
- 2025-10-17
AI Technical Summary
Existing signal group delay measurement methods typically require input and output signals of the same frequency, resulting in a high peak-to-average power ratio (PAPR), affecting measurement accuracy and failing to effectively correct for errors in signal propagation time within electronic devices.
A signal group delay calculation method is adopted to perform time domain and frequency domain alignment through a signal generating device and a signal analyzing device, calculate the relative signal group delay, use input and output signals of different frequencies, and adjust the frequency consistency through a mixer. Combined with time-frequency offset compensation and phase smoothing processing, the PAPR impact is reduced.
It realizes accurate calculation of signal group delay under low PAPR conditions, improves measurement accuracy, is suitable for signal group delay measurement of zero IF transmitters and various devices, supports multiple waveform and frequency combinations, and is suitable for distance compensation of TOF positioning method.
Smart Images
Figure CN120802172A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a signal group delay calculation method, and more particularly to a signal group delay calculation method that allows an input signal and an output signal of a device under test to have different frequencies while having a lower PAPR (Peak-to-Average Power Ratio). Background Art
[0002] In recent years, various wireless technologies have introduced indoor positioning technologies. Compared to outdoor positioning devices, indoor positioning technologies have a smaller range but are more accurate. Indoor positioning can use Time of Flight (TOF) to measure distance. TOF calculates the distance between two electronic devices by sending and receiving signals. Figure 1 A schematic diagram of TOF in the well-known technology is shown in FIG. Figure 1 As shown, electronic device D_1 (transmitting device) sends a signal to electronic device D_2 and begins timing (T0). After electronic device D_2 (receiving device) receives the signal (T1), it records the processing time of electronic device D_2 (T2-T1) and transmits a response to electronic device D_1. After receiving the response (T3), electronic device D_1 calculates the total time (T3-T0) and deducts the processing time of electronic device D_2 (T2-T1). This gives the signal propagation time in air. Finally, multiplying this by the speed of light and dividing by the number of round trips, 2, yields the distance between the two electronic devices. The signal's propagation time within the electronic device or circuit, known as group delay, can cause errors in distance measurements. Therefore, measuring group delay is necessary to correct for this error.
[0003] Conventional group delay measurement methods generate an input signal (test signal) to a device under test (DUT) to generate an output signal for measuring group delay. However, conventional group delay measurement methods typically require the input and output signals to have the same frequency, or the test signal frequency is relatively limited. Some group delay measurement methods use multi-tone test signals, but this can result in a high PAPR, thus affecting the accuracy of the group delay measurement. Summary of the Invention
[0004] An object of the present invention is to provide a method for calculating the group delay of signals of a device under test (DUT) with a relatively low PAPR, which allows the input signal and the output signal of the device under test to have different frequencies.
[0005] One embodiment of the present application discloses a signal group delay calculation method used in a signal group delay calculation system, which comprises a signal generating device and a signal analyzing device. The signal group delay calculation method comprises: (a) the signal generating device generates a first input signal to the signal analyzing device according to a control signal; (b) the device under test receives the first input signal to generate a first output signal to the signal analyzing device; (c) the signal analyzing device aligns the first output signal with the first input signal in time domain to generate a second output signal; (d) the signal analyzing device aligns the second output signal with the first input signal in frequency domain to generate a third output signal; and (e) the signal analyzing device calculates a relative signal group delay according to the first input signal and the third output signal, and calculates a signal group delay of a signal transmitted from the signal generating device to the device under test and then to the signal analyzing device according to the relative signal group delay.
[0006] According to the signal group delay calculation method in the foregoing embodiment, the input signal and the output signal do not need to have the same frequency, the frequency of the test signal is less limited, and a multi-tone test signal is not used, so that high PAPR does not affect the accuracy of signal group delay measurement. In addition, a zero intermediate frequency transmitter cannot be measured by a traditional method, but only needs to change the input waveform from double-ended (I+jQ) to single-ended (I+j0) to use the signal group delay calculation method provided by the present application. BRIEF DESCRIPTION OF DRAWINGS
[0007] Figure 1 A schematic diagram of TOF in the prior art is shown. Figure 2 A schematic diagram of a signal group delay calculation system according to one embodiment of the present application is shown. Figure 3 A schematic diagram of a signal group delay calculation system in Figure 2 is shown. Figure 4 A schematic diagram of a signal group delay calculation system according to another embodiment of the present application is shown. Figure 5 A flowchart of actions of a signal group delay calculation system according to one embodiment of the present application is shown. Figure 2 Figure 6 and Figure 7 A schematic diagram of compensation of time offset and frequency offset according to an embodiment of the present application is shown. Figure 8 A schematic diagram of smoothing of phase difference is shown. Figure 9 A flowchart of a signal group delay calculation method according to one embodiment of the present application is shown. DETAILED DESCRIPTION
[0008] The present invention will be described below using multiple embodiments. The terms "first," "second," and similar terms are used solely to define different components, parameters, data, signals, or steps. They are not intended to limit their order. For example, the first device and the second device may have the same structure but be different devices.
[0009] Figure 2 FIG2 shows a schematic diagram of a signal group delay calculation system 200 according to an embodiment of the present invention. The signal group delay calculation system 200 may also be referred to as a signal group delay calculation device 200. Figure 2 As shown, the signal group delay calculation system 200 includes a signal generating device SG and a signal analyzing device SA. The signal generating device SG generates a test signal. This test signal is called an input signal S_I before being input to the device under test DUT, and is called an output signal S_O after being received and output by the device under test DUT. The signal analyzing device SA receives the input signal S_I and the output signal S_O and calculates the signal group delay based on the input signal S_I and the output signal S_O. The steps for calculating the signal group delay will be described in detail below. The signal generating device SG may include a processing circuit, or multiple logic units, or multiple active components / passive components to perform its functions. Similarly, the signal analyzing device SA may include a processing circuit, or multiple logic units, or multiple active components / passive components to perform its functions.
[0010] The signal generator SG and the signal analyzer SA can implement a synchronization mechanism to ensure that their operations are synchronized. In one embodiment, the signal generator SG and the signal analyzer SA use the same synchronization clock signal CLK_S, and the signal generator SG generates a trigger signal TS to the signal analyzer SA for synchronization. Figure 3 Draws Figure 2 Schematic diagram of the trigger signal and test signal of the signal group delay calculation system. Figure 3 As shown, the signal generator SG generates an input signal S_I (test signal) and a trigger signal TS, while the signal analyzer SA receives an output signal S_O and the trigger signal TS generated by the device under test (DUT). Upon receiving the trigger signal TS, the signal analyzer SA starts or prepares to start calculating the signal group delay.
[0011] There is typically a delay TD between the output signal S_O received by the signal analysis device SA and the trigger signal TS. In one embodiment, this delay TD includes three types of delays: TA, TB, and TC. Delay TA is typically a non-fixed delay caused by device settings. For example, after the signal generating device SG and the signal analysis device SA have been operating for a period of time, a delay TA may be generated due to changes in device conditions. Delay TA may also be generated when the signal generating device SG and the signal analysis device SA switch between different modes. Delay TA may also be generated when the signal generating device SG generates a test signal. Delay TB is a fixed delay caused by the environment, such as the delay caused by the signal transmission line. Delay TC is the signal group delay caused by the device under test. The following embodiments can be used to calculate this signal group delay.
[0012] Please come back Figure 2 ,exist Figure 2 In the embodiment, the input signal S_I and the output signal S_O have the same frequency. However, the device under test (DUT) may upconvert or downconvert the input signal S_I, resulting in different frequencies for the input signal S_I and the output signal S_O. In this case, directly calculating the group delay using the input signal S_I and the output signal S_O with different frequencies may result in an incorrect value. Figure 4 A schematic diagram of a signal group delay calculation system 400 according to another embodiment of the present invention is shown. Figure 2 In addition to the components shown, the signal group delay calculation system 400 further includes a mixer Mix, which can change an input frequency of the input signal S_I so that an output frequency of the output signal S_O received by the signal analysis device SA is the same as the input frequency of the input signal S_I.
[0013] The following will be Figure 5 The step of calculating the group delay is described in detail. In one embodiment, the step of calculating the group delay is performed only after confirming that the signal generating device SG does not cause delay or that its delay is negligible. Specifically, this determination step generates a reference input signal S_R (i.e., another input signal) within a predetermined time interval of the input signal S_I. A second time offset between the input signal S_I and the output signal S_O is then calculated, as well as a third time offset between the reference input signal S_R and the output signal S_O. The step of calculating the group delay is performed only when the difference between the second time offset and the third time offset is less than a difference threshold (i.e., the signal generating device SG does not cause delay or causes negligible delay). If the difference is greater than the difference threshold (i.e., the signal generating device SG causes non-negligible delay), the step of calculating the group delay is not performed.
[0014] Figure 5 According to one embodiment of the present invention, Figure 2The flowchart illustrates the actions of the signal group delay calculation system. Please note that, for the convenience of explanation, in the flowchart, the first input signal S_I1 is used to represent the input signal S_I received by the signal analysis device SA, and the first output signal S_O1 is used to represent the output signal S_O received by the signal analysis device SA, and other names are used to represent the signals generated according to the input signal S_I or the output signal S_O. Figure 5 The flowchart of the signal group delay calculation system comprises the following steps: Figure 5 The flowchart of the signal group delay calculation system comprises the following steps:
[0015] Step 501
[0016] The signal analysis device SA captures the first input signal S_I1 and the first output signal S_O1.
[0017] In an embodiment, in order to avoid the influence of signal jitter, the input signal S_I and the output signal S_O are captured for a plurality of signal periods (for example, 100 signal periods) for subsequent calculation.
[0018] Step 503
[0019] The signal analysis device SA aligns the first output signal S_O1 and the first input signal S_I1 in the time domain to generate a second output signal S_O2.
[0020] In an embodiment, a plurality of first time offsets of the first output signal S_O1 and the first input signal S_I1 in a plurality of signal periods are calculated, and a maximum time offset in the plurality of first time offsets is used to compensate the first output signal S_O1 to generate the second output signal S_O2.
[0021] In an embodiment, the first output signal S_O1 is Fourier transformed, time-shifted in the frequency domain, and then inverse Fourier transformed to perform inner product with the first input signal S_I1, and this step is repeated to find the maximum time offset in a plurality of signal periods. One example of the specific equation can be as follows: S_O2temp(t_offset)=IFFT(FFT(S_O1)e jwt_offset ) Corre2(t_offset)=S_I1·S_O2temp(t_offset) S_O2=S_O2temp(t_offset,max)
[0022] This maximum time offset (t_offset,max) can be regarded as the overall time offset of the signal caused by the device under test DUT (that is, the signal group delay of the device under test DUT). Figure 3delay TC). In one embodiment, the first output signal S_Ol is compensated according to this maximum time offset (t_offset, max) to generate a second output signal S_O2. As shown in Figure 6 Figure 8, the first output signal S_Ol after compensation forms the second output signal S_O2, and the waveform of the second output signal S_O2 is identical or similar to the waveform of the first input signal S_Il. Since the waveform of the second output signal S_O2 highly overlaps the waveform of the first input signal S_Il, the waveform of the first input signal S_Il is not shown in Figure 6 Figure 8.
[0023] Step 505
[0024] The signal analysis device SA performs a frequency domain alignment of the second output signal S_O2 with the first input signal S_Il to generate a third output signal S_O3.
[0025] In one embodiment, a plurality of frequency offsets of the second output signal S_O2 with the first input signal S_Il over a plurality of signal periods is calculated, and the second output signal S_O2 is compensated according to a maximum frequency offset of the plurality of frequency offsets to generate the third output signal S_O3.
[0026] In one embodiment, the inner product of the time domain to frequency shifted second output signal S_O2 with the first input signal S_Il is calculated, and this step is repeated to find the maximum frequency offset. One example of the specific equation can be shown as follows: S_O3temp(f_offset) = S_O2e j2πtf_offset Corre3(f_offset) = S_Il • S_O3temp(f_offset) S_O3 = S_O3temp(f_offset, max)
[0027] In one embodiment, the second output signal S_O2 is compensated according to the maximum frequency offset (f_offset, max) to generate the third output signal S_O3. As shown in Figure 7 Figure 9, the second output signal S_O2 after compensation generates the third output signal S_O3. The peak value of the third output signal S_O3 is identical to the peak value of the first input signal S_Il.
[0028] Step 507
[0029] A frequency domain zero point reduction step is performed on the third output signal S_O3 to generate a fourth output signal S_O4, and a frequency domain zero point reduction step is performed on the first input signal S_Il to generate a second input signal S_I2.
[0030] In some cases, if the signal captured in step 501 is too long, many zeros will appear in its frequency domain. In this case, a frequency domain zero reduction step such as downsampling can be used to reduce the zeros. An example of a specific equation is shown below:
[0031] S_O4=down sampling(FFT(S_O3))
[0032] S_I2=down sampling(FFT(S_I1))
[0033] Step 509
[0034] The influence of a DC tone on the phase of the fourth output signal S_O4 is reduced to generate a fifth output signal S_O5.
[0035] If the test signal's waveform frequency band is centered at DC, its phase will be affected by the DC audio. In this case, the average of the two measurement points to the left and right of DC can be used to replace the value. An example of a specific equation is shown below:
[0036] S_O5=ignore DC(S_O4)
[0037] Step 511
[0038] Phase differences between the second input signal S_I2 and the fifth output signal S_O5 are smoothed to obtain phase offsets.
[0039] In detail, the phases of the second input signal S_I2 and the fifth output signal S_O5 are subtracted to obtain a plurality of phase differences, and the smoothing step is to take the average of the plurality of phase differences as the phase offset, for example, taking the average of 20 phase differences as the phase offset.
[0040] Step 513
[0041] A relative group delay is calculated by differentiating the phase offset with respect to at least one angular frequency and adding a negative sign. The maximum time offset calculated in step 503 is added to the relative group delay to calculate the overall group delay.
[0042] In one embodiment, step 511 may be omitted and the phase difference may be directly differentiated with respect to at least one angular frequency to calculate the relative group delay. In this case, the relative group delay signal waveform may be more obviously non-smooth. Figure 8 As shown, the relative group delay signal waveform has a noticeable sawtooth waveform without smoothing in step 511, i.e., the fluctuation is more obvious in a short period of time. After smoothing in step 511, the relative group delay signal waveform has a smoother waveform, i.e., the fluctuation is less in a short period of time.
[0043] In addition, since the relative group delay reflects the delay caused by the frequency offset, the maximum time offset calculated in step 503 is added to the relative group delay to calculate the group delay. In one embodiment, the relative group delay is further calculated based on the delay caused by the environment (i.e. Figure 3 For example, if the signal analysis device SA is as follows Figure 4 As shown, the input signal S_I output by the mixer Mix is received. Since the input signal S_I has been delayed by the mixer Mix, the delay of the mixer Mix must be deducted to obtain the actual signal group delay.
[0044] Figure 5 The steps shown can be used to measure various devices or components. For example, it can be used to measure the transmission path, reception path, or transmission path plus reception path of a signal transceiver device, but it is not limited to this. In addition, the scope of the present invention is not limited to include Figure 5 Of all the steps shown, those skilled in the art may delete or modify some steps according to actual needs. For example, Figure 5 The flowchart may remove at least one of steps 507, 509, and 511. In this case, the signal processed by step 513 will also change accordingly. For example, if steps 507, 509, and 511 are all removed, step 513 will calculate the relative group delay based on the first input signal S_I1 and the third output signal S_O3. In another example, if steps 509 and 511 are both removed, step 513 will calculate the relative group delay based on the second input signal S_I2 and the fourth output signal S_O4. Such variations are intended to be within the scope of the present invention.
[0045] According to the aforementioned embodiments, a signal group delay calculation method can be obtained. Figure 9 A flow chart of a signal group delay calculation method according to an embodiment of the present invention is shown. The signal group delay calculation method is used in a signal group delay calculation system. The signal group delay calculation system includes a signal generating device (e.g. Figure 2 SG in) and a signal analysis device (eg Figure 2 The signal group delay calculation method includes the following steps:
[0046] Step 901
[0047] The signal generating device generates a first input signal (eg Figure 1 The input signal S_I) is sent to the signal analysis device.
[0048] The control signal may be generated by a control circuit (eg, a processing circuit) outside or inside the signal generating device.
[0049] Step 903
[0050] The device under test (e.g. Figure 2 The device under test (DUT) receives a first input signal to generate a first output signal (eg Figure 1 The output signal S_O) is sent to the signal analysis device.
[0051] Step 905
[0052] The signal analysis device performs time domain alignment on the first output signal and the first input signal to generate a second output signal (eg Figure 5 The second output signal S_O2).
[0053] Step 905
[0054] The signal analysis device aligns the first output signal with the first input signal in the frequency domain according to the second output signal to generate a third output signal (eg Figure 5 The third output signal S_O3).
[0055] Step 907
[0056] The signal analysis device calculates a relative group delay according to the first input signal and the third output signal, and calculates a group delay of a signal transmitted from the signal generating device to the device under test and then to the signal analysis device according to the relative group delay.
[0057] Figure 9 The embodiment corresponding to Figure 5 Example without steps 507-511 As mentioned above, if at least one of steps 507-511 is included, the signal used to calculate the relative group delay will be different. Figure 9 The other detailed steps can be inferred from the aforementioned embodiments and are therefore not further described here. After calculating the signal group delay, the signal group delay can be used in various applications. When used in the aforementioned TOF positioning method, the signal group delay can be used to compensate for the signal propagation time in the air to calculate the precise distance between the transmitting and receiving devices.
[0058] The signal group delay calculation method provided by the present invention is not limited to the waveform used, but using a waveform with a low peak-to-average power ratio (PAPR) can achieve better accuracy. For example, a linear frequency modulation signal (e.g., a chirp signal) with a dual-ended input (I + jQ) can be used.
[0059] According to the signal group delay calculation method in the foregoing embodiments, the input signal and the output signal do not need to be of the same frequency, the frequency of the test signal is less limited, and the test signal does not use multi-tone frequency, so there is no high PAPR to affect the accuracy of the signal group delay measurement. In addition, a zero intermediate frequency transmitter cannot be measured by a traditional method, but only needs to change the input waveform from a double-ended (I+jQ) to a single-ended (I+j0) to use the signal group delay calculation method provided by the present application. The above merely describes preferred embodiments of the present application, and any equivalent changes and modifications made according to the claims of the present application should be within the scope of the present application.
Symbol Description
[0060] 200, 400 signal group delay calculation system SG signal generation device SA signal analysis device Mix mixer
Claims
1. A method for calculating a group delay of a signal, used in a group delay calculation system of a signal, wherein the group delay calculation system comprises a signal generating device and a signal analyzing device, wherein: The signal group delay calculation method includes: (a) the signal generating device generates a first input signal to the signal analyzing device according to a control signal; (b) the device under test receives the first input signal to generate a first output signal to the signal analysis device; (c) the signal analysis device performs time domain alignment on the first output signal and the first input signal to generate a second output signal; (d) the signal analysis device aligns the second output signal with the first input signal in the frequency domain to generate a third output signal; and (e) The signal analysis device calculates a relative signal group delay based on the first input signal and the third output signal, and calculates a signal group delay of a signal transmitted from the signal generating device to the device under test and then to the signal analysis device based on the relative signal group delay.
2. The signal group delay calculation method according to claim 1, wherein: This step (e) also Include: performing a frequency domain zero reduction step on the third output signal to generate a fourth output signal; and Performing the frequency domain zero reduction step on the first input signal to generate a second input signal; The relative group delay is calculated according to the second input signal and the fourth output signal.
3. The signal group delay calculation method according to claim 2, wherein: This step (e) also Include: reducing the influence of the DC audio on the phase of the fourth output signal to generate a fifth output signal; and The relative group delay is calculated according to the second input signal and the fifth output signal.
4. The signal group delay calculation method according to claim 3, wherein: This step (e) also Include: smoothing a plurality of phase differences between the second input signal and the fifth output signal to obtain a plurality of phase offsets; and The relative signal group delay is calculated based on the plurality of phase offsets.
5. The signal group delay calculation method according to claim 4, wherein: This step (e) also Include: The relative signal group delay is calculated by differentiating the plurality of phase offsets with respect to at least one angular frequency and adding a negative sign.
6. The method for calculating group delay of a signal according to claim 1, wherein: The step (c) comprises: calculating a plurality of first time offsets between the first output signal and the first input signal within a plurality of signal periods; and The first output signal is compensated with a maximum time offset among the plurality of first time offsets to generate the second output signal.
7. The signal group delay calculation method according to claim 6, wherein: Also includes: The maximum time offset is added to the relative group delay to calculate the group delay.
8. The method for calculating group delay of a signal according to claim 1, wherein: The step (d) comprises: calculating a plurality of frequency offsets between the second output signal and the first input signal within a plurality of signal periods; and The second output signal is compensated with a maximum frequency offset among the plurality of frequency offsets to generate the third output signal.
9. The signal group delay calculation method according to claim 1, wherein: The signal group delay calculation system further includes a mixer for changing an input frequency of the first input signal so that an output frequency of the first output signal received by the signal analysis device is the same as the input frequency.
10. The signal group delay calculation method according to claim 1, wherein: Also includes: generating a reference input signal within a predetermined time period of generating the first input signal; calculating a second time offset between the first input signal and the first output signal; calculating a third time offset between the reference input signal and the first output signal; Step (c), step (d) and step (e) are executed only when the difference between the second time offset and the third time offset is less than a difference threshold value; if the difference is greater than the difference threshold value, step (c), step (d) and step (e) are not executed.