Time domain aviation electromagnetic induction type B field signal acquisition system and method

Abstract

The invention belongs to the field of aviation electromagnetic detection, and particularly relates to a time domain aviation electromagnetic induction type B field signal acquisition system and method, and the system comprises a signal input stage unit which converts an amplified acquisition signal into a single-end induction voltage signal; the reference compensation unit outputs a bipolar reference compensation voltage signal; the signal integration unit receives the single-end induction voltage signal and the reference compensation voltage signal, converts the signals into current signals through an integration resistance network, and outputs an integration reconstruction B field signal; the analog-to-digital conversion unit is used for converting the single-ended induced voltage signal into 24-bit dB / dt acquisition data and converting the integral reconstruction B-field signal into 24-bit integral reconstruction B-field acquisition data; and the digital control logic unit generates compensation data and adds the compensation data with the 24-bit integral reconstruction B-field acquisition data to obtain large-dynamic-range compensation reconstruction B-field acquisition data. According to the invention, the measurement dynamic range of the induction type B field signal is obviously improved, and the deep target detection capability is improved.

Description

TECHNICAL FIELD

[0001] The application belongs to the field of airborne electromagnetic exploration, and particularly relates to a time-domain airborne electromagnetic induction B-field signal acquisition system and method. BACKGROUND

[0002] It has been shown by current research that there is a great difference between the magnetic field intensity B and the magnetic induction dB / dt in the detection ability of underground good conductors, and the B-field has a stronger detection ability for deep good conductors than the dB / dt. Including: from the principle of electromagnetic method, the B-field data has a single solution in the uniform half-space model; the B-field data reflects the deep good conductor earlier and has a larger abnormal amplitude, and is not easily affected by the geomagnetic field background noise; from the frequency component, the power spectrum of the B-field excitation waveform with the same total power has more energy than the dB / dt power spectrum at low frequencies; in the time constant domain of the B-field response, the main time constant range is a range superior to the detection of large time constant target bodies.

[0003] The measurement method of the induction B-field is divided into a numerical integration method and an analog integration method. Most of the current researches are around the numerical integration method of the sampling value of the magnetic induction dB / dt, and then checking or fitting. In the numerical integration method, if the sampling rate of the integrated data magnetic induction dB / dt is too low, the integration result error will increase; and a high sampling rate may cause a large accumulation of quantization error in the reconstruction process, forming a contradictory relationship that is difficult to balance.

[0004] In the prior art, the induced magnetic field value is obtained by the analog integration circuit, but it is found in the comparison results that the advantage of the analog integration method compared with the digital integration method is not obvious, and because the analog integration method needs the complexity of special hardware circuit, the application is not strong. SUMMARY

[0005] The first aspect of the application provides a time-domain airborne electromagnetic induction B-field signal acquisition system, which solves the deficiencies in the background art in the measurement of the induction B-field.

[0006] The second aspect of the application also provides a time-domain airborne electromagnetic induction B-field signal acquisition method.

[0007] According to the time-domain airborne electromagnetic induction B-field signal acquisition system provided by the first aspect of the application, the signal input stage unit selects different channels according to the different types of preamplifiers through which the acquisition signal passes, and converts the amplified acquisition signal into a single-ended induction voltage signal. The signal input stage unit selects different channels according to the different types of preamplifiers through which the acquisition signal passes, and converts the amplified acquisition signal into a single-ended induction voltage signal. The reference compensation unit outputs a bipolar reference compensation voltage signal. The signal integration unit receives the single-ended induction voltage signal and the reference compensation voltage signal, converts them into current signals through an integration resistance network, and outputs the integrated reconstructed B-field signal through a sensitivity-adjustable integrator. The analog-to-digital conversion unit converts the single-ended induction voltage signal into 24-bit dB / dt acquisition data and converts the integrated reconstructed B-field signal into 24-bit integrated reconstructed B-field acquisition data. The digital control logic unit resets the sensitivity-adjustable integrator state before the start of each measurement period, monitors the signal amplitude of the 24-bit integrated reconstructed B-field acquisition data in real time during the signal acquisition process, triggers the compensation mechanism when the 24-bit integrated reconstructed B-field acquisition data is detected to be close to saturation, selects the positive reference compensation voltage signal or the negative reference compensation voltage signal output by the reference compensation unit, and generates 24+N-bit compensation data, which is added to the 24-bit integrated reconstructed B-field acquisition data to obtain 24+N-bit compensated reconstructed B-field acquisition data.

[0008] Further, the signal input stage unit includes an instrument amplifier, a voltage follower, and a gating switch K1. When the differential TEM induction voltage signal is output by the preset amplifier, it is selected to be input to the instrument amplifier. When the single-ended TEM induction voltage signal is output by the preset amplifier, it is selected to be input to the voltage follower. The instrument amplifier or the voltage follower is switched to access the signal integration unit through the gating switch K1.

[0009] Further, the reference compensation unit includes a bipolar reference source and a decoding switch K2. The decoding switch K2 is controlled by the digital control logic unit to select the output of the bipolar reference compensation voltage signal.

[0010] Further, the signal integration unit includes an integration resistance network R1, an integration resistance network R2, and a sensitivity-adjustable integrator. The integration resistance network R1 receives the single-ended induction voltage signal from the signal input stage unit, the integration resistance network R2 receives the reference compensation voltage signal from the reference compensation unit, and the output terminals of the integration resistance network R1 and the integration resistance network R2 are connected to the input terminal of the sensitivity-adjustable integrator.

[0011] Further, the sensitivity-adjustable integrator comprises a differential amplifier U1, an operational amplifier U2, a sensitivity-gating switch K4, three capacitors C1, C2 and C3 with different capacitance values, a discharge resistor R3, a discharge switch K3, a low-pass filter, an adjusting resistor R4 and an adjusting resistor R5; wherein the inverting input terminal of the differential amplifier U1 is used as the input terminal of the sensitivity-adjustable integrator, the non-inverting input terminal is connected to the ground, and the positive output terminal and the negative output terminal are connected to the non-inverting input terminal and the inverting input terminal of the operational amplifier U2, respectively; the common terminal of the sensitivity-gating switch K4 is connected to the inverting input terminal of the differential amplifier U1, and the switching terminal of the sensitivity-gating switch K4 is connected to one end of the capacitor C1, the capacitor C2 or the capacitor C3 through switching, and the other ends of the capacitors C1, C2 and C3 are commonly connected to the output terminal of the operational amplifier U2; the discharge resistor R3 and the discharge switch K3 are connected in series, and then connected in parallel with the sensitivity-gating switch K4 and the series structure of the capacitors C1, C2 or C3 with different capacitance values, the whole parallel structure is used as a feedback loop, and the control terminal of the discharge switch K3 is connected to a digital control logic unit; the input terminal of the low-pass filter is connected to the inverting input terminal of the differential amplifier U1, the output terminal is connected to the positive output terminal of the differential amplifier U1 through the adjusting resistor R4, and the negative output terminal of the differential amplifier U1 is connected to the ground through the adjusting resistor R5, and the adjusting resistor R5 has the same resistance value as the adjusting resistor R4, so as to balance the input resistance value of the operational amplifier U2.

[0012] Further, the digital control logic unit comprises a positive comparator, a negative comparator, a first D flip-flop, a second D flip-flop, an addition-subtraction operator, a multiplier and an adder, wherein the positive comparator and the negative comparator respectively judge whether the input 24-bit integral reconstruction B-field acquisition data is greater than a set positive limit value or a negative limit value, and output a corresponding positive limit value judgment flag signal or a negative limit value judgment flag signal, the output terminal of the positive comparator is connected to the input terminal of the first D flip-flop, the output terminal of the negative comparator is connected to the input terminal of the second D flip-flop, and the first D flip-flop and the second D flip-flop respectively synchronize the positive limit value judgment flag signal and the negative limit value judgment flag signal with a sampling clock, and output to the decoding switch K2, respectively; the addition-subtraction operator subtracts the total number of the positive limit value judgment flag signal and the negative limit value judgment flag signal in one integral period to obtain a number difference; the multiplier converts the number difference into the total integral value in one integral period, and then converts it into 24+N-bit compensation data with the same quantization as the analog-to-digital conversion unit.

[0013] Further, the sampling clock outputs a period reset signal to the sensitivity-adjustable integrator through a counter in a small period of time before the end of each measurement period, so as to reset the sensitivity-adjustable integrator.

[0014] According to the second aspect of the present application, a time-domain airborne electromagnetic induction B-field signal acquisition method is provided, which comprises: According to the type of the preamplifier through which the collected signal passes, different channels are selected to convert the amplified collected signal into a single-ended induced voltage signal; Outputting a reference compensation voltage signal of a bipolarity; Receiving the single-ended induced voltage signal and the reference compensation voltage signal, converting them into current signals respectively, and then outputting an integrated reconstructed B-field signal via a sensitivity-adjustable integrator; Converting the single-ended induced voltage signal into 24-bit dB / dt collected data and converting the integrated reconstructed B-field signal into 24-bit integrated reconstructed B-field collected data; Before the start of each measurement period, the state of the sensitivity-adjustable integrator is reset, and in the signal collection process, the signal amplitude of the 24-bit integrated reconstructed B-field collected data is monitored in real time, when it is detected that the 24-bit integrated reconstructed B-field collected data is close to saturation, a compensation mechanism is triggered, a positive reference compensation voltage signal or a negative reference compensation voltage signal is selected and outputted by the reference compensation unit, and 24+N-bit compensation data is generated and added to the 24-bit integrated reconstructed B-field collected data to obtain 24+N-bit compensation reconstructed B-field collected data.

[0015] Compared with the prior art, the application has the beneficial effects that the embodiments of the application reconstruct the B-field signal through a hardware synchronous integration architecture, combine periodic charge reset with closed-loop reference voltage compensation, and significantly improve the measurement dynamic range of the induced B-field signal in airborne electromagnetic detection and improve the deep target body detection capability. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 A time-domain airborne electromagnetic induced B-field signal collection system structure schematic diagram is provided for the application; Figure 2 A circuit diagram of the time-domain airborne electromagnetic induced B-field signal collection system is provided for the application; Figure 3 A circuit diagram of the sensitivity-adjustable integrator is provided for the embodiments of the application; Figure 4 A collected data compensation reconstruction effect schematic diagram is provided for the embodiments of the application. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical scheme and advantages of the application clearer, the application is further described in detail below with reference to the embodiments. It should be understood that the specific embodiments described herein are only used to explain the application and do not limit the application.

[0018] In combination with Figure 1 and Figure 2 It is shown that the embodiments of the application provide a time-domain airborne electromagnetic induced B-field signal collection system, which comprises: The signal input stage unit selects different channels according to different types of preamplifiers through which the collected signal passes, and converts the amplified collected signal into a single-ended induced voltage signal. The reference compensation unit outputs a bipolar reference compensation voltage signal. The signal integration unit receives the single-ended induced voltage signal and the reference compensation voltage signal, converts them into current signals through an integration resistance network, and outputs an integrated reconstructed B-field signal through a sensitivity-adjustable integrator. The analog-to-digital conversion unit converts the single-ended induced voltage signal into 24-bit dB / dt collection data and converts the integrated reconstructed B-field signal into 24-bit integrated reconstructed B-field collection data. The digital control logic unit resets the sensitivity-adjustable integrator state before the start of each measurement period, monitors the signal amplitude of the 24-bit integrated reconstructed B-field collection data in real time during the signal collection process, and triggers the compensation mechanism when the 24-bit integrated reconstructed B-field collection data is detected to be close to saturation, selects the positive reference compensation voltage signal or the negative reference compensation voltage signal output by the reference compensation unit, and generates 24+N-bit compensation data by adding the 24-bit integrated reconstructed B-field collection data.

[0019] The signal input stage unit includes an instrumentation amplifier, a voltage follower, and a gating switch K1, which can select to process the entire circuit input signal as a differential TEM (transient electromagnetic) induced voltage signal or a single-ended TEM induced voltage signal, uniformly convert the input signal into a single-ended signal, and perform first-stage amplification processing to output the amplified single-ended induced voltage signal.

[0020] The reference compensation unit includes a bipolar reference source and a decoding switch K2, which is controlled by the digital control logic unit to select and output a bipolar reference compensation voltage signal.

[0021] The signal integration unit includes an integration resistance network R1, an integration resistance network R2, and a sensitivity-adjustable integrator. The integration resistance network R1 receives the single-ended induced voltage signal from the signal input stage unit, the integration resistance network R2 receives the reference compensation voltage signal from the reference compensation unit, and the output terminals of the integration resistance network R1 and the integration resistance network R2 are connected to the input terminal of the sensitivity-adjustable integrator. The sensitivity-adjustable integrator outputs an integrated reconstructed B-field signal.

[0022] The analog-to-digital conversion unit includes a 24-bit dual-channel analog-to-digital converter, which converts the amplified single-ended induced voltage signal output by the signal input stage and the integrated reconstructed B-field signal output by the signal integration unit into 24-bit dB / dt collection data and 24-bit integrated reconstructed B-field collection data, respectively.

[0023] The digital control logic unit comprises a positive comparator, a negative comparator, a first D flip-flop, a second D flip-flop, an addition-subtraction operator, a multiplier and an adder, wherein the positive comparator and the negative comparator respectively judge whether the input 24-bit integral reconstruction B-field acquisition data is greater than the set positive limit value or the negative limit value, and output corresponding positive limit value judgment flag signals or negative limit value judgment flag signals, the output end of the positive comparator is connected to the input end of the first D flip-flop, the output end of the negative comparator is connected to the input end of the second D flip-flop, and the first D flip-flop and the second D flip-flop respectively synchronize the positive limit value judgment flag signals and the negative limit value judgment flag signals with the sampling clock, and output to the decoding switch K2 respectively. The addition-subtraction operator subtracts the total number of the positive limit value judgment flag signals and the negative limit value judgment flag signals in an integral period to obtain a number difference value. The multiplier converts the number difference value into the total integral value in the integral period, and then converts the total integral value into 24+N-bit compensation data with the same quantization as the analog-digital conversion unit. The sampling clock outputs a period reset signal to the sensitivity-adjustable integrator through the counter in a small period before the end of each measurement period, so that the sensitivity-adjustable integrator is reset.

[0024] In the embodiment, first, the preamplifier equipped additionally collects the induced electromotive force in the receiving coil. Due to the different structures of the preamplifier, a single-ended TEM induced voltage signal or a differential TEM induced voltage signal can be output. Therefore, an effective channel should be selected through an external control signal. For example, the differential TEM induced voltage signal is converted into a single-ended signal through an instrument amplifier, buffered through a voltage follower, and output as a uniformly amplified single-ended signal with a voltage range of ±10V.

[0025] The reference compensation unit outputs a bipolar reference compensation voltage signal. The bipolar reference voltage source can be realized by an integrated reference voltage chip and an inverting amplifier. The setup time deviation of the decoding switch K2 can be eliminated through pre-calibration, or a bipolar current source structure can be used instead of the bipolar reference voltage source and the integral resistance network R2.

[0026] The pre-calibration link also uses a bipolar reference voltage source as a calibration source. In the calibration of the integral link, the decoding switch K2 is connected to a reference voltage for a period of time, and the actual integral time constant is calculated through the output value data of the sensitivity-adjustable integrator.

[0027] The sensitivity-adjustable integrator needs to be selected from a type with extremely low leakage current, such as a high-quality audio frequency dividing capacitor. The integral resistance network R1 and the integral resistance network R2 should have low relative accuracy and relative temperature coefficient.

[0028] The adjustable sensitivity integrator is described in detail in Figure 3As shown, it comprises: differential amplifier U1, operational amplifier U2, sensitivity gating switch K4, three capacitors C1, C2 and C3 with different capacitance values, discharge resistor R3, discharge switch K3, low-pass filter, adjustment resistor R4 and adjustment resistor R5; wherein the inverting input terminal of the differential amplifier U1 is the input terminal of the sensitivity adjustable integrator, the non-inverting input terminal is grounded, and the positive output terminal and the negative output terminal are connected to the non-inverting input terminal and the inverting input terminal of the operational amplifier U2 respectively; the common terminal of the sensitivity gating switch K4 is connected to the inverting input terminal of the differential amplifier U1, and the switching terminal of the sensitivity gating switch K4 is connected to one end of the capacitor C1, the capacitor C2 or the capacitor C3 through switching, and the other ends of the capacitors C1, C2 and C3 are commonly connected to the output terminal of the operational amplifier U2; The discharge resistor R3 and the discharge switch K3 form a series structure, and then are connected in parallel with the series structure of the sensitivity gating switch K4 and the three capacitors C1, C2 or C3 with different capacitance values, the whole parallel structure serves as a feedback loop, and the control terminal of the discharge switch K3 is connected to the digital control logic unit; the input terminal of the low-pass filter is connected to the inverting input terminal of the differential amplifier U1, the output terminal is connected to the positive output terminal of the differential amplifier U1 through the adjustment resistor R4, and the negative output terminal of the differential amplifier U1 is grounded through the adjustment resistor R5, and the adjustment resistor R5 has the same resistance value as the adjustment resistor R4, so as to balance the input resistance value of the operational amplifier U2.

[0029] The sensitivity condition is realized by switching the integral capacitors with different capacitance values through the gating switch K1, and the resistance value and the establishment time of the gating switch K1 will cause deviation of the output value of the integral link, which can be eliminated in the pre-calibration link. The differential amplifier U1 and the operational amplifier U2 in the adjustable sensitivity integrator form a two-stage amplification structure, the differential amplifier U1 provides high input impedance characteristics, and a JFET input type operational amplifier or a discrete JFET differential amplification circuit should be used, and the operational amplifier U2 increases the driving capability and should have low noise characteristics.

[0030] In order to remove the high input bias voltage characteristics of the differential amplifier U1 and prevent the influence of the bias voltage from continuously accumulating in the integral capacitor, a low-pass filter is used to sample the direct current component on the input side of the differential amplifier U1, and the output bias compensation voltage is used to compensate the differential output terminal of the differential amplifier U1 in real time through the adjustment resistor R4 and the adjustment resistor R5. The low-pass filter samples the input direct current component, and the cut-off frequency can be set to be less than the fundamental frequency of the airborne electromagnetic system, and a zero-bias operational amplifier is used as the input stage of the low-pass filter. The adjustment resistor R4 and the adjustment resistor R5 should be designed as adjustable resistors, and the resistance values of the adjustment resistor R4 and the adjustment resistor R5 are determined by testing the compensation results, so as to form a zero-drift sensitivity adjustable integrator.

[0031] The periodic reset in the sensitivity adjustable integrator is realized by a series structure of the discharge switch K3 and the discharge resistor R3. At the last small time of each measurement period, which can be preset, the reset signal sent by the digital control logic unit makes the discharge switch K3 conductive to trigger the discharge operation. The discharge time constant is determined by the discharge resistor R3, the on-resistance of the discharge switch and the capacitance, and the voltage decay in the discharge process follows the zero-input response of the RC series circuit. In order to achieve better reset effect, the resistance value of the discharge resistor R3 should be as small as possible.

[0032] The analog-to-digital conversion unit adopts a 24-bit Σ-Δ type ADC chip, the front end of which should be configured with a ±10V input driving circuit, and an anti-aliasing filter is integrated inside. The clocks of the two acquisition channels are strictly synchronized. The working mode of the ADC chip can be flexibly configured through the bus interface of the digital logic control unit.

[0033] In the embodiment, the digital control logic unit, the positive comparator and the negative comparator complete the limit value judgment in each sampling clock period. The setting condition of the limit value is that after the limit is reached, the reference compensation voltage signal and the single-ended induced voltage signal of the same polarity continue to be injected for 1 sampling clock period, and the output of the sensitivity adjustable integrator will not still be saturated. The width of the counter should be sufficient to count the product of the sampling clock frequency and the on-time. The adder-subtracter, the counter, the multiplier and the adder should also be synchronized with the sampling clock signal. The multiplier and the adder constitute a multiplication-addition relationship. The multiplier is used to adjust the influence of the reference compensation voltage signal on the output of the sensitivity adjustable integrator to the same quantization as the analog-to-digital conversion unit, and then the addition operation can be performed. The influence of the reference compensation voltage signal on the output of the sensitivity adjustable integrator within one sampling clock period is taken as the minimum quantization value: , wherein is the sampling clock frequency, is the reference compensation voltage signal value, corresponding to the minimum quantization value of the analog-to-digital converter unit .

[0034] The digital control logic unit resets the state of the sensitivity adjustable integrator before the start of each measurement period. During the signal acquisition process, the digital control logic unit monitors the signal amplitude in real time, and immediately triggers the compensation mechanism when the saturation is detected. After a complete measurement period, the 24+N-bit compensation data is generated and added to the 24-bit integral reconstructed B-field acquisition data to obtain 24+N-bit compensation reconstructed B-field acquisition data, as shown in Figure 4 , and Figure 4The dotted line in the figure is 24-bit integral reconstruction B-field acquisition data, and the solid line is 24+N-bit compensation reconstruction B-field acquisition data. It can be seen that the measurement period includes the on-time, off-time and reset time. In the on-time, the clamped 24-bit integral reconstruction B-field acquisition data is compensated to obtain the 24+N-bit compensation reconstruction B-field acquisition data with complete amplitude.

[0035] If the compensation reconstruction process is not required, only the counter and the sampling clock in the digital control logic unit provide periodic integral reset. The regularity of the differential TEM induced voltage signal can set the sensitivity adjustable integrator to low sensitivity, that is, select the highest capacitance of the capacitors C1, C2 and C3, and always disable the reference compensation voltage signal to achieve the unsaturated output of the sensitivity adjustable integrator. At this time, special attention should be paid to the selection of the integral resistor R1 and the low-sensitivity capacitor. When the emission current waveform is a trapezoidal wave or a triangular wave, the selection condition is: , wherein and are the input voltage and the output voltage of the sensitivity adjustable integrator, respectively, is the rise time of the emission trapezoidal wave or triangular wave, represents a sampling period, is the capacitance in the sensitivity adjustable integrator.

[0036] The present application realizes B-field integral reconstruction through a sensitivity adjustable integrator. A low-pass filter is added to the sensitivity adjustable integrator to remove the high input bias voltage characteristic of the differential amplifier U1 through sampling input bias, preventing the influence of the bias voltage from continuously accumulating in the integral capacitor. A discharge switch K3 and a resistor R3 are added to the sensitivity adjustable integrator to form a periodic charge discharge loop. The 24+N-bit compensation reconstruction B-field acquisition data closed-loop compensation loop realizes high resolution. The reference compensation unit outputs a positive reference compensation voltage or a negative reference compensation voltage to the signal integration unit in response to the decoding instruction. The integral reconstruction B-field signal output by the signal integration unit is converted into 24-bit integral reconstruction B-field acquisition data through the analog-to-digital conversion unit. The digital control logic unit enables the positive and negative reference compensation voltages in real time according to the 24-bit integral reconstruction B-field acquisition data, so that the integral reconstruction B-field signal is far away from the power rail. The reference compensation voltage is quantized by the counter and the multiplier to generate 24+N-bit compensation data, which is added to the 24-bit integral reconstruction B-field acquisition data to obtain 24+N-bit compensation reconstruction B-field acquisition data, realizing the acquisition of high dynamic range 24+N-bit compensation reconstruction B-field acquisition data.

[0037] In another aspect, the embodiment of the present application provides a time domain airborne electromagnetic induction B-field signal acquisition method, comprising: according to the different types of preamplifiers through which the acquisition signal passes, selecting different channels, and converting the amplified acquisition signal into a single-ended induction voltage signal; outputting a reference compensation voltage signal of a bipolarity; receiving the single-ended induction voltage signal and the reference compensation voltage signal, converting them into current signals respectively, and then outputting an integrated reconstructed B-field signal via a sensitivity-adjustable integrator; converting the single-ended induction voltage signal into 24-bit dB / dt acquisition data, and converting the integrated reconstructed B-field signal into 24-bit integrated reconstructed B-field acquisition data; resetting the sensitivity-adjustable integrator state before the start of each measurement period, monitoring the signal amplitude of the 24-bit integrated reconstructed B-field acquisition data in real time during the signal acquisition process, triggering a compensation mechanism when the 24-bit integrated reconstructed B-field acquisition data is detected to be close to saturation, selecting the positive reference compensation voltage signal or the negative reference compensation voltage signal output by the reference compensation unit, and generating 24+N-bit compensation data and 24-bit integrated reconstructed B-field acquisition data, and adding them to obtain 24+N-bit compensation reconstructed B-field acquisition data.

[0038] The above merely describes the preferred embodiments of the present application and is not intended to limit the present application. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A time-domain airborne electromagnetic induction B-field signal acquisition system, characterized in that: include: The signal input stage unit selects different channels according to the different types of preamplifiers through which the collected signal passes, and converts the amplified collected signal into a single-ended induced voltage signal; A reference compensation unit outputs a bipolar reference compensation voltage signal; The signal integration unit receives the single-ended induced voltage signal and the reference compensation voltage signal, converts them into current signals through the integration resistor network, and then outputs the integrated reconstructed B-field signal through the sensitivity-adjustable integrator; The analog-to-digital conversion unit converts the single-ended induced voltage signal into 24-bit dB / dt acquisition data and the integral reconstructed B-field signal into 24-bit integral reconstructed B-field acquisition data; The digital control logic unit resets the sensitivity-adjustable integrator state before the start of each measurement cycle. During the signal acquisition process, the signal amplitude of the 24-bit integrally reconstructed B-field acquisition data is monitored in real time. When it is detected that the 24-bit integrally reconstructed B-field acquisition data is approaching saturation, the compensation mechanism is triggered, the reference compensation unit is selected to output a positive reference compensation voltage signal or a negative reference compensation voltage signal, and 24+N-bit compensation data is generated. The data is added to the 24-bit integrally reconstructed B-field acquisition data to obtain 24+N-bit compensated reconstructed B-field acquisition data.

2. The time-domain airborne electromagnetic induction B-field signal acquisition system according to claim 1, characterized in that: The signal input stage unit includes an instrumentation amplifier, a voltage follower and a selection switch K1. When the preamplifier outputs a differential TEM induced voltage signal, it is selected to be input to the instrumentation amplifier. When the preamplifier outputs a single-ended TEM induced voltage signal, it is selected to be input to the voltage follower. The selection switch K1 is used to switch the instrumentation amplifier or the voltage follower to access the signal integration unit.

3. The time-domain airborne electromagnetic induction B-field signal acquisition system according to claim 1, characterized in that: The reference compensation unit includes a bipolar reference source and a decoding switch K2. The decoding switch K2 is controlled by a digital control logic unit to select and output a bipolar reference compensation voltage signal.

4. The time-domain airborne electromagnetic induction B-field signal acquisition system according to claim 1, characterized in that: The signal integration unit includes an integrating resistor network R1, an integrating resistor network R2 and a sensitivity-adjustable integrator. The integrating resistor network R1 receives a single-ended induced voltage signal from the signal input stage unit, and the integrating resistor network R2 receives a reference compensation voltage signal from the reference compensation unit. The output ends of the integrating resistor network R1 and the integrating resistor network R2 are connected to the input end of the sensitivity-adjustable integrator.

5. The time-domain airborne electromagnetic induction B-field signal acquisition system according to claim 3, characterized in that: The sensitivity-adjustable integrator includes: a differential amplifier U1, an operational amplifier U2, a sensitivity selection switch K4, three capacitors C1, C2, and C3 with different capacitances, a discharge resistor R3, a discharge switch K3, a low-pass filter, an adjustment resistor R4, and an adjustment resistor R5; wherein, the inverting input terminal of the differential amplifier U1 serves as the input terminal of the sensitivity-adjustable integrator, the non-inverting input terminal is grounded, and the positive output terminal and the negative output terminal are respectively connected to the non-inverting input terminal and the inverting input terminal of the operational amplifier U2; the common terminal of the sensitivity selection switch K4 is connected to the inverting input terminal of the differential amplifier U1, the switching terminal of the sensitivity selection switch K4 is connected to one end of the capacitor C1, the capacitor C2, or the capacitor C3 through switching, and the other ends of the capacitors C1, C2, and C3 are commonly connected to the output terminal of the operational amplifier U2; After the discharge resistor R3 and the discharge switch K3 form a series structure, they are then connected in parallel with a series structure of a sensitivity selection switch K4 and three capacitors C1, C2, or C3 with different capacitance values. The entire parallel structure serves as a feedback loop, and the control end of the discharge switch K3 is connected to a digital control logic unit. The input end of the low-pass filter is connected to the inverting input end of the differential amplifier U1, and the output end is connected to the positive output end of the differential amplifier U1 through the adjustment resistor R4, while the negative output end of the differential amplifier U1 is grounded through the adjustment resistor R5. The resistance value of the adjustment resistor R5 is equal to that of the adjustment resistor R4 to balance the input resistance value of the operational amplifier U2.

6. The time-domain airborne electromagnetic induction B-field signal acquisition system according to claim 1, characterized in that: The digital control logic unit includes a positive comparator, a negative comparator, a first D flip-flop, a second D flip-flop, an adder-subtractor, a multiplier, and an adder. The positive comparator and the negative comparator respectively determine whether the input 24-bit integrated reconstructed B field acquisition data is greater than a set positive limit value or negative limit value, and output a corresponding positive limit value judgment flag signal or a negative limit value judgment flag signal. The output end of the positive comparator is connected to the input end of the first D flip-flop, and the output end of the negative comparator is connected to the input end of the second D flip-flop. The first D flip-flop and the second D flip-flop respectively synchronize the positive limit value judgment flag signal and the negative limit value judgment flag signal with the sampling clock and output them to the decoding switch K2 respectively. The adder and subtractor subtracts the total number of times the positive limit value judgment flag signal and the total number of times the negative limit value judgment flag signal are generated within an integration period to obtain the difference in number of times; The multiplier converts the number difference into a total integral value within the integration period, and then converts it into 24+N-bit compensation data with the same quantization as the analog-to-digital conversion unit.

7. The time-domain airborne electromagnetic induction B-field signal acquisition system according to claim 6, characterized in that: The sampling clock passes through the counter and outputs a period reset signal to the sensitivity-adjustable integrator a short time before the end of each measurement period, so as to reset the sensitivity-adjustable integrator.

8. A time-domain airborne electromagnetic induction B-field signal acquisition method, using the time-domain airborne electromagnetic induction B-field signal acquisition system according to any one of claims 1 to 7, characterized in that: According to the different types of preamplifiers that the collected signals pass through, different channels are selected to convert the amplified collected signals into single-ended induced voltage signals; Output bipolar reference compensation voltage signal; Receive the single-ended induced voltage signal and the reference compensation voltage signal, convert them into current signals respectively, and then output the integrated reconstructed B-field signal through the sensitivity-adjustable integrator; Convert the single-ended induced voltage signal into 24-bit dB / dt acquisition data, and convert the integral reconstructed B-field signal into 24-bit integral reconstructed B-field acquisition data; Before the start of each measurement cycle, the sensitivity-adjustable integrator state is reset. During the signal acquisition process, the signal amplitude of the 24-bit integrally reconstructed B-field acquisition data is monitored in real time. When it is detected that the 24-bit integrally reconstructed B-field acquisition data is approaching saturation, the compensation mechanism is triggered, and the reference compensation unit is selected to output a positive reference compensation voltage signal or a negative reference compensation voltage signal, and 24+N-bit compensation data is generated and added to the 24-bit integrally reconstructed B-field acquisition data to obtain 24+N-bit compensated reconstructed B-field acquisition data.

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