Silicon optical integrated chip of heterogeneous integrated film lithium niobate modulator and manufacturing method of silicon optical integrated chip

Abstract

The invention discloses a silicon optical integrated chip of a heterogeneous integrated thin film lithium niobate modulator, which comprises a silicon substrate, a silicon dioxide buried oxide layer, a silicon waveguide device layer, a silicon nitride waveguide device layer, a silicon dioxide cladding I, a metal electrode layer I, a thin film lithium niobate waveguide layer, a silicon dioxide cladding II, a metal electrode layer II and a silicon dioxide protection layer, the silicon dioxide buried oxide layer is arranged on the silicon substrate, the silicon waveguide device layer is arranged on the silicon dioxide buried oxide layer, the silicon nitride waveguide device layer is arranged on the silicon waveguide device layer, the metal electrode layer I is arranged on the silicon waveguide device layer, the film lithium niobate waveguide layer is arranged on the silicon dioxide cladding layer I, and the metal electrode layer II is arranged on the silicon dioxide cladding layer II. The invention further discloses a manufacturing method of the silicon optical integrated chip of the heterogeneous integrated film lithium niobate modulator. The method has the advantages that the thin film lithium niobate is heterogeneously integrated on the silicon optical process platform containing the silicon nitride waveguide through chip-wafer or wafer-wafer level bonding or BCB glue bonding and the like.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of modulators, and particularly relates to a silicon optical integrated chip of a heterogeneously integrated thin film lithium niobate modulator and a manufacturing method thereof. BACKGROUND

[0002] With the rapid development of emerging technologies such as big data, artificial intelligence and 5G, people's demand for information capacity and information processing speed is also increasing. At present, on-chip high-speed devices have been realized on different photonic integrated platforms, such as silicon optical, three-five compound semiconductor and silicon dioxide technology platforms.

[0003] The silicon optical technology platform can not only manufacture active devices (such as high-speed modulators, high-speed germanium detectors, monitoring detectors, etc.), but also passive devices (such as optical couplers, optical beam splitters / combiners, wavelength division multiplexing / demultiplexing devices), and has the advantages of low chip cost and strong mass production capacity due to the use of CMOS compatible process. Therefore, the silicon optical technology platform has great development prospects in the field of optical communication and optical interconnection. However, the bandwidth of the silicon optical modulator is limited by the carrier mobility and the series resistance and capacitance corresponding to the PN junction, making it difficult to achieve ultra-high electro-optical bandwidth (bandwidth above 65GHz), which limits the application of silicon optical integrated chips in high-speed scenarios.

[0004] The thin film lithium niobate technology platform is very suitable for manufacturing high-speed and low-loss modulators, but the thin film lithium niobate material cannot realize the function of the detector, and it is difficult to realize passive devices such as large-mode optical couplers.

[0005] As the core device of optical information processing, the electro-optical modulation rate of the electro-optical modulator determines the information transmission rate. The market requires higher integration, speed, power consumption and insertion loss of high-speed modulator chips. However, the principle of silicon-based electro-optical modulators is plasmonic dispersion effect, and the modulation bandwidth is limited by the carrier mobility and the series resistance and capacitance corresponding to the PN junction, making it difficult to achieve ultra-high electro-optical bandwidth (bandwidth above 65GHz).

[0006] Lithium niobate has high electro-optical effect and ultra-wide transparent waveband, and can be used to manufacture electro-optical modulators with large bandwidth, high speed and low power consumption, which has always been concerned. Traditional lithium niobate devices generally prepare waveguides through ion diffusion or proton exchange, and the refractive index difference of the waveguide is small and the size is large. With the development of intelligent cutting technology, high-quality single-crystal lithium niobate thin film wafers can be prepared, and lithium niobate waveguides have large refractive index difference and nanoscale waveguide size. However, lithium niobate on insulator (LNOI) cannot manufacture detectors and has low integration; due to the limitation of material etching, the loss is large, and it is difficult to realize passive devices such as large-mode optical couplers.

[0007] Application, publication number CN 115774300 A, publication date 2023.03.10, invention name: Heterogeneous integration of silicon-based thin film lithium niobate modulator and its manufacturing method. As shown in Figure 1 Figure 1 1-1 is a Si device layer, 2-2 is a SiO2 cladding layer, 3-3 is a substrate Si, 4-4 is an LNOI layer, and 5-5 is a transmission electrode Ti-Au; in the application, only the heterogeneous integration of the electro-optical modulator part is mentioned, and the silicon germanium detector is not mentioned. The lithium niobate waveguide layer is not etched, so the overlap of the optical field and the electric field is poor, and the modulation efficiency is low; in addition, when the lithium niobate waveguide is not etched, the metal electrode can only be above the lithium niobate waveguide layer, and there is no electrode on the silicon optical waveguide. The single-layer metal leads to weak interconnection ability of the electrode; the lithium niobate waveguide layer is not etched, which leads to weak binding of the waveguide to light, which is not conducive to the coupling of light into the optical fiber. SUMMARY

[0008] The technical problem to be solved by the present application is that in the current heterogeneous integration of thin film lithium niobate modulator scheme, there is no compatibility with silicon germanium detectors, and the integration degree is low; the silicon optical platform only makes passive devices, and the electrode is above the lithium niobate waveguide, and the electrode interconnection ability is weak.

[0009] The purpose of the present application is to provide a silicon optical integrated chip of a heterogeneous integrated thin film lithium niobate modulator. The silicon optical integrated chip heterogeneously integrates thin film lithium niobate on a silicon optical process platform containing a silicon nitride waveguide through chip-wafer (Die to wafer) or wafer-wafer (wafer to wafer) bonding or BCB glue bonding, etc. The integrated chip includes a high-speed thin film lithium niobate modulator and a high-speed germanium detector, etc., ensuring high integration degree of the chip while having strong performance advantages, and can meet the demand of the future high-speed, high-density, and large-capacity communication market for optical chips.

[0010] The specific technical solutions adopted are as follows: A silicon optical integrated chip of a heterogeneous integrated thin film lithium niobate modulator, comprising a silicon substrate, a silicon dioxide buried oxygen layer, a silicon waveguide device layer, a silicon nitride waveguide device layer, a silicon dioxide cladding layer I, a metal electrode layer I, a thin film lithium niobate waveguide layer, a silicon dioxide cladding layer II, a metal electrode layer II, and a silicon dioxide protective layer, ​The silicon buried oxide layer is arranged on the silicon substrate, the silicon waveguide device layer is arranged on the silicon buried oxide layer and located in the silica cladding layer I, the silicon nitride waveguide device layer is arranged on the silicon waveguide device layer and located in the silica cladding layer I, the metal electrode layer I is arranged on the silicon waveguide device layer and located in the silica cladding layer I, and the radio frequency signal electrode and the direct current signal electrode are manufactured for the circuit connection of the silicon waveguide device; the thin film lithium niobate waveguide layer is arranged on the silica cladding layer I and located in the silica cladding layer II; and the metal electrode layer II is arranged on the silica cladding layer II and located in the silica protective layer, so that the radio frequency signal electrode and the direct current signal electrode are manufactured for the circuit connection of the thin film lithium niobate waveguide device.

[0011] Further preferably, the silicon waveguide device layer is etched to form an end face coupler, a beam splitter, a beam combiner, a multimode interference coupler, a directional coupler and a polarization beam splitter.

[0012] Further preferably, the silicon nitride waveguide device layer is etched to form an end face coupler, a beam splitter, a beam combiner, a multimode interference coupler and a directional coupler.

[0013] Further preferably, the thin film lithium niobate waveguide layer is obtained by etching the top of a thin film lithium niobate wafer, and the thin film lithium niobate wafer is arranged on the silicon buried oxide layer by bonding or BCB adhesive bonding.

[0014] Further preferably, the thin film lithium niobate wafer is a silicon substrate or a quartz substrate, and the width of the thin film lithium niobate waveguide layer ranges from 600 to 3000 nm and the height ranges from 100 to 1000 nm.

[0015] Further preferably, the metal electrode layer I includes a first-level via, a first metal layer, a second-level via and a second metal layer, the first-level via is arranged on the silicon waveguide device layer, the first metal layer is arranged on the first-level via, the second-level via is arranged on the first metal layer, the second metal layer is arranged on the second-level via, and all of them are arranged in the silica cladding layer I; the thickness of the first metal layer ranges from 300 to 1000 nm, and the thickness of the second metal layer ranges from 1000 to 3000 nm.

[0016] The second object of the present application is to provide a manufacturing method of a silicon optical integrated chip of a heterogeneously integrated thin film lithium niobate modulator, which heterogeneously integrates the thin film lithium niobate on a silicon optical process platform containing a silicon nitride waveguide through die to wafer or wafer to wafer bonding or BCB glue bonding, and the integrated chip simultaneously includes a high-speed thin film lithium niobate modulator and a high-speed germanium detector, etc., so as to ensure high integration of the chip while having strong performance advantages, and to meet the demand of the future high-speed, high-density and large-capacity communication market for optical chips.

[0017] The technical scheme adopted is as follows: The manufacturing method of the silicon optical integrated chip of the heterogeneously integrated thin film lithium niobate modulator comprises the following steps: Step 1, selecting an SOI wafer; Step 2, forming P+ and P++ regions on the top layer of silicon of the SOI wafer through P-type ion implantation; Step 3, etching the top layer of silicon of the SOI wafer to obtain a silicon waveguide, and preparing end face couplers, beam splitters, beam combiners, multimode interference couplers, directional couplers and polarization beam splitters on the silicon waveguide to form a silicon waveguide device layer; wherein part of the P++ region is used as a heater; Step 4, epitaxially generating a germanium layer on the P+ region, growing a polysilicon on the germanium layer, and then forming an N+ region through N-type ion implantation; the P+ region, the germanium layer and the N+ region constitute a silicon germanium detector; Step 5, preparing a silicon nitride waveguide on the silicon waveguide device layer through a plasma enhanced chemical vapor deposition process (PECVD) or a low pressure chemical vapor deposition process (LPCVD), etching the silicon nitride waveguide, and preparing passive devices such as end face couplers, multimode interference couplers and directional couplers; repeating step 3 to form a silicon nitride waveguide device layer; and etching the silicon waveguide and the silicon nitride waveguide to prepare a vertical adiabatic coupler; Step 6, preparing a metal electrode layer I on the P++ region and the N+ region; Step 7, depositing a silicon dioxide cladding layer I on the metal electrode layer I to form a complete silicon optical wafer; Step 8, selecting a thin film lithium niobate wafer, and inverting the thin film lithium niobate wafer on the silicon dioxide cladding layer I through die to wafer or wafer to wafer bonding or BCB glue bonding; Step 9, removing the silicon substrate and the silicon dioxide buried oxide layer of the thin film lithium niobate wafer; Step 10, etching the top of the thin film lithium niobate wafer to form a thin film lithium niobate waveguide layer; Step 11, depositing a silicon dioxide cladding layer II, etching away part of the silicon dioxide cladding layer II in order to prepare a metal electrode on the lithium niobate waveguide, and etching the silicon dioxide cladding layer II and the silicon dioxide cladding layer I in preparation for opening a pad for the silicon optical wafer. Step 12, growing a metal electrode layer II on the silicon dioxide cladding II; wherein the metal electrode layer II, the thin film lithium niobate waveguide layer, and the vertical adiabatic coupler constitute a heterogeneous integrated thin film lithium niobate modulator; Step 13, depositing a silicon dioxide protective layer, etching the silicon dioxide protective layer on the metal electrode layer II, and depositing metal to form a pad.

[0018] Further preferably, in step 5, a vertical adiabatic coupler is prepared between the silicon nitride waveguides of the adjacent two layers, and the vertical adiabatic coupler can be a tapered coupling structure, a directional coupler structure, or other types of coupler structures, which helps to reduce the loss and crosstalk of the coupler.

[0019] Further preferably, in step 12, the material of the metal electrode layer II is gold or aluminum. Gold and aluminum are common metal electrode materials.

[0020] Further preferably, the radio frequency signal electrode on the metal electrode layer II is a common rectangular electrode or a capacitive load electrode structure, which helps to further improve the bandwidth of the modulator.

[0021] Compared with the prior art, the present application has the following beneficial effects: The silicon optical integrated chip of the present application is heterogeneously integrated with the thin film lithium niobate on the silicon optical process platform containing the silicon nitride waveguide through the bonding of chip to wafer or wafer to wafer or the bonding of BCB glue, etc., and the integrated chip simultaneously includes a high-speed thin film lithium niobate modulator and a high-speed germanium detector, etc., which ensures high integration degree of the chip while having strong performance advantages such as high speed and low loss.

[0022] The silicon optical integrated chip of the present application is heterogeneously integrated with the lithium niobate after the metal electrode is made on the silicon optical platform (i.e., the metal electrode layer I), and the multiple layers of metal improve the electrode interconnection capability, which helps to parallel the multiple direct current signals and radio frequency signals required for the operation of the modulator and the detector on the integrated chip.

[0023] The manufacturing method of the present application proposes multiple ways of heterogeneously integrating the silicon optical wafer and the thin film lithium niobate wafer, which provides a path for realizing low cost and high yield of heterogenous integration; in addition, the present application makes multiple layers of metal electrodes and multiple layers of silicon nitride on the silicon optical wafer to make vertical couplers, which improves the electrode interconnection capability while ensuring low loss, and the single layer of metal electrode and the double layer of silicon nitride process matching help to reduce the process difficulty and further reduce the link loss. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 is a chip structure schematic diagram of the prior art; Figure 21 is a schematic structural diagram of the silicon photonic integrated chip of Example 1; Figures 3(a) to 3(h) are schematic diagrams of the fabrication process of the silicon photonic integrated chip of Example 1 (Figure 3(a) shows the processed silicon photonic wafer, Figure 3(b) shows the thin-film lithium niobate wafer, Figure 3(c) shows wafer bonding, Figure 3(d) shows the removal of the oxide layer from the substrate of the thin-film lithium niobate wafer, Figure 3(e) shows the preparation of the thin-film lithium niobate waveguide layer, Figure 3(f) shows the deposition of the silicon oxide cladding layer, Figure 3(g) shows the preparation of the metal electrode, and Figure 3(h) shows the opening of the pad); Figure 4 Schematic diagram of the structure of the silicon photonic integrated chip of Example 3; Among them, 1-silicon substrate, 2-silicon dioxide buried oxide layer, 3-silicon waveguide, 4-silicon nitride waveguide I, 5-silicon nitride waveguide II, 6-silicon nitride waveguide III, 7-germanium layer, 8-silicon dioxide cladding I, 9-thin-film lithium niobate waveguide layer, 10-primary through hole, 11-first metal layer, 12-secondary through hole, 13-second metal layer, 14-silicon dioxide cladding II, 15-metal electrode layer II, 16-silicon dioxide protective layer, 17-vertical adiabatic coupler, 18-heater, 19-silicon germanium detector, 20-thin-film lithium niobate modulator. DETAILED DESCRIPTION

[0025] In order to make the purpose, technical solutions and advantages of the present invention more clear, the following Figures 1-4 The present invention is further described in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely for explaining the present invention and are not intended to limit the present invention. In addition, the technical features involved in the various embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.

[0026] Example 1 like Figure 2 As shown, this embodiment is a silicon photonic integrated chip of a heterogeneous integrated thin film lithium niobate modulator, including a silicon substrate 1, a silicon dioxide buried oxide layer 2, a silicon waveguide device layer, a silicon nitride waveguide device layer, a silicon dioxide cladding layer I8, a metal electrode layer I, a thin film lithium niobate waveguide layer 9, a silicon dioxide cladding layer II14, a metal electrode layer II15 and a silicon dioxide protective layer 16.

[0027] The silicon dioxide buried oxide layer 2 is disposed on the silicon substrate 1, the silicon waveguide device layer is disposed on the silicon dioxide buried oxide layer 2 and located in the silicon dioxide cladding layer I 8, the silicon nitride waveguide device layer is disposed on the silicon waveguide device layer and located in the silicon dioxide cladding layer I 8, the metal electrode layer I is disposed on the silicon waveguide device layer and located in the silicon dioxide cladding layer I 8, and the radio frequency signal electrode and the direct current signal electrode are made for the circuit connection of the silicon waveguide device; the thin film lithium niobate waveguide layer 9 is disposed on the silicon dioxide cladding layer I 8 and located in the silicon dioxide cladding layer II 14; and the metal electrode layer II 15 is disposed on the silicon dioxide cladding layer II 14 and located in the silicon dioxide protective layer 16, and the radio frequency signal electrode and the direct current signal electrode are made for the circuit connection of the thin film lithium niobate waveguide device.

[0028] In the embodiment, the top layer silicon of the SOI wafer is etched, the top layer silicon of the SOI wafer is etched to form the silicon waveguide 3 through a CMOS compatible process, and the silicon waveguide 3 is preferably 300-1000 nm in width and 100-500 nm in waveguide height.

[0029] The SOI wafer is known to those skilled in the art, and the SOI wafer includes a silicon substrate, a buried oxide layer and a top layer silicon.

[0030] In the embodiment, the silicon nitride waveguide device layer is prepared by using a plasma enhanced chemical vapor deposition process PECVD or a low pressure chemical vapor deposition process LPCVD on the silicon waveguide device layer, and the silicon nitride waveguide is etched.

[0031] In the embodiment, three layers of silicon nitride waveguides are prepared on the silicon waveguide device layer, and the specific structure of the vertical adiabatic coupler 17 is formed by etching the silicon waveguide 3 and the silicon nitride waveguide between the layers of the silicon waveguide 3 and the silicon nitride waveguide.

[0032] In the embodiment, the vertical adiabatic coupler 17 guides the light of the silicon waveguide 3 into the silicon nitride waveguide I 4, the silicon nitride waveguide I 4 guides the light into the silicon nitride waveguide II 5, the silicon nitride waveguide II 5 guides the light into the silicon nitride waveguide III 6, and the silicon nitride waveguide III 6 guides the light into the thin film lithium niobate waveguide layer 9. The structure of the vertical adiabatic coupler 17 can be a tapered coupling structure, a directional coupler structure or other types of structures.

[0033] In the embodiment, the thickness of the silicon nitride of the silicon nitride waveguide is 100-400 nm.

[0034] Further, in the embodiment, the silicon waveguide 3, the silicon nitride waveguide I 4, the silicon nitride waveguide II 5 and the silicon nitride waveguide III 6 can each be made into a directional coupler structure.

[0035] In the embodiment, the heater 18 is formed by doping the silicon waveguide 3, and preferably, a P++ region is formed by P-type ion implantation on the top layer silicon of the SOI wafer.

[0036] Further, the heater 18 can also be formed on the metal electrode layer on the thin film lithium niobate waveguide layer 9 by metal deposition, etching and other processes.

[0037] In this embodiment, the metal electrode layer I includes a first through hole 10, a first metal layer 11, a second through hole 12 and a second metal layer 13. The first through hole 10 is disposed on the silicon waveguide device layer, the first metal layer 11 is disposed on the first through hole 10, the second through hole 12 is disposed on the first metal layer 11, and the second metal layer 13 is disposed on the second through hole 12, and all are disposed in the silicon dioxide cladding layer I 8. The thickness of the first metal layer 11 ranges from 300 to 1000 nm, and the thickness of the second metal layer 13 ranges from 1000 to 3000 nm. The two metal layers form the electrode structure of the silicon germanium detector 19.

[0038] In this embodiment, the silicon germanium detector 19 is an epitaxial germanium layer 7 on the silicon waveguide 3, which is compatible with the CMOS process. The thickness of the germanium layer 7 ranges from 300 to 1000 nm, and the width ranges from 1 to 20 μm.

[0039] In this embodiment, the thin film lithium niobate waveguide layer 9 is obtained by etching the top of the thin film lithium niobate wafer, and the thin film lithium niobate wafer is bonded or bonded by BCB glue to the silicon dioxide buried oxygen layer 2. The thin film lithium niobate wafer is a silicon substrate or a quartz substrate; the thin film lithium niobate wafer is a product known to those skilled in the art.

[0040] The silicon optical integrated chip of the hetero-integrated thin film lithium niobate modulator of this embodiment is bonded or bonded by BCB glue in a chip-wafer (Die to wafer) or wafer-wafer (wafer to wafer) manner to heterogeneously integrate the thin film lithium niobate on the silicon optical process platform containing the silicon nitride waveguide.

[0041] In this embodiment, the thin film lithium niobate modulator 20 includes a thin film lithium niobate waveguide layer 9 and a metal electrode layer II 15. The metal electrode layer II 15 is disposed on the silicon dioxide cladding layer II 14 and in the silicon dioxide protective layer 16. The metal electrode layer II 15 serves as a traveling wave electrode of the thin film lithium niobate modulator 20, and the material can be gold or aluminum. The traveling wave electrode structure can be a rectangular waveguide structure, a T-shaped structure or other types of electrodes.

[0042] This embodiment proposes a method for manufacturing a silicon optical integrated chip of a heterogeneously integrated thin film lithium niobate modulator, which includes the following steps: Step 1, select an SOI wafer; Step 2, by injecting group III elements into the top layer of silicon, forming P-type middle-doped region P+ region, the preferred range of doping concentration is about 1E17~1E19, P-type heavily doped region P++ region, the preferred range of doping concentration is about 1E20~1E23. The doping concentration of P-type heavily doped region P++ region is higher than that of P-type middle-doped region P+ region; rapid thermal annealing is carried out for ion activation; Step 3, etching the top layer of silicon of SOI wafer by CMOS compatible process to obtain silicon waveguide 3, preparing end face coupler, multimode interference coupler, directional coupler and polarization beam splitter on the silicon waveguide 3, forming silicon waveguide device layer; etching the region after heavy doping to form doped P++ silicon waveguide, preparing heater 18. Etching the region after middle doping to form doped P+ waveguide, preparing P-type doped region of silicon germanium detector. The heater 18 can also be deposited on the silicon waveguide layer by TiN, and etched to form. The heater 18 can also be formed by depositing TiN on the metal electrode layer II 15 on the thin film lithium niobate waveguide layer 9, and etching; Step 4, epitaxial germanium layer 7 on P+ silicon waveguide, compatible with CMOS process, prepare silicon germanium detector 19. The thickness of germanium layer 7 is 300-1000nm, and the width is 1-20μm. Polysilicon is grown on the Ge layer, group V elements are injected into the polysilicon to form N-type middle-doped region N+ region, and the preferred range of doping concentration is about 1E17~1E19. Etching the region after middle doping to form doped P+ waveguide, preparing N-type doped region of silicon germanium detector. N-type doped region, germanium layer 7, P-type doped region constitute silicon germanium detector 19; Step 5, depositing silicon dioxide cladding on the silicon waveguide layer, preparing the first layer of silicon nitride waveguide layer by low pressure chemical vapor deposition process LPCVD or plasma enhanced chemical vapor deposition process PECVD, etching to form silicon nitride waveguide I 4, and then depositing silicon dioxide; preparing the second layer of silicon nitride layer by low pressure chemical vapor deposition process LPCVD or plasma enhanced chemical vapor deposition process PECVD, etching to form silicon nitride waveguide II 5, and then depositing silicon dioxide. Preparing the third layer of silicon nitride layer by low pressure chemical vapor deposition process LPCVD or plasma enhanced chemical vapor deposition process PECVD, etching to form silicon nitride waveguide III 6, and then depositing silicon dioxide. The preferred thickness of silicon nitride waveguide is 100-400nm; Further, in this embodiment, silicon waveguide 3, silicon nitride waveguide I 4, silicon nitride waveguide II 5, silicon nitride waveguide III 6, each layer can be made of silicon nitride end face coupler, silicon nitride multimode interference coupler, silicon nitride directional coupler and other optical passive devices. The loss of silicon nitride waveguide is smaller, which is more suitable for preparing optical passive devices. Silicon nitride end face coupler or grating coupler can be used for chip and fiber or laser coupling. Silicon nitride beam splitter, silicon nitride combiner, silicon nitride multimode interference coupler, silicon nitride directional coupler can be used for beam splitting, beam combining and routing.

[0043] In this embodiment, three layers of silicon nitride waveguides are prepared on the silicon waveguide device layer, silicon waveguide 3, silicon nitride waveguide I 4, silicon nitride waveguide II 5, silicon nitride waveguide III 6, to form the specific structure of the vertical adiabatic coupler 17. The vertical adiabatic coupler 17 guides the light from the silicon waveguide 3 to the silicon nitride waveguide I 4, the silicon nitride waveguide I 4 to the silicon nitride waveguide II 5, the silicon nitride waveguide II 5 to the silicon nitride waveguide III 6, and the silicon nitride waveguide III 6 to the thin film lithium niobate waveguide layer 9. The structure of the vertical adiabatic coupler 17 can be a tapered coupling structure, a directional coupler structure or other types of structures. The vertical adiabatic coupler 17 can be used for the coupling transmission of light between the silicon waveguide and the thin film lithium niobate waveguide layer 9.

[0044] Step 6, etch the silicon dioxide above the P++ region and the N+ region, deposit metal to form a primary via hole 10. After chemical mechanical polishing, deposit metal, etch to prepare a first metal layer 11, which can be Al or Cu; Step 7, deposit a silicon dioxide cladding layer on the first metal layer 11, etch the silicon dioxide above the first metal layer 11, deposit metal to form a secondary via hole 12. After chemical mechanical polishing, deposit metal, etch to prepare a second metal layer 13, which can be Al or Cu. Deposit a silicon dioxide cladding layer I 8 and perform chemical mechanical polishing to reduce surface roughness to form a complete silicon optical wafer. As shown in FIG. 3(a).

[0045] Step 8, select a thin film lithium niobate wafer, as shown in FIG. 3(b), perform chemical mechanical polishing, and realize hetero-integration by wafer-wafer bonding: after cleaning the two wafers, perform plasma activation; or use BCB glue to realize hetero-integration: spin-coat BCB glue on the surface of the silicon optical wafer in step 7. Then align: invert the thin film lithium niobate wafer on the silicon dioxide cladding layer I 8, as shown in FIG. 3(c); the lithium niobate waveguide needs to be aligned with the position of the silicon nitride waveguide, so that the light of the silicon nitride waveguide can be coupled into the thin film lithium niobate waveguide; perform rapid thermal treatment.

[0046] Step 9, strip the silicon substrate and the silicon dioxide buried oxide layer of the thin film lithium niobate wafer by mechanical grinding, selective etching, etc.; the lithium niobate thin film is attached to the surface of the silicon optical wafer in step 7, and then annealing and chemical mechanical polishing are performed. As shown in FIG. 3(d).

[0047] Step 10, etching the top layer of thin film lithium niobate left on the thin film lithium niobate wafer to form a thin film lithium niobate waveguide layer 9. The waveguide etching angle is 60-90 degrees, the width of the thin film lithium niobate waveguide in the thin film lithium niobate waveguide layer 9 ranges from 600-3000 nm, and the height ranges from 100-900 nm. As shown in Figure 3 (e). Thin film lithium niobate waveguides, thin film lithium niobate multimode interference couplers, and thin film lithium niobate directional couplers can be fabricated on the thin film lithium niobate waveguide layer 9. Among them, the thin film lithium niobate multimode interference coupler, the silicon nitride waveguide, the thin film lithium niobate waveguide layer 9, and the vertical adiabatic coupler 17 constitute a Mach-Zehnder interferometer structure; the silicon nitride waveguide here is used for light transmission and can be on any layer of the silicon waveguide or the three-layer silicon nitride waveguide; the thin film lithium niobate multimode interference coupler is used for beam splitting and beam combining, and such beam splitter and beam combiner can be a multimode interference coupler or a directional coupler; it can be on any layer of the silicon waveguide or the three-layer silicon nitride waveguide.

[0048] Step 11, depositing a silicon dioxide cladding layer II 14. Etching the silicon dioxide cladding layer II 14 above the lithium niobate waveguide flat plate area; then etching the silicon dioxide cladding layer II 14 and the silicon dioxide cladding layer I 8 to expose the second metal layer 13 of the silicon optical wafer. As shown in Figure 3 (f).

[0049] Step 12, depositing metal to form a metal electrode layer II 15, preferably with a thickness ranging from 0.5 um to 3 um. As shown in Figure 3 (g). Among them, the metal electrode layer II 15 and the Mach-Zehnder interferometer structure composed of the thin film lithium niobate multimode interference coupler, the silicon nitride waveguide, the thin film lithium niobate waveguide layer 9, and the vertical adiabatic coupler 17 together constitute a hetero-integrated thin film lithium niobate modulator 20.

[0050] Step 13, depositing a silicon dioxide protective layer 16, etching the silicon dioxide on the metal electrode layer II 15, depositing metal to form a Pad. As shown in Figure 3 (h).

[0051] Example 2 Based on Example 1, the difference between this embodiment and the former is that the previous steps are the same; the different steps are as follows: Step 8, select a thin film lithium niobate wafer, divide the wafer into thin film lithium niobate chips, and invert the thin film lithium niobate chips on the silicon dioxide cladding layer I 8 through chip-wafer bonding; the position of the lithium niobate waveguide needs to be aligned with that of the silicon nitride waveguide to enable the light in the silicon nitride waveguide to be coupled into the thin film lithium niobate waveguide.

[0052] Step 9, peeling off the silicon substrate 1 and the silicon dioxide buried oxygen layer 2 of the thin film lithium niobate chip; Step 10: Etch the remaining top layer of the thin-film lithium niobate chip to form a thin-film lithium niobate waveguide layer 9. Thin-film lithium niobate waveguides, thin-film lithium niobate multimode interference couplers, and thin-film lithium niobate directional couplers can be fabricated on the thin-film lithium niobate waveguide layer 9. The thin-film lithium niobate multimode interference coupler, silicon nitride waveguide, thin-film lithium niobate waveguide layer 9, and vertical adiabatic coupler 17 constitute a Mach-Zehnder interferometer structure. The silicon nitride waveguide is used for optical transmission and can be in any layer of a silicon waveguide or a three-layer silicon nitride waveguide. The thin-film lithium niobate multimode interference coupler is used for beam splitting and combining. Such a beam splitter or combiner can be a multimode interference coupler or a directional coupler and can be in any layer of a silicon waveguide or a three-layer silicon nitride waveguide.

[0053] Step 11: Deposit a silicon dioxide cladding layer II 14. Etch the silicon dioxide cladding layer II 14 above the lithium niobate waveguide slab area; then etch the silicon dioxide cladding layer II 14 and the silicon dioxide cladding layer I 8 to expose the second metal layer 13 of the silicon photonic wafer.

[0054] Step 12: depositing metal to form a metal electrode layer II 15, wherein the metal electrode layer II 15, the thin-film lithium niobate multimode interference coupler, the silicon nitride waveguide, the thin-film lithium niobate waveguide layer 9, and the vertical adiabatic coupler 17 together form a Mach-Zehnder interferometer structure, which together constitute a thin-film lithium niobate modulator 20; Step 13: deposit a silicon dioxide protective layer 16, etch the silicon dioxide on the metal electrode layer II 15, and deposit metal to form a Pad.

[0055] Example 3 like Figure 4 As shown, the difference between this embodiment and embodiment 1 is that: The structural difference of the "silicon photonic integrated chip with a heterogeneous integrated thin-film lithium niobate modulator" proposed in this embodiment is that two layers of silicon nitride waveguides are provided, and at the same time, the metal electrode layer I is only provided with a primary through hole 10 and a first metal layer 11, and both are placed in the silicon dioxide cladding layer I8.

[0056] The difference in the method for manufacturing a silicon photonic integrated chip with a heterogeneous integrated thin film lithium niobate modulator proposed in this embodiment is: Step 5: Deposit a silicon dioxide cladding layer on the silicon waveguide layer. A first silicon nitride waveguide layer is formed using low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition (PECVD). This layer is etched to form silicon nitride waveguide I 4, followed by silicon dioxide deposition. A second silicon nitride layer is formed using low-pressure chemical vapor deposition (LPCVD) or plasma-enhanced chemical vapor deposition (PECVD). This layer is etched to form silicon nitride waveguide II 5, followed by silicon dioxide deposition. The preferred thickness of the silicon nitride waveguide is 100-400 nm.

[0057] Further, in this embodiment, the silicon waveguide 3, the silicon nitride waveguide I 4, and the silicon nitride waveguide II 5 can each be used to fabricate a silicon nitride end-face coupler, a silicon nitride multimode interference coupler, a silicon nitride directional coupler, and the like. The silicon nitride waveguide has a smaller loss and is more suitable for fabricating an optical passive device. The silicon nitride end-face coupler or the grating coupler can be used for coupling a chip with an optical fiber or a laser. The silicon nitride beam splitter, the silicon nitride beam combiner, the silicon nitride multimode interference coupler, and the silicon nitride directional coupler can be used for splitting, combining, and routing light.

[0058] In this embodiment, two layers of silicon nitride waveguides are fabricated on the silicon waveguide device layer, the silicon waveguide 3, the silicon nitride waveguide I 4, and the silicon nitride waveguide II 5, to form a specific structure of the vertical adiabatic coupler 17. The vertical adiabatic coupler 17 guides light from the silicon waveguide 3 into the silicon nitride waveguide I 4, guides light from the silicon nitride waveguide I 4 into the silicon nitride waveguide II 5, and guides light from the silicon nitride waveguide II 5 into the thin-film lithium niobate waveguide layer 9. The vertical adiabatic coupler 17 can have a tapered coupler structure, a directional coupler structure, or other types of structures. The vertical adiabatic coupler 17 can be used for coupling and transmitting light between the silicon waveguide and the thin-film lithium niobate waveguide layer 9.

[0059] Step 6: Etching the silicon dioxide above the P++ region and the N+ region, depositing a metal to form a first via 10. After chemical mechanical polishing, depositing a metal to form a first metal layer 11, which can be made of Al or Cu; Step 7: Depositing a silicon dioxide cladding I 8 on the first metal layer 11 and performing chemical mechanical polishing to reduce surface roughness, to form a complete silicon optical wafer, as shown in Figure 4 .

[0060] The use of this embodiment is different from that of Embodiment 1, or the difference lies in that: This embodiment reduces one layer of metal and one layer of silicon nitride waveguide, which simplifies the process while ensuring the electrode interconnection capability, and reducing one layer of silicon nitride waveguide helps to reduce the loss of the vertical coupler.

[0061] Those skilled in the art will readily understand that the above description is only the preferred embodiment of the present application, and is not intended to limit the present application. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A silicon photonic integrated chip with a heterogeneous integrated thin film lithium niobate modulator, characterized in that: The invention comprises a silicon substrate (1), a silicon dioxide buried oxide layer (2), a silicon waveguide device layer, a silicon nitride waveguide device layer, a silicon dioxide cladding layer I (8), a metal electrode layer I, a thin film lithium niobate waveguide layer (9), a silicon dioxide cladding layer II (14), a metal electrode layer II (15) and a silicon dioxide protective layer (16), A silicon dioxide buried oxide layer (2) is placed on a silicon substrate (1). The silicon waveguide device layer is placed on the silicon dioxide buried oxide layer (2) and is located in the silicon dioxide cladding layer I (8). The silicon nitride waveguide device layer is placed on the silicon waveguide device layer and is located within the silicon dioxide cladding layer I (8). The metal electrode layer I is placed on the silicon waveguide device layer and is located in the silicon dioxide cladding layer I (8), and is used to make radio frequency signal electrodes and direct current signal electrodes for circuit connection of the silicon waveguide device; A thin film lithium niobate waveguide layer (9) is placed on the silicon dioxide cladding layer I (8) and is located within the silicon dioxide cladding layer II (14); The metal electrode layer II (15) is placed on the silicon dioxide cladding layer II (14) and is located in the silicon dioxide protective layer (16) to make radio frequency signal electrodes and direct current signal electrodes for circuit connection of the thin film lithium niobate waveguide device.

2. The silicon photonic integrated chip of the heterogeneous integrated thin film lithium niobate modulator according to claim 1, characterized in that: End couplers, beam splitters, beam combiners, multimode interference couplers, directional couplers and polarization beam splitters are etched on the silicon waveguide device layer.

3. The silicon photonic integrated chip of the heterogeneous integrated thin film lithium niobate modulator according to claim 1, characterized in that: End couplers, beam splitters, beam combiners, multimode interference couplers and directional couplers are formed by etching on the silicon nitride waveguide device layer.

4. The silicon photonic integrated chip of heterogeneous integrated thin film lithium niobate modulator according to claim 1, characterized in that: The thin-film lithium niobate waveguide layer (9) is obtained by etching the top of the thin-film lithium niobate wafer, and the thin-film lithium niobate wafer is placed on the silicon dioxide buried oxide layer (2) by bonding or BCB glue bonding.

5. The silicon photonic integrated chip of the heterogeneous integrated thin film lithium niobate modulator according to claim 4, characterized in that: The thin film lithium niobate wafer is a silicon substrate or a quartz substrate; the thin film lithium niobate waveguide layer (9) has a width range of 600-3000nm and a height range of 100-1000nm.

6. The silicon photonic integrated chip of heterogeneous integrated thin film lithium niobate modulator according to claim 1, characterized in that: The metal electrode layer I includes a primary through hole (10), a first metal layer (11), a secondary through hole (12) and a second metal layer (13), wherein the primary through hole (10) is placed on the silicon waveguide device layer, the first metal layer (11) is placed on the primary through hole (10), the secondary through hole (12) is placed on the first metal layer (11), and the second metal layer (13) is placed on the secondary through hole (12), and all of them are placed in the silicon dioxide cladding layer I (8); The thickness of the first metal layer (11) is in the range of 300-1000 nm, and the thickness of the second metal layer (13) is in the range of 1000-3000 nm.

7. A method for manufacturing a silicon photonic integrated chip based on the heterogeneous integrated thin film lithium niobate modulator according to any one of claims 1 to 6, characterized in that: The steps include: Step 1: Select an SOI wafer; Step 2: P-type ion implantation is performed on the top silicon layer of the SOI wafer to form a P+ region and a P++ region; Step 3: etching the top silicon of the SOI wafer to obtain a silicon waveguide (3), and preparing an end coupler, a beam splitter, a beam combiner, a multimode interference coupler, a directional coupler, and a polarization beam splitter on the silicon waveguide (3) to form a silicon waveguide device layer; wherein a portion of the P++ region is used as a heater (18); Step 4: epitaxially growing a germanium layer (7) on the P+ region, growing polysilicon on the germanium layer (7), and then performing N-type ion implantation to form an N+ region; the P+ region, the germanium layer (7), and the N+ region constitute a silicon germanium detector (19); Step 5: Prepare a silicon nitride waveguide on the silicon waveguide device layer using a plasma enhanced chemical vapor deposition process (PECVD) or a low pressure chemical vapor deposition process (LPCVD), etch the silicon nitride waveguide, and prepare passive devices such as an end coupler, a multimode interference coupler, and a directional coupler; repeat step 3 to form a silicon nitride waveguide device layer; etch the silicon waveguide (3) and the silicon nitride waveguide to prepare a vertical adiabatic coupler (17); Step 6: Prepare metal electrode layer I on both the P++ region and the N+ region; Step 7: depositing a silicon dioxide cladding layer I (8) on the metal electrode layer I to form a complete silicon photonic wafer; Step 8: Select a thin-film lithium niobate wafer and place the thin-film lithium niobate wafer upside down on the silicon dioxide cladding layer I (8) by chip-wafer or wafer-wafer bonding or BCB glue bonding; Step 9: removing the silicon substrate and silicon dioxide buried oxide layer of the thin film lithium niobate wafer; Step 10, etching the top of the thin-film lithium niobate wafer to form a thin-film lithium niobate waveguide layer (9); Step 11: Deposit silicon dioxide cladding layer II (14). In order to make a metal electrode on the lithium niobate waveguide, a portion of silicon dioxide cladding layer II (14) is etched away. In preparation for pad opening of the silicon photonic wafer, silicon dioxide cladding layer II (14) and silicon dioxide cladding layer I (8) are etched away. Step 12: growing a metal electrode layer II (15) on the silicon dioxide cladding layer II (14); wherein the metal electrode layer II (15), the thin film lithium niobate waveguide layer (9), and the vertical adiabatic coupler (17) constitute a heterogeneous integrated thin film lithium niobate modulator (20); Step 13: depositing a silicon dioxide protective layer (16), etching the silicon dioxide protective layer (16) on the metal electrode layer II (15), and depositing metal to form a pad.

8. The production method according to claim 7, characterized in that: In step 5, vertical adiabatic couplers (17) are prepared between two adjacent layers of silicon nitride waveguides. The vertical adiabatic couplers (17) are tapered coupling structures, directional coupler structures, or other types of coupler structures.

9. The production method according to claim 7, characterized in that: In step 12, the material of the metal electrode layer II (15) is gold or aluminum.

10. The manufacturing method according to claim 9, characterized in that: The radio frequency signal electrode on the metal electrode layer II (15) is a common rectangular electrode or a capacitive load electrode structure.

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