Firmware upgrade control system and firmware upgrade control method

By introducing a channel controller between the SOC and the memory, and controlling the connection between the BMC and the memory based on a mutual exclusion mechanism, the problems of offline firmware updates and other access conflicts of the SOC are solved, and efficient firmware updates are achieved under both online and offline conditions of the SOC.

CN120803503APending Publication Date: 2025-10-17SHANGHAI EVEX INFORMATION TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202510880326.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-27
Publication Date
2025-10-17

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Abstract

The invention provides a firmware upgrade control system and a firmware upgrade control method, and relates to the technical field of computers. In the system, a BMC (Baseboard Management Controller) sends a firmware upgrading instruction for first firmware in different firmware to a channel controller; the channel controller responds to the firmware upgrading instruction and controls the connection of the gating BMC and the memory; when the BMC is connected with the memory, the first firmware in the memory is updated according to the partition address corresponding to the first firmware; and after the channel controller monitors that the BMC completes firmware updating content of one sector and checks that a waiting SOC occupation request exists, the connection between the SOC and the memory is controlled to be gated, so that the SOC executes access operation on second firmware in the memory, and after the channel controller monitors that the SOC completes the access operation, the connection between the BMC and the memory is controlled to be gated, so that the BMC performs firmware updating on the next sector. According to the method and the device, the firmware can be updated under the condition that the SOC is online or offline, and when the SOC is online, the access of the SOC to the memory is not influenced when the firmware is updated.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of computer, and particularly relates to a firmware upgrade control system and a firmware upgrade control method. BACKGROUND

[0002] In an artificial intelligence (AI) server, a general server and the like, some system on chip (SOC), such as a peripheral component interconnect express (PCIe) exchange chip, updating of firmware of the SOC is a key operation for maintaining safety and stability of the server. Therefore, how to efficiently update the firmware of the SOC is crucial.

[0003] In the related art, the firmware of the SOC is updated by a firmware upgrade manner. Specifically, a baseboard management controller (BMC) of a server sends a firmware upgrade command to a SOC of the server in an out-of-band (OOB) manner through an inter-integrated circuit (I2C) bus. The SOC updates firmware content carried in the firmware upgrade instruction to a flash memory (Flash) for storing the firmware of the SOC, and restricts other access of the SOC to the Flash during the firmware update process. However, this manner cannot update the firmware when the SOC is offline, and the SOC cannot access the Flash for operations other than firmware upgrade when the firmware is updated. SUMMARY

[0004] Embodiments of the present application provide a firmware upgrade control system and a firmware upgrade control method, so that the firmware can be updated when the SOC is online or offline, and the SOC can access the memory without being affected when the firmware is updated when the SOC is online.

[0005] In a first aspect, an embodiment of the present application provides a firmware upgrade control system, comprising a channel controller, and a memory and a BMC connected with the channel controller, wherein the memory is partitioned to store different firmware of the SOC; the channel controller is further connected with the SOC, and the channel controller connects the BMC with the memory or connects the SOC with the memory based on a mutual exclusion mechanism.

[0006] The BMC is configured to send a firmware upgrade instruction for a first firmware in the different firmware to the channel controller, wherein the first firmware is stored by a plurality of sectors in the memory.

[0007] The channel controller is configured to control the connection between the BMC and the memory in response to the firmware upgrade instruction.

[0008] The BMC is further configured to update the first firmware in the memory according to the partition address corresponding to the first firmware when the BMC is connected to the memory.

[0009] The channel controller is further configured to check whether there is a waiting SOC occupation request after monitoring that the BMC completes the firmware update content of one sector, the SOC occupation request being sent by the SOC when the SOC has an access demand for the second firmware in different firmware, control the connection between the SOC and the memory when there is a waiting SOC occupation request, so that the SOC performs an access operation on the second firmware, and control the connection between the BMC and the memory after monitoring that the SOC completes the access operation, so that the BMC performs firmware update on the next sector.

[0010] In an embodiment, the channel controller is further configured to:

[0011] The channel controller is further configured to determine that the connection between the BMC and the memory is selectable based on a mutual exclusion mechanism before controlling the connection between the BMC and the memory.

[0012] In an embodiment, the channel controller is further configured to:

[0013] The channel controller is further configured to record the occupation request of the BMC until the connection between the BMC and the memory is monitored to be selectable when the connection between the BMC and the memory is determined to be non-selectable.

[0014] In an embodiment, the channel controller is further configured to:

[0015] The channel controller is further configured to determine the request type of the SOC occupation request when the SOC occupation request is received.

[0016] The channel controller is further configured to record the SOC occupation request and mark the SOC occupation request as waiting when the request type of the SOC occupation request is normal occupation and the current channel is in a BMC occupation state.

[0017] In an embodiment, the channel controller is further configured to:

[0018] The channel controller is further configured to clear the related execution data corresponding to the firmware upgrade instruction, control the connection between the SOC and the memory, and make the SOC write an execution log of the firmware in the memory when the request type of the SOC occupation request is forced occupation and the current channel is in a BMC occupation state, the forced occupation indicating that the SOC occupation request is sent when an exception occurs in firmware reading or execution.

[0019] The channel controller is further configured to send prompt information for channel occupation failure to the BMC.

[0020] In a second aspect, the embodiments of the present application provide a firmware upgrade control method, applied to a channel controller in a firmware upgrade control system as in the first aspect and / or various embodiments of the first aspect. The firmware upgrade control method comprises:

[0021] receiving a firmware upgrade instruction for a first firmware in different firmware sent by a BMC in the firmware upgrade control system;

[0022] in response to the firmware upgrade instruction, controlling the connection between the BMC and a memory in the firmware upgrade control system to enable the BMC to update the firmware in the memory;

[0023] after monitoring that the BMC completes the firmware update content of one sector, checking whether there is a waiting SOC occupation request, the SOC occupation request being sent by the SOC when it has an access demand for a second firmware in different firmware;

[0024] when there is a waiting SOC occupation request, controlling the connection between the SOC and the memory to enable the SOC to perform an access operation on the second firmware;

[0025] and, after monitoring that the SOC completes the access operation, controlling the connection between the BMC and the memory to enable the BMC to perform firmware update on the next sector.

[0026] In an embodiment, in response to the firmware upgrade instruction, the controlling of the connection between the BMC and the memory in the firmware upgrade control system comprises:

[0027] in response to the firmware upgrade instruction, determining the connection between the BMC and the memory based on a mutual exclusion mechanism of a hardware mutual exclusion lock;

[0028] controlling the connection between the BMC and the memory in the firmware upgrade control system.

[0029] In an embodiment, the firmware upgrade control method further comprises:

[0030] in the case that the connection between the BMC and the memory is determined to be not selectable based on the mutual exclusion mechanism of the hardware mutual exclusion lock, recording an occupation request of the BMC on the hardware mutual exclusion lock, and monitoring whether the connection between the BMC and the memory is selectable until the connection between the BMC and the memory is monitored to be selectable.

[0031] In an embodiment, the firmware upgrade control method further comprises:

[0032] when the SOC occupation request is received, determining a request type of the SOC occupation request, the request type comprising a normal occupation and a forced occupation;

[0033] if the request type of the SOC occupation request is the normal occupation and the current channel is in a BMC occupation state, recording the SOC occupation request and marking the SOC occupation request as waiting.

[0034] In an implementation, further comprising:

[0035] If the request type of the SOC occupation request is forced occupation, and the current channel is in the BMC occupation state, then the relevant execution data corresponding to the firmware upgrade instruction is emptied, and the connection between the SOC and the memory is controlled to enable the SOC to write the execution log of the firmware in the memory, and the forced occupation indicates that the SOC occupation request is issued in the case that an exception occurs in the firmware reading or execution;

[0036] The prompt information for the channel occupation failure is sent to the BMC.

[0037] In a third aspect, the embodiments of the present application provide a firmware upgrade control device, which is applied to a channel controller in the firmware upgrade control system as in the first aspect and / or various embodiments of the first aspect, and comprises:

[0038] The receiving module is configured to receive the firmware upgrade instruction for the first firmware in different firmware sent by the BMC in the firmware upgrade control system;

[0039] The control module is configured to control the connection between the BMC and the memory in the firmware upgrade control system in response to the firmware upgrade instruction, so as to enable the BMC to update the firmware in the memory;

[0040] The monitoring module is configured to check whether there is a waiting SOC occupation request after monitoring that the BMC completes the firmware update content of one sector, the SOC occupation request being issued by the SOC having an access demand for the second firmware in different firmware; in the case that there is a waiting SOC occupation request, the control module is triggered to control the connection between the SOC and the memory, so as to enable the SOC to perform the access operation on the second firmware; and after monitoring that the SOC completes the access operation, the control module is triggered to control the connection between the BMC and the memory, so as to enable the BMC to perform the firmware update on the next sector.

[0041] In a fourth aspect, the embodiments of the present application provide a firmware upgrade control device, which comprises a memory and a processor.

[0042] The memory stores computer execution instructions;

[0043] The processor executes the computer execution instructions stored in the memory, so that the processor performs the second aspect and / or various possible embodiments of the second aspect.

[0044] In a fifth aspect, the embodiments of the present application provide a computer readable storage medium, which stores computer execution instructions, and the computer execution instructions are used to implement the second aspect and / or various possible embodiments of the second aspect when executed.

[0045] In a sixth aspect, an embodiment of the present application provides a computer program product, comprising a computer program, which, when executed, implements the second aspect and / or various possible implementation manners of the second aspect.

[0046] The firmware upgrade control system and the firmware upgrade control method provided by the embodiments of the present application, the system comprises a channel controller, a memory and a BMC connected with the channel controller respectively, and the memory is divided into different partitions to store different firmwares of a SOC; the channel controller is further connected with the SOC, and the channel controller connects the BMC with the memory or connects the SOC with the memory based on a mutual exclusion mechanism. During firmware upgrade, the BMC sends a firmware upgrade instruction for a first firmware among the different firmwares to the channel controller; the channel controller controls the connection between the BMC and the memory in response to the firmware upgrade instruction; and the BMC is further configured to update the first firmware in the memory according to a partition address corresponding to the first firmware in the case of being connected with the memory. The firmware upgrade process does not depend on the SOC, so that the firmware update can be performed in the case that the SOC is offline or abnormal. In addition, the embodiments of the present application monitor the process of updating the firmware of the BMC by the channel controller, check whether there is an occupation request of the SOC after monitoring the completion of the firmware update of one sector, respond in time in the case that there is an occupation request of the SOC, control the connection between the SOC and the memory, and avoid the SOC being in a long-time waiting state due to the firmware update, so as to achieve the effect that the SOC accesses the memory without being affected during firmware update. BRIEF DESCRIPTION OF DRAWINGS

[0047] The accompanying drawings, which are incorporated herein and form a part of the specification, illustrate embodiments consistent with the present application and, together with the description, further serve to explain the principles of the present application.

[0048] Figure 1 The structure schematic diagram of the firmware update control system provided by the embodiments of the present application;

[0049] Figure 2 The structure schematic diagram of the firmware update control system provided by the embodiments of the present application;

[0050] Figure 3 The structure schematic diagram of the firmware update control system provided by the embodiments of the present application;

[0051] Figure 4 The structure schematic diagram of the firmware update control system provided by the embodiments of the present application.

[0052] The specific embodiments of the present application have been shown through the above drawings, and will be described in more detail hereinafter. The drawings and the written description are not intended to limit the scope of the present application in any way, but to explain the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0053] The exemplary embodiments will be described in detail herein with reference to the attached drawings. In the following description, like reference numerals refer to like elements, unless the context clearly dictates otherwise. The following description is not intended to represent all embodiments in accordance with the present application. Rather, they merely represent typical embodiments in accordance with a portion of the application, as detailed in the appended claims.

[0054] In order to solve the technical problems that the SOC cannot be updated in the related art, and the SOC cannot access the flash memory except for updating the firmware, the embodiment of the present application provides a firmware upgrade control system, a channel controller is arranged, and the channel controller is connected with the memory and the BMC and the SOC respectively. The connection between the BMC and the memory or the connection between the SOC and the memory is turned on by the channel controller based on the mutual exclusion mechanism, so as to realize the technical scheme that the firmware of the SOC of the memory with partitions is updated by the BMC and the SOC without dependence, and the updating of the firmware does not affect the part of the memory accessed by the SOC at the same time.

[0055] The technical scheme of the present application and how the technical scheme of the present application solves the above technical problems will be described in detail in the following specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes can not be described again in some embodiments. The embodiments of the present application will be described below with reference to the drawings.

[0056] In some embodiments, as shown in Table 1, the internal storage space of the memory is divided into multiple partitions, and different functions are stored in the partitions. In order to ensure that the SOC firmware is updated at the same time and some important data is not lost, the partitions are divided into two types: one can be erased by the BMC and the other cannot be erased by the BMC. The SOC reads the firmware from the partitions of the memory, and then runs the firmware in the internal random-access memory (RAM) of the SOC or the external RAM, so as to realize the function corresponding to the firmware.

[0057] Table 1

[0058]

[0059] Figure 1 The structure diagram of the firmware upgrade control system provided by the embodiment of the present application is shown in FIG. 1. Figure 1As shown, the firmware upgrade control system 10 comprises a channel controller 11, and a memory 12 and a BMC 13 connected with the channel controller 11 respectively, wherein the memory 12 stores different firmwares of a SOC 14 in different sectors; the channel controller 11 is further connected with the SOC 14, and the channel controller 11 connects the BMC 13 with the memory 12 or connects the SOC 14 with the memory 12 based on a mutual exclusion mechanism.

[0060] The BMC 13 is configured to send a firmware upgrade instruction for a first firmware in the different firmwares to the channel controller 11, wherein the first firmware is stored in a plurality of sectors in the memory;

[0061] The channel controller 11 is configured to control the connection between the BMC 13 and the memory 12 in response to the firmware upgrade instruction;

[0062] The BMC 13 is further configured to update the first firmware in the memory 12 according to a sector address corresponding to the first firmware when connected with the memory 12;

[0063] The channel controller 11 is further configured to check whether there is a waiting SOC occupation request after monitoring that the BMC 13 completes the firmware update content of one sector, the SOC occupation request being sent by the SOC 14 when having an access demand for a second firmware in the different firmwares; control the connection between the SOC 14 and the memory 12 when there is the waiting SOC occupation request, so that the SOC 14 performs an access operation on the second firmware; and control the connection between the BMC 13 and the memory 12 after monitoring that the SOC completes the access operation, so that the BMC 13 performs firmware update on a next sector.

[0064] The channel controller 11 is a controller with channel control function. For example, it can be a Complex Programmable Logic Device (CPLD) or a Field-Programmable Gate Array (FPGA). The memory 12 can be a flash chip, which has the function of storing firmwares in different sectors as shown in Table 1.

[0065] The mutual exclusion mechanism means that the channel controller can only connect the BMC 13 with the memory 12 or connect the SOC 14 with the memory 12 at the same time, and cannot connect the BMC 13 with the memory 12 and the SOC 14 with the memory 12 at the same time.

[0066] Optionally, the channel controller 11 is connected with the memory 12, the SOC 14 and the BMC 13 respectively through a serial peripheral interface (SPI) bus. The SPI bus has the characteristics of fast speed and simple and direct, and can realize efficient data transmission between the channel controller 11, the memory 12, the SOC 14 and the BMC 13.

[0067] Optionally, the channel controller 11 is connected with the memory 12, the SOC 14 and the BMC 13 respectively through an I2C bus. The I2C bus has the characteristics of few pins, simple wiring and supporting multiple devices, and can reduce the hardware and design cost of the system.

[0068] The BMC 13 is a kind of independent subsystem specially used for managing and monitoring the hardware state of the server. Through the BMC 13, the server administrator can remotely update the firmware of the SOC 14 in the server system to realize the update and upgrade of the function of the server system. Specifically, the server administrator issues a firmware update instruction through the BMC, the firmware update instruction includes firmware update content, and the BMC responds to the firmware update instruction to perform an erasing operation on the partition of the memory according to the partition address and the firmware update content. For the partition address, it can be understood that, in one implementation, the partition address of the firmware to be updated is carried in the firmware update instruction; in another implementation, the partition address of the firmware to be updated is not carried in the firmware update instruction, but the BMC stores a mapping relationship between the firmware and the storage partition address of the firmware, so that the partition address of the firmware to be updated can be determined.

[0069] Generally, when the BMC 13 performs the firmware update operation, the data channel of the memory 12 is occupied from the start time of the firmware update to the end time of the firmware update, at this time, other devices, such as the SOC 14, cannot realize data access to the memory 12. The firmware update system provided by the embodiment of the present application sets the channel controller 11 to monitor the firmware update process of the BMC 13, and divides one firmware update process into multiple sectors for distribution, after completing the update of one sector, it is checked whether there is an occupation request of the SOC 14, if there is, the occupation request of the SOC 14 is responded in time, after the SOC 14 completes the operation on the memory 12, the firmware update process is controlled to be restored, so that the SOC 14 does not have to be in a waiting state for a long time because of the firmware update, but the access of the SOC 14 to the memory 12 is completed at one time, thereby improving the access efficiency of the SOC 14 to other firmware in the firmware upgrade process of the SOC 14.

[0070] Exemplarily, the firmware update instruction received by the BMC 13 is to erase the content of 32Kb in the first partition, and the size of one sector is set to 4Kb. The channel controller 11 receives the control instruction sent by the BMC 13, controls the connection between the BMC 13 and the memory 12, and after monitoring that the BMC 13 completes the erasing operation of the 4Kb space, checks whether there is a waiting occupation request of the SOC 14. If there is, the connection between the SOC 14 and the memory 12 is enabled in response to the occupation request of the SOC 14, so that the SOC 14 can perform the read and write operation on the memory 12. The occupation of the SOC 14 on the data channel lasts until the read and write operation of the SOC 14 on the memory 12 is completed, and the connection between the BMC 13 and the memory 12 is enabled, so that the BMC 13 performs the firmware update on the next 4Kb space.

[0071] The BMC 13 updates different firmware files according to the start address and the end address of different partitions, and does not update the partitions that cannot be erased. The firmware upgrade of the SOC 14 can be performed even when the SOC 14 is not running or is in an offline state, and the data of other partitions is not damaged.

[0072] Optionally, after the channel controller 11 responds to the occupation request of the SOC 14, the occupation request of the SOC 14 that has been responded to is cleared, or the occupation request of the SOC 14 is marked as executed, so as to prevent the occupation request of the SOC 14 from being repeatedly responded to.

[0073] The firmware upgrade control system provided by the embodiment of the application sets the channel controller, controls the connection between the BMC and the memory and the connection between the SOC and the memory based on the mutual exclusion mechanism, guarantees the normal access of the BMC and the SOC to the memory, monitors the firmware update process of the BMC, checks whether there is an occupation request of the SOC after the firmware update of one sector is completed, and responds to the occupation request of the SOC in time if there is. After the operation of the SOC on the memory is completed, the firmware update process is restored, so that the technical solution of updating the firmware of the SOC of the memory with partitions by the BMC without the dependence of the SOC is realized, and the updating of the firmware does not affect the part of the SOC that simultaneously accesses the memory.

[0074] In an implementation manner, the channel controller is further configured to:

[0075] Before the connection between the BMC and the memory is controlled, the connection between the BMC and the memory is enabled based on the mutual exclusion mechanism.

[0076] Specifically, the channel controller receives the firmware upgrade instruction sent by the BMC, first checks the occupation state of the current channel, and if the current channel is in the SOC occupation state, the connection between the BMC and the memory cannot be enabled. If the current channel is in the idle state and is not occupied by the SOC, the connection between the BMC and the memory can be enabled.

[0077] The firmware upgrade control system provided by the embodiment of the application checks whether the current channel is occupied by the SOC before enabling the connection between the BMC and the memory, avoids the channel occupation conflict between the SOC and the BMC, ensures the normal access of the SOC to the memory, and enables the SOC to access the memory and the BMC to update the firmware in an orderly manner.

[0078] In an implementation, the channel controller is further configured to:

[0079] In a case where the connection between the BMC and the memory cannot be enabled, the occupation request of the BMC is recorded until the connection between the BMC and the memory can be enabled is monitored.

[0080] If the current channel is in the SOC occupation state, it is determined that the connection between the BMC and the memory cannot be enabled, at this time, the channel controller records the occupation request of the BMC and monitors the channel occupation state, when the SOC completes the read and write to the memory, the connection between the BMC and the memory can be enabled, and the BMC can perform the read and write operation to the memory.

[0081] In an example, during the firmware update process, the channel controller controls the connection between the BMC and the memory, after completing the firmware update of one sector, it is found that there is an SOC occupation request, the connection between the SOC and the memory is enabled in response to the SOC occupation request, at this time, the occupation request of the BMC is recorded, after the SOC completes the read and write operation to the memory, the connection between the BMC and the memory is enabled in response to the occupation request of the BMC.

[0082] Optionally, after the occupation request is recorded, the channel controller checks whether the current channel can be occupied every first time interval, and exemplarily, the actual time interval is 10 ms.

[0083] Optionally, when the occupation application of the BMC is waiting for a response for a time period longer than a preset time period, the occupation application of the BMC is cleared.

[0084] The firmware upgrade control system provided by the embodiment of the application records the occupation request of the BMC in a case where the connection between the BMC and the memory cannot be enabled, and enables the connection between the BMC and the memory in time when the condition of enabling the connection between the BMC and the memory is reached, thereby realizing the orderly access of the BMC and the SOC to the memory.

[0085] In an implementation, the channel controller is further configured to:

[0086] When the SOC occupation request is received, the request type of the SOC occupation request is determined.

[0087] If the request type of the SOC occupation request is normal occupation and the current channel is in the connection state of the BMC and the memory, the SOC occupation request is recorded and the SOC occupation request is marked as waiting.

[0088] In some embodiments, the SOC occupation request is divided into normal occupation and forced occupation, and the forced occupation has a higher priority than the normal occupation.

[0089] If the current channel is in the idle state and the channel controller receives the normal occupation request of the SOC, the normal occupation request of the SOC is responded to, and the connection of the SOC and the memory is gated.

[0090] If the current channel is in the BMC occupation state and the BMC and the memory are in the connection state, the SOC occupation request is recorded to the record table and the SOC occupation request is marked as waiting.

[0091] Optionally, when the waiting time of the SOC occupation application exceeds the preset time and is not responded, the SOC occupation application is cleared.

[0092] The firmware upgrade control system provided by the embodiments of the present application sets a SOC occupation request record and waiting mechanism, performs channel gating operation according to the request type of the SOC occupation request, records the SOC occupation request to the record table when the request type of the SOC occupation request is normal occupation, and guarantees the smooth progress of the firmware upgrade process.

[0093] In one embodiment, the channel controller is further configured to:

[0094] If the request type of the SOC occupation request is forced occupation and the current channel is in the BMC occupation state, the related execution data corresponding to the firmware upgrade instruction is cleared, the connection of the SOC and the memory is controlled to be gated, and the SOC writes the execution log of the firmware in the memory, and the forced occupation indicates that the SOC occupation request is issued in the case that the firmware reading or execution occurs abnormally.

[0095] The prompt information for the channel occupation failure is sent to the BMC.

[0096] In one example, the SOC issues a forced occupation SOC occupation request to write the execution log (log) of the firmware in the memory when the SOC fails in the process of reading and executing the firmware.

[0097] The priority of the SOC forced occupation request is higher than the occupation request of the BMC to the channel, if the current channel is in the BMC occupation state, the channel connection between the BMC and the memory is directly interrupted, the related execution data corresponding to the firmware upgrade instruction is cleared, and the connection of the SOC and the memory is controlled to be gated, so as to guarantee that the SOC records the fault information or other emergency in time.

[0098] Because the channel connection between the BMC and the memory is interrupted, the progress of the firmware update cannot be confirmed, the relevant execution data corresponding to the firmware upgrade instruction is emptied, and prompt information for a channel occupation failure is sent to the BMC, so that the BMC can perform a firmware re-updating operation after receiving the prompt information.

[0099] If the channel controller receives a forced occupation request of the SOC when the current channel state is idle, the channel controller responds to the forced occupation request of the SOC and selects the connection between the SOC and the memory.

[0100] The firmware upgrade control system provided in the embodiments of the present application can ensure that the SOC records fault information or other emergency information in a timely manner and improve the working efficiency of the SOC when an abnormal fault occurs during the reading and execution of the firmware by the SOC, the channel controller receives a forced occupation request of the SOC, the connection between the BMC and the memory that has been established is interrupted, the connection between the SOC and the memory is selected, the SOC writes the execution log of the firmware into the memory, and the BMC is sent prompt information.

[0101] Figure 2 A flowchart of a firmware upgrade control method provided in the embodiments of the present application is shown in FIG. 8. Figure 2 As shown in FIG. 8, the firmware upgrade control method applied to the channel controller in the firmware upgrade control system in various embodiments of the above embodiments includes the following steps.

[0102] S201, receiving a firmware upgrade instruction for a first firmware in different firmware sent by a baseboard management controller (BMC) in a firmware upgrade control system.

[0103] As shown in Table 1, the memory has a plurality of partitions, and a plurality of firmware is stored in the plurality of partitions. The firmware upgrade instruction includes a channel occupation request, a partition address corresponding to the firmware, and firmware update content.

[0104] S202, in response to the firmware upgrade instruction, controlling the connection between the BMC and the memory in the firmware upgrade control system to be selected, so that the BMC updates the firmware in the memory.

[0105] S203, after monitoring that the BMC completes the firmware update content of one sector, checking whether there is a waiting SOC occupation request. The SOC occupation request is sent by the SOC when the SOC has an access demand for a second firmware in different firmware. When there is a waiting SOC occupation request, the connection between the SOC and the memory is controlled to be selected, so that the SOC performs an access operation on the second firmware. After monitoring that the SOC completes the access operation, the connection between the BMC and the memory is controlled to be selected, so that the BMC performs firmware update on the next sector.

[0106] Generally, when the BMC performs a firmware update operation, the data channel of the memory is occupied from the start time of the firmware update to the end time of the firmware update, and at this time, other devices, such as the SOC, cannot implement data access to the memory. The firmware update control method provided in the embodiments of the present application monitors a BMC firmware update process, and divides one firmware update process into multiple sectors for distribution. After completing update of one sector, it is checked whether there is an occupation request of the SOC. If there is, the occupation request of the SOC is responded in time. After the SOC completes the operation on the memory, the firmware update process is controlled to be restored. In this way, the SOC does not have to be in a waiting state for a long time because of the firmware update, and the working efficiency of the SOC is improved.

[0107] Exemplarily, the firmware update instruction received by the BMC is to erase and rewrite the content of 32Kb in the first partition. The size of one sector is set to be 4Kb. The channel controller receives the control instruction sent by the BMC, controls the connection between the BMC and the memory to be selected, and after monitoring that the BMC completes the erase and rewrite operation on the 4Kb space, it is checked whether there is a waiting occupation request of the SOC. If there is, the connection between the SOC and the memory is selected to be connected, so that the SOC can perform the read and write operation on the memory. The occupation of the data channel by the SOC lasts until the read and write operation of the SOC on the memory is completed. The connection between the BMC and the memory is selected to be connected, so that the BMC performs the firmware update on the next 4Kb space.

[0108] The firmware upgrade control method provided in the embodiments of the present application controls the connection between the BMC and the memory and the connection between the SOC and the memory based on the mutual exclusion mechanism, guarantees the normal access of the BMC and the SOC to the memory, monitors the firmware update process of the BMC, checks whether there is an occupation request of the SOC after monitoring the firmware update of one sector, responds to the occupation request of the SOC in time if there is, controls the firmware update process to be restored after the SOC completes the operation on the memory, and thus realizes the technical solution that the BMC updates the firmware of the SOC of the memory with partitions without depending on the SOC, and the updated firmware does not affect the part of the SOC that simultaneously accesses the memory.

[0109] In one embodiment, in response to a firmware upgrade instruction, the connection between the BMC and the memory in the firmware upgrade control system is controlled to be selected, and the method comprises the following steps.

[0110] In response to the firmware upgrade instruction, the connection between the BMC and the memory is determined to be selected based on the mutual exclusion mechanism of the hardware mutual exclusion lock.

[0111] The connection between the BMC and the memory in the firmware upgrade control system is controlled to be selected.

[0112] A hardware mutex is a synchronization mechanism used to control access to shared resources by multiple threads. It ensures that only one thread can access the shared resource at any time, thereby avoiding data races and inconsistencies. The hardware mutex in the embodiments of the present application guarantees the atomicity of the channel occupation operation through a hardware mechanism (bus locking or more efficient cache locking).

[0113] Exemplarily, the hardware mutex has two states: occupied and idle. The channel controller receives the firmware upgrade instruction issued by the BMC, first checks the occupation state of the hardware mutex, and if the current hardware mutex is in the SOC occupied state, the connection between the BMC and the memory cannot be enabled; if the current hardware mutex is in the idle state and is not occupied by the SOC, the connection between the BMC and the memory can be enabled.

[0114] The firmware upgrade control method provided by the embodiments of the present application checks whether the current hardware mutex is occupied by the SOC before enabling the connection between the BMC and the memory based on the mutual exclusion mechanism of the hardware mutex, avoids the channel conflict between the SOC and the BMC, ensures the normal access of the SOC to the memory, and enables the SOC to access the memory and update the firmware of the BMC in an orderly manner.

[0115] In one embodiment, further comprising:

[0116] In the mutual exclusion mechanism based on the hardware mutex, if it is determined that the connection between the BMC and the memory cannot be enabled, the occupation request of the BMC to the hardware mutex is recorded, and whether the connection between the BMC and the memory can be enabled is monitored until the connection between the BMC and the memory can be enabled is monitored.

[0117] If the current hardware mutex is in the SOC occupied state, it is determined that the connection between the BMC and the memory cannot be enabled, at which time the channel controller records the occupation request of the BMC and monitors the channel occupation, and when the SOC completes the read and write to the memory, the connection between the BMC and the memory can be enabled, and the BMC implements the read and write operation to the memory.

[0118] In one example, during the firmware update process, the channel controller controls the connection between the BMC and the memory, changes the state of the hardware mutex to the occupied state, and after completing the firmware update of one sector, checks that there is an SOC occupation request, and in response to the SOC occupation request, enables the connection between the SOC and the memory, at which time the occupation request of the BMC is recorded, and after the SOC completes the read and write operation to the memory, in response to the occupation request of the BMC, enables the connection between the BMC and the memory.

[0119] Optionally, when the occupation application of the BMC is waiting for a duration longer than a preset duration and is not responded, the occupation application of the BMC is cleared.

[0120] The firmware upgrade control method provided in the embodiment records the occupation request of the BMC in the case that the connection between the BMC and the memory is not selected, and selects the connection between the BMC and the memory in time when the condition that the connection between the BMC and the memory is selected is reached, so as to realize the ordered access of the BMC and the SOC to the memory.

[0121] In an embodiment, further comprising:

[0122] When the SOC occupation request is received, the request type of the SOC occupation request is determined, and the request type includes normal occupation and forced occupation;

[0123] If the request type of the SOC occupation request is normal occupation, and the hardware mutex is in the occupation state, the SOC occupation request is recorded, and the SOC occupation request is marked as waiting.

[0124] In some embodiments, the SOC occupation request is divided into normal occupation and forced occupation, and the priority of the forced occupation is higher than that of the normal occupation.

[0125] If the current hardware mutex is in the idle state, and the channel controller receives the normal occupation request of the SOC, the connection between the SOC and the memory is selected in response to the normal occupation request of the SOC.

[0126] If the current hardware mutex is in the BMC occupation state, and the connection between the BMC and the memory is in the connection state, the SOC occupation request is recorded to the record table at this time, and the SOC occupation request is marked as waiting.

[0127] Optionally, when the waiting time of the occupation application of the SOC exceeds the preset time and is not responded, the occupation application of the SOC is cleared.

[0128] The firmware upgrade control method provided in the embodiment sets the SOC occupation request record and waiting mechanism, performs the channel selection operation according to the request type of the SOC occupation request, records the SOC occupation request to the record table when the request type of the SOC occupation request is normal occupation, and guarantees the smooth progress of the firmware upgrade process.

[0129] In an embodiment, further comprising:

[0130] If the request type of the SOC occupation request is forced occupation, and the hardware mutex is in the occupation state, the relevant execution data corresponding to the firmware upgrade instruction is emptied, the connection between the SOC and the memory is controlled based on the mutual exclusion mechanism, so that the SOC accesses the memory;

[0131] In an example, in the process of reading and executing the firmware, a fault indicating the abnormal execution of the firmware occurs, the SOC sends a forced occupation request of the SOC occupation request to write the execution log (log) of the firmware into the memory.

[0132] The priority of the SOC forced occupation request is higher than the channel occupation request of the BMC, if the current hardware mutex is in the BMC occupation state, the connection between the BMC and the memory is directly interrupted, the relevant execution data corresponding to the firmware upgrade instruction is emptied, and the connection between the SOC and the memory is controlled to be selected, so as to ensure that the SOC records the fault information or other emergency in time.

[0133] Because the connection between the BMC and the memory is interrupted, the progress of the firmware update cannot be confirmed, the relevant execution data corresponding to the firmware upgrade instruction is emptied, and prompt information for channel occupation failure is sent to the BMC, so that the BMC can perform the operation of re-updating the firmware after receiving the prompt information.

[0134] If the current hardware mutex is in the idle state, the channel controller receives the forced occupation request of the SOC, and responds to the forced occupation request of the SOC to select the connection between the SOC and the memory.

[0135] Optionally, if the hardware mutex is in the occupation state, but it is monitored that the channel is not used, the hardware mutex is released, and the state of the hardware mutex is modified to the idle state.

[0136] The firmware upgrade control method provided by the embodiment of the application can ensure that the SOC records the fault information or other emergency in time and improves the working efficiency of the SOC when an abnormal fault occurs in the process of reading and executing the firmware by the SOC.

[0137] Figure 3 The structure diagram of the firmware upgrade control device provided by the application is shown in FIG. 1, which is a channel controller applied to the firmware upgrade control system in various embodiments of the above embodiments. Figure 3 The firmware upgrade control device 30 provided by the embodiment of the application includes:

[0138] The receiving module 301 is configured to receive a firmware upgrade instruction for a first firmware in different firmware sent by a baseboard management controller (BMC) in a firmware upgrade control system.

[0139] The control module 302 is configured to respond to the firmware upgrade instruction, control the connection between the BMC and a memory in the firmware upgrade control system to be selected, and make the BMC update the firmware in the memory.

[0140] The monitoring module 303 is configured to, after monitoring that the BMC completes the firmware updating content of one sector, check whether there is a waiting SOC occupation request, the SOC occupation request being sent by the SOC having an access demand for the second firmware in different firmware; in the case that there is a waiting SOC occupation request, control the connection between the SOC and the memory to enable the SOC to perform an access operation on the second firmware; and after monitoring that the SOC completes the access operation, control the connection between the BMC and the memory to enable the BMC to perform firmware updating on the next sector.

[0141] In an embodiment, the control module 302 is specifically configured to:

[0142] In response to the firmware upgrade instruction, determine, based on the mutual exclusion mechanism of the hardware mutual exclusion lock, whether the connection between the BMC and the memory can be enabled;

[0143] Control the connection between the BMC and the memory in the firmware upgrade control system.

[0144] In an embodiment, the monitoring module 303 is further configured to:

[0145] In the case that it is determined, based on the mutual exclusion mechanism of the hardware mutual exclusion lock, that the connection between the BMC and the memory cannot be enabled, record an occupation request of the BMC on the hardware mutual exclusion lock, and monitor whether the connection between the BMC and the memory can be enabled until it is monitored that the connection between the BMC and the memory can be enabled.

[0146] In an embodiment, the control module 302 is further configured to:

[0147] When the SOC occupation request is received, determine a request type of the SOC occupation request, the request type including normal occupation and forced occupation;

[0148] If the request type of the SOC occupation request is normal occupation and the hardware mutual exclusion lock is in an occupied state, record the SOC occupation request and mark the SOC occupation request as waiting.

[0149] In an embodiment, the control module 302 is further configured to:

[0150] If the request type of the SOC occupation request is forced occupation and the hardware mutual exclusion lock is in the occupied state, clear relevant execution data corresponding to the firmware upgrade instruction, control the connection between the SOC and the memory based on the mutual exclusion mechanism to enable the SOC to access the memory;

[0151] Send prompt information for SPI channel occupation failure to the BMC.

[0152] The firmware upgrade control device provided in the embodiment can perform the method provided in the method embodiment, and has similar implementation principles and technical effects, which will not be described here in detail.

[0153] Figure 4 The structure schematic diagram of the firmware upgrade control device provided in the application is shown. As shown in the figure, the electronic device 40 provided in the embodiment includes at least one processor 401 and a memory 402. Optionally, the device 40 further includes a communication interface 403. The processor 401, the memory 402 and the communication interface 403 are connected through a communication bus 404. Figure 4

[0154] In the implementation process, the at least one processor 401 executes the computer execution instructions stored in the memory 402, so that the at least one processor 401 executes the above-mentioned method.

[0155] The specific implementation process of the processor 401 can refer to the above-mentioned method embodiment, which has similar implementation principles and technical effects, and will not be described here in detail.

[0156] In the above-mentioned embodiments, it should be understood that the processor can be a central processing unit (CPU), and can also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC) and the like. The general-purpose processor can be a microprocessor or the processor can also be any conventional processor and the like. The steps of the method disclosed in the application can be directly embodied as the execution of the hardware processor, or executed by the combination of the hardware and software modules in the processor.

[0157] The memory can include a random access memory (RAM), and can also include a non-volatile memory (NVM), for example, at least one disk memory.

[0158] The bus can be an industry standard architecture (ISA) bus, a peripheral component (PCI) bus or an extended industry standard architecture (EISA) bus and the like. The bus can be divided into an address bus, a data bus, a control bus and the like. For the convenience of representation, the bus in the drawings of the application does not limit to only one bus or one type of bus.

[0159] The embodiment of the application further provides a computer program product, including a computer program which is executed to realize the above-mentioned method.​

[0160] The embodiment of the present application further provides a computer readable storage medium, wherein computer execution instructions are stored in the computer readable storage medium, and when the computer execution instructions are executed, the method described above is realized.

[0161] The readable storage medium described above can be realized by any type of volatile or nonvolatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk. The readable storage medium can be any available medium that can be accessed by a general-purpose or special-purpose computer.

[0162] An exemplary readable storage medium is coupled to the processor, so that the processor can read information from the readable storage medium and write information to the readable storage medium. Of course, the readable storage medium can also be an integral part of the processor. The processor and the readable storage medium can be located in an application specific integrated circuit (ASIC). Of course, the processor and the readable storage medium can also exist as discrete components in the device.

[0163] The division of units is only a logical function division, and in actual implementation, there can be another division mode, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interfaces, devices or units, and can be electrical, mechanical or other forms.

[0164] The units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, that is, they can be located in one place, or can be distributed on a plurality of network units. According to actual needs, some or all of the units can be selected to achieve the purpose of the embodiment of the present application.

[0165] In addition, the functional units in each embodiment of the present application can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit.

[0166] If the functions are implemented in the form of software function units and sold or used as independent products, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application or the parts of the technical solutions that essentially contribute to the prior art can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a number of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the embodiments of the method of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0167] It can be understood by those skilled in the art that all or part of the steps of the above-mentioned method embodiments can be completed by program instruction related hardware. The aforementioned program can be stored in a computer readable storage medium. When the program is executed, the steps of the above-mentioned method embodiments are executed; and the aforementioned storage medium includes: ROM, RAM, magnetic disk or optical disk, and various media that can store program codes.

[0168] Finally, it should be noted that: those skilled in the art will easily think of other embodiments of the present application after considering the specification and practicing the application disclosed herein. The present application is intended to cover any variations, uses or adaptations of the present application that follow the general principles of the present application and include common knowledge or conventional technical means in the art that are not disclosed in the present application, and is not limited to the precise structure described above and shown in the drawings, and various modifications and changes can be made without departing from the scope thereof. The scope of the present application is only limited by the appended claims.

Claims

1. A firmware upgrade control system, characterized in that: include: A channel controller, and a memory and a baseboard controller (BMC) respectively connected to the channel controller, wherein the memory partitions store different firmware of a system-on-chip (SOC); the channel controller is also connected to the SOC, and the channel controller connects the BMC to the memory or connects the SOC to the memory based on a mutual exclusion mechanism; The BMC is configured to send a firmware upgrade instruction for a first firmware among the different firmware to the channel controller, wherein the first firmware is stored in a plurality of sectors in a memory; The channel controller is configured to respond to the firmware upgrade instruction and control the connection between the BMC and the memory; The BMC is further configured to update the first firmware in the memory according to the partition address corresponding to the first firmware when connected to the memory; The channel controller is further configured to, after monitoring that the BMC completes the firmware update of a sector, check whether there is a pending SOC occupancy request, where the SOC occupies the request when the SOC has a need to access a second firmware among the different firmwares; when there is a pending SOC occupancy request, control the strobe connection between the SOC and the memory so that the SOC performs the access operation on the second firmware; and, after monitoring that the SOC completes the access operation, control the strobe connection between the BMC and the memory so that the BMC performs the firmware update for the next sector.

2. The firmware upgrade control system according to claim 1, characterized in that: The channel controller is further configured to: Before controlling the connection between the BMC and the memory to be enabled, it is determined based on the mutual exclusion mechanism that the connection between the BMC and the memory can be enabled.

3. The firmware upgrade control system according to claim 2, characterized in that: The channel controller is further configured to: In a case where it is determined that the connection between the BMC and the memory cannot be enabled, the occupation request of the BMC is recorded until it is detected that the connection between the BMC and the memory can be enabled.

4. The firmware upgrade control system according to any one of claims 1 to 3, characterized in that: The channel controller is further configured to: upon receiving the SOC occupancy request, determining a request type of the SOC occupancy request; If the request type of the SOC occupation request is normal occupation and the current channel is in the BMC occupation state, the SOC occupation request is recorded and marked as waiting.

5. The firmware upgrade control system according to claim 4, characterized in that: The channel controller is further configured to: If the request type of the SOC occupation request is forced occupation and the current channel is in the BMC occupation state, clearing the relevant execution data corresponding to the firmware upgrade instruction, controlling the connection between the SOC and the memory, so that the SOC writes the firmware execution log to the memory, wherein the forced occupation indicates that the SOC occupation request is issued when an exception occurs in firmware reading or execution; Sending a prompt message for channel occupation failure to the BMC.

6. A firmware upgrade control method, characterized in that: A channel controller applied to a firmware upgrade control system according to any one of claims 1 to 5, wherein the firmware upgrade control method comprises: receiving a firmware upgrade instruction for a first firmware among the different firmwares sent by a baseboard controller BMC in the firmware upgrade control system; In response to the firmware upgrade instruction, controlling and enabling the connection between the BMC and the memory in the firmware upgrade control system so that the BMC updates the firmware in the memory; After monitoring that the BMC completes the firmware update of a sector, checking whether there is a waiting system-on-chip (SOC) occupancy request, the SOC occupancy request is issued by the SOC when it has a need to access the second firmware among the different firmwares; When there is a waiting SOC occupation request, controlling to enable the connection between the SOC and the memory so that the SOC performs the access operation on the second firmware; And, after monitoring that the SOC completes the access operation, controlling the connection between the BMC and the memory to enable the BMC to perform firmware update on the next sector.

7. The firmware upgrade control method according to claim 6, wherein: The step of responding to the firmware upgrade instruction and controlling the connection between the BMC and the memory in the firmware upgrade control system includes: In response to the firmware upgrade instruction, determining, based on a mutual exclusion mechanism of a hardware mutex lock, whether to enable a connection between the BMC and the memory; Controlling and enabling the connection between the BMC and the memory in the firmware upgrade control system.

8. The firmware upgrade control method according to claim 7, wherein: Also includes: If it is determined that the connection between the BMC and the memory cannot be enabled based on the mutual exclusion mechanism of the hardware mutex lock, the BMC's request for occupying the hardware mutex lock is recorded, and whether the connection between the BMC and the memory can be enabled is monitored until it is detected that the connection between the BMC and the memory can be enabled.

9. The firmware upgrade control method according to any one of claims 6 to 8, characterized in that: Also includes: Upon receiving the SOC occupation request, determining a request type of the SOC occupation request, where the request type includes normal occupation and forced occupation; If the request type of the SOC occupation request is normal occupation and the current channel is in the BMC occupation state, the SOC occupation request is recorded and marked as waiting.

10. The firmware upgrade control method according to claim 9, wherein: Also includes: If the request type of the SOC occupation request is forced occupation and the current channel is in the BMC occupation state, clearing the relevant execution data corresponding to the firmware upgrade instruction, controlling the connection between the SOC and the memory, so that the SOC writes the firmware execution log to the memory, wherein the forced occupation indicates that the SOC occupation request is issued when an exception occurs in firmware reading or execution; Sending a prompt message for channel occupation failure to the BMC.