Signal monitoring device based on functional safety

By combining the register module with the IO monitoring and processing module, multi-channel parallel signal monitoring and XOR logic operations are achieved, solving the problems of complex signal monitoring and poor real-time performance, and improving the real-time performance and fault handling efficiency of signal monitoring.

CN120803844APending Publication Date: 2025-10-17SANECHIPS TECH CO LTD
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Patent Information

Application Number
CN202510895944.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-30
Publication Date
2025-10-17

AI Technical Summary

Technical Problem

Existing signal monitoring methods are complex and have poor real-time performance, making it difficult to meet the requirements for efficient functional safety.

Method used

The system uses a register module to generate control signals, combines an I/O monitoring and processing module for multi-channel parallel monitoring, and generates interrupt signals through XOR logic operations to achieve rapid fault detection of monitoring and reference signals.

Benefits of technology

It simplifies the signal monitoring process, improves real-time performance and fault handling efficiency, reduces system resource consumption, and ensures signal reliability and accuracy.

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Abstract

The embodiment of the invention provides a signal monitoring device based on functional safety, and relates to the field of functional safety. The monitoring device comprises a register module which comprises at least one register and is used for generating a control signal, generating fault reporting information based on an interrupt signal and sending the fault reporting information to a fault processing module, so that the fault processing module carries out fault processing; the IO monitoring processing module is used for performing multi-path parallel monitoring on the monitoring signal and the reference signal based on the control signal; wherein in any path, the monitoring signal and the reference signal are subjected to exclusive-OR logic operation, so that the interrupt signal is generated based on an operation result. According to the embodiment of the invention, the problems of complex comparison process and poor real-time performance due to the fact that the signal monitoring technology mainly adopts pulse width and period comparison and the like in the related technology are solved, and the effects of simplifying the comparison process and improving the real-time performance are further achieved.
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Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the field of functional safety, and in particular, to a signal monitoring device based on functional safety. BACKGROUND

[0002] With the improvement of intelligence and automation level, the functional safety requirement of chips is higher and higher, and standards such as ISO26262 have become industry specifications. As one of the core electronic control units (ECU), SOC chips need to process a large amount of signals and ensure the accuracy and reliability of the signals to meet the safety requirements of operation.

[0003] In the related art, the monitoring technology of the signal mainly adopts the comparison of pulse width, period and the like, and there is a problem of complex comparison process and poor real-time performance. SUMMARY

[0004] Embodiments of the present application provide a signal monitoring device based on functional safety, which at least solves the problem of complex comparison process and poor real-time performance of the signal monitoring technology in the related art.

[0005] According to an embodiment of the present application, a signal monitoring device based on functional safety is provided, comprising: a register module comprising at least one register, configured to generate a control signal, and generate a fault reporting information based on an interrupt signal, and send the fault reporting information to a fault processing module, so that the fault processing module performs fault processing; an IO monitoring processing module, configured to perform multi-path parallel monitoring on a monitoring signal and a reference signal based on the control signal; wherein in any one path, the monitoring signal and the reference signal are subjected to an exclusive-OR logical operation to generate the interrupt signal based on the operation result.

[0006] Through the above embodiments of the present application, the signal monitoring device uses the technical means of cooperation between the register module and the IO monitoring processing module. The register module generates a control signal to control the IO monitoring processing module to perform multi-path parallel monitoring on the monitoring signal and the reference signal based on the control signal, and each path can perform an exclusive-OR logical operation on the monitoring signal and the reference signal to generate an interrupt signal. After the register module receives the interrupt signal to generate a fault reporting information, the fault reporting information is sent to the fault processing module, so that the fault processing module performs fault processing in time. Therefore, at least the problem of complex comparison process and poor real-time performance of the signal monitoring technology in the related art is solved, and the effect of simplifying the comparison process and improving the real-time performance is achieved. BRIEF DESCRIPTION OF DRAWINGS

[0007] Figure 1is a structural schematic diagram of a functional safety-based signal monitoring device applied in a chip system of an example safety application according to an embodiment of the present application.

[0008] Figure 2 is a structural schematic diagram of a functional safety-based signal monitoring device according to an embodiment of the present application.

[0009] Figure 3 is a structural schematic diagram of a functional safety-based signal monitoring device according to an embodiment of the present application. Figure Two

[0010] Figure 4 is a structural schematic diagram of a monitoring core unit according to an embodiment of the present application.

[0011] Figure 5 is a flowchart of a method of applying a functional safety-based signal monitoring device in a motor control system according to an embodiment of the present application. DETAILED DESCRIPTION

[0012] Hereinafter, embodiments of the present application will be described in detail with reference to the accompanying drawings and in conjunction with embodiments.

[0013] It should be noted that the terms "first", "second", and the like in the specification and claims of the present application and the above-described accompanying drawings are used to distinguish similar objects, and do not necessarily have to be used to describe a specific order or sequence.

[0014] Figure 1 is a structural schematic diagram of a functional safety-based signal monitoring device applied in a chip system of an example safety application according to an embodiment of the present application, as shown in Figure 1 the chip system includes a CPU core system, a bus system, a fault processing module, an IO input / output module, a communication module, and an IO multiplexing module.

[0015] The CPU core system is connected to the bus system, the fault processing module, the functional safety-based signal monitoring device, the IO input / output module, and the communication module are connected to the bus system, the IO multiplexing module is connected to the IO input / output module and the communication module, the output loopback of the IO multiplexing module routed to the PAD (chip pin) is connected to the functional safety-based signal monitoring device for monitoring, and the functional safety-based signal monitoring device is connected to the fault processing module to send fault reporting information to the fault processing module.

[0016] The CPU core system serves as the control core of the entire chip system and is responsible for coordinating communication and data exchange between modules. The CPU core system configures, receives, and processes signals from the fault processing module, the IO input / output module, and the communication module through the bus system.

[0017] ​The fault processing module is configured to receive fault reports from the function safety-based signal monitoring device in real time, analyze and process the fault information, and ensure that the chip system can take appropriate emergency measures when a fault occurs. The fault processing module is responsible for reporting the fault information to the CPU kernel system and starting the corresponding recovery process.

[0018] The IO input / output module is responsible for interacting with the IO signals (input signals and output signals) of external devices, including supporting multi-channel reading of input signals and sending output signals.

[0019] The communication module is a general term for various different communication interface protocols, such as CAN and Ethernet, and is responsible for exchanging data between different modules within the chip system and communicating with external devices or systems. It supports low-speed or high-speed communication signals and can ensure the accuracy and stability of real-time data transmission.

[0020] The IO multiplexing module is responsible for signal multiplexing between different IO signal transmission and processing paths to achieve flexible signal routing and resource optimization. It supports flexible configuration of signals to cope with different working modes and application requirements.

[0021] The bus system is responsible for providing data transmission and configuration paths between the CPU kernel system, fault processing module, function safety-based signal monitoring device, IO input / output module, and communication module. It can be implemented using a high-performance noc bus topology structure, and the communication protocol can use high-performance bus protocols such as axi and ahb.

[0022] The function safety-based signal monitoring device monitors all IO signals and communication signals in the chip system in real time. Through hardware-level monitoring and fault detection, it ensures the reliability and accuracy of input signals and output signals. The monitoring results are fed back to the fault processing module for timely fault reporting.

[0023] In an embodiment of the present application, a function safety-based signal monitoring device is provided, Figure 2 is a structural diagram of the function safety-based signal monitoring device according to an embodiment of the present application Figure One As shown in Figure 2 The signal monitoring device includes:

[0024] The register module includes at least one register for generating control signals, generating fault reporting information based on the interrupt signal, and sending the fault reporting information to the fault processing module for fault processing by the fault processing module.

[0025] In an exemplary embodiment, in the register module, a register of a corresponding type can be configured based on the specific configuration parameters and control logic of the IO monitoring processing module, to store the corresponding specific configuration parameters and control logic in the register, to provide specific control signals for the IO monitoring processing module. And in the case of receiving the interrupt signal sent by the IO monitoring processing module, the fault reporting information is generated based on the interrupt signal, and the fault reporting information is sent to the fault processing module, so that the fault processing module performs fault processing.

[0026] The IO monitoring processing module is configured to perform multi-path parallel monitoring on the monitoring signal and the reference signal based on the control signal; wherein in any one path, the monitoring signal and the reference signal are subjected to XOR logical operation to generate an interrupt signal based on the operation result.

[0027] In an exemplary embodiment, the IO monitoring processing module receives the control signal sent by the register module to perform corresponding configuration operation, and in the case of receiving the monitoring signal and the reference signal, the control signal is used to perform multi-path parallel monitoring on the monitoring signal and the reference signal; wherein in any one path, the monitoring signal and the reference signal are subjected to XOR logical operation to quickly generate an interrupt signal based on the operation result. Wherein the external device inputs external signals into the chip system through the IO input and output module, and these signals can be signals from sensors, actuators or other peripheral devices, and also include specific communication protocol signals such as SPI, I2C, CAN, LIN, Ethernet, etc. The monitoring signal and the reference signal also need to be input through the IO input and output module, and a signal with a relatively clean waveform rule can be selected as the reference signal.

[0028] By using the above technical solution, the signal monitoring device uses the technical means that the register module and the IO monitoring processing module cooperate with each other, the register module generates a control signal to control the IO monitoring processing module to perform multi-path parallel monitoring on the monitoring signal and the reference signal based on the control signal, and each path can perform XOR logical operation on the monitoring signal and the reference signal to generate an interrupt signal. After the register module receives the interrupt signal to generate fault reporting information and sends it to the fault processing module, the fault processing module can timely perform fault processing. Therefore, at least the problem that the comparison process is complex and the real-time performance is poor in the related art is solved, and the effect of simplifying the comparison process and improving the real-time performance is achieved.

[0029] Figure 3 is a structural diagram of a signal monitoring device based on functional safety according to an embodiment of the application Figure Two As shown in Figure 3As shown, in an embodiment, the IO monitoring processing module comprises: a monitoring core unit and a plurality of groups of channels; wherein, the monitoring core unit is arranged in each group of channels; the monitoring core unit is configured to perform an exclusive-OR logical operation on a monitoring signal and a reference signal transmitted in the channel, to obtain an interrupt signal based on the operation result.

[0030] In an exemplary embodiment, the IO monitoring processing module (e.g., io_mon_mux) is configured with a plurality of channels (e.g., ch0, ch1, …, chN), and a monitoring core unit (e.g., io_mon) is arranged in each channel. For each channel, a monitoring signal and a reference signal transmitted in the channel are subjected to an exclusive-OR logical operation by the monitoring core unit in the channel, to obtain an interrupt signal (e.g., io_mon_intr) based on the operation result.

[0031] In an embodiment, the IO monitoring processing module further comprises: a multiplexing unit configured to group a plurality of pairs of sub-channels in each group of channels based on a monitoring selection signal and a reference selection signal, to obtain grouped pairs of sub-channels, and to send the monitoring signal and the reference signal into each pair of sub-channels; wherein, the control signal comprises the monitoring selection signal and the reference selection signal, and the multiplexing unit is arranged in each group of channels.

[0032] In an exemplary embodiment, the multiplexing unit (e.g., MUX_4) is configured to distribute a plurality of control signals and data configuration signals sent by a register module to corresponding parallel monitoring modules, to receive a plurality of signal sources input from outside, and to connect the signal sources to the plurality of monitoring modules. Secondly, the interrupt signal is sent to the register module after being sorted. Inside the multiplexing unit, each group of channels (e.g., each group of channels comprises 4 input channels and 4 monitoring channels) is grouped. For example, the 4 input channels and the 4 monitoring channels are grouped based on a monitoring signal (e.g., tar_io_sel) and a reference selection signal (e.g., ref_io_sel). Specifically, the input channels and the monitoring channels are grouped two by two to obtain 4 pairs of grouped sub-channel pairs (each sub-channel pair comprises an input channel and a monitoring channel), and the monitoring signal (e.g., tar_io_xN) and the reference signal (e.g., ref_io_xN) are sent into each pair of sub-channels.

[0033] By adopting the above technical solution, the embodiment of the present application supports parallel monitoring of multiple inputs, and each 4 channels is configured as a group for external input channels, which can select monitoring channels. This design not only reduces the number of IO monitoring core and filter, but also saves power consumption area. Moreover, it also supports multiple parallel monitoring (the IO signals to be monitored in parallel can be transmitted to different groups), which meets the needs of complex signal monitoring and real-time performance.

[0034] In an embodiment, the IO monitoring processing module further comprises a filtering unit configured to configure the delay time and the sampling times based on a filtering configuration signal, to perform the delay de-bouncing operation and the multi-sampling de-bouncing operation on the monitoring signal and the reference signal; wherein the filtering unit is arranged in each group of channels.

[0035] In an exemplary embodiment, the input signal needs to enter the filtering unit (e.g., Filter) for de-bouncing processing. The filtering unit is configured to configure the delay time and the sampling times based on a filtering configuration signal (e.g., filter_val), to perform the delay de-bouncing operation and the multi-sampling de-bouncing operation on the monitoring signal and the reference signal. Of course, the filtering mode can also use other suitable filtering algorithms for digital signals, such as Kalman filtering, etc. When selecting the filtering mode, the appropriate filtering mode can be selected according to the rate of the signal itself and the actual jitter condition, to ensure the stability of the filtered signal, so that the monitoring system works stably and reliably.

[0036] Figure 4 is a structural schematic diagram of a monitoring core unit according to an embodiment of the present application, as shown in Figure 4 In an embodiment, the monitoring core unit comprises a logic operator unit configured to perform an exclusive-OR logic operation on the monitoring signal and the reference signal; wherein the operation result is set to 0 when the monitoring signal and the reference signal are consistent, and the operation result is set to 1 when the monitoring signal and the reference signal are inconsistent.

[0037] In an exemplary embodiment, for example, the monitoring signal and the reference signal filtered by the filtering unit can be compared, and through the exclusive-OR logic operation, if the monitoring signal and the reference signal are consistent, the exclusive-OR result is 0; if not, the exclusive-OR result is 1. Of course, the signal comparison can also use other hardware comparison methods, such as building a differential comparator, etc.

[0038] In an embodiment, as shown in Figure 4 The monitoring core unit further comprises a counting unit configured to, in the case that the operation result is 1 each time, count the operation times successively until the operation times are accumulated to be greater than or equal to a preset threshold, and in the case that the logic operator unit determines that the operation result of this time is 1, stop counting and send an interrupt signal; in the case that the logic operator unit determines that the operation result of each time or the operation result of this time is 0, clear the operation times, to perform the next monitoring.

[0039] In an exemplary embodiment, when the XOR value is 1, a 32-bit up-counting counter is designed to count up, and when the XOR value is 0, the counter is cleared; when the count reaches a threshold value, the counting is stopped, and a count stop flag is outputted, and then the XOR value is sampled when the threshold value is reached, and when the XOR value is 1, an interrupt signal is pulled high.

[0040] For example, if the comparison result shows that the current monitoring signal is consistent with the reference signal (i.e., the XOR result is 0), the interrupt counter is cleared, and the next time signal is monitored. If the signals are inconsistent (i.e., the XOR result is 1), the next step is entered.

[0041] When the current monitoring signal is inconsistent with the reference signal, the error counter counts. If an inconsistency is detected, the counter is incremented, otherwise the counter is cleared.

[0042] The counter continues to count up until the count value reaches a set threshold value. When the count value exceeds the set threshold value, the sampled XOR value is judged again, and if it is 1, it indicates that the signal has a fault. At this time, the next step is entered. If the count value does not exceed the threshold value, or the XOR value is 0, the signal continues to be monitored.

[0043] When the count value exceeds the threshold value and the XOR value is 1, the counter stops counting and triggers an interrupt signal to report an interrupt. The interrupt is finally reported to the fault handling module, and the system will make corresponding fault handling. In addition to using the interrupt signal to report, the processor can also query the data stored in the interrupt register by polling to identify the error.

[0044] In an embodiment, the IO monitoring processing module further comprises an interrupt aggregator configured to aggregate the operation results transmitted by each group of channels to obtain an interrupt signal; wherein the multiple sets of operation results are integrated in the interrupt signal.

[0045] In an exemplary embodiment, the interrupt signals (e.g., io_mon_intr) in all channels are aggregated into an interrupt aggregator to form an N-bit raw interrupt vector (e.g., io_mon_intr_raw), and sent to a register module, so that the register module generates fault reporting information based on the raw interrupt vector, and sends the fault reporting information to a fault handling module, so that the fault handling module performs fault handling.

[0046] In an embodiment, the register is configured to store the state of the interrupt signal, so that the CPU core system of the chip retrieves the state of the interrupt signal by polling to control the fault handling module to perform fault handling.

[0047] In an exemplary embodiment, the register can be an interrupt register, and the CPU core system of the chip can obtain the interrupt flag by polling the interrupt status register in the register module to control the fault processing module to process the fault.

[0048] In an embodiment, the multiplexing unit is further configured to determine one or more groups of channels to be enabled based on the enable parameters of the monitoring selection signal and the enable parameters of the reference selection signal, and determine one or more pairs of sub-channels in each group of channels to be enabled.

[0049] In an exemplary embodiment, the register can be a configuration register, used for storing module configuration registers, and also used for processing interrupts and errors, and containing a software lock function, exposed to the CPU core system of the chip through an AXI / APB interface. The register module mainly includes the following interfaces: io_mon_global_xN, used for one-key opening or closing the entire monitor; io_mon_en_xN, used for single-channel monitoring enable control; filter_val, used for filter parameter setting, such as filtering times, delay time, and the like; filter_mode, used for filter mode selection, and the embodiment of the application supports "multi-sampling filtering" and "delay filtering" and the like, which are suitable for high-speed digital signal filtering modes; tar_io_sel and ref_io_sel, used for respectively indicating routing selection of each channel from N channels of to-be-monitored I / O and reference I / O; lock_err, used for triggering a high-level alarm output when the register is locked and the register is written with error; io_mon_intr_raw, used for interrupt status receiving; and io_mon_intr, used for interrupt status reporting. Therefore, the monitoring selection signal can be received through the corresponding interface, one or more groups of channels can be determined to be enabled based on the enable parameters of the monitoring selection signal and the enable parameters of the reference selection signal, and one or more pairs of sub-channels in each group of channels can be determined to be enabled.

[0050] In an embodiment, the register module further includes a register lock, used for locking the register, so that the locked register outputs an alarm signal when written with data.

[0051] In an exemplary embodiment, for example, based on the lock_err interface, when the register is locked, a high-level alarm output is triggered if the register is written with error.

[0052] Figure 5 is a flowchart of a method for applying the signal monitoring device based on functional safety according to the embodiment of the application in a motor control system, as shown in Figure 5 The following will be explained and described by taking the application of the monitoring device in a motor control system as an example:

[0053] Step S501, PWM signal input and monitoring signal routing.

[0054] The motor control system controls the on-off of the power MOS tube through the PWM signal output on the PAD, thereby providing a variable current to drive the motor. The output of the PAD is looped back to the signal monitoring device based on functional safety as a reference signal, and the output of the power MOS tube is looped back to the signal monitoring device based on functional safety as a monitoring signal, for subsequent signal processing and comparison.

[0055] Step S502, signal sampling and feasibility verification.

[0056] In the filtering unit, the reference / monitoring signal is filtered according to the filtering mode (delay de-bouncing or multi-sampling de-bouncing) and the filtering threshold value configured in advance through the register, and the filtered output signal is the "smooth signal" to be compared.

[0057] Step S503, reference signal comparison.

[0058] The filtered reference signal and the monitoring signal are compared cycle by cycle. Through the XOR logical operation, if the signal is consistent with the reference signal, the XOR result is 0; if not, the XOR result is 1.

[0059] Step S504, check if the monitoring signal is consistent with the reference signal.

[0060] If the comparison result shows that the reference signal is consistent with the PWM signal (i.e., the XOR result is 0), the interrupt counter is cleared, and the next time signal is monitored. If the signals are inconsistent (i.e., the XOR result is 1), the next step is entered.

[0061] Step S505, error counter counting.

[0062] When the reference signal is inconsistent with the PWM signal, the error counter counts. If inconsistency is detected, the counter increases the count, otherwise the counter is cleared.

[0063] Step S506, judge whether the count value exceeds the threshold.

[0064] The counter continues to count until the count value reaches the set threshold. When the count value exceeds the set threshold, the sampling XOR value is judged again. If it is 1, it indicates that the signal has a fault. At this time, the next step is entered. If the count value does not exceed the threshold, or the XOR value is 0, the signal continues to be monitored.

[0065] Step S507, stop counting and report error.

[0066] When the count value exceeds the threshold value and the XOR value is 1, the counter stops counting, and an interrupt signal is triggered to report an interrupt. The interrupt is finally reported to a fault handling module, the fault handling module triggers a system interrupt and notifies the CPU, the CPU reduces the output frequency of the PWM in the corresponding interrupt service function, ensures that the motor maintains operation, and clears the interrupt register of the function safety-based signal monitoring device, and is ready to continue control signal monitoring.

[0067] Step S508, continue monitoring after frequency reduction.

[0068] Steps S503 to S507 are repeated, and after a preset number of cycles, if it is found that the monitored PWM signal is still abnormal by comparing with the reference signal, the next step is performed.

[0069] Step S509, fault handling.

[0070] The fault management module receives the fault information again and notifies the CPU through the bus system, and the CPU interrupt service function and closes the PWM output, completely stops the motor drive, to prevent motor damage.

[0071] Therefore, the function safety-based signal monitoring device is applied in the motor control system, and the state of the motor can be monitored and regulated.

[0072] In summary, first, the embodiment of the application improves the real-time performance of monitoring and the efficiency of data acquisition by using a multi-channel parallel monitoring scheme at the hardware level. Combined with the independent enablement of each signal channel, redundant comparison and read-back operations can be effectively avoided, thereby reducing the consumption of system resources and ensuring efficient real-time feedback. At the same time, the integrated routing selection function reduces the number of filters and monitoring cores, achieving a balance between area and power consumption. Secondly, due to the use of de-bouncing filtering and cycle-by-cycle fast comparison scheme, customized filtering can be performed according to the signal rate and jitter, with higher filtering efficiency and smaller delay. By using the cycle-by-cycle XOR comparison method, the deviation can be found within a single cycle, and the real-time performance is greatly improved.

[0073] Moreover, the embodiment of the application provides an adjustable filtering mode, filtering parameters, threshold configuration, and flexible fault detection mechanism, which, in cooperation with the CPU software, ensures that the adjustment strategy corresponding to the fault can be adjusted according to the system requirements in different use scenarios, thereby improving the usability of the system and ensuring the real-time performance of the fault.

[0074] Finally, the embodiment of the present application adopts the software lock protection mechanism and LBIST (built-in self-test) function, so as to ensure that the key register is prevented from being wrongly rewritten by software due to systematic errors, and to ensure that the hardware errors are excluded before the start detection, thereby reducing the risk of false positives or false negatives.

[0075] Obviously, those skilled in the art should understand that the modules or steps of the present application described above can be realized by general computing devices, which can be concentrated on a single computing device or distributed on a network composed of multiple computing devices, and can be realized by program codes executable by the computing devices, so that they can be stored in storage devices and executed by the computing devices, and in some cases, the steps shown or described can be executed in different order, or they can be respectively manufactured into individual integrated circuit modules, or multiple modules or steps thereof can be manufactured into a single integrated circuit module. Thus, the present application is not limited to any specific combination of hardware and software.

[0076] The above only describes the preferred embodiments of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. within the principles of the present application should be included in the protection scope of the present application.

Claims

1. A signal monitoring device based on functional safety, characterized in that: include: a register module, comprising at least one register, configured to generate a control signal, and generate fault reporting information based on the interrupt signal, and send the fault reporting information to the fault processing module so that the fault processing module performs fault processing; The IO monitoring processing module is used to perform multi-channel parallel monitoring of the monitoring signal and the reference signal based on the control signal; wherein, in any channel, an exclusive OR logic operation is performed on the monitoring signal and the reference signal to generate the interrupt signal based on the operation result.

2. The monitoring device according to claim 1, characterized in that The IO monitoring processing module includes: a monitoring core unit and multiple groups of channels; wherein each group of channels is provided with the monitoring core unit; The monitoring core unit is used to perform an exclusive OR logic operation on the monitoring signal and the reference signal transmitted in the channel, so as to obtain the interrupt signal based on the operation result.

3. The monitoring device according to claim 1, characterized in that The IO monitoring processing module also includes: A multiplexing unit is used to group multiple pairs of sub-channels in each group of the channels based on the monitoring selection signal and the reference selection signal to obtain grouped sub-channel pairs, and to send the monitoring signal and the reference signal to each group of the sub-channel pairs respectively; wherein the control signal includes the monitoring selection signal and the reference selection signal, and the multiplexing unit is provided in each group of the channels.

4. The monitoring device according to claim 1, characterized in that The IO monitoring processing module also includes: A filtering unit is used to configure the delay time and the number of sampling times based on the filtering configuration signal to perform delay de-jittering and multi-sampling de-jittering operations on the monitoring signal and the reference signal; wherein the filtering unit is provided in each group of the channels.

5. The monitoring device according to claim 2, characterized in that: The monitoring core unit includes: A logic operation subunit is used to perform an exclusive OR logic operation on the monitoring signal and the reference signal; wherein, when the monitoring signal and the reference signal are consistent, the operation result is set to 0; when the monitoring signal and the reference signal are inconsistent, the operation result is set to 1.

6. The monitoring device according to claim 5, characterized in that: The monitoring core unit also includes: The counting unit is used to successively count the number of operations each time the operation result is 1 until the number of operations accumulates to a value greater than or equal to the preset threshold value, and to stop counting and send the interrupt signal when the logic operation subunit determines that the operation result this time is 1; and to clear the number of operations to zero when the logic operation subunit determines that the operation result each time or the operation result this time is 0, so as to perform the next monitoring.

7. The monitoring device according to claim 2, characterized in that The IO monitoring processing module also includes: The interrupt aggregator is used to aggregate the operation results transmitted by each group of channels to obtain the interrupt signal; wherein multiple groups of the operation results are integrated into the interrupt signal.

8. The monitoring device according to claim 3, characterized in that: The multiplexing unit is further configured to: Based on the enable parameter of the monitoring selection signal and the enable parameter of the reference selection signal, it is determined that one or more groups of channels are enabled, and it is determined that one or more pairs of sub-channel pairs within each group of channels are enabled.

9. The monitoring device according to claim 1, characterized in that: The registers are used to: The state of the interrupt signal is stored so that the CPU core system of the chip can retrieve the state of the interrupt signal by polling to control the fault processing module to perform fault processing.

10. The monitoring device according to claim 1, characterized in that The register module further includes: The register lock is used to lock the register so that the locked register outputs an alarm signal when data is written into the register.