Virtual address conversion method and device, medium and product

Abstract

The invention discloses a virtual address conversion method and device, a medium and a product, and relates to the technical field of memory management, and the method comprises the steps: distributing virtual pages in target data to physical pages with the same physical frame number in different accelerators when the pages in the target data are distributed, thereby forming at least one merged group, and subsequently, when an address translation request for the target virtual page is obtained, if the target virtual page is determined to belong to the merging group, performing address translation on the target virtual page and the other virtual pages in the merging group to which the target virtual page belongs together. Namely, according to the scheme of the invention, when any virtual page in the merged group is subjected to address conversion, conversion of other virtual pages in the group can be synchronously completed, and page table traversal does not need to be independently executed on each page, so that the technical problems of low address conversion efficiency and high overhead of the current virtual memory are solved, the page table access times are greatly reduced, and the address conversion efficiency of the virtual memory is improved. And the address conversion overhead is reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of memory management, and particularly relates to a virtual address conversion method, device, medium and product. BACKGROUND

[0002] Under the background of continuous development of processor packaging technology and the approaching limit of Moore's law, accelerator modules become an important architecture to continue performance improvement. However, this architecture faces new challenges such as non-uniform memory access (NUMA) and heavier virtual memory conversion burden. Although existing research has made certain progress in relieving the NUMA effect through page mapping methods, there is still optimization space for virtual memory conversion. Simply increasing the number of page table walkers (PTWs) can improve performance to a certain extent, but when the PTW reaches a certain number, the speed improvement will tend to be saturated, which shows that the parallelism of the input-output memory management unit (IOMMU) is one of the key bottlenecks of the performance of the accelerator module, prompting the industry to explore new virtual memory conversion methods.

[0003] In addition, the current commonly used related technologies also have obvious defects, such as the super page method which is easy to cause hot pages to concentrate, resulting in increased remote memory access and migration overhead; in L2 TLB (Level 2 Translation Lookaside Buffer) sharing, the page mapping algorithm reduces remote data access, which reduces the opportunity to find conversion in the remote TLB, resulting in weakened L2 TLB sharing effect; in the address conversion prefetching method, due to high concurrency and distributed memory, the mapping of the requested virtual page number to the physical frame number lacks continuity, making it difficult to accurately predict the next address to be converted, reducing the accuracy of address conversion prefetching.

[0004] To sum up, how to realize efficient conversion of virtual memory addresses and reduce address conversion overhead is a problem to be solved at present. SUMMARY

[0005] The present application provides a virtual address conversion method, device, medium and product to at least solve the problems of low virtual memory address conversion efficiency and large overhead in related technologies.

[0006] The present application provides a virtual address conversion method, comprising: When a page allocation request for target data is obtained, each virtual page in the target data is allocated to a physical page with the same physical frame number in different accelerators to obtain at least one merged group; wherein each virtual page in the same merged group corresponds to a different accelerator, and the physical pages allocated in different accelerators have the same physical frame number; Target information of the corresponding merged group is recorded in the page table entry corresponding to each virtual page; When an address translation request for a target virtual page is obtained, it is determined whether the target virtual page belongs to any merged group based on the target information recorded in the page table entry corresponding to the target virtual page; If yes, address translation is performed on the target virtual page and the remaining virtual pages in the first merged group to which the target virtual page belongs.

[0007] The application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for executing the computer program to implement the steps of any of the virtual address translation methods described above.

[0008] The application also provides a computer readable storage medium, which stores a computer program, wherein the computer program is executed by a processor to implement the steps of any of the virtual address translation methods described above.

[0009] The application also provides a computer program product, which comprises a computer program, and the computer program is executed by a processor to implement the steps of any of the virtual address translation methods described above.

[0010] According to the application, when allocating pages in target data, each virtual page in the target data is allocated to a physical page with the same physical frame number in different accelerators to form at least one merged group, and target information of the corresponding merged group is recorded in the page table entry corresponding to each virtual page; wherein each virtual page in each merged group corresponds to a different accelerator, and the physical pages allocated in different accelerators have the same physical frame number. Subsequently, when an address translation request for a target virtual page is obtained, it can be quickly determined whether the target virtual page belongs to any merged group based on the target information recorded in the page table entry corresponding to the target virtual page, reducing the dependence on complex prefetch algorithms. When it is determined that the target virtual page belongs to a merged group, address translation can be performed on the target virtual page and the remaining virtual pages in the merged group. That is, according to the scheme of the application, when address translation is performed on any virtual page in a merged group, the translation of the remaining virtual pages in the group can be completed synchronously, without performing page table traversal on each page individually, thereby solving the technical problems of low efficiency and high overhead of virtual memory address translation, achieving the technical effect that only one traversal is required for a merged group to complete the translation of all pages in the group, greatly reducing the number of page table accesses and reducing address translation overhead. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0012] Figure 1 A schematic diagram of an accelerator module provided in an embodiment of the present application; Figure 2 A flowchart of a virtual address translation method provided in an embodiment of the present application; Figure 3 A flowchart of a specific virtual address conversion method provided in an embodiment of the present application; Figure 4 A schematic diagram of page merging logic provided in an embodiment of the present application; Figure 5 A schematic diagram of a page table entry format provided in an embodiment of the present application; Figure 6 An internal address translation architecture diagram of acceleration provided in an embodiment of the present application; Figure 7 A schematic diagram of a data page allocation result provided in an embodiment of the present application; Figure 8 A schematic diagram of the structure of a virtual address translation device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0013] The following will be combined with the accompanying drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0014] It should be noted that, in the description of this application, the terms "comprises," "includes," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or elements inherent to such process, method, article, or device. The terms "first," "second," etc., in this application are used to distinguish similar objects, and are not used to describe a particular order or sequence.

[0015] In order to enable those skilled in the art to better understand the present application, the present application will be further described in detail below in combination with the drawings and specific embodiments.

[0016] In combination with the specific application environment architecture or the specific hardware architecture on which the execution of the virtual address conversion method depends, the specific application environment architecture or the specific hardware architecture is described herein.

[0017] The hardware architecture on which the present method depends is a multi-accelerator server system, the core of which is an accelerator module composed of multiple independent accelerators, each of which has its own local memory and can remotely access the memory of other accelerators. The purpose of the accelerator module is to provide efficient computing power and low latency to meet the high parallel computing needs required by AI (Artificial Intelligence) algorithms, etc. Taking a multi-chip module GPU (Graphics Processing Unit) as an example, the multi-chip module GPU is a component that integrates multiple GPU modules through high-bandwidth and high-energy signal technology on the package, and has strong parallel computing power. In the AI training scenario of the data center, the multi-chip module GPU can quickly process large-scale deep learning tasks by virtue of the cooperative work of multiple GPU modules.

[0018] Specifically, as shown in Figure 1 The accelerator module includes N independent accelerators, N≥2, such as GPUs, AI acceleration chips, etc., each of which has an independent compute unit (CU), local memory (such as L1 cache, L2 cache, shared cache, etc.), and device physical memory. Each accelerator can independently process data, but needs to cooperate with other accelerators to complete large-scale parallel tasks. In the accelerator module, the application processes a large amount of data on multiple accelerators, the data is distributed among the accelerators in many pages, and each page needs to be individually mapped from virtual space to physical space.

[0019] Referring to Figure 2 The embodiment of the present application provides a virtual address conversion method, which comprises the following steps: Step S11: When the page allocation request for the target data is obtained, each virtual page in the target data is allocated to a physical page with the same physical frame number in different accelerators to obtain at least one merged group; wherein each virtual page in the same merged group corresponds to a different accelerator, and the physical frame numbers of the physical pages allocated in different accelerators are the same.

[0020] In the embodiment, when a page allocation request for target data is acquired, each virtual page in the target data is allocated to a physical page with the same physical frame number (PFN) in different accelerators, thereby forming at least one merged group, wherein each virtual page in each merged group corresponds to a different accelerator, and the physical pages allocated in different accelerators have the same physical frame number.

[0021] It should be noted that in the accelerator module, since each accelerator has local memory and can access the memory of other remote accelerators, the memory access delay is uneven, and various page mapping algorithms currently exist to reduce the long remote memory access delay between accelerators. For example, LASP (Locality-Aware Page Allocation Strategy) considers locality when mapping pages to minimize remote memory access. LASP analyzes data access patterns at compile time and maps several consecutive pages in row and column dimensions on the same accelerator, and the Cooperative Thread Array (CTA) accessing these pages is located on the same accelerator to reduce remote memory access. Under this page mapping strategy, each accelerator is allocated corresponding pages, and each page needs to be independently address-converted, i.e., each page needs to be separately mapped from virtual space to physical space, and the number of pages needs to be converted.

[0022] For an AI application, multiple accelerators run the same program code. Therefore, the pages of each data are often accessed at similar times on different accelerators. In view of this feature, the multiple pages of each data are allocated to physical pages with the same physical frame number in different accelerators, so that their addresses can be converted together subsequently. These virtual pages mapped to the same physical frame number in different accelerators are called merged groups. In other words, the virtual pages in the same merged group have the same physical frame number of the physical page except for the ID identification of the accelerator. Therefore, once the physical address of a virtual page in the merged group is known, the physical addresses of all other virtual pages in the same merged group can be calculated without the need for page table traversal with huge overhead.

[0023] It should also be noted that the merged group is created when the page is allocated and mapped to any physical page available between the accelerators. Specifically, the virtual pages in the target data are allocated to the physical pages with the same physical frame number in different accelerators to obtain at least one merged group, including: obtaining the physical frame numbers of the available physical pages in the current accelerators, and establishing a page combination for the physical pages with the same physical frame number in different accelerators; and allocating each virtual page in the target data to at least one page combination to obtain the corresponding merged group. It can be understood that when the virtual pages of the data are allocated, the present application first needs to obtain which physical pages are available in the current accelerators, that is, the physical frame numbers of the available physical pages in the current accelerators, where the available physical pages can be understood as the physical pages in the local physical memory of the accelerator that are not occupied and can be allocated to the virtual pages. Further, the page combination can be established for the physical pages with the same physical frame number in different accelerators, and then each virtual page in the target data is allocated to at least one page combination to obtain the corresponding merged group, and the size of the merged group is between 2 and N, where N is the number of accelerators in the accelerator module. Specifically, in the memory allocation process, the available physical frame numbers in each accelerator can be polled and checked, and the physical numbers are compared between the accelerators to obtain a plurality of page combinations, the physical pages in each page combination have the same physical frame number and correspond to different accelerators.

[0024] For example, assuming that there is an accelerator module composed of 4 accelerators (GPU0-GPU3), and there are three common available local physical frame numbers on the 4 accelerators, such as 0x0075, 0x0088, and 0x0114, then the physical pages with the physical frame number 0x0075 in the 4 accelerators form a first page combination, the physical pages with the physical frame number 0x0088 in the 4 accelerators form a second page combination, and the physical pages with the physical frame number 0x0114 in the 4 accelerators form a third page combination. In addition, assuming that there is a common available physical frame number 0x0115 for the three accelerators GPU0-GPU2, then the physical pages with the physical frame number 0x0115 in the three accelerators GPU0-GPU2 can also form a page combination. That is, the present embodiment does not require that all accelerators have common available physical pages to build a page combination, but as long as two or more accelerators have common available physical pages, a page combination can be built to meet the page allocation requirements of different data.

[0025] In addition, it can also be pointed out that, since the allocation of physical frame numbers is usually dynamic and random, this leads to the need to search in real time for commonly available physical pages of each accelerator when forming a merge group, resulting in low search efficiency and difficulty in finding enough commonly available physical pages in some high-load systems. Then in order to improve the search efficiency and the success rate of the search, so as to quickly form a merge group, a dedicated physical frame number interval can also be reserved for each accelerator at system initialization, to ensure that there is always a commonly available physical frame number between each accelerator, for example, a physical frame number range of 0x1000-0x1FFF can be reserved for each accelerator respectively, and the physical frame numbers in this interval are forced to be aligned, for establishing page combinations.

[0026] Further, the virtual pages in the target data are allocated to at least one page combination to obtain a corresponding merge group, including: determining the total number of virtual pages in the target data; allocating each virtual page to a corresponding number of page combinations based on the total number of virtual pages to obtain a corresponding merge group; wherein one virtual page corresponds to one physical page in one page combination. That is, since one virtual page corresponds to one physical page in one page combination, the present application allocates each virtual page to a corresponding number of page combinations based on the total number of virtual pages in the target data. For example, assuming that a target data has 12 virtual pages, then the total number of physical pages of all page combinations to be allocated is also 12. Still taking the accelerator module composed of 4 accelerators as an example, in the specific embodiment, the 12 virtual pages can be allocated to 3 page combinations each including 4 physical pages, thereby obtaining 3 merge groups; the 12 virtual pages can also be allocated to 4 page combinations each including 3 physical pages, thereby obtaining 4 merge groups; in addition, the form of page combination can also be one page combination having 4 physical pages, one page combination having 2 physical pages, and two page combinations each having 3 physical pages, thereby obtaining 4 merge groups. The specific allocation mode of the merge group in this embodiment is not limited.

[0027] That is, the application introduces a merge group in the page allocation process. In the accelerator module, for a data such as a data matrix allocated by a malloc (Memory Allocation) function, multiple virtual pages thereof are mapped to physical pages with the same physical frame number (PFN) on different accelerators, thereby forming a merge group. If the page allocation algorithm maps multiple pages for each accelerator, the data is reasonably divided into multiple merge groups. For example, in an accelerator module with 4 accelerators, a data including 12 virtual pages is divided into 3 or more merge groups according to the page allocation and available physical pages. The virtual pages in the same merge group are allocated to physical pages with the same PFN on different accelerators except for the ID of the accelerator, which lays a key foundation for subsequent reduction of page table traversal operations.

[0028] In addition, it should be noted that in the process of establishing the page combination for the physical pages with the same PFN in different accelerators, if there is no physical page with the same PFN in each accelerator, a preset page table corresponding to the target data is determined, wherein the preset page table records the correspondence between each virtual page and the physical page in the accelerator; and each virtual page in the target data is allocated to the physical page in the corresponding accelerator based on the correspondence. That is, if there is no physical page with the same PFN in each accelerator, i.e., all accelerators have no physical page with the same PFN for allocation, each page is mapped separately according to the traditional page mapping scheme. In the application, a page table is maintained for each process, which records the correspondence between each virtual page and the physical page in the accelerator. Therefore, by determining the preset page table corresponding to the target data first, and then allocating each virtual page in the target data to the physical page in the corresponding accelerator according to the correspondence recorded in the preset page table, the reliability and flexibility of data allocation are ensured.

[0029] In the specific embodiment, the operating system maintains a page table for each process, and the page table stores the location of the physical page corresponding to each virtual page (a fixed-size continuous block such as 4 KB) in the virtual memory space of the process in the physical memory. When the accelerator GPU executes an instruction to access a virtual address, the memory management unit automatically splits the virtual address into a virtual page number and a page offset, queries the page table of the current process, finds the corresponding physical frame number according to the virtual page number, and finally combines the physical frame number and the original page offset to obtain the final physical address for access.

[0030] Step S12: Record the target information of the corresponding merge group in the page table item corresponding to each virtual page.

[0031] In the embodiment, after obtaining the merging group, the target information of the merging group is recorded in the page table entry corresponding to each virtual page. In the specific embodiment, the target information of the merging group can be encoded in the unused bit (or free bit) of the page table entry (PTE).

[0032] Step S13: When the address translation request for the target virtual page is obtained, it is determined whether the target virtual page belongs to any merging group based on the target information recorded in the page table entry corresponding to the target virtual page.

[0033] In the embodiment, when the address translation request for the target virtual page is obtained, it can be quickly determined whether the target virtual page belongs to any merging group based on the target information recorded in the page table entry corresponding to the target virtual page, thereby reducing the dependence on the complex prefetch algorithm.

[0034] Step S14: If yes, address translation is performed on the target virtual page and the remaining virtual pages in the first merging group to which the target virtual page belongs.

[0035] In the embodiment, when it is determined that the target virtual page belongs to the merging group, address translation can be performed on the target virtual page and the remaining virtual pages in the first merging group to which the target virtual page belongs. That is, through the scheme of the present application, when address translation is performed on any virtual page in the merging group, the translation of the remaining virtual pages in the group can be completed synchronously, and it is not necessary to perform page table traversal on each page individually, thereby solving the technical problem of low address translation efficiency and large overhead of the virtual memory, achieving the technical effect that only one traversal is needed for any merging group to complete the translation of all pages in the group, greatly reducing the number of page table accesses, and reducing the address translation overhead.

[0036] According to the application, when allocating the pages in the target data, each virtual page in the target data is allocated to a physical page with the same physical frame number in different accelerators to form at least one merged group, and target information of the corresponding merged group is recorded in the page table entry corresponding to each virtual page. Each virtual page in each merged group corresponds to a different accelerator, and the physical pages allocated in different accelerators have the same physical frame number. When an address translation request for a target virtual page is obtained, it can be quickly judged whether the target virtual page belongs to any merged group based on the target information recorded in the page table entry corresponding to the target virtual page, and the dependence on a complex prefetch algorithm is reduced. When it is determined that the target virtual page belongs to a merged group, address translation can be performed on the target virtual page and the remaining virtual pages in the merged group. That is, according to the scheme of the application, when address translation is performed on any virtual page in a merged group, the translation of the remaining virtual pages in the group can be completed synchronously, and page table traversal does not need to be performed on each page separately, thereby solving the technical problems of low efficiency and high overhead of virtual memory address translation, achieving the technical effects that only one traversal is needed for a merged group to complete the translation of all pages in the group, greatly reducing the number of page table accesses, and reducing the address translation overhead.

[0037] Referring to Figure 3 As shown in the figure, the embodiment of the application discloses a specific virtual address translation method. Compared with the previous embodiment, the technical solution is further described and optimized in this embodiment. Specifically, it includes the following steps: Step S21: When a page allocation request for target data is obtained, each virtual page in the target data is allocated to a physical page with the same physical frame number in different accelerators to obtain at least one merged group. Each virtual page in the same merged group corresponds to a different accelerator, and the physical pages allocated in different accelerators have the same physical frame number.

[0038] In this embodiment, after each virtual page in the target data is allocated to a physical page with the same physical frame number in different accelerators to obtain at least one merged group, the following steps are further included: recording the merged group information corresponding to each merged group in a preset buffer. The merged group information includes the virtual page number range of each virtual page in each merged group and the physical frame number of the physical page allocated in each merged group. First, as Figure 4 As shown in the figure, the application designs a page coalescing logic (PEC) in an input-output memory management unit (IOMMU), and a preset buffer is used to record the merged group information corresponding to the merged group in the logic. The preset buffer corresponds to Figure 4The target information of the merge group recorded in the page table entry corresponding to each virtual page can specifically include, but is not limited to, a virtual page number (VPN) range of the virtual page, a physical frame number of a physical page allocated to each merge group, a number of virtual pages, and a mapping relationship between the virtual page and the accelerator, and the like.

[0039] Step S22: recording target information of the corresponding merge group in the page table entry corresponding to each virtual page; the target information includes first marking information used for recording the accelerator corresponding to the merge group and second marking information used for recording the page order of the virtual page in the corresponding merge group.

[0040] In the embodiment, the target information of the merge group is recorded in the unused bits of the x86 bit page table entry format. The target information can specifically include two kinds, one is the first marking information used for recording the accelerator corresponding to the merge group, and the other is the second marking information used for recording the page order of the virtual page in the corresponding merge group. Specifically, as shown in Table 1, the target information is recorded in the 52th to 62th bits of the page table entry. Figure 5

[0041] In the specific embodiment, the first marking information includes a plurality of marking bits, each marking bit corresponding to an accelerator; correspondingly, recording the target information of the corresponding merge group in the page table entry corresponding to each virtual page includes: determining a second merge group corresponding to any virtual page, and determining the accelerator information corresponding to the second merge group to determine the first marking information based on the accelerator information; wherein if the second merge group includes a target accelerator, the flag corresponding to the target accelerator in the corresponding first marking information is set to a preset value; determining a target order of any virtual page in the second merge group, and determining the second marking information based on the target order; recording the first marking information and the second marking information in the page table entry corresponding to any virtual page.

[0042] ​That is, the first mark information includes a plurality of mark bits, which can be specifically expressed in binary form to represent the corresponding condition of the accelerator. When a certain accelerator is included in the merging group, the value of the corresponding mark bit is set to a preset value 1, otherwise it is set to 0. In actual cases, up to 8 accelerators can be currently supported, so 8 bits are used for encoding. When the number of accelerators is expanded in the future, the number of mark bits will also increase. Specifically, in the process of recording the target information of the page table entry, the second merging group corresponding to the current virtual page is first determined, and the accelerator information corresponding to the second merging group is determined to determine the specific value of the first mark information according to the accelerator information. It should be pointed out that the mark bits in the first mark information are set to 0 by default. If the target accelerator is included in the merging group, the mark bit corresponding to the target accelerator is set to 1, otherwise it remains unchanged. For example, assuming that the first four of the eight accelerators participate in the merging group, the first mark information can be 11110000.

[0043] Further, it is also necessary to determine the target order of any virtual page in the second merging group, and determine the value of the second mark information based on the target order. It can be understood that since the number of accelerators is 8, the second mark information can be encoded using a 3-bit binary number to represent 8 order bits. The specific value represented by the 3-bit binary number is the order of the virtual page in the second merging group. The value of the second mark information is empty by default. For example, 000, 001, and 010 correspond to the 0th virtual page, the 1st virtual page, and the 2nd virtual page, respectively. Finally, the first mark information and the second mark information are recorded in the page table entry corresponding to any virtual page. Through this encoding method, the target information in the page table entry can be accurately decoded in the future, and subsequent physical frame number calculation can be performed, ensuring the accuracy and efficiency of the address translation process.

[0044] In addition, the above method further includes: if any virtual page does not exist corresponding to the second merging group, determining the target physical page to which any virtual page is assigned; in the page table entry corresponding to any virtual page, setting the mark bit corresponding to the accelerator where the target physical page is located in the first mark information to a preset value, and setting the value of the second mark information to empty. That is, when a certain virtual page does not exist corresponding to the second merging group, it is necessary to record the first mark information and the second mark information in the page table entry corresponding to the virtual page. For the first mark information, only the mark bit corresponding to the accelerator where the target physical page to which the virtual page is assigned is set to the preset value 1 in the plurality of mark bits of the first mark information. Since the virtual page does not exist corresponding to the merging group, there is no corresponding order within the merging group, so the value of the second mark information is still set to empty.

[0045] Step S23: When the address translation request for the target virtual page is acquired, start the page table walker to acquire the first mark information recorded in the page table entry corresponding to the target virtual page by using the page table walker.

[0046] In the embodiment, when the address translation request for the target virtual page is acquired, first start the page table walker to find the page table entry corresponding to the target virtual page to acquire the first mark information recorded therein, as shown in the acceleration internal address translation architecture diagram disclosed in the prior art. Figure 6

[0047] Step S24: If the first mark information corresponding to the target virtual page includes at least two preset values, it is determined that the target virtual page belongs to any merged group.

[0048] In the embodiment, after the first mark information corresponding to the target virtual page is acquired, it is necessary to determine whether the target virtual page belongs to any merged group according to the first mark information. The specific implementation manner is to see whether at least two preset values 1 are included in the first mark information. If multiple 1s exist in the first mark information, it indicates that the target virtual page belongs to a merged group, otherwise, it indicates that the target virtual page does not belong to any merged group.

[0049] Step S25: Based on the merged group information corresponding to the first merged group to which the target virtual page belongs acquired from the preset buffer, determine the target virtual page numbers of the remaining virtual pages in the first merged group and determine the target physical frame numbers of the physical pages allocated to the first merged group.

[0050] In the embodiment, after it is determined that the target virtual page belongs to a merged group, the preset buffer is searched to acquire the merged group information corresponding to the first merged group to which the target virtual page belongs from the preset buffer, so as to acquire the target virtual page numbers of the remaining virtual pages in the first merged group and determine the target physical frame numbers of the physical pages allocated to the first merged group.

[0051] It should be noted that the page number difference between the virtual page numbers corresponding to any adjacent virtual pages in the same merged group is the same, and the virtual page number range includes the start virtual page number and the end virtual page number. Correspondingly, determining the target virtual page numbers of the remaining virtual pages in the first merged group includes: determining the target page order of the target virtual page in the first merged group based on the second mark information corresponding to the target virtual page; and determining the target virtual page numbers of the remaining virtual pages in the first merged group based on the target page order, the start virtual page number, the end virtual page number, and the page number difference.

[0052] ​It can be understood that in the embodiment, when the virtual pages are allocated, the virtual pages can be allocated to the page combinations in sequence according to the order of the virtual pages in the target data, and therefore in most cases, the virtual page numbers of the virtual pages in each merged group are continuous, that is, the page number difference between the virtual page numbers corresponding to any adjacent virtual pages is the same, and is 1. For example, as shown in data 2 and data 3 in Figure 7 In the data 2 and data 3 in

[0053] Therefore, when the target virtual page numbers of the remaining virtual pages in the first merged group are determined, the target page order of the target virtual page in the first merged group can be determined based on the second mark information corresponding to the target virtual page, and then the target virtual page numbers of the remaining virtual pages in the merged group can be determined based on the target page order, the start virtual page number, the end virtual page number and the page number difference obtained from the preset buffer. For example, assuming that the start virtual page number of the merged group is VPN = 0x1, the end virtual page number is VPN = 0x4, the page number difference is 1, the target virtual page number is 0x1, and the order in the merged group is the 0th virtual page, then the virtual page number of the 1st virtual page is 0x1 + 1 = 0x2, the virtual page number of the 2nd virtual page is 0x1 + 2 = 0x3, and the virtual page number of the 3rd virtual page is 0x1 + 3 = 0x4.

[0054] In addition, in some cases, the virtual page numbers of the virtual pages in the merged group can also be non-continuous. For example, still as shown in Figure 7As shown in the figure, data 1 has 16 virtual pages, and at this time, there are three commonly available local physical frame numbers 0x0075, 0x0088, 0x0114 in the four accelerators, and three page combinations are obtained respectively. In this case, the page allocation can also be performed in ascending or descending order of the accelerator ID, and taking the ascending order as an example, the virtual page numbers 0x1, 0x2, 0x3 are allocated to the physical page numbers 0x0075, 0x0088, 0x0114 in the accelerator 0 respectively, the virtual page numbers 0x4, 0x5, 0x6 are allocated to the physical page numbers 0x0075, 0x0088, 0x0114 in the accelerator 1 respectively, and so on. In this case, the page number difference between the virtual page numbers of each virtual page in the same merged group is also the same, such as 3, and therefore the virtual page numbers of the remaining virtual pages in the same group can also be calculated according to the merged group information recorded in the preset buffer.

[0055] Step S26: obtaining the address translation requests of the remaining virtual pages corresponding to the target virtual page number from the preset page table traversal queue, and responding to the address translation requests corresponding to the target virtual page and the remaining virtual pages respectively, so as to perform address translation on the target virtual page and the remaining virtual pages based on the target physical frame number.

[0056] In this embodiment, after obtaining the target virtual page numbers of the remaining virtual pages in the merged group to which the target virtual page belongs and the target physical frame numbers of the allocated physical pages, the address translation requests of the remaining virtual pages corresponding to the target virtual page number can be obtained from the preset page table traversal queue, and then the address translation requests corresponding to the target virtual page and the remaining virtual pages are responded to together, so as to perform address translation on the target virtual page and the remaining virtual pages based on the target physical frame number. That is, through the scheme of the present application, when address translation is performed on any virtual page in the merged group, the conversion of the remaining virtual pages in the group can be completed synchronously, thereby skipping the page table traversal process with huge overhead and significantly improving the address translation efficiency.

[0057] In this embodiment, after obtaining the target virtual page numbers of the remaining virtual pages in the merged group to which the target virtual page belongs and the target physical frame numbers of the allocated physical pages, the address translation requests of the remaining virtual pages corresponding to the target virtual page number can be obtained from the preset page table traversal queue, and then the address translation requests corresponding to the target virtual page and the remaining virtual pages are responded to together, so as to perform address translation on the target virtual page and the remaining virtual pages based on the target physical frame number. That is, through the scheme of the present application, when address translation is performed on any virtual page in the merged group, the conversion of the remaining virtual pages in the group can be completed synchronously, thereby skipping the page table traversal process with huge overhead and significantly improving the address translation efficiency.

[0058] It also needs to be pointed out that each accelerator corresponds to a page table traversal queue; accordingly, obtaining the address translation request of the remaining virtual pages corresponding to the target virtual page number from the preset page table traversal queue includes: determining the corresponding at least two accelerators based on the first marking information corresponding to the first merged group; and obtaining the address translation request of the remaining virtual pages corresponding to the target virtual page number from the page table traversal queues corresponding to the at least two accelerators, respectively. That is, each accelerator corresponds to a page table traversal queue for storing the address translation request of each virtual page allocated in the accelerator, and it should be noted that the same data pages are often accessed at similar times on different accelerators, so the present application first determines the corresponding accelerators according to the first marking information corresponding to the merged group where the target virtual page is located, and then obtains the address translation request of the remaining virtual pages corresponding to the target virtual page number from the page table traversal queues corresponding to the accelerators.

[0059] With Figure 7 Taking the actual data page allocation shown in the table as an example, it is assumed that three data are allocated, wherein data 1 includes 12 virtual pages, data 2 includes 4 virtual pages, and data 3 includes 3 virtual pages. Under the original page mapping strategy, each accelerator is allocated to the corresponding virtual page, and each virtual page needs to be independently translated, so a total of 19 translations are required. Under the scheme proposed in the present application, the pages in the same merged group can be completed by one translation, so for data 1 including 12 virtual pages, which is divided into three merged groups, data 2 and data 3 correspond to one merged group, respectively, and the corresponding pages of each merged group on different accelerators can share the translation result, so only 5 translations are required to cover 19 virtual pages, thereby realizing fast and accurate address translation.

[0060] It can be seen that, by recording the first marking information of the accelerators corresponding to the merged group and the second marking information of the page order of the virtual pages in the corresponding merged group in the page table entry corresponding to the virtual page, and recording the virtual page number range of the virtual pages in each merged group and the physical frame number of the physical page allocated to each merged group in the preset buffer, when the address translation of any virtual page in the merged group is performed subsequently, the virtual page numbers of the remaining virtual pages belonging to the same merged group and the target physical frame number of the physical page allocated to the merged group can be quickly found according to the information, so that the address translation of each virtual page in the same merged group is quickly completed, and the address translation efficiency is significantly improved.

[0061] From the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be realized by means of software and general hardware platform as necessary, of course, it can also be realized by hardware, but in many cases the former is a better embodiment.

[0062] Referring to Figure 8 As shown in the drawings, the embodiments of the present application provide a virtual address conversion device, which comprises: a page allocation module 11, configured to allocate each virtual page in target data to a physical page with the same physical frame number in different accelerators to obtain at least one merged group when a page allocation request for the target data is obtained; wherein each virtual page in the same merged group corresponds to a different accelerator, and the physical pages allocated in different accelerators have the same physical frame number; a page table entry recording module 12, configured to record target information of the corresponding merged group in the page table entry corresponding to each virtual page; a judgment module 13, configured to judge whether the target virtual page belongs to any merged group based on the target information recorded in the page table entry corresponding to the target virtual page when an address conversion request for the target virtual page is obtained; an address conversion module 14, configured to perform address conversion on the target virtual page and the remaining virtual pages in the first merged group to which the target virtual page belongs if yes.

[0063] According to the present application, when allocating the pages in the target data, each virtual page in the target data is allocated to a physical page with the same physical frame number in different accelerators to obtain at least one merged group, and the target information of the corresponding merged group is recorded in the page table entry corresponding to each virtual page; wherein each virtual page in each merged group corresponds to a different accelerator, and the physical pages allocated in different accelerators have the same physical frame number. When an address conversion request for a target virtual page is obtained, the target virtual page can be quickly judged to belong to any merged group based on the target information recorded in the page table entry corresponding to the target virtual page, and the dependence on complex prefetching algorithms is reduced. When it is determined that the target virtual page belongs to a merged group, address conversion can be performed on the target virtual page and the remaining virtual pages in the merged group. That is, according to the scheme of the present application, when address conversion is performed on any virtual page in a merged group, the conversion of the remaining virtual pages in the group can be completed synchronously, and page table traversal does not need to be performed on each page separately, thereby solving the technical problems of low efficiency and high cost of virtual memory address conversion, achieving the technical effect that only one traversal is needed for each merged group to complete the conversion of all pages in the group, greatly reducing the number of page table accesses, and reducing the address conversion cost.

[0064] The description of the features in the embodiments of the virtual address conversion device can be referred to the related description of the embodiments of the virtual address conversion method, which will not be repeated here.

[0065] The embodiment of the present application further provides an electronic device, comprising a memory and a processor, the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above virtual address conversion method embodiments.

[0066] The embodiment of the present application further provides a computer readable storage medium, which stores a computer program, wherein the computer program is configured to perform the steps in any of the above virtual address conversion method embodiments when running.

[0067] In an example embodiment, the above computer readable storage medium can include, but is not limited to, a U disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various media that can store computer programs.

[0068] The embodiment of the present application further provides a computer program product, which comprises a computer program, and the computer program is executed by a processor to implement the steps in any of the above virtual address conversion method embodiments.

[0069] The embodiment of the present application further provides another computer program product, which comprises a non-volatile computer readable storage medium, and the non-volatile computer readable storage medium stores a computer program, and the computer program is executed by a processor to implement the steps in any of the above virtual address conversion method embodiments.

[0070] The skilled person can further realize that the units and algorithm steps of the examples described in conjunction with the embodiments disclosed herein can be realized in electronic hardware, computer software or a combination of both. In order to clearly illustrate the interchangeability of hardware and software, the components and steps of the examples have been described in general terms in the above description. Whether the functions are realized in hardware or software depends on the specific application and design constraints of the technical solution. The skilled person can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0071] The above provides a detailed description of the virtual address conversion method, device, medium and product provided by the present application. The principles and implementation modes of the present application are described by applying specific examples. The above example description is only used to help understand the method and its core idea of the present application. It should be noted that, for those skilled in the art, without departing from the principles of the present application, some improvements and modifications can be made to the present application, and these improvements and modifications also fall within the protection scope of the claims of the present application.

Claims

1. A virtual address translation method, characterized in that: include: When a page allocation request for target data is obtained, each virtual page in the target data is allocated to a physical page with the same physical frame number in different accelerators to obtain at least one merge group; wherein each virtual page in the same merge group corresponds to a different accelerator, and the physical pages allocated in different accelerators have the same physical frame number; Recording target information of the corresponding merge group in the page table entries corresponding to the respective virtual pages; When an address translation request for a target virtual page is obtained, determining whether the target virtual page belongs to any merge group based on target information recorded in a page table entry corresponding to the target virtual page; If so, address translation is performed on the target virtual page and the remaining virtual pages in the first merge group to which the target virtual page belongs.

2. The virtual address translation method according to claim 1, wherein: Allocating each virtual page in the target data to physical pages with the same physical frame number in different accelerators to obtain at least one merged group includes: Obtaining the physical frame numbers of the available physical pages in each accelerator, and establishing a page combination for the physical pages with the same physical frame numbers in different accelerators; Allocate each virtual page in the target data to at least one page combination to obtain a corresponding merge group.

3. The virtual address translation method according to claim 2, wherein: Allocating each virtual page in the target data to at least one page combination to obtain a corresponding merged group includes: Determining the total number of virtual pages in the target data; Based on the total number of pages, each virtual page is allocated to a corresponding number of page combinations to obtain a corresponding merge group; wherein one virtual page corresponds to one physical page in one page combination.

4. The virtual address translation method according to claim 2, wherein: The process of establishing page combinations for physical pages with the same physical frame numbers in different accelerators further includes: If there is no physical page with the same physical frame number in each accelerator, determining a preset page table corresponding to the target data; wherein the preset page table records the correspondence between each virtual page and the physical page in the accelerator; Allocate each virtual page in the target data to a physical page in the corresponding accelerator based on the corresponding relationship.

5. The virtual address translation method according to any one of claims 1 to 4, characterized in that: The target information includes first tag information for recording the accelerator corresponding to the merge group and second tag information for recording the page order of the virtual page in the corresponding merge group.

6. The virtual address translation method according to claim 5, wherein: The first marking information includes a plurality of marking bits, each of the marking bits corresponds to an accelerator; Accordingly, recording the target information of the corresponding merge group in the page table entry corresponding to each of the virtual pages includes: Determining a second merge group corresponding to any virtual page, and determining accelerator information corresponding to the second merge group, and determining first tag information based on the accelerator information; wherein, if the second merge group includes a target accelerator, setting a flag position corresponding to the target accelerator in the corresponding first tag information to a preset value; determining a target order of the any one virtual page in the second merge group, and determining second marking information based on the target order; The first tag information and the second tag information are recorded in a page table entry corresponding to any one of the virtual pages.

7. The virtual address translation method according to claim 6, wherein: Also includes: If there is no corresponding second merge group for any of the virtual pages, determining a target physical page to which the any of the virtual pages is allocated; In the page table entry corresponding to any one of the virtual pages, the flag position corresponding to the accelerator where the target physical page is located in the first tag information is set to a preset value, and the value of the second tag information is set to null.

8. The virtual address translation method according to claim 6, wherein: The determining whether the target virtual page belongs to any merge group based on the target information recorded in the page table entry corresponding to the target virtual page includes: Starting a page table walker to obtain first tag information recorded in a page table entry corresponding to the target virtual page using the page table walker; If the first tag information corresponding to the target virtual page includes at least two of the preset values, it is determined that the target virtual page belongs to any merge group.

9. The virtual address translation method according to claim 5, wherein: After allocating each virtual page in the target data to a physical page with the same physical frame number in different accelerators to obtain at least one merged group, the method further includes: Recording the merged group information corresponding to the at least one merged group in a preset buffer; The merge group information includes the virtual page number range of the virtual pages in each merge group and the physical frame number of the physical page allocated to each merge group.

10. The virtual address translation method according to claim 9, wherein: The performing address translation on the target virtual page and the remaining virtual pages in the first merge group to which the target virtual page belongs includes: Determining target virtual page numbers of remaining virtual pages in the first merging group and target physical frame numbers of physical pages allocated to the first merging group based on merging group information corresponding to the first merging group to which the target virtual page belongs, obtained from the preset buffer; Obtaining address translation requests of the remaining virtual pages corresponding to the target virtual page number from a preset page table traversal queue; In response to the address translation requests respectively corresponding to the target virtual page and the remaining virtual pages, address translation is performed on the target virtual page and the remaining virtual pages based on the target physical frame number.

11. The virtual address translation method according to claim 10, wherein: The page number difference between the virtual page numbers corresponding to any adjacent virtual pages in the same merge group is the same, and the virtual page number range includes the starting virtual page number and the ending virtual page number; Accordingly, determining the target virtual page numbers of the remaining virtual pages in the first merge group includes: determining a target page order of the target virtual page in the first merge group based on second tag information corresponding to the target virtual page; Target virtual page numbers of the remaining virtual pages in the first merge group are determined based on the target page sequence, the starting virtual page number, the ending virtual page number, and the page number difference.

12. The virtual address translation method according to claim 10, wherein: Each accelerator corresponds to a page table traversal queue; Correspondingly, obtaining address translation requests of the remaining virtual pages corresponding to the target virtual page number from a preset page table traversal queue includes: Determining at least two corresponding accelerators based on first tag information corresponding to the first merged group; Acquire address translation requests of the remaining virtual pages corresponding to the target virtual page number from the page table traversal queues corresponding to the at least two accelerators respectively.

13. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the virtual address translation method according to any one of claims 1 to 12 when executing the computer program.

14. A computer-readable storage medium, characterized in that The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the virtual address translation method according to any one of claims 1 to 12.

15. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the virtual address translation method according to any one of claims 1 to 12 are implemented.

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