A method, system, and storage medium for data reporting from a device.
By assigning a unique identifier to each slave device and using chip select timing and MOSI port to send candidate identifier information, the problem of excessive GPIO demand when multiple slave devices are connected to the SPI bus is solved, realizing multi-device access and data reporting without adding chip select and GPIO.
Patent Information
- Application Number
- CN202511311771.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-15
- Publication Date
- 2025-11-14
- Estimated Expiration
- 2045-09-15
AI Technical Summary
When multiple slave devices are connected to the SPI bus, each slave device requires a chip select and an interrupt GPIO, which leads to a significant increase in GPIO demand, increases costs, and increases the burden on the master device.
By assigning a unique identifier to each slave device and using chip select timing and MOSI port to send candidate identifier information, access to multiple slave devices and data reporting can be achieved, avoiding the need for additional chip select and GPIO.
It enables a master device to access multiple slave devices, provides an effective way for slave devices to report data, reduces GPIO requirements, lowers costs, and optimizes the operating burden of the master device.
Smart Images

Figure CN120804010B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of data processing technology, and more specifically to a data reporting method, system, and storage medium from a device within the field of data processing technology. Background Technology
[0002] Serial Peripheral Interface (SPI) is widely used for communication between multiple devices or chips. In many scenarios, the master device needs to connect to multiple slave devices. Since the clock and chip select are controlled by the master device, slave devices cannot communicate directly with the master. Slave devices need to notify the master device to read data through General Purpose Input / Output (GPIO), which is typically implemented as an interrupt. Therefore, when multiple slave devices are connected to the SPI bus, each slave device needs a chip select and an interrupt GPIO to connect to the master device. When the number of slave devices is large, the demand for GPIO is significant, increasing both cost and the operational burden on the master device. Summary of the Invention
[0003] The purpose of this invention is to provide a method, system, and storage medium for data reporting from a device. The specific technical solution adopted is as follows:
[0004] In a first aspect, embodiments of the present invention provide a method for reporting data from a device, the method comprising:
[0005] A clock signal is generated before the slave select signals corresponding to multiple slave devices go low;
[0006] When the falling edge of the slave select signal detects that the clock signal is low, the chip select timing is entered, and the MISO ports of the multiple slave devices are controlled to be in a high-impedance state; wherein, each of the multiple slave devices is provided with corresponding identification information;
[0007] The master device sends candidate identifier information to the slave device through the MOSI port, so that the multiple slave devices compare whether the candidate identifier information matches their own identifier information.
[0008] If the candidate identification information matches the candidate slave device's identification information, the candidate slave device adjusts the MISO port from the high impedance state to a low level based on the candidate identification information to report a notification message indicating the need to send characteristic data to the master device.
[0009] Secondly, embodiments of the present invention provide a data reporting system from a device, the system comprising:
[0010] The generation module is used to generate a clock signal before the slave select signal corresponding to multiple slave devices enters a low level.
[0011] The control module is used to enter the chip select timing sequence and control the MISO ports of the plurality of slave devices to a high impedance state when the falling edge of the slave select signal detects that the clock signal is low; wherein, each of the plurality of slave devices is provided with corresponding identification information;
[0012] The comparison module is used to send candidate identification information to the slave device through the MOSI port by the master device, so that the multiple slave devices can compare whether the candidate identification information matches their own identification information;
[0013] The adjustment module is used to, if the candidate identification information matches the identification information of the candidate slave device, use the candidate slave device to adjust the MISO port from the high impedance state to a low level based on the candidate identification information, so as to report a notification message indicating the need to send characteristic data to the master device.
[0014] Thirdly, a computer program product is provided, comprising: computer program code, which, when run on a computer, causes the computer to perform the method described in the first aspect.
[0015] Fourthly, a computer-readable storage medium is provided that stores computer program code, which, when executed on a computer, causes the computer to perform the method described in the first aspect.
[0016] This invention has the following advantages: a clock signal is generated before the slave select signals corresponding to multiple slave devices enter a low level; thus, before generating the clock signal, the slave select signals corresponding to multiple slave devices are pulled low, thereby enabling simultaneous compatibility with serial and parallel interfaces. Then, when the falling edge of the slave select signal detects that the clock signal is low, the chip select timing is entered, and the MISO ports of the multiple slave devices are controlled to a high-impedance state; wherein, each of the multiple slave devices has corresponding identification information; and the master device sends candidate identification information to the slave devices through the MOSI port, so that the multiple slave devices compare whether the candidate identification information matches their own identification information; if the candidate identification information matches the identification information of a candidate slave device, the candidate slave device adjusts its MISO port from the high-impedance state to a low level based on the candidate identification information, in order to report a notification message indicating a data transmission request to the master device. In this way, a master device can access multiple slave devices without adding chip select and GPIO, and an effective way for slave devices to report data is provided. The slave device can inform the master device that it needs to send data through the reporting flag, and then the master device selects the slave device for communication through a specific chip select timing. Attached Figure Description
[0017] To more clearly illustrate the technical solutions and advantages in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 This is a diagram of the SPI communication structure between the master and slave devices provided in related technologies;
[0019] Figure 2 This is a timing diagram of SPI communication between the master and slave devices provided in related technologies;
[0020] Figure 3 This is a schematic diagram illustrating the implementation process of a data reporting method from a device according to an embodiment of the present invention;
[0021] Figure 4 This is an SPI communication timing diagram of a data reporting method from a device provided in an embodiment of the present invention;
[0022] Figure 5 This is another timing diagram of SPI communication for a data reporting method from a device provided in an embodiment of the present invention;
[0023] Figure 6This is another timing diagram of SPI communication for a data reporting method from a device provided in an embodiment of the present invention;
[0024] Figure 7 This is a schematic diagram of another implementation process of a data reporting method from a device provided in an embodiment of the present invention;
[0025] Figure 8 This is an SPI communication structure diagram of a data reporting method from a device provided in an embodiment of the present invention;
[0026] Figure 9 This is another timing diagram of SPI communication for a data reporting method from a device provided in an embodiment of the present invention;
[0027] Figure 10 This is a schematic diagram of the composition structure of a data reporting system from a device provided in an embodiment of the present invention;
[0028] Figure 11 This is a schematic diagram of the structure of a computer device provided in an embodiment of the present invention. Detailed Implementation
[0029] To further illustrate the technical means and effects adopted by the present invention to achieve its intended purpose, the following, in conjunction with the accompanying drawings and preferred embodiments, details the specific implementation, structure, features, and effects of a data reporting method for a device according to the present invention. In the following description, different "one embodiment" or "another embodiment" do not necessarily refer to the same embodiment. Furthermore, specific features, structures, or characteristics in one or more embodiments may be combined by any suitable form.
[0030] In the description of the embodiments of the present invention, unless otherwise stated, " / " means "or". For example, A / B can mean A or B. The "and / or" in the text is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, and B exists alone. In addition, in the description of the embodiments of the present invention, "multiple" means two or more.
[0031] Hereinafter, the terms "first" and "second" are used for descriptive purposes only and should not be construed as implying or suggesting relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature.
[0032] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.
[0033] In some embodiments, SPI is a synchronous serial interface technology, a high-speed, full-duplex, synchronous communication bus. SPI communication operates in a master-slave mode, which typically involves one master device and one or more slave devices. The SPI interface is often referred to as a 4-wire serial bus, consisting of:
[0034] Master Output / Slave Input (MOSI): Data output from the master device, data input from the slave device;
[0035] Master Input / Slave Output (MISO): Data input to the master device, data output to the slave device;
[0036] Serial Clock (SCK): A clock signal generated by the master device;
[0037] Slave Select (SS): The slave device enable signal, controlled by the master device.
[0038] In addition, to facilitate notification from the slave device to the master device that data is ready to be sent, a GPIO is typically added to the master device as an interrupt source. During normal operation, to improve drive capability, pull-up resistors are usually added to the bus, so the bus level is high when idle.
[0039] In related technologies, the basic structure of SPI is one master device with N slave devices, such as... Figure 1 As shown, master device 101 communicates with slave device 1 through GPIO1, master device 101 communicates with slave device 2 through GPIO2, and master device 101 communicates with slave device N through GPIO1.
[0040] exist Figure 1 Based on this, the SPI timing is as follows Figure 2 As shown, when a master device wants to communicate with a slave device, it first enables the corresponding SS chip select pin of the slave device (active low by default). SCK is the SPI clock signal, generated by the master device. MISO and MOSI are data transmission pins, and the transmission and reception of data bits are synchronized with the SCK clock. The master device's MOSI pin sends data to the slave device's MOSI pin, and the master device's MISO pin receives data sent from the slave device's MISO pin. Figure 2 The timing diagram shown is based on a BYTE (8 bytes) example; the actual timing should be based on the SPI configuration. From Figure 2 It can be seen that the master device sends N bytes of data to the slave device via MOSI, and the slave device also sends N bytes of data to the master device via MISO.
[0041] The slave device notifies the master device that it has data to send via GPIO. Taking a low-level active GPIO as an example, the slave device pulls the GPIO low to inform the master device to obtain data via the SPI bus. Thus, when multiple slave devices are connected to the SPI bus, each slave device requires a chip select and an interrupt GPIO to connect to the master device. When there are many slave devices, the demand for GPIO becomes significant, increasing both cost and the operational burden on the master device.
[0042] Based on this, embodiments of the present invention provide a data reporting method for slave devices. Each slave device is assigned a unique identifier (ID) code. A master device can access multiple slave devices through chip selection timing. A reporting flag timing provides an effective way for slave devices to report data. Slave devices can use this method to inform the master device that they need to send data. Then, the master device selects the slave device for communication through chip selection timing.
[0043] The specific solution of a data reporting method from a device provided by the present invention will be described in detail below with reference to the accompanying drawings. Please refer to... Figure 3 The illustration shows a schematic diagram of the implementation flow of a data reporting method from a device according to an embodiment of the present invention. The method includes:
[0044] 301 generates a clock signal before the slave select signals corresponding to multiple slave devices go low.
[0045] Here, the condition that SCK is pulled low before SS is set as the start-up recognition of the chip select timing, so that it can be compatible with general SPI at the same time.
[0046] 302. When the falling edge of the slave select signal detects that the clock signal is low, the chip select timing is entered, and the MISO ports of the multiple slave devices are controlled to be in a high-impedance state.
[0047] Each of the multiple slave devices is equipped with corresponding identification information; each slave device is assigned an identification information (i.e., ID code). When the falling edge of SS detects that SCK is low, the chip select timing is entered, and the MISO of all slave devices is in a high-impedance state.
[0048] 303, the master device sends candidate identification information to the slave device through the MOSI port, so that the multiple slave devices compare whether the candidate identification information matches their own identification information.
[0049] Here, the master device sends an 8-bit ID code via MOSI (the number of bits can be determined according to the actual number of slave devices; 8 bits can represent 256 devices, which is usually sufficient). After receiving the ID code, the slave device compares it with its own ID code to determine whether they match.
[0050] 304. If the candidate identification information matches the candidate slave device identification information, the candidate slave device adjusts the MISO port from the high impedance state to a low level based on the candidate identification information to report a notification message indicating the need to send characterization data to the master device.
[0051] Here, if the candidate identifier information matches the candidate slave device's identifier information, it means that the ID code sent by the master device via MOSI is consistent with the candidate slave device's own ID code. After determining that the received candidate identifier information matches its own identifier information, the candidate slave device enters the normal SPI process, that is, it controls the MISO output to a low level. After the master device recognizes that the slave device has a data transmission request, the master device can notify the CPU through an internal SPI interrupt to process subsequent data reading. The timing of SPI communication for chip select ID matching is as follows: Figure 4 As shown, the master device sends N bytes of data to the slave device through the MOSI port, and the slave device also sends N bytes of data to the master device through the MISO port.
[0052] If the candidate identifier information does not match the identifier information of the slave device, the SPI communication is terminated within the chip select cycle corresponding to the chip select timing; and the MISO port of the slave device and the MOSI port of the master device are adjusted to the high impedance state.
[0053] Here, after receiving candidate identifier information, the device compares it with its own identifier information. If they do not match, the SPI communication is terminated within that chip select cycle, ensuring that both the MOSI and MISO port levels are in a high-impedance state. The timing of SPI communication for chip select ID mismatches is as follows: Figure 5 As shown, the port levels of both MOSI and MISO are in a high-impedance state.
[0054] In some embodiments, if the candidate identifier information is a preset identifier, the master device selects the plurality of slave devices; the master device broadcasts to the plurality of slave devices and controls the MISO port level of the plurality of slave devices to a high-impedance state. The preset identifier can be all F (i.e., a normal broadcast identifier in network communication), in which case the master device selects all slave devices for broadcasting, and all slave devices' MISO should be in a high-impedance state. Figure 6As shown, the MISO ports of all slave devices are in a high-impedance state, and the MOSI port of the master device outputs data through broadcast.
[0055] In some possible implementations, step 304 above can be achieved through... Figure 7 The steps shown are to be implemented as follows:
[0056] 701, the multiple slave devices send the notification message to the master device by pulling the MISO port low.
[0057] Here, when the SPI bus is idle (SS is high), the master device sets MISO as an input to listen for any slave devices that want to send data. The slave device notifies the master that it has data to send by pulling MISO low, and simultaneously sets its own MOSI as an input to monitor the MOSI pin status. Multiple slave devices can pull MISO low simultaneously at this time.
[0058] 702, when the master device detects that the level of the MISO port is low, pulls the pin of the MOSI port low and sends a reporting instruction to the plurality of slave devices, and outputs a clock signal.
[0059] Here, the reporting indication is used to instruct the multiple slave devices to report their own identification information; the master device detects the MISO low level and pulls the MOSI pin low to inform all slave devices that they are ready to report the flag. Then the master device controls SCK to start outputting the clock signal.
[0060] In some possible implementations, the MISO ports of the multiple slave devices are pulled low, and the MOSI ports of the slave devices are set as inputs to monitor the pin states of the MOSI ports. When the master device detects that the MISO port is low, it pulls the pin state of the MOSI port low to send a reporting instruction to the multiple slave devices. Here, the slave devices inform the master device of their data transmission needs by pulling the MISO port low, and simultaneously set their own MOSI ports as inputs to detect the low level of the MOSI ports by monitoring their pin states. Multiple slave devices can synchronously pull the MISO port low. After the master device detects the low level of the MISO port, it informs all slave devices of the reporting flag by pulling the pin state of the MOSI port low. At the same time, the master device controls the SCK to generate and output a clock signal.
[0061] 703, when the plurality of slave devices recognize that the level of the MOSI port of the master device is low, the level of the MISO port of the plurality of slave devices is set to high impedance.
[0062] Here, after multiple devices identify the MOSI port as having a low level, the device's own MISO port becomes high-impedance.
[0063] 704, the master device uses the clock signal, the MOSI port and its own identification information reported by the multiple slave devices to identify candidate slave devices with data transmission requirements among the multiple slave devices.
[0064] Here, the master device controls the communication process with the slave devices by controlling the number of clock signals. It then compares the number of clock signals with the slave device's identification information to identify candidate slave devices whose identification information matches the number of clock signals. In some possible implementations, the multiple slave devices start counting based on the clock signals to obtain a count value. When the count value matches the slave device's own identification information, the master device controls the MISO port to output a low level, enabling the master device to identify the candidate slave device with data transmission needs among the multiple slave devices.
[0065] Here, after a slave device detects a low MOSI level, it sets its own MISO to a high-impedance state. At this time, all slave devices' MISOs should also be in a high-impedance state. Then, all slave devices start counting according to the SCK clock. When the count value equals its own ID code, it controls the MISO output to a low level. That is, when the count value equals the candidate slave device's own ID code, it controls the candidate slave device's MISO output to a low level to inform the master device that the candidate slave device has a data transmission request. Thus, the slave device sends a notification message to the master device by pulling the MOSI port pin low. After the master device detects that the MISO port level is low, it pulls the MOSI port pin low and sends a reporting instruction to multiple slave devices, while simultaneously outputting a clock signal. When multiple slave devices detect that the master device's MOSI port level is low, they set the MISO port level of multiple slave devices to a high-impedance state. In this way, when the clock signal count value equals the candidate slave device's own identification information, it pulls the MISO port level low, thereby informing the master device that the candidate slave device has a data transmission request.
[0066] In some embodiments, the master device controls the clock signal to generate multiple clock signals; when the number of the multiple clock signals is greater than or equal to the number of the multiple slave devices, the MOSI port of the master device is pulled high to the high impedance state.
[0067] Here, after the master device sends out a number of clock cycles equal to or greater than the total number of slave devices via the SCK clock, it terminates the current process by pulling the MOSI port high. When the master device identifies a candidate slave device with data transmission requirements, it sends an interrupt message to the central processing unit (CPU) based on the master device's internal SPI. The CPU then responds to the interrupt message and processes the data transmission request of the candidate slave device.
[0068] Here, the master device can obtain the current reporting flag. Each bit of the flag represents a slave device, and a bit being 0 indicates that the slave device has data to send. After recognizing a slave device's data transmission request, the master device can notify the CPU via an internal SPI interrupt to process subsequent data reading. In SPI communication, the basic structure of one master device with N slave devices is as follows: Figure 8 As shown, each of the slave devices 1-N is equipped with identification information. Specifically, the identification information of slave device 1 is ID0, the identification information of slave device 2 is ID1, and the identification information of slave device N is IDN. The chip selection timing enables one master device to access multiple slave devices. The reporting flag timing informs the master device that data needs to be sent, and then the master device selects the slave device for communication through the chip selection timing.
[0069] In some embodiments, if the master device identifies at least two candidate slave devices that have data transmission needs based on its own identification information reported by the plurality of slave devices, it determines the priority order of the at least two candidate slave devices; then, based on the priority order, it reads the data transmitted by the at least two candidate slave devices one by one.
[0070] Here, when the master device identifies multiple slave devices that need to send data through the reporting flag, the master device can read the data from the slave devices one by one according to a specific priority. The priority can be set, for example, the smaller the ID code, the higher the priority, or the priority can be grouped (ID0~3 is the highest, ID4~7 is next, and so on), or each ID can be equipped with a configurable priority register.
[0071] In a specific example, using eight slave devices as an example, slave devices ID1 and ID5 have data to send. The master device receives the reporting flag b11011101, and the relevant timing is as follows. Figure 9 As shown, a high impedance state is 1, and a low level is 0. A low level indicates that the slave device has a data transmission requirement. Therefore, the master device notifies the CPU through an internal SPI interrupt to process the subsequent data reading for the slave device corresponding to the low level.
[0072] In this embodiment of the invention, before generating the clock signal, the slave select signals corresponding to multiple slave devices are first pulled low, thereby enabling simultaneous compatibility with serial and parallel interfaces. Then, when the falling edge of the slave select signal detects that the clock signal is low, the chip select timing is entered, and the MISO ports of the multiple slave devices are controlled to a high-impedance state. Each of the multiple slave devices has corresponding identification information. The master device sends candidate identification information to the slave devices through the MOSI port, allowing the multiple slave devices to compare the candidate identification information with their own identification information. If the candidate identification information matches the identification information of a candidate slave device, the candidate slave device adjusts its MISO port from the high-impedance state to a low level based on the candidate identification information, reporting a notification message indicating a data transmission request to the master device. Thus, without adding chip select and GPIO, one master device can access multiple slave devices, and an effective way for slave devices to report data is provided. The slave device can inform the master device that it needs to send data through a reporting flag, and the master device can then select the slave device for communication through a specific chip select timing.
[0073] This invention provides a data reporting system for devices. Please refer to [link / reference]. Figure 10 This illustration shows a schematic diagram of the composition structure of a data reporting system for slave devices according to an embodiment of the present invention. The system 1000 includes: a generation module 1001, used to generate a clock signal before the slave selection signals corresponding to multiple slave devices enter a low level; a control module 1002, used to enter the chip select timing sequence when the falling edge of the slave selection signal detects that the clock signal is low, and control the level of the MISO port of the multiple slave devices to a high impedance state; wherein, each of the multiple slave devices is provided with corresponding identification information; a comparison module 1003, used to send candidate identification information to the slave devices through the MOSI port by the master device, so that the multiple slave devices compare whether the candidate identification information matches their own identification information; and an adjustment module 1004, used to adjust the MISO port from the high impedance state to a low level by the candidate slave device based on the candidate identification information if the candidate identification information matches the identification information of the candidate slave device, so as to report a notification message indicating a data transmission request to the master device.
[0074] In some possible implementations, the adjustment module 1004 is further configured to: send the notification message to the master device by the plurality of slave devices pulling down the level of the MISO port; when the master device detects that the level of the MISO port is low, pull down the pin of the MOSI port and send a reporting instruction to the plurality of slave devices, and output a clock signal; wherein the reporting instruction is used to instruct the plurality of slave devices to report their own identification information; when the plurality of slave devices detect that the level of the master device's MOSI port is low, set the level of the MISO port of the plurality of slave devices to a high impedance state; and use the master device to identify candidate slave devices with data transmission requirements among the plurality of slave devices based on the clock signal, the MOSI port, and the identification information reported by the plurality of slave devices.
[0075] In some possible implementations, the adjustment module 1004 is further configured to pull down the level of the MISO port of the plurality of slave devices, set the MOSI port of the slave device as an input, and listen to the pin status of the MOSI port; when the master device recognizes that the level of the MISO port is low, it pulls down the pin status of the MOSI port to send a reporting instruction to the plurality of slave devices.
[0076] In some possible implementations, the adjustment module 1004 is further configured to use the plurality of slave devices to start counting based on the clock signal to obtain the count value of the clock signal; when the count value matches the identification information of the slave device itself, control the MISO port to output a low level so that the master device can identify the candidate slave device with data transmission needs among the plurality of slave devices.
[0077] In some possible implementations, the adjustment module 1004 is further configured to use the master device to control the clock signal to send multiple clock signals; when the number of the multiple clock signals is greater than or equal to the number of the multiple slave devices, the master device's MOSI port is pulled high to the high impedance state.
[0078] In some possible implementations, the adjustment module 1004 is further configured to, if the master device identifies at least two candidate slave devices that have data transmission needs based on the identification information reported by the plurality of slave devices, determine the priority order of the at least two candidate slave devices; and, based on the priority order, read the data transmitted by the at least two candidate slave devices one by one.
[0079] In some possible implementations, the adjustment module 1004 is further configured to exit SPI communication within the chip select cycle corresponding to the chip select timing if the candidate identification information does not match the identification information of the slave device; and adjust the level of the MISO port of the slave device and the MOSI port of the master device to the high impedance state.
[0080] In some possible implementations, the adjustment module 1004 is further configured to, if the candidate identifier information is a preset identifier, use the master device to select the plurality of slave devices; use the master device to broadcast to the plurality of slave devices, and control the MISO port level of the plurality of slave devices to a high impedance state.
[0081] Optionally, the transmission medium can be a wired link (e.g., but not limited to, coaxial cable, optical fiber, and Digital Subscriber Line (DSL)) or a wireless link (e.g., but not limited to, Wireless Fidelity (WIFI), Bluetooth, and mobile device networks). It should be noted that the system provided in the above embodiments is only an example illustrating the division of the functional modules described above. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the computer device can be divided into different functional modules to complete all or part of the functions described above. Furthermore, the method embodiments provided in the above embodiments belong to the same concept, and their specific implementation processes are detailed in the method embodiments, and will not be repeated here.
[0082] Figure 11 This is a schematic diagram of the structure of a computer device provided in an embodiment of the present invention. For example, as shown... Figure 11 As shown, the computer device 1100 includes: a memory 1101, a processor 1102, and a computer program 1103 stored in the memory 1101 and running on the processor 1102, wherein when the processor 1102 executes the computer program 1103, the computer device can execute any of the aforementioned data reporting methods for slave devices.
[0083] Furthermore, this embodiment of the invention also protects a system that may include a memory and a processor. The memory stores executable program code, and the processor is used to call and execute the executable program code to perform a data reporting method for a device provided by this embodiment of the invention. This embodiment can divide the system into functional modules based on the above method example. For example, each module can correspond to a specific function, or two or more functions can be integrated into a single processing module. The integrated module can be implemented in hardware. It should be noted that the module division in this embodiment is illustrative and only represents a logical functional division; other division methods may be used in actual implementation. It should also be noted that all relevant content of each step involved in the above method embodiment can be referenced to the functional description of the corresponding functional module, and will not be repeated here.
[0084] It should be understood that the system provided in this embodiment is used to execute the above-described data reporting method from a device, and therefore can achieve the same effect as the above-described implementation method. When using integrated units, the system may include a processing module and a storage module. When the system is applied to a device, the processing module can be used to control and manage the device's actions. The storage module can be used to support the device in executing relevant program code, etc. The processing module may be a processor or a controller, which can implement or execute various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this invention. The processor may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of Digital Signal Processing (DSP) and a microprocessor, etc., and the storage module may be a memory.
[0085] Furthermore, the system provided in the embodiments of the present invention may specifically be a chip, component, or module. The chip may include a connected processor and a memory. The memory stores instructions, and when the processor calls and executes the instructions, the chip can execute a data reporting method for a slave device provided in the above embodiments. This embodiment also provides a computer-readable storage medium storing computer program code. When the computer program code is run on a computer, the computer executes the aforementioned method steps to implement a data reporting method for a slave device provided in the above embodiments.
[0086] This embodiment also provides a computer program product. When the computer program product is run on a computer, it causes the computer to perform the aforementioned related steps to implement the data reporting method from the device provided in the above embodiment. The system, computer-readable storage medium, computer program product, or chip provided in this embodiment are all used to execute the corresponding methods provided above. Therefore, the beneficial effects they achieve can be referred to in the beneficial effects of the corresponding methods provided above, and will not be repeated here. Through the description of the above embodiments, those skilled in the art can understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In practical applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the system can be divided into different functional modules to complete all or part of the functions described above. In the embodiments provided by this invention, it should be understood that the disclosed system and method can be implemented in other ways. For example, the system embodiments described above are merely illustrative. For example, the division of modules or units is only a logical functional division. In actual implementation, there may be other division methods. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interface, system or unit, and can be electrical, mechanical or other forms.
[0087] It should be noted that the order of the above embodiments of the present invention is merely for descriptive purposes and does not represent the superiority or inferiority of the embodiments. The processes depicted in the accompanying drawings do not necessarily require a specific or sequential order to achieve the desired results. In some embodiments, multiple task processing and parallel processing are possible or may be advantageous. The various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. The above content is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be covered within the protection scope of the present invention.
Claims
1. A method for reporting data from a device, characterized in that, The data reporting method from the device includes: A clock signal is generated before the slave select signals corresponding to multiple slave devices go low; When the falling edge of the slave select signal detects that the clock signal is low, the chip select timing is entered, and the MISO ports of the multiple slave devices are controlled to be in a high-impedance state; wherein, each of the multiple slave devices is provided with corresponding identification information; The master device sends candidate identifier information to the slave device through the MOSI port, so that the multiple slave devices compare whether the candidate identifier information matches their own identifier information. If the candidate identification information matches the candidate slave device identification information, the candidate slave device adjusts the MISO port from the high impedance state to a low level based on the candidate identification information to report a notification message representing the data transmission requirement to the master device, including: the multiple slave devices sending the notification message to the master device by pulling the MISO port low; When the master device detects that the MISO port is at a low level, it pulls the pin of the MISO port low and sends a reporting instruction to the plurality of slave devices, and outputs a clock signal; wherein, the reporting instruction is used to instruct the plurality of slave devices to report their own identification information; When the multiple slave devices detect that the MOSI port of the master device is at a low level, the MISO port of the multiple slave devices is set to a high impedance state; The master device uses the clock signal, the MOSI port, and the identification information reported by the multiple slave devices to identify candidate slave devices with data transmission needs among the multiple slave devices.
2. The data reporting method from a device according to claim 1, characterized in that, When the master device detects that the MISO port level is low, it pulls the pin of the MISO port low and sends a reporting instruction to the plurality of slave devices, and outputs a clock signal, including: Pull the MISO port level of the plurality of slave devices low, set the MOSI port of the slave device as input, and listen to the pin status of the MOSI port; When the master device detects that the MISO port is at a low level, it pulls the pin state of the MISO port low to send a reporting instruction to the multiple slave devices.
3. The data reporting method from a device according to claim 1, characterized in that, The master device identifies candidate slave devices with data transmission needs from among the multiple slave devices based on the clock signal, the MOSI port, and the identification information reported by the multiple slave devices, including: The multiple slave devices start counting based on the clock signal to obtain the count value of the clock signal; When the count value matches the identification information of the slave device itself, the master device controls the MISO port to output a low level so that the master device can identify a candidate slave device with data transmission needs among the multiple slave devices.
4. A data reporting method from a device according to claim 1 or 2, characterized in that, The method further includes: The master device is used to control the clock signal to generate multiple clock signals; When the number of the plurality of clock signals is greater than or equal to the number of the plurality of slave devices, the MOSI port of the master device is pulled high to the high impedance state.
5. The data reporting method from a device according to claim 1, characterized in that, The method further includes: If the master device identifies at least two candidate slave devices that have data transmission needs based on the identification information reported by the multiple slave devices, it determines the priority order of the at least two candidate slave devices; Based on the priority order, the data sent by the at least two candidate slave devices are read one by one.
6. The data reporting method from a device according to claim 1, characterized in that, The method further includes: If the candidate identifier information does not match the identifier information of the slave device, the SPI communication will be terminated within the chip select cycle corresponding to the chip select timing. Adjust the levels of the MISO port of the slave device and the MOSI port of the master device to the high impedance state.
7. The data reporting method from a device according to claim 1, characterized in that, The method further includes: If the candidate identifier information is a preset identifier, the master device selects the plurality of slave devices; The master device broadcasts to the multiple slave devices and controls the MISO ports of the multiple slave devices to a high-impedance state.
8. A data reporting system from a device, characterized in that, The data reporting system from the device includes: The generation module is used to generate a clock signal before the slave select signal corresponding to multiple slave devices enters a low level. The control module is used to enter the chip select timing sequence and control the MISO ports of the plurality of slave devices to a high impedance state when the falling edge of the slave select signal detects that the clock signal is low; wherein, each of the plurality of slave devices is provided with corresponding identification information; The comparison module is used to send candidate identification information to the slave device through the MOSI port by the master device, so that the multiple slave devices can compare whether the candidate identification information matches their own identification information; An adjustment module is used to, if the candidate identification information matches the identification information of a candidate slave device, use the candidate slave device to adjust the MISO port from the high impedance state to a low level based on the candidate identification information, so as to report a notification message representing the data transmission requirement to the master device, including: using the multiple slave devices to send the notification message to the master device by pulling the MISO port low; When the master device detects that the MISO port is at a low level, it pulls the pin of the MISO port low and sends a reporting instruction to the plurality of slave devices, and outputs a clock signal; wherein, the reporting instruction is used to instruct the plurality of slave devices to report their own identification information; When the multiple slave devices detect that the MOSI port of the master device is at a low level, the MISO port of the multiple slave devices is set to a high impedance state; The master device uses the clock signal, the MOSI port, and the identification information reported by the multiple slave devices to identify candidate slave devices with data transmission needs among the multiple slave devices.
9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed, implements the method as described in any one of claims 1 to 7.
Citation Information
Patent Citations
Communication system implementing low-power consumption
CN101369948A
Data transmission realizing method and system based on SPI
CN101552733A