An RFSoC-based inter-board synchronization method and device with digital functions, an inter-board synchronization platform, and a phased array radio telescope

Abstract

The application relates to the technical field of signal processing, and discloses a board-to-board synchronization method based on an RFSoC and having a digital function, which comprises the following steps: enabling a global reference clock signal, a cooperative start signal and a cooperative pulse signal; performing time-frequency synchronization matching on a collection board card; when a phase detection excitation in the cooperative pulse signal is detected, performing phase detection on the collection board card to obtain phase cooperation information of the collection board card; when the phase cooperation information meets a preset retriggering condition, performing phase swing correction on the collection board card by using the cooperative start signal, so that the board-to-board phase deviation between the collection board cards is ensured to be in a stable state; and when the board-to-board phase deviation is in the stable state, performing frequency domain dimension calibration on the collection board card to eliminate the phase deviation affecting the digital function. The method has the beneficial effect that on the basis of time-frequency synchronization matching, the collection board cards not in a phase cooperation state are subjected to phase swing correction, and the synchronization reliability between the collection board cards is significantly improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of signal processing, in particular to an inter-board synchronization method and device based on RFSoC with digital function, an inter-board synchronization platform and a phased array radio telescope. BACKGROUND

[0002] In the fields of, for example, radio astronomy, radar, ultrasonic detection imaging or meteorological detection, in order to improve the accuracy of observation results, the conventional technology usually increases the number of acquisition channels and synchronously receives and transmits signals through multiple acquisition channels to increase the amount of collected data and improve the quality of collected signals. In actual scenarios, multiple acquisition board cards are usually used to perform observation tasks, and multiple acquisition channels are respectively arranged in each acquisition board card. The acquisition board cards can also have digital functions to perform partial signal processing on the collected signals. There is usually a synchronization error between different acquisition board cards, and the signal processing process is also affected by the synchronization error between the acquisition board cards when the acquisition board cards perform signal processing based on the digital functions they have. The superposition of the above-mentioned multiple synchronization errors significantly affects the synchronization of signal acquisition and processing, and further affects the accuracy of observation results.

[0003] In related technologies, the synchronization reliability of the multiple methods for eliminating the influence of multiple synchronization errors between acquisition board cards still needs to be improved. SUMMARY

[0004] The present application provides an inter-board synchronization method and device based on RFSoC with digital function, an inter-board synchronization platform and a phased array radio telescope. By performing time-frequency synchronization matching on the acquisition board cards, it is ensured that each acquisition board card is in a synchronous state in the time dimension and the frequency domain, and on this basis, phase coordination verification is performed on all acquisition board cards to correct the phase oscillation of the acquisition board cards that are not in a phase coordination state, thereby significantly improving the synchronization reliability between the acquisition board cards.

[0005] In order to achieve the above-mentioned purpose, the main technical scheme adopted by the present application includes:

[0006] In a first aspect, the present application provides an inter-board synchronization method based on RFSoC with digital function, which comprises:

[0007] Enabling a global reference clock signal, a coordination start signal and a coordination pulse signal to be output to the acquisition board cards; wherein the number of acquisition board cards is two or more, the acquisition board cards include two or more acquisition channels, and the global reference clock signal serves as the clock reference of the acquisition board cards;

[0008] Performing time-frequency synchronization matching on the acquisition board cards so that the working mode of the acquisition board cards remains synchronized in the time dimension and the frequency domain.

[0009] In response to detecting the phase detection incentive in the cooperative pulse signal, phase detection is performed on the acquisition board card to obtain phase cooperation information of the acquisition board card; in response to the phase cooperation information satisfying a preset retriggering condition, phase swing correction is performed on the acquisition board card by using the cooperative start signal, so as to reduce fluctuation of phase deviation between the acquisition board cards and ensure that the inter-board phase deviation between the acquisition board cards is in a stable state.

[0010] In response to the inter-board phase deviation being in the stable state, frequency domain dimension calibration is performed on the acquisition board card to eliminate the phase deviation affecting the digital function.

[0011] The inter-board synchronization method based on the RFSoC and the digital function provided in the embodiments of the present application first performs time-frequency synchronization matching on the acquisition board card to ensure that each acquisition board card is in a synchronized state in time dimension and frequency dimension and to eliminate synchronization errors between the acquisition board cards; secondly, phase detection is performed on each acquisition board card by using the cooperative pulse signal to obtain phase cooperation information of each acquisition board card, so as to perform phase swing correction on the acquisition board card to reduce fluctuation of phase deviation between the acquisition board cards. Compared with the related art, the present application eliminates synchronization errors between the acquisition board cards due to various reasons by performing time-frequency matching on each acquisition board card, and on this basis, phase cooperation verification is performed on all acquisition board cards, and phase swing correction is performed on the acquisition board card not in the phase cooperation state, so as to ensure that the acquisition board card is in a stable synchronization state, and the synchronization reliability between the acquisition board cards is significantly improved.

[0012] Optionally, the phase swing correction performed on the acquisition board card by using the cooperative start signal comprises:

[0013] Pulse detection is performed on the cooperative start signal, and a correction trigger pulse is obtained in response to detecting a level transition; wherein the correction trigger pulse is a single pulse signal in any period of the cooperative start signal.

[0014] Based on the correction trigger pulse, phase swing alignment is performed on the acquisition board card.

[0015] Optionally, the phase detection incentive in the cooperative pulse signal is detected in the following manner:

[0016] Pulse detection is performed on the cooperative pulse signal, and pulse timing is performed on a pulse corresponding to the level transition in response to detecting the level transition to obtain pulse width information.

[0017] In response to the pulse width information satisfying a configured first time condition, it is determined that the phase detection incentive is detected.

[0018] Optionally, the time-frequency synchronization matching of the acquisition board card comprises:

[0019] When the cooperative reset incentive in the cooperative pulse signal is detected, the time-frequency synchronization state of the acquisition board card is initialized;

[0020] The time dimension synchronization matching of the acquisition board card is performed by using the cooperative start signal, so that the working mode of the acquisition board card is kept synchronized in the time dimension;

[0021] The frequency domain dimension synchronization matching of the acquisition board card is performed according to the cooperative start signal, so that the working mode of the acquisition board card is kept synchronized in the frequency domain dimension.

[0022] Optionally, the cooperative reset incentive in the cooperative pulse signal is detected by the following method:

[0023] The pulse detection is performed on the cooperative pulse signal, and the pulse timing is performed on the pulse corresponding to the level conversion when the level conversion is detected, so as to obtain the pulse width information;

[0024] When the pulse width information meets the configured second time condition, it is determined that the cooperative reset incentive is detected.

[0025] Optionally, the method further comprises:

[0026] When the cooperative acquisition incentive in the cooperative pulse signal is detected, the cooperative radio frequency collection of the acquisition board card is controlled based on the cooperative acquisition incentive.

[0027] Optionally, the cooperative acquisition incentive in the cooperative pulse signal is detected by the following method:

[0028] The pulse detection is performed on the cooperative pulse signal, and the pulse timing is performed on the pulse corresponding to the level conversion when the level conversion is detected, so as to obtain the pulse width information;

[0029] When the pulse width information meets the configured third time condition, it is determined that the cooperative acquisition incentive is detected.

[0030] In a second aspect, an inter-board synchronization device with a digital function based on RFSoC is provided, and the device comprises:

[0031] A signal enabling preparation module is configured to enable a global reference clock signal, a cooperative start signal and a cooperative pulse signal, and output them to acquisition board cards; wherein the number of the acquisition board cards is two or more, the acquisition board cards comprise two or more acquisition channels, and the global reference clock signal is used as a clock reference of the acquisition board cards.

[0032] The time-frequency synchronization matching module is configured to perform time-frequency synchronization matching on the acquisition board card, so that the working mode of the acquisition board card is kept synchronized in the time dimension and the frequency domain.

[0033] The phase polarization oscillation correction module is configured to perform phase detection on the acquisition board card when detecting the phase detection excitation in the cooperative pulse signal, to obtain phase coordination information of the acquisition board card; and in the case where the phase coordination information meets a preset retriggering condition, performing phase polarization oscillation correction on the acquisition board card by using the cooperative start signal, to reduce the volatility of the phase deviation between the acquisition board cards and ensure that the inter-board phase deviation between the acquisition board cards is in a stable state.

[0034] The frequency domain dimension calibration module is configured to perform frequency domain dimension calibration on the acquisition board card when the inter-board phase deviation is in a stable state, to eliminate the phase deviation affecting the digital function.

[0035] In a third aspect, the embodiments of the present application provide a board-to-board synchronization platform with a digital function based on an RFSoC, which performs board-to-board synchronization through the method in any of the above embodiments.

[0036] In a fourth aspect, the embodiments of the present application provide a phased array radio telescope, which includes the board-to-board synchronization platform in any of the above embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the specific embodiments of the present application or the prior art, the drawings needed in the description of the specific embodiments or the prior art will be briefly introduced. Obviously, the drawings in the following description are some embodiments of the present application, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.

[0038] Figure 1 The step diagram of the board-to-board synchronization method with a digital function based on an RFSoC provided by the embodiments of the present application;

[0039] Figure 2 The step diagram of the phase polarization oscillation correction in the embodiments of the present application;

[0040] Figure 3 The step diagram of detecting the phase detection excitation in the embodiments of the present application;

[0041] Figure 4 The schematic diagram of the phase detection excitation in the embodiments of the present application;

[0042] Figure 5 The step diagram of the time-frequency synchronization matching in the embodiments of the present application;

[0043] Figure 6 A step diagram for detecting a cooperative reset stimulus in an embodiment of the present application;

[0044] Figure 7 A schematic diagram of a cooperative reset stimulus in an embodiment of the present application;

[0045] Figure 8 A step diagram for detecting a cooperative acquisition stimulus in an embodiment of the present application;

[0046] Figure 9 A schematic diagram of a cooperative acquisition stimulus in an embodiment of the present application;

[0047] Figure 10 A module diagram of an inter-board synchronization device with digital functions based on an RFSoC provided in an embodiment of the present application;

[0048] Figure 11 A clock tree structure schematic diagram of an inter-board synchronization platform with digital functions based on an RFSoC provided in an embodiment of the present application;

[0049] Figure 12 A structural schematic diagram of a computer device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0050] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the following will be combined with the accompanying drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0051] In the fields such as radio astronomy, radar, ultrasonic detection imaging, or meteorological detection, in order to improve the accuracy of observation results, the conventional technology usually increases the number of acquisition channels and synchronously receives and transmits signals through multiple acquisition channels to increase the amount of collected data and improve the quality of collected signals. In actual scenarios, multiple acquisition board cards are usually used to perform observation tasks, and multiple acquisition channels are respectively arranged in each acquisition board card. The acquisition board cards can also have digital functions to perform partial signal processing on the collected signals. There is usually a synchronization error between different acquisition board cards, and the signal processing process is also affected by the synchronization error between the acquisition board cards when the acquisition board cards perform signal processing based on the digital functions carried by the acquisition board cards. The superposition of the above various synchronization errors significantly affects the synchronization of signal acquisition and processing, and further affects the accuracy of observation results.

[0052] The related technology usually separately processes the above-mentioned multiple synchronization errors and directly ends the inter-board synchronization process after the processing is completed. In actual situations, the synchronization between the acquisition boards is also affected by the synchronization processing precision and environmental conditions, and has certain volatility. Only the multiple acquisition boards are synchronized, which cannot effectively ensure that the acquisition boards are in a stable synchronization state. Therefore, the synchronization reliability in the related technology still needs to be improved.

[0053] Based on the above problems, the application provides an inter-board synchronization method, device, platform and phased array radio telescope with digital function based on RFSoC, which comprises: enabling a global reference clock signal, a cooperative start signal and a cooperative pulse signal; performing time-space-time-frequency synchronization matching on the acquisition boards; when detecting a phase detection incentive in the cooperative pulse signal, performing phase detection on the acquisition boards to obtain phase coordination information of the acquisition boards; in the case that the phase coordination information meets a preset retriggering condition, correcting the phase oscillation of the acquisition boards by using the cooperative start signal to reduce the volatility of the phase deviation between the acquisition boards and ensure that the inter-board phase deviation between the acquisition boards is in a stable state; when the inter-board phase deviation is in a stable state, calibrating the frequency domain dimension of the acquisition boards to eliminate the phase deviation affecting the digital function; and the inter-board phase deviation includes the fluctuating phase deviation generated by the digital function.

[0054] The inter-board synchronization method with digital function based on RFSoC provided by the application first performs time-frequency synchronization matching on the acquisition boards to ensure that each acquisition board is in a synchronization state in the time dimension and the frequency dimension, and eliminates the synchronization error between the acquisition boards; secondly, the phase of each acquisition board is detected by using the cooperative pulse signal to obtain the phase coordination information of each acquisition board, so as to correct the phase oscillation of the acquisition boards to reduce the volatility of the phase deviation between the acquisition boards.

[0055] Compared with the related technology, the application performs time-frequency matching on each acquisition board to eliminate the synchronization error between each acquisition board due to multiple reasons, and on this basis, performs phase coordination verification on all acquisition boards and corrects the phase oscillation of the acquisition boards which are not in a phase coordination state, so as to ensure that the acquisition boards are in a stable synchronization state, and significantly improve the synchronization reliability between the acquisition boards.

[0056] The RFSoC-based inter-board synchronization method with digital function provided in the specification can be applied to multiple acquisition board cards in a phased array system. The phased array system can be used in the fields of radio astronomy, radar, ultrasonic imaging, meteorological detection, etc. In the field of radio astronomy, the phased array system can be used to build a phased array radio telescope to realize high-speed, real-time and synchronous acquisition and preprocessing of large-scale and wide-band radio frequency signals. It should be noted that the acquisition board card has a digital function and can perform certain digital signal processing on the acquired signals.

[0057] According to the embodiments of the present application, an RFSoC-based inter-board synchronization method with digital function is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0058] In this embodiment, an RFSoC-based inter-board synchronization method with digital function is provided, which can be used in the multiple acquisition board cards in the phased array system described above. Referring to FIG. 1, the method comprises the following steps. Figure 1

[0059] S100. Enable the global reference clock signal, the cooperative start signal and the cooperative pulse signal to output to the acquisition board card; wherein the number of acquisition board cards is two or more, and the acquisition board card includes two or more acquisition channels, and the global reference clock signal is used as the clock reference of the acquisition board card.

[0060] S200. Perform time-frequency synchronization matching on the acquisition board card, so that the working mode of the acquisition board card is kept synchronized in time and frequency dimensions.

[0061] S300. When the phase detection excitation in the cooperative pulse signal is detected, perform phase detection on the acquisition board card to obtain phase coordination information of the acquisition board card; and when the phase coordination information meets a preset retriggering condition, use the cooperative start signal to correct the phase oscillation of the acquisition board card, so as to reduce the volatility of the phase deviation between the acquisition board cards and ensure that the inter-board phase deviation between the acquisition board cards is in a stable state.

[0062] S400. When the inter-board phase deviation is in a stable state, perform frequency dimension calibration on the acquisition board card to eliminate the phase deviation affecting the digital function.

[0063] ​The global reference clock signal can be a low-frequency clock signal, which is used as a clock reference for each acquisition board card, so that each acquisition board card can be synchronized among boards based on the same clock reference and can collect signals according to the same clock reference. For example, the clock frequency of the global reference clock signal can be 10 MHz.

[0064] The cooperative start signal can be a periodic low-frequency pulse clock signal, which is used to set the clock reference for each acquisition board card, so that each acquisition board card can be synchronized in time and frequency with the same clock reference. It should be noted that the cooperative start signal also corresponds to a cooperative logic signal, which can also be a periodic low-frequency pulse clock signal, has the same clock frequency as the cooperative start signal, and the phase relationship between them is constant. The cooperative logic signal is used to set the clock reference for the programmable logic part of the acquisition board card, so that the programmable logic part of each acquisition board card controls the acquisition board card to be synchronized in time and frequency with the same clock reference. For example, the cooperative start signal can be a low-frequency pulse clock signal AMS_SYSREF, and the cooperative logic signal can be a low-frequency pulse clock signal PL_SYSREF, and the frequency of the two can be 10 MHz.

[0065] The cooperative pulse signal can be a pulse signal containing a plurality of excitation signals, which is used to synchronously send excitation signals to each acquisition board card to control each acquisition board card by the excitation signals. The excitation signal can be used to trigger the acquisition board card, so that the acquisition board card performs corresponding operations. Different kinds of excitation signals have distinguishability in the same signal feature, and the signal feature can be pulse width, level value, frequency, amplitude or phase, etc. For example, different excitation signals can correspond to different pulse widths respectively, and the pulse width of the pulse signal in the cooperative pulse signal is measured by an oscilloscope or a technical device, so as to distinguish different kinds of excitation signals.

[0066] The phase synchronization information can be used to represent the phase synchronization state of each acquisition board card, so as to determine whether the inter-board phase deviation is in a stable state. For example, the phase synchronization information can be the phase difference between each acquisition board card.

[0067] The preset retrigger condition can be used to determine whether the inter-board phase deviation between each acquisition board card is in a stable state, so as to determine whether the phase deviation oscillation correction needs to be performed on all acquisition board cards. For example, if the phase difference between each acquisition board card is fixed and does not change over time, it is determined that the phase synchronization information does not meet the preset retrigger condition, and the inter-board phase deviation between each acquisition board card is in a stable state; if the phase difference between each acquisition board card is fluctuant and any phase difference changes over time, it is determined that the phase synchronization information meets the preset retrigger condition, and the phase deviation oscillation correction needs to be performed on the acquisition board card.

[0068] It should be noted that the embodiment is applied to a plurality of acquisition board cards in a phased array system, the number of acquisition board cards is two or more, and each acquisition board card includes two or more acquisition channels. In the applicable scenario of the embodiment, the plurality of acquisition board cards are respectively connected with radio frequency receivers, the radio frequency receivers are used to directly receive analog signals and transmit the analog signals to a subsequent signal processing part. The radio frequency receivers do not have a mixing module, and directly output the received analog signals to each acquisition board card, at which time the analog signals need to be subjected to analog-to-digital conversion and signal processing. The signal processing can include processing operations such as down-conversion and decimation filtering. Therefore, each acquisition board card in the embodiment has a digital function.

[0069] Specifically, the cooperative start signal, the cooperative logic signal and the cooperative pulse signal are enabled, and it is ensured that the cooperative start signal is in a periodic continuous output state and can be stably captured by each acquisition board card. It can be understood that the cooperative start signal, the cooperative logic signal and the cooperative pulse signal are synchronously transmitted to each acquisition board card in the inter-board synchronization process and are synchronously received by the acquisition channels in the acquisition board card.

[0070] Further, after enabling the required signals, the acquisition board cards are subjected to mode checking to ensure that the acquisition board cards have no faults and can normally work, and a plurality of modules and acquisition channels on each acquisition board card are in a stable initial state. The mode checking includes module enable mode checking, phase-locked mode checking, power-on mode checking and channel enable mode checking. The enable mode checking can be enable mode checking on any module on the acquisition board card to determine whether the any module has been enabled. The phase-locked mode checking can be mode checking on a phase-locked loop on the acquisition board card to determine whether the phase-locked loop is in a phase-locked mode or a normal working mode, so as to ensure the stability of a plurality of clock signals in the acquisition board card through the phase-locked loop. The power-on mode checking can be power-on mode checking on any module on the acquisition board card to determine whether the any module has been powered on and is in a normal working mode. The channel enable mode checking can be enable mode checking on any acquisition channel on the acquisition board card to determine whether the acquisition channels have been enabled and ensure that the acquisition channels can participate in the synchronization operation in the inter-board synchronization process. After the mode checking is completed, the inter-board synchronization process can be started between the acquisition board cards.

[0071] Further, the time-frequency synchronization matching is performed on the collection boards, including time dimension synchronization matching and frequency domain dimension synchronization matching. The time-frequency synchronization matching is performed on the collection boards in different dimensions, so that the collection boards are kept in synchronization in time dimension and frequency domain dimension, and the initial synchronization deviation between the collection boards is eliminated. It can be understood that the initial synchronization deviation between the collection boards can include delay value deviation and phase deviation. The delay value deviation is eliminated to keep the collection boards in synchronization in time dimension, and the phase deviation is eliminated to keep the collection boards in synchronization in frequency domain dimension.

[0072] Further, the cooperative pulse signal containing the phase detection excitation is synchronously sent to the collection boards. The cooperative pulse signal is synchronously received by the collection channels in each collection board, and the cooperative pulse signal is detected. After the phase detection excitation is detected, the phase detection excitation is taken as a reference point, and the phase detection is performed on the collection channels to obtain the phase cooperation information of the collection channels. The phase cooperation information can be the phase difference between the collection boards, which is used to represent the phase synchronization state of the collection boards. If the phase cooperation information is fixed and does not change with time, it indicates that the inter-board phase deviation between the collection boards is in a stable state. Otherwise, it indicates that the inter-board phase deviation between the collection boards is in a fluctuation state, and the phase oscillation correction needs to be performed on the collection boards.

[0073] Further, the condition is judged based on the phase cooperation information. If the phase cooperation information meets the preset retriggering condition, that is, the inter-board phase deviation between the collection boards is in a fluctuation state, the cooperative start signal is synchronously sent to the collection boards. The cooperative start signal is synchronously received by the collection channels in each collection board. The cooperative start signal is taken as the trigger source of the collection channels, and the phase oscillation correction is performed on the collection boards under the trigger of the cooperative start signal. The phase re-alignment is performed on the collection channels, so as to reduce the fluctuation of the phase deviation between the collection boards and ensure that the inter-board phase deviation between the collection boards is in a stable state.

[0074] It can be understood that, after the time-frequency synchronization matching is performed on the collection boards, the phase oscillation correction is performed on all the collection boards according to the phase cooperation information between the collection boards, so as to reduce the fluctuation of the inter-board phase deviation and improve the synchronization reliability between the collection boards.

[0075] Further, when the inter-board phase deviation between the acquisition board cards is in a stable state, the cooperative pulse signals are synchronously sent to each acquisition board card, and the phase detection excitation is used to perform phase detection on each acquisition channel to obtain the signal phase of each acquisition channel. Considering that there may be phase differences between the acquisition channels, if the same signal phase is simply set for each acquisition channel, the signal phases of the acquisition board cards may not be synchronized. Therefore, after obtaining the signal phases of the acquisition channels, the acquisition channels are respectively configured with targeted phases according to the signal phases, so as to calibrate the phases of the acquisition channels with signal phase differences and improve the synchronization between the acquisition channels. After the phase configuration, the cooperative start signals are synchronously sent to each acquisition board card, and the cooperative start signals are synchronously received by the acquisition channels in each acquisition board card. The cooperative start signals are used as the trigger sources of the acquisition channels, and the acquisition board cards are activated for phase calibration under the trigger of the cooperative start signals, so that the acquisition board cards are kept synchronized in the frequency domain.

[0076] It should be noted that by calibrating the phases of the acquisition channels, it is ensured that the acquisition channels will not have phase misalignment when the signals are processed by the digital functions, and the signal processing quality is ensured and the synchronization between the acquisition channels is improved. The digital function can be a function of processing the acquisition signals in a digital manner, such as digital quadrature demodulation.

[0077] In some embodiments, due to the introduction of the digital function, the acquisition channels are divided into analog channels and digital channels, and the above two channels each correspond to a clock signal with different processing frequencies. There may be a phase difference between the analog processing clock corresponding to the analog channel and the digital processing clock corresponding to the digital channel. When each signal enters the digital channel from the analog channel, the phase difference between the analog processing clock and the digital processing clock will cause digital processing errors in different acquisition channels, affecting the synchronization between the acquisition channels. When the phases of the acquisition channels are repeatedly aligned, the analog processing clock and the digital processing clock of each acquisition channel are also aligned to ensure that each signal enters the digital channel at the same clock position.

[0078] Further, after the inter-board phase deviation between the acquisition board cards reaches a stable state and the phases of the acquisition channels are calibrated, the phases of the acquisition channels in each acquisition board card are locked to prevent the synchronization state of the acquisition board cards in the frequency domain from being disturbed.

[0079] The method for inter-board synchronization based on the RFSoC with digital functions provided by the embodiment first performs time-frequency synchronization matching on the acquisition board to ensure that each acquisition board is in a synchronized state in the time dimension and the frequency dimension, and eliminate synchronization errors between the acquisition boards; secondly, the phase detection of each acquisition board is performed by using the cooperative pulse signal to obtain the phase coordination information of each acquisition board, so as to correct the phase oscillation of the acquisition board to reduce the volatility of the phase deviation between the acquisition boards.

[0080] Compared with the related art, the time-frequency matching is performed on each acquisition board to eliminate the synchronization errors between the acquisition boards due to various reasons, and on this basis, the phase coordination of all acquisition boards is verified, and the phase oscillation correction is performed on the acquisition boards not in the phase coordination state to ensure that the acquisition boards are in a stable synchronization state, thereby significantly improving the synchronization reliability between the acquisition boards.

[0081] Referring to FIG. 1, as an embodiment of the present application, the phase oscillation correction of the acquisition board is performed by using the cooperative start signal, which includes the following steps.

[0082] S310. Pulse detection is performed on the cooperative start signal to obtain a correction trigger pulse in the case of detecting a level transition; wherein the correction trigger pulse is a single pulse signal in any period of the cooperative start signal.

[0083] S320. The phase offset alignment of the acquisition board is performed based on the correction trigger pulse.

[0084] Specifically, the cooperative start signal is synchronously transmitted to each acquisition board, and the cooperative start signal is synchronously received by the acquisition channels in each acquisition board. After each acquisition channel receives the cooperative start signal, pulse detection is performed on the cooperative start signal to obtain the level transition in the cooperative start signal, and a correction trigger pulse is obtained in the case of detecting the level transition. It should be noted that the cooperative start signal is a periodic pulse signal, and the correction trigger pulse can be a single pulse signal in any period of the cooperative start signal to trigger the acquisition channel in each period.

[0085] Further, the rising edge of the correction trigger pulse is taken as a starting point to perform the phase offset alignment of each acquisition channel, so as to align the signal phase of all acquisition channels with the preset phase to reduce the volatility of the phase deviation between the acquisition boards. It can be understood that the process of phase offset alignment can be repeated until the phase coordination information no longer meets the preset re-triggering condition, at which time the inter-board phase deviation between the acquisition boards reaches a stable state.

[0086] Referring to FIG. 2, as an embodiment of the present application, the phase detection excitation in the cooperative pulse signal is detected by the following way. Figure 3 Further, the rising edge of the correction trigger pulse is taken as a starting point to perform the phase offset alignment of each acquisition channel, so as to align the signal phase of all acquisition channels with the preset phase to reduce the volatility of the phase deviation between the acquisition boards. It can be understood that the process of phase offset alignment can be repeated until the phase coordination information no longer meets the preset re-triggering condition, at which time the inter-board phase deviation between the acquisition boards reaches a stable state.​

[0087] S330. Pulse detection is performed on the cooperative pulse signal, and pulse timing is performed on the pulse corresponding to the level transition in the case of detecting the level transition, to obtain pulse width information.

[0088] S340. In the case where the pulse width information meets the first time condition, it is determined that the phase detection incentive is detected.

[0089] Specifically, the cooperative pulse signal containing the incentive signal is synchronously transmitted to each acquisition board card, and the cooperative pulse signal is synchronously received through the acquisition channel in each acquisition board card. The cooperative pulse signal is detected in each acquisition channel to obtain the level transition in the cooperative start signal. In the case of detecting the level transition, the pulse timing is performed on the level transition to determine the pulse width of the level transition, and the corresponding pulse width information is obtained.

[0090] Further, the pulse width information is compared with a plurality of preset time conditions to determine the type of incentive signal contained in the cooperative pulse signal. When the pulse width information meets the first time condition, it is determined that the phase detection incentive is contained in the cooperative pulse signal, and the phase detection incentive is used to control the phase detection of each acquisition channel to obtain the phase synchronization information of the acquisition board card.

[0091] It should be noted that the first time condition can be that the pulse width of the incentive signal is a specific length. Referring to Figure 4 , wherein clk represents a global reference clock signal, IO_in represents a cooperative pulse signal, count represents a timing signal, and Catch represents a phase detection incentive. The specific length corresponding to the first time condition can be 1 clock period. After detecting the falling edge of the cooperative pulse signal, the pulse timing is performed on the cooperative start signal through the timing signal until the rising edge of the cooperative pulse signal is detected, to obtain the pulse width information. In the case where the pulse width information is 1 clock period, it is determined that the phase detection incentive is detected in the cooperative pulse signal.

[0092] Referring to Figure 5 , as an embodiment of the present application, the time-frequency synchronization matching of the acquisition board card includes:

[0093] S210. When the cooperative reset incentive in the cooperative pulse signal is detected, the time-frequency synchronization state of the acquisition board card is initialized.

[0094] S220. The time dimension synchronization matching of the acquisition board card is performed by using the cooperative start signal, so that the working mode of the acquisition board card is kept synchronous in the time dimension.

[0095] S230. According to the cooperative start signal, the acquisition board card is matched in the frequency domain dimension, so that the working mode of the acquisition board card is kept synchronous in the frequency domain dimension.

[0096] Specifically, the cooperative pulse signal containing the excitation signal is synchronously transmitted to each acquisition board card, the cooperative pulse signal is synchronously received by the acquisition channel in each acquisition board card, and the cooperative pulse signal is detected. After detecting the cooperative reset excitation, the cooperative reset excitation is taken as a reference point, and each acquisition channel is controlled to start time-frequency synchronization state initialization, thereby providing an initial synchronization basis for time-frequency synchronization matching.

[0097] Further, the process of time dimension synchronization matching can include: taking the cooperative start signal and the cooperative logic signal as the clock reference of each acquisition board card to ensure the timing consistency between the acquisition board cards; based on the cooperative start signal and the cooperative logic signal, issuing a delay value test instruction through the programmable logic side in the acquisition board card to control all acquisition channels in each acquisition board card to return to their respective transmission delay values synchronously; if the transmission delay values of the acquisition channels are the same, it indicates that the acquisition channels are in a synchronous state in the time dimension, and no time dimension synchronization matching is required; if the transmission delay values of the acquisition channels are different, a transmission delay value meeting the delay value matching requirement is selected from all transmission delay values, and a target delay value is obtained based on the transmission delay value and a redundancy design; the target delay value is synchronously transmitted to each acquisition board card, and is respectively configured to each acquisition channel in each acquisition board card, so that the delay values of the acquisition channels are set to the target delay value, and the signal data in each acquisition channel can be output after the target delay value. Exemplarily, the delay value matching requirement can be the maximum value, the minimum value, the average value or the intermediate value of the transmission delay values, and the redundancy design can be to increase a plurality of clock cycles based on the transmission delay values. The number of the added clock cycles can be 16.

[0098] It should be noted that the delay value test instruction is issued through the programmable logic side, and the automatic delay value test is performed based on the cooperative start signal and the cooperative logic signal, which can reduce the timing error that may be generated during the separate test of each acquisition channel, and the test process does not require manual intervention of the operator, thereby reducing the influence of the experience of the operator on the test result and improving the efficiency and accuracy of the delay value test. Through the time dimension synchronization matching, the acquisition channels in each acquisition board card are based on the same target delay value for signal output, thereby realizing the synchronization of the acquisition board cards in the time dimension.

[0099] Further, the process of frequency domain dimension synchronization matching can include: setting the mixing trigger source of the acquisition channel in all acquisition board cards as a cooperative start signal, and synchronously sending the cooperative start signal to each acquisition channel with the same clock reference; after each acquisition channel receives the cooperative start signal, pulse detection is performed on the cooperative start signal, and the clock pulse of the cooperative start signal is taken as a starting point to perform repeated frequency domain phase initialization on each acquisition channel to align the signal phase of all acquisition channels with a preset phase; the process of the above-mentioned frequency domain phase initialization is repeated until the repetition period reaches a preset period threshold; and each acquisition channel is controlled to synchronously stop receiving the cooperative start signal. Exemplarily, the preset period threshold can be two or more clock periods.

[0100] It can be understood that, by repeatedly performing frequency domain phase synchronization on each acquisition channel, various phase deviations existing between the acquisition channels are eliminated, and the synchronization of the acquisition channels in the frequency domain dimension is effectively improved. The phase deviations include phase deviations caused by integration of different acquisition board cards to each acquisition channel, etc.

[0101] Referring to FIG. 8, as an embodiment of the present application, the cooperative reset incentive in the cooperative pulse signal is detected in the following manner: Figure 6

[0102] S212. Pulse detection is performed on the cooperative pulse signal, and pulse timing is performed on the pulse corresponding to the level transition in the case of detecting the level transition to obtain pulse width information.

[0103] S214. In the case that the pulse width information meets a second time condition, it is determined that the cooperative reset incentive is detected.

[0104] Specifically, the cooperative pulse signal containing the incentive signal is synchronously sent to each acquisition board card, and the cooperative pulse signal is synchronously received by the acquisition channel in each acquisition board card. In each acquisition channel, pulse detection is respectively performed on the cooperative pulse signal to obtain the level transition in the cooperative start signal. In the case of detecting the level transition, pulse timing is performed on the level transition to determine the pulse width of the level transition, and the corresponding pulse width information is obtained.

[0105] Further, the pulse width information is compared with a plurality of preset time conditions to determine the type of the incentive signal contained in the cooperative pulse signal. When the pulse width information meets a second time condition, it is determined that the cooperative reset incentive is contained in the cooperative pulse signal, and each acquisition board card is controlled to perform time-frequency synchronization state initialization with the cooperative reset incentive.

[0106] It should be noted that the second time condition can be that the pulse width of the incentive signal is a specific length. Referring to FIG. 8, Figure 7 ​As shown in the figure, where clk represents a global reference clock signal, IO_in represents a cooperative pulse signal, count represents a timing signal, and Reset represents a cooperative reset stimulus. The specific length of the second time condition can be 2 clock cycles. After detecting the falling edge of the cooperative pulse signal, the cooperative start signal is pulsed by the timing signal until the rising edge of the cooperative pulse signal is detected, obtaining the pulse width information. In the case of pulse width information being 2 clock cycles, it is determined that the cooperative reset stimulus is detected in the cooperative pulse signal.

[0107] As an embodiment of the present application, the method further comprises:

[0108] S500. When the cooperative acquisition stimulus in the cooperative pulse signal is detected, control the acquisition board to perform cooperative radio frequency collection based on the cooperative acquisition stimulus.

[0109] Specifically, the cooperative pulse signal containing the stimulus signal is synchronously sent to each acquisition board, the cooperative pulse signal is synchronously received by the acquisition channel in each acquisition board, and the cooperative pulse signal is detected. After detecting the cooperative acquisition stimulus, the cooperative acquisition stimulus is taken as a reference point to control each acquisition channel to start signal acquisition, so that each acquisition board can synchronously acquire signals, improving the synchronization between the acquired signals.

[0110] Referring to Figure 8 As an embodiment of the present application, the cooperative acquisition stimulus in the cooperative pulse signal is detected by the following method:

[0111] S510. Pulse detection is performed on the cooperative pulse signal, and in the case of detecting a level transition, the pulse corresponding to the level transition is pulsed to obtain pulse width information.

[0112] S520. In the case that the pulse width information meets the configured third time condition, it is determined that the cooperative acquisition stimulus is detected.

[0113] Specifically, the cooperative pulse signal containing the stimulus signal is synchronously sent to each acquisition board, and the cooperative pulse signal is synchronously received by the acquisition channel in each acquisition board. The cooperative pulse signal is respectively pulsed in each acquisition channel to obtain the level transition in the cooperative start signal. In the case of detecting a level transition, the pulse width of the level transition is determined by pulsing the level transition to obtain the corresponding pulse width information.

[0114] Further, the pulse width information is compared with a plurality of preset time conditions to determine the type of stimulus signal contained in the cooperative pulse signal. When the pulse width information meets the configured third time condition, it is determined that the cooperative acquisition stimulus is contained in the cooperative pulse signal, and each acquisition board is controlled to perform cooperative radio frequency collection based on the cooperative acquisition stimulus.

[0115] It should be noted that the third time condition can be that the pulse width of the cooperative signal is a specific length. Referring to Figure 9 indicates a global reference clock signal, IO_in indicates a cooperative pulse signal, count indicates a timing signal, and SYNC indicates a cooperative acquisition trigger. The specific length corresponding to the third time condition can be 3 clock cycles. After detecting the falling edge of the cooperative pulse signal, the cooperative trigger signal is pulsed by the timing signal until the rising edge of the cooperative pulse signal is detected, and the pulse width information is obtained. In the case where the pulse width information is 3 clock cycles, it is determined that the cooperative acquisition trigger is detected in the cooperative pulse signal.

[0116] Correspondingly, please refer to Figure 10 The embodiment of the present application provides a board-to-board synchronization device with a digital function based on an RFSoC, which comprises:

[0117] The signal enable preparation module 1010 is configured to enable the global reference clock signal, the cooperative trigger signal and the cooperative pulse signal to be output to the acquisition board card. The number of acquisition board cards is two or more, and the acquisition board card comprises two or more acquisition channels. The global reference clock signal serves as the clock reference of the acquisition board card.

[0118] The time-frequency synchronization matching module 1020 is configured to perform time-frequency synchronization matching on the acquisition board card, so that the working mode of the acquisition board card is kept synchronized in the time dimension and the frequency dimension.

[0119] The phase oscillation correction module 1030 is configured to perform phase detection on the acquisition board card when the phase detection trigger in the cooperative pulse signal is detected, to obtain phase synchronization information of the acquisition board card. When the phase synchronization information meets a preset retriggering condition, the phase oscillation correction module 1030 performs phase oscillation correction on the acquisition board card by using the cooperative trigger signal, to reduce the volatility of the phase deviation between the acquisition board cards and ensure that the board-to-board phase deviation between the acquisition board cards is in a stable state.

[0120] The frequency dimension calibration module 1040 is configured to perform frequency dimension calibration on the acquisition board card when the board-to-board phase deviation is in a stable state, to eliminate the phase deviation affecting the digital function.

[0121] In some optional embodiments, the phase oscillation correction module 1030 comprises:

[0122] The pulse detection unit is configured to perform pulse detection on the cooperative trigger signal, to obtain a correction trigger pulse when a level transition is detected. The correction trigger pulse is a single pulse signal in any period of the cooperative trigger signal.

[0123] A phase offset alignment unit is configured to perform phase offset alignment on the acquisition board based on the correction trigger pulse.

[0124] In some optional embodiments, the phase polarization oscillation correction module 1030 further includes:

[0125] A pulse detection timing unit is configured to perform pulse detection on the cooperative pulse signal, and perform pulse timing on a pulse corresponding to a level transition when the level transition is detected, to obtain pulse width information.

[0126] A width information judgment unit is configured to determine that the phase detection stimulus is detected when the pulse width information meets a configured first time condition.

[0127] In some optional embodiments, the time-frequency synchronization matching module 1020 includes:

[0128] A time-frequency synchronization state initialization unit is configured to perform time-frequency synchronization state initialization on the acquisition board when the cooperative reset stimulus in the cooperative pulse signal is detected.

[0129] A time dimension synchronization matching unit is configured to perform time dimension synchronization matching on the acquisition board by using the cooperative start signal, so that the working mode of the acquisition board is kept synchronized in the time dimension.

[0130] A frequency domain dimension synchronization matching unit is configured to perform frequency domain dimension synchronization matching on the acquisition board according to the cooperative start signal, so that the working mode of the acquisition board is kept synchronized in the frequency domain dimension.

[0131] In some optional embodiments, the time-frequency synchronization state initialization unit includes:

[0132] A pulse detection timing sub-unit is configured to perform pulse detection on the cooperative pulse signal, and perform pulse timing on a pulse corresponding to a level transition when the level transition is detected, to obtain pulse width information.

[0133] A width information judgment sub-unit is configured to determine that the cooperative reset stimulus is detected when the pulse width information meets a configured second time condition.

[0134] In some optional embodiments, the device further includes a cooperative radio frequency collection module, including:

[0135] A stimulus cooperation unit is configured to control the acquisition board to perform cooperative radio frequency collection based on a cooperative acquisition stimulus when a cooperative acquisition stimulus in the cooperative pulse signal is detected.

[0136] In some optional embodiments, the cooperative radio frequency collection module further includes:

[0137] The pulse detection timing unit is configured to perform pulse detection on the cooperative pulse signal, and perform pulse timing on the pulse corresponding to the level transition when the level transition is detected, so as to obtain pulse width information.

[0138] The width information unit is configured to determine that the cooperative acquisition excitation is detected when the pulse width information meets the third time condition.

[0139] Further function descriptions of the above-mentioned modules and units are the same as those of the corresponding embodiments, and will not be described here.

[0140] The inter-board synchronization device with digital function based on RFSoC in the embodiment is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and a memory executing one or more software or fixed programs, and / or other devices that can provide the above-mentioned functions.

[0141] The embodiment of the present application provides an inter-board synchronization platform with digital function based on RFSoC, which is synchronized by the method in any one of the above-mentioned embodiments.

[0142] Referring to Figure 11 The inter-board synchronization platform provided by the embodiment includes a frequency synthesis board, a timing control board and a plurality of acquisition board cards, wherein the output end of the frequency synthesis board is connected with the input end of the timing control board and the input end of the plurality of acquisition board cards, the output end of the timing control board is connected with the input end of the plurality of acquisition board cards, and each acquisition board card includes one or more acquisition channels for signal acquisition.

[0143] The frequency synthesis board is configured to generate a reference clock signal as a global reference clock, and output the reference clock signal to the timing control board, so that the timing control board controls the acquisition board cards according to the reference clock signal. The frequency synthesis board can have a plurality of output ends, and the number of output ends of the frequency synthesis board is generally greater than the number of acquisition board cards, and each output end is connected with each acquisition board card. It can be understood that the reference clock signal received by each board card is a clock signal of the same source and in phase, and the clock signal is output by a single frequency synthesis board, which effectively reduces the timing error that may occur between clock signals generated by different clock sources, improves the timing consistency and stability between multiple clock signals. In addition, the single frequency synthesis board also simplifies the hardware design in the inter-board synchronization platform, reduces the complexity of the board in the inter-board synchronization platform, and improves the hardware stability and use convenience of the inter-board synchronization platform.

[0144] The timing control board is used to generate a timing synchronization pulse signal and output the timing synchronization pulse signal to each acquisition board card as a clock reference after receiving a reference clock signal output by the frequency synthesis board, so as to perform timing coordination and synchronization on each acquisition board card. The timing control board is also used to generate and output an excitation synchronization pulse signal and a logic synchronization pulse signal according to the reference clock signal. The output end of the timing control board is connected with the input end of each acquisition board card, and signal coupling is realized in a direct coupling manner to reduce signal glitches and improve signal transmission quality. It should be noted that the timing control board is connected with each acquisition board card through separate connection wiring, and each acquisition board card is controlled to perform corresponding actions through the timing synchronization pulse signal, thereby effectively reducing the number of wirings between the timing control board and the acquisition board card, reducing the complexity of the inter-board synchronization platform and improving the reliability of the inter-board synchronization platform.

[0145] The acquisition board card is used to perform corresponding actions based on the timing synchronization pulse signal with the reference clock signal as a clock reference, so as to realize synchronization signal acquisition between multiple acquisition board cards. The acquisition board card includes a programmable logic part and a processing system part, wherein: the RFDC IP core is arranged in the programmable logic part, and the RFDC IP core includes one or more acquisition channels for signal acquisition. The programmable logic part is also used to receive the timing synchronization pulse signal output by the timing control board and analyze the timing synchronization pulse signal to determine the corresponding operation to be performed according to the selection pulse contained therein. In the embodiment, the programmable logic part also has a digital function and can be used for signal processing of the acquisition signal. The processing system part can configure the clock signal of the acquisition board card by calling the API driver software and start the required logic file, and the processing system part is also used to receive the synchronization information acquired from the acquisition board card. The processing system part interacts with the programmable logic part through the AXI interface and sends a signal instruction to the programmable logic part.

[0146] The embodiment of the present application also provides a phased array radio telescope, which includes the inter-board synchronization platform according to any one of the above embodiments.

[0147] Please refer to Figure 12 , Figure 12is a structural schematic diagram of a computer device provided by an embodiment of the present application. As shown in the figure, the computer device comprises one or more processors 10, a memory 20, and interfaces for connecting various components, including high-speed interfaces and low-speed interfaces. Various components are communicatively connected to each other by different buses, and can be installed on a common mainboard or in other manners as needed. The processor can process instructions executed in the computer device, including instructions stored in the memory or on the memory to display graphical information of a GUI on an external input / output device such as a display device coupled to the interface. In some optional embodiments, multiple processors and / or multiple buses can be used together with multiple memories and multiple memory banks, if needed. Also, multiple computer devices can be connected, each providing part of the necessary operations (for example, as a server array, a group of blade servers, or a multi-processor system). Figure 12 The processor 10 is taken as an example in the embodiment.

[0148] The processor 10 can be a central processor, a network processor, or a combination thereof. The processor 10 can further include a hardware chip. The hardware chip can be an application specific integrated circuit, a programmable logic device, or a combination thereof. The programmable logic device can be a complex programmable logic device, a field programmable logic gate array, a generic array logic, or any combination thereof.

[0149] The memory 20 stores instructions executable by the at least one processor 10, so that the at least one processor 10 executes the method shown in the above embodiment.

[0150] The memory 20 can include a program storage area and a data storage area. The program storage area can store an operating system and application programs required by at least one function; the data storage area can store data created according to the use of the computer device, and the like. In addition, the memory 20 can include a high-speed random access memory, and can also include a non-transitory memory, such as at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state memory device. In some optional embodiments, the memory 20 can optionally include a memory remotely arranged with respect to the processor 10, which can be connected to the computer device through a network. Examples of the network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0151] The memory 20 can include a volatile memory, such as a random access memory; the memory can also include a non-volatile memory, such as a flash memory, a hard disk, or a solid-state disk; and the memory 20 can further include a combination of the above kinds of memories.

[0152] The computer device also includes a communication interface 30 for the computer device to communicate with other devices or communication networks.

[0153] The embodiments of the present application further provide a computer readable storage medium, and the method according to the embodiments of the present application can be implemented in hardware, firmware, or recorded in a storage medium, or be implemented as computer code originally stored in a remote storage medium or non-transitory machine readable storage medium and downloaded to a local storage medium to be stored, so that the method described herein can be processed by such software on a storage medium using a general purpose computer, a special purpose processor, or programmable or special purpose hardware. The storage medium can be a magnetic disk, an optical disk, a read-only memory, a random access memory, a flash memory, a hard disk, or a solid state disk, etc. Further, the storage medium can also include a combination of the above-mentioned memories. It can be understood that the computer, the processor, the microprocessor controller, or the programmable hardware includes a storage component that can store or receive software or computer code, when the software or computer code is accessed and executed by the computer, the processor, or the hardware, the method shown in the above embodiments is implemented.

[0154] The embodiments of the present application provide a computer program product, which includes computer instructions stored in a computer readable storage medium. The processor of the computer device reads the computer instructions from the computer readable storage medium, and the processor executes the computer instructions, so that the computer device executes the method of any of the embodiments of the present application.

[0155] Although the embodiments of the present application are described with reference to the drawings, various modifications and changes can be made by those skilled in the art without departing from the spirit and scope of the present application, and such modifications and changes fall within the scope defined by the appended claims.

[0156] The system, device, module or unit illustrated in the above embodiments can be specifically implemented by a computer chip or entity, or by a product with certain function. A typical implementation device is a computer. Specifically, the computer can be, for example, a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email device, a game console, a tablet computer, a wearable device, or a combination of any of these devices.

[0157] For the convenience of description, the above device is described as various units divided by functions. Of course, the functions of each unit can be implemented in the same or more software and / or hardware when implementing the present application.

[0158] Those skilled in the art will appreciate that embodiments of the application can be readily used as a method, a system or a computer program product. Accordingly, the application can take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the application can take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs, optical storage devices, etc.) embodying computer-readable program code.

[0159] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks. Figure 1 one or more flowcharts and / or blocks Figure 1 means for functionally implementing the steps listed in the flowchart block or blocks.

[0160] These computer program instructions can also be stored in a computer- readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instructions which implement the function specified in the flowchart block or blocks. Figure 1 one or more flowcharts and / or blocks Figure 1 means for functionally implementing the steps listed in the flowchart block or blocks.

[0161] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks. Figure 1 one or more flowcharts and / or blocks Figure 1 means for functionally implementing the steps listed in the flowchart block or blocks.

[0162] It should also be noted that the terms "comprises" and / or "comprising", or "includes" and / or "including" when used in this specification, specify the presence of stated features, integers, steps, operations, elements, or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or groups thereof. In the context of the specification, the term "and / or" means "and" or "or", and the term "or" means "and" or "or". In the context of the specification, the term "exemplary" means "example" or "an example of".

[0163] Each of the embodiments in the specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other. Each of the embodiments focuses on the difference from other embodiments. In particular, for the system embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the part of the method embodiments.

[0164] The above only describes the embodiments of the present application and is not intended to limit the present application. Those skilled in the art can make various modifications and changes to the present application. Any modification, equivalent replacement, improvement, etc. within the spirit and principle of the present application shall be included in the scope of the claims of the present application.

[0165] Although the embodiments of the present application are described in conjunction with the drawings, those skilled in the art can make various modifications and changes without departing from the spirit and scope of the present application, and such modifications and changes fall within the scope defined by the appended claims.

Claims

1. A method for inter-board synchronization with digital functionality based on RFSoC, characterized in that, The method comprises: enabling a global reference clock signal, a cooperative start signal and a cooperative pulse signal to be output to a collection board card; wherein the number of the collection board cards is two or more, the collection board cards comprise two or more collection channels, and the global reference clock signal serves as a clock reference of the collection board cards; performing time-frequency synchronization matching on the collection board cards, so that the working modes of the collection board cards are kept synchronized in time dimension and frequency domain; when detecting a phase detection incentive in the cooperative pulse signal, performing phase detection on the collection board cards to obtain phase cooperation information of the collection board cards; when the phase cooperation information meets a preset retriggering condition, performing pulse detection on the cooperative start signal, and obtaining a correction trigger pulse when detecting a level conversion; based on the correction trigger pulse, performing phase alignment on the collection board cards to reduce fluctuation of phase deviation between the collection board cards and ensure that the inter-board phase deviation between the collection board cards is in a stable state; wherein the correction trigger pulse is a single pulse signal in any period of the cooperative start signal; when the inter-board phase deviation is in the stable state, performing frequency domain calibration on the collection board cards to eliminate the phase deviation affecting the digital function.

2. The method of claim 1, wherein, The phase detection incentive in the cooperative pulse signal is detected in the following manner: performing pulse detection on the cooperative pulse signal, and performing pulse timing on a pulse corresponding to the level conversion to obtain pulse width information when detecting the level conversion; when the pulse width information meets a configured first time condition, it is determined that the phase detection incentive is detected.

3. The method of claim 1, wherein, The time-frequency synchronization matching on the collection board cards comprises: when detecting a cooperative reset incentive in the cooperative pulse signal, initializing a time-frequency synchronization state of the collection board cards; performing time dimension synchronization matching on the collection board cards by using the cooperative start signal, so that the working modes of the collection board cards are kept synchronized in time dimension; performing frequency domain synchronization matching on the collection board cards according to the cooperative start signal, so that the working modes of the collection board cards are kept synchronized in frequency domain.

4. The method of claim 3, wherein, The cooperative reset incentive in the cooperative pulse signal is detected in the following manner: performing pulse detection on the cooperative pulse signal, and performing pulse timing on a pulse corresponding to the level conversion to obtain pulse width information when detecting the level conversion; when the pulse width information meets a configured second time condition, it is determined that the cooperative reset incentive is detected.

5. The method of claim 1, wherein, The method further comprises: when detecting a cooperative collection incentive in the cooperative pulse signal, controlling the collection board cards to perform cooperative radio frequency collection based on the cooperative collection incentive.

6. The method of claim 5, wherein, The cooperative collection incentive in the cooperative pulse signal is detected in the following manner: performing pulse detection on the cooperative pulse signal, and performing pulse timing on a pulse corresponding to the level conversion to obtain pulse width information when detecting the level conversion; when the pulse width information meets a configured third time condition, it is determined that the cooperative collection incentive is detected.

7. An RFSoC-based board-to-board synchronization device with digital functionality, characterized by, The device comprises: A signal enabling preparation module is configured to enable a global reference clock signal, a cooperative start signal and a cooperative pulse signal to be output to a collection board card; wherein the number of the collection board cards is two or more, the collection board card comprises two or more collection channels, and the global reference clock signal serves as a clock reference of the collection board card; A time-frequency synchronization matching module is configured to perform time-frequency synchronization matching on the collection board card, so that the working mode of the collection board card is kept synchronized in time dimension and frequency domain dimension; A phase polarization oscillation correction module is configured to perform phase detection on the collection board card when detecting a phase detection incentive in the cooperative pulse signal, to obtain phase coordination information of the collection board card; in the case that the phase coordination information meets a preset retriggering condition, to perform pulse detection on the cooperative start signal, to obtain a correction trigger pulse when detecting a level conversion; and based on the correction trigger pulse, to perform phase alignment on the collection board card, to reduce the volatility of the phase deviation between the collection board cards and to ensure that the inter-board phase deviation between the collection board cards is in a stable state; wherein the correction trigger pulse is a single pulse signal in any period of the cooperative start signal; A frequency domain dimension calibration module is configured to perform frequency domain dimension calibration on the collection board card when the inter-board phase deviation is in a stable state, to eliminate the phase deviation affecting the digital function.

8. An RFSoC-based inter-board synchronization platform with digital functionality, characterized in that, The method of any one of claims 1 to 6 is used to perform inter-board synchronization.

9. A phased array radio telescope, characterized in that, The inter-board synchronization platform of claim 8 is included.

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