A bus pitch determination method, device, equipment and medium of a bus network

Abstract

The application provides a bus pitch determination method, device, equipment and medium of a bus network, comprising: configuring initial routing parameters of signal lines in the bus network based on bus width and DRC rules to determine an initial sample point set; performing parallel simulation processing on signal delays of each signal line configured by each set of candidate routing parameters in the initial sample point set to determine a maximum delay value of each set of candidate routing parameters; training a Gaussian process prior model based on each set of candidate routing parameters and the corresponding maximum delay value, determining an optimal routing parameter configuration based on an acquisition function and a predicted delay distribution, and training the Gaussian process prior model based on the optimal routing parameter configuration for the next round to determine an optimal line width and line spacing configuration. The Gaussian process prior model is used to dynamically adjust the bus pitch of the bus network, thereby improving the efficiency and accuracy of the optimal line width and line spacing configuration of the bus network.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic design automation (EDA), in particular to a bus pitch determination method, device and equipment of bus network and medium. BACKGROUND

[0002] In the electronic design automation (EDA) design, the width and pitch of the bus network directly affect the signal integrity (SI), power integrity (PI), electromagnetic compatibility (EMC) and manufacturing cost. The bus design mainly adopts the method of combining rule-driven and simulation optimization. Rule-driven design relies on IPC standards and design manuals, which is suitable for low-frequency and ordinary digital circuits. For high-speed signals (such as DDR, PCIe) and radio frequency circuits, designers will use simulation tools (such as HyperLynx, ADS, HFSS) to analyze signal integrity (SI) and power integrity (PI) to optimize the width and pitch of the wire.

[0003] In the prior art, the bus parameters are designed according to a simple model of delay, and iteration is not stopped. For example, the delay of each line is inversely proportional to its line width, and the increase of the line spacing reduces the capacitance between the wires and reduces the delay. However, after considering more cases, the problem becomes very complex, such as the inductance between the wires, which is related to the current flow direction of the wire itself. For two opposite wires, the decrease of the spacing increases the capacitance and reduces the inductance. It is difficult to determine whether the actual delay is increased or decreased. In addition, the bus width is a fixed value, and the reduction of the delay of one wire may increase the delay of other wires. Therefore, how to provide the efficiency of the bus pitch determination of the bus network has become a technical problem that cannot be ignored. SUMMARY

[0004] Therefore, the purpose of the present application is to provide a bus pitch determination method, device and equipment of bus network and medium, which automatically optimizes the line width and line spacing of each signal line in the bus network through a Gaussian process prior model, so as to achieve the goal of minimizing the maximum delay and improve the efficiency and accuracy of the optimal line width and line spacing configuration of the bus network.

[0005] The bus pitch determination method of the bus network provided by the present application comprises:

[0006] Based on the preset bus width and DRC rule, the initial routing parameters of each signal line in the bus network are configured, and an initial sampling point set is determined; wherein the initial routing parameters include the line width of the signal line and the line spacing between the previous signal line;

[0007] perform parallel simulation processing on signal delays of the signal lines of each candidate routing parameter configuration in the initial sampling point set to determine a maximum delay value of each candidate routing parameter configuration;

[0008] train a Gaussian process prior model based on each candidate routing parameter configuration and the corresponding maximum delay value, determine an optimal routing parameter configuration based on an acquisition function and a predicted delay distribution output by the Gaussian process prior model, perform next round training on the Gaussian process prior model based on the optimal routing parameter configuration, and determine an optimal line width and line spacing configuration when training reaches a maximum iteration number.

[0009] In a possible implementation, the initial routing parameters of each signal line in the bus network are combined based on the preset bus width and the DRC rule to determine the initial sampling point set, including:

[0010] The initial routing parameters of each signal line are configured based on random sampling under the condition that the line width and line spacing of each signal line are within the preset parameter value range and the bus width constraint is met, and a plurality of candidate routing parameter configurations are generated.

[0011] It is checked whether each candidate routing parameter configuration meets the DRC rule, and all candidate routing parameter configurations meeting the DRC rule are taken as the initial sampling point set.

[0012] In a possible implementation, the training of the Gaussian process prior model based on each candidate routing parameter configuration and the corresponding maximum delay value includes:

[0013] A square exponential kernel function is used as a covariance function, each candidate routing parameter configuration is taken as input information of the Gaussian process prior model, and the maximum delay value is taken as an output target of the Gaussian process prior model.

[0014] The Gaussian process prior model is controlled to learn a distribution relationship between each candidate routing parameter configuration and the corresponding maximum delay value.

[0015] Hyperparameters in the square exponential kernel function and noise variance are optimized based on maximum marginal likelihood to realize the training of the Gaussian process prior model.

[0016] In a possible implementation, the predicted delay distribution is determined in the following manner:

[0017] A first covariance matrix between a new routing parameter configuration and the existing candidate routing parameter configuration is determined.

[0018] Based on the first covariance matrix, the covariance matrix between the existing candidate routing parameter configurations and the maximum delay value between the new routing parameter configurations, the calculation of the predicted mean and variance is performed to determine the predicted delay distribution of the new routing parameter configuration.

[0019] In one possible implementation, the predicted delay distribution output by the acquisition function and the Gaussian process prior model is used to determine the optimal routing parameter configuration, including:

[0020] Based on the probability information of the maximum delay value provided on the predicted delay distribution, the line width and line spacing configuration parameters with the maximum expected improvement value are searched in the entire line width and line spacing configuration space using the acquisition function;

[0021] It is detected whether the line width and line spacing configuration parameters meet the bus width and the DRC rule;

[0022] If yes, the line width and line spacing configuration parameters are used as the optimal routing parameter configuration, and if no, the search is continued in the entire line width and line spacing configuration space.

[0023] In one possible implementation, the signal delay of each signal line of each group of candidate routing parameter configurations in the initial sampling point set is simulated in parallel to determine the maximum delay value of each group of candidate routing parameter configurations, including:

[0024] Each group of candidate routing parameter configurations is assigned to a corresponding processing process, and the processing process is controlled to listen to the running state of each subtask in real time; the subtask is a simulation task for determining the signal delay of a signal line.

[0025] If it is detected that the subtask ends abnormally, the processing process is controlled to automatically record abnormal information, and the subtask is resubmitted for simulation processing to determine the maximum delay value according to the subtask identifier.

[0026] In one possible implementation, after the Gaussian process prior model is trained based on each group of candidate routing parameter configurations and the corresponding maximum delay value, the bus spacing determination method further includes:

[0027] The product information obtained in each training process of the Gaussian process prior model is stored.

[0028] Embodiments of the present application also provide a bus spacing determination device of a bus network, and the bus spacing determination device includes:

[0029] The parameter configuration module is configured to configure initial routing parameters of each signal line in the bus network based on a preset bus width and a DRC rule, and determine an initial sample point set; wherein the initial routing parameters include a line width of the signal line and a line spacing between the signal line and a previous signal line.

[0030] The delay calculation module is configured to perform parallel simulation processing on signal delays of each signal line configured by each set of candidate routing parameters in the initial sample point set, and determine a maximum delay value of each set of candidate routing parameters.

[0031] The processing module is configured to train a Gaussian process prior model based on each set of candidate routing parameters and the corresponding maximum delay value, determine an optimal routing parameter configuration based on an acquisition function and a predicted delay distribution output by the Gaussian process prior model, and perform next-round training on the Gaussian process prior model based on the optimal routing parameter configuration, until an optimal line width and line spacing configuration is determined when the training reaches a maximum iteration number.

[0032] The embodiment of the present application further provides an electronic device, which comprises a processor, a memory and a bus, the memory stores machine readable instructions executable by the processor, the processor and the memory communicate through the bus when the electronic device is running, and the machine readable instructions are executed by the processor to perform steps of the bus spacing determination method of the bus network as described above.

[0033] The embodiment of the present application further provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to perform steps of the bus spacing determination method of the bus network as described above.

[0034] The bus spacing determination method, device, equipment and medium provided by the embodiment of the application, the bus spacing determination method comprises: configuring initial routing parameters of each signal line in a bus network based on a preset bus width and a DRC rule, and determining an initial sample point set; wherein the initial routing parameters comprise a line width of the signal line and a line spacing between the signal line and a previous signal line; performing parallel simulation processing on signal delays of each signal line configured by each set of candidate routing parameters in the initial sample point set, and determining a maximum delay value of each set of candidate routing parameters; training a Gaussian process prior model based on each set of candidate routing parameters and the corresponding maximum delay value, determining an optimal routing parameter configuration based on an acquisition function and a prediction delay distribution output by the Gaussian process prior model, and performing next round training on the Gaussian process prior model based on the optimal routing parameter configuration, until the optimal line width and line spacing configuration are determined when the training reaches a maximum iteration number. The line width and line spacing of each signal line in the bus network are automatically optimized by the Gaussian process prior model, so as to realize the minimum maximum delay, and the efficiency and accuracy of the optimal line width and line spacing configuration of the bus network are improved.

[0035] In order to make the above objectives, characteristics and advantages of the present application more apparent, the following will describe a preferred embodiment in detail, and the accompanying drawings will be referred to, as follows. BRIEF DESCRIPTION OF DRAWINGS

[0036] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments, and it should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation to the scope, and for those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0037] Figure 1 A flow chart of a bus spacing determination method of a bus network provided by the embodiment of the present application;

[0038] Figure 2 A structural schematic diagram of a bus spacing determination device of a bus network provided by the embodiment of the present application;

[0039] Figure 3 A structural schematic diagram of a bus spacing determination device of a bus network provided by the embodiment of the present application;

[0040] Figure 4 A structural schematic diagram of an electronic device provided by the embodiment of the present application. DETAILED DESCRIPTION

[0041] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. Based on the embodiments of the present application, every other embodiment obtained by a person skilled in the art without creative work belongs to the scope of protection of the present application.

[0042] Firstly, the application scenarios applicable to the present application are introduced. The present application can be applied to the field of electronic design automation (EDA).

[0043] It is found through research that in the prior art, bus parameters are designed according to a simple model of delay, and iteration is not stopped. For example, the delay of each line is inversely proportional to its line width, and an increase in line spacing reduces the capacitance between the lines, thereby reducing the delay. However, after considering more cases, the problem becomes very complex, such as the effect of inductance between the lines, the inductance is related to the current flow direction of the line itself, and for two opposite lines, the reduction of spacing increases the capacitance and reduces the inductance, and it is difficult to determine whether the actual delay is increased or decreased. In addition, the bus width is a fixed value, and a reduction in the delay of one of the lines may result in an increase in the delay of the other lines. Therefore, how to provide the efficiency of determining the bus spacing of the bus network has become a technical problem that cannot be underestimated.

[0044] Based on this, the embodiments of the present application provide a bus spacing determination method for a bus network, which dynamically adjusts the bus spacing of the bus network through a Gaussian process prior model, thereby improving the efficiency and accuracy of the optimal line width and line spacing configuration of the bus network.

[0045] Reference is made to Figure 1 , Figure 1 A flowchart of a bus spacing determination method for a bus network provided by the embodiments of the present application is shown in FIG. 1. As shown in FIG. 1, the bus spacing determination method provided by the embodiments of the present application comprises the following steps. Figure 1

[0046] S101: Configure the initial routing parameters of each signal line in the bus network based on the preset bus width and DRC rules, and determine an initial sample point set; wherein the initial routing parameters include the line width of the signal line and the line spacing between the signal line and the previous signal line.

[0047] ​In the step, initial routing parameters of each signal line in the bus network are configured according to the preset bus width and DRC rules, and an initial sample point set is determined.

[0048] The initial routing parameters include line width of the signal line and line spacing between the signal line and a previous signal line.

[0049] Here, if there are n signal lines, a set of initial points {w[1] s[1] w[2] s[2]... w[n]} that satisfy the constraint conditions are randomly sampled in the variable space (where w represents line width and s represents line spacing), the sampling points ensure that ∑(w[i]+s[i]) = bus width, and the sampling satisfies the DRC rules, and a plurality of samples are obtained as the initial sample point set.

[0050] In a possible implementation, the initial routing parameters of each signal line in the bus network are combined based on the preset bus width and DRC rules to determine the initial sample point set, including:

[0051] The initial routing parameters of each signal line are configured based on random sampling under the condition that the line width and line spacing of each signal line are within the preset parameter value range and satisfy the bus width constraint, and a plurality of candidate routing parameter configurations are generated; whether each candidate routing parameter configuration meets the DRC rules is checked, and all candidate routing parameter configurations that meet the DRC rules are taken as the initial sample point set.

[0052] It should be noted that the constraint of the bus width is that the sum of all line widths and line spacings is equal to the total bus width. The DRC (design rule check) rule is that each line width must satisfy the minimum line width and maximum line width limit, and the line spacing satisfies the minimum line spacing limit.

[0053] In specific embodiments, the line width is randomly selected from the range [w_min, w_max], the line spacing is randomly selected from the range [s_min, s_max], the bus width of the candidate routing parameter configuration is checked to see whether it satisfies w1 + w2 + w3 + w4 + s1 + s2 + s3 ≤ 30μm, and the line width of the candidate routing parameter configuration is checked to see whether it is within the legal interval. If all conditions are met, the candidate routing parameter configuration is retained.

[0054] S102: The signal delay of each signal line of each candidate routing parameter configuration in the initial sample point set is processed in parallel, and the maximum delay value of each candidate routing parameter configuration is determined.

[0055] In this step, the signal delay of each signal line of each candidate routing parameter configuration in the initial sampling point set is simulated in parallel to determine the maximum delay value of each candidate routing parameter configuration.

[0056] Here, the signal delay of each signal line of each candidate routing parameter configuration can be determined according to a timing simulation tool.

[0057] In one possible implementation, the parallel simulation of the signal delay of each signal line of each candidate routing parameter configuration in the initial sampling point set to determine the maximum delay value of each candidate routing parameter configuration includes:

[0058] Each candidate routing parameter configuration is assigned to a corresponding processing process, and the processing process is controlled to monitor the running state of each subtask in real time, where the subtask is a simulation task for determining the signal delay of a signal line. If it is detected that the subtask ends abnormally, the processing process is controlled to automatically record abnormal information and resubmit the subtask according to the subtask identifier for simulation processing to determine the maximum delay value.

[0059] Here, each candidate routing parameter configuration is assigned to a corresponding processing process, and the processing process is controlled to monitor the running state of each subtask in real time. If it is detected that the subtask ends abnormally, the processing process is controlled to automatically record abnormal information and resubmit the subtask according to the subtask identifier for simulation processing, so as to improve the efficiency of the simulation task.

[0060] S103: Training a Gaussian process prior model based on each candidate routing parameter configuration and the corresponding maximum delay value, determining an optimal routing parameter configuration based on a collection function and a predicted delay distribution output by the Gaussian process prior model, and performing next-round training on the Gaussian process prior model based on the optimal routing parameter configuration until an optimal line width and line spacing configuration is determined when the training reaches a maximum iteration number.

[0061] In this step, the Gaussian process prior model is trained based on each candidate routing parameter configuration and the corresponding maximum delay value, the optimal routing parameter configuration is determined based on a collection function and a predicted delay distribution output by the Gaussian process prior model, and next-round training is performed on the Gaussian process prior model based on the optimal routing parameter configuration until an optimal line width and line spacing configuration is determined when the training reaches a maximum iteration number.

[0062] It should be noted that the "optimal line width and line spacing configuration" refers to a parameter combination of the width of the signal line and the spacing of the signal line that can best balance signal integrity (SI), power integrity (PI), electromagnetic compatibility (EMC) and manufacturing cost in the bus network design through an optimization algorithm.

[0063] It should be noted that the user can set the maximum number of iterations of the tuning or the target value of the tuning, and the iteration is automatically stopped when the maximum number or the target value is reached.

[0064] Here, the next round of training of the Gaussian process prior model is performed according to the optimal routing parameter configuration until the optimal line width and line spacing configuration is determined when the training reaches the maximum number of iterations, including: continuing to perform the next round of training of the Gaussian process prior model with the optimal routing parameter configuration and the corresponding actual maximum delay value, repeating the above steps until the optimal line width and line spacing configuration is determined when the training reaches the maximum number of iterations.

[0065] In one possible implementation, the training of the Gaussian process prior model based on each set of candidate routing parameter configuration and the corresponding maximum delay value includes:

[0066] (1) : Using a square exponential kernel function as a covariance function, each set of candidate routing parameter configuration is taken as input information of the Gaussian process prior model, and the maximum delay value is taken as an output target of the Gaussian process prior model.

[0067] Here, each set of candidate routing parameter configuration is taken as an input vector X of the Gaussian process prior model, and the output target of the Gaussian process prior model is the maximum delay value y = max(delay(O[i])), delay( ) is a delay value calculation formula, and O[i] represents the line width and line spacing configuration of the i-th signal line. Since the delay is usually related to the line width and the line spacing, y can be considered as a function of x: wherein is the observation noise. A Gaussian process prior is placed for the function f(x) :

[0068]

[0069] wherein m(x) is a prior mean function, gp ( ) is a Gaussian process prior function, and the covariance function k(x, x') uses a square exponential kernel. The square exponential kernel is:

[0070]

[0071] wherein x is a candidate routing parameter configuration, is another candidate routing parameter configuration, 2 n -1 is the dimension of the candidate routing parameter configuration, is the i-th parameter information in the candidate routing parameter configuration x, i is the i-th parameter information in the candidate routing parameter configuration x, i is the i-th parameter information in the candidate routing parameter configuration x, are hyperparameters.

[0072] (2) controlling the Gaussian process prior model to learn the distribution relationship between each group of candidate routing parameter configurations and the corresponding maximum delay values; and optimizing the hyperparameters in the square exponential kernel function and the noise variance based on the maximization of the marginal likelihood to realize the training of the Gaussian process prior model.

[0073] wherein the process of optimizing the hyperparameters in the square exponential kernel function and the noise variance based on the maximization of the marginal likelihood is:

[0074] wherein K is a covariance matrix calculated by the covariance function on all groups of inputs x, I is an identity matrix, and n is the dimension, is the noise variance.

[0075] In a possible implementation, the predicted delay distribution is determined by:

[0076] determining a first covariance matrix between the new routing parameter configuration and the existing candidate routing parameter configurations; and calculating the prediction mean and variance based on the first covariance matrix, the covariance matrix between the existing candidate routing parameter configurations, and the maximum delay values between the new routing parameter configurations to determine the predicted delay distribution of the new routing parameter configuration.

[0077] Here, the predicted delay distribution is determined by the following formula:

[0078]

[0079]

[0080] wherein is a new routing parameter configuration, y is the corresponding maximum delay of the predicted new routing parameter configuration, X is a vector composed of multiple candidate routing parameter configurations, is the first covariance matrix, k is a covariance function, is the i-th parameter information in the candidate routing parameter configuration x,​​​​ posterior mean of the true delay at f posterior variance of the true delay at is a normal distribution. posterior mean of the true delay at f posterior variance of the true delay at N is a normal distribution.

[0081] In one possible implementation, the predicted delay distribution outputted by the acquisition function and the Gaussian process prior model determines the optimal routing parameter configuration, comprising:

[0082] A: searching for a line width and space configuration parameter with the maximum expected improvement value in the whole line width and space configuration space based on the probability information of the maximum delay value provided on the predicted delay distribution by using the acquisition function.

[0083] Here, a line width and space configuration parameter with the maximum expected improvement value in the whole line width and space configuration space is searched based on the probability information of the maximum delay value provided on the predicted delay distribution by using the acquisition function.

[0084] wherein the acquisition function is an EI acquisition function.

[0085] Here, the formal definition of the EI function is: . is the currently known best observation (the smallest maximum delay among all sampled configurations). is the true function value at some new bus configuration. denotes the improvement at point . If the delay of the new point is worse than the current best , the improvement is 0; otherwise, the improvement is . Since is a random variable (following the distribution given by the GP), the improvement is also the mean of a random variable.

[0086] B: detecting whether the line width and space configuration parameter satisfies the bus width and the DRC rule; if yes, taking the line width and space configuration parameter as the optimal routing parameter configuration, and if not, continuing to search in the whole line width and space configuration space.

[0087] Here, whether the line width and space configuration parameter satisfies the bus width and the DRC rule is detected; if yes, taking the line width and space configuration parameter as the optimal routing parameter configuration, and if not, continuing to search in the whole line width and space configuration space.

[0088] ​​In one possible implementation, after the Gaussian process prior model is trained based on each set of candidate routing parameter configuration and corresponding maximum delay value, the bus pitch determination method further includes: storing product information obtained in each training process of the Gaussian process prior model.

[0089] In a specific embodiment, step one initializes sampling: 10 sets of line width and pitch combinations are randomly generated as initial sampling points within the range satisfying the constraint condition; the group configuration consists of the line width of 8 wires and 7 pitches, forming a 15-dimensional input vector. Step two calculates delay by simulation:

[0090] The above input information is submitted to a simulation process (such as static timing analysis using `Primetime`), the delay value of each signal line is extracted for each configuration, the maximum wire delay under each configuration is calculated as the objective function value, and all input configurations and output values are collected as the initial training set. Step three trains the Gaussian process prior model: a Gaussian process prior model based on the square exponential kernel function is trained, the model input is a 15-dimensional configuration vector, and the output is the maximum wire delay; the hyperparameters (such as length scale, signal variance, and noise variance) of the model are optimized by maximizing the marginal likelihood function; a proxy model is obtained for predicting the maximum delay and its uncertainty under any configuration. Step four selects a new sampling point according to the acquisition function: for each candidate configuration in the search space, calculate its EI value, select the configuration with the maximum EI value as the next sampling point, perform DRC check on the next sampling point to ensure that it meets the manufacturing process limit, generate the corresponding simulation input file, and submit the simulation task. Step five iteratively optimizes and updates the model: add the simulation result of the new configuration to the training set, update the Gaussian process model, repeat steps four and five until any of the following termination conditions are met: output the optimal configuration, i.e., the corresponding line width and pitch allocation; output the corresponding maximum wire delay value, output the complete simulation input file, log file, and visualization chart for user to view the optimization process and results.

[0091] In this application, the delay and configuration of the bus are regarded as a Gaussian process model, the probability distribution is calculated for each sample, a new configuration is sampled based on this distribution, and a better bus delay is expected. The new sample is used as posterior knowledge to update the model after the delay is calculated by the actual timing tool, and the posterior probability distribution is obtained to guide the next sampling to obtain more accurate and optimal line width and pitch configuration.

[0092] The bus pitch determination method provided by the embodiment of the application comprises: configuring initial routing parameters of each signal line in a bus network based on a preset bus width and a DRC rule, and determining an initial sample point set; wherein the initial routing parameters comprise a line width of the signal line and a line spacing between the signal line and a previous signal line; performing parallel simulation processing on signal delays of each signal line configured by each set of candidate routing parameters in the initial sample point set, and determining a maximum delay value of each set of candidate routing parameters; training a Gaussian process prior model based on each set of candidate routing parameters and the corresponding maximum delay value, determining an optimal routing parameter configuration based on an acquisition function and a predicted delay distribution output by the Gaussian process prior model, and performing next-round training on the Gaussian process prior model based on the optimal routing parameter configuration, until an optimal line width and line spacing configuration is determined when the training reaches a maximum iteration number. The line width and line spacing of each signal line in the bus network are automatically optimized by the Gaussian process prior model, so as to achieve the goal of minimizing the maximum delay, and the efficiency and accuracy of the optimal line width and line spacing configuration of the bus network are improved.

[0093] Please refer to Figure 2 、 Figure 3 , Figure 2 Figure 1 is a structural schematic diagram of a bus pitch determination device for a bus network provided by an embodiment of the application; Figure 3 Figure 2 is another structural schematic diagram of a bus pitch determination device for a bus network provided by an embodiment of the application. As shown in Figure 2, the bus pitch determination device 200 for the bus network comprises: Figure 2

[0094] The parameter configuration module 210 is configured to configure initial routing parameters of each signal line in a bus network based on a preset bus width and a DRC rule, and determine an initial sample point set; wherein the initial routing parameters comprise a line width of the signal line and a line spacing between the signal line and a previous signal line.

[0095] The delay calculation module 220 is configured to perform parallel simulation processing on signal delays of each signal line configured by each set of candidate routing parameters in the initial sample point set, and determine a maximum delay value of each set of candidate routing parameters.

[0096] The processing module 230 is configured to train a Gaussian process prior model based on each set of candidate routing parameters and the corresponding maximum delay value, determine an optimal routing parameter configuration based on an acquisition function and a predicted delay distribution output by the Gaussian process prior model, and perform next-round training on the Gaussian process prior model based on the optimal routing parameter configuration, until an optimal line width and line spacing configuration is determined when the training reaches a maximum iteration number. ​

[0097] Further, the parameter configuration module 210 is configured to combine the initial routing parameters of each signal line in the bus network based on the preset bus width and the DRC rules to determine an initial sample point set:

[0098] The initial routing parameters of each signal line are configured based on random sampling under the condition that the line width and the line spacing of each signal line are within the preset parameter value range and the bus width constraint is met, and a plurality of candidate routing parameter configurations are generated.

[0099] It is checked whether each candidate routing parameter configuration meets the DRC rules, and all candidate routing parameter configurations meeting the DRC rules are taken as the initial sample point set.

[0100] Further, the processing module 230 is configured to train a Gaussian process prior model based on each group of candidate routing parameter configurations and the corresponding maximum delay value:

[0101] A square exponential kernel function is used as a covariance function, each group of candidate routing parameter configurations is taken as input information of the Gaussian process prior model, and the maximum delay value is taken as an output target of the Gaussian process prior model.

[0102] The Gaussian process prior model is controlled to learn the distribution relationship between each group of candidate routing parameter configurations and the corresponding maximum delay value.

[0103] The hyperparameters in the square exponential kernel function and the noise variance are optimized based on maximum marginal likelihood to realize training of the Gaussian process prior model.

[0104] Further, the processing module 230 determines the predicted delay distribution in the following manner:

[0105] A first covariance matrix between the new routing parameter configuration and the existing candidate routing parameter configuration is determined.

[0106] The calculation of the predicted mean and the variance is performed based on the first covariance matrix, the covariance matrix between the existing candidate routing parameter configurations, and the maximum delay value between the new routing parameter configurations, and the predicted delay distribution of the new routing parameter configuration is determined.

[0107] Further, the processing module 230 is configured to determine an optimal routing parameter configuration based on the acquisition function and the predicted delay distribution output by the Gaussian process prior model:

[0108] The probability information of the maximum delay value provided on the predicted delay distribution is used to search for a line width and line spacing configuration parameter with the maximum improvement expectation value in the entire line width and line spacing configuration space based on the acquisition function.

[0109] detecting whether the configuration parameters of the line width and line spacing meet the bus width and the DRC rule;

[0110] if yes, configuring the configuration parameters of the line width and line spacing as the optimal routing parameters, and if no, continuing searching in the whole configuration space of the line width and line spacing.

[0111] Further, the delay calculation module 220 is configured to perform parallel simulation processing on the signal delay of each signal line of each group of candidate routing parameter configurations in the initial sample point set, and determine the maximum delay value of each group of candidate routing parameter configurations.

[0112] Each group of candidate routing parameter configurations is assigned to a corresponding processing process, and the processing process is controlled to listen to the running state of each subtask in real time, wherein the subtask is a simulation task for determining the signal delay of a signal line.

[0113] If it is detected that the subtask ends abnormally, the processing process is controlled to automatically record abnormal information, and according to the subtask identifier, the subtask is resubmitted for simulation processing to determine the maximum delay value.

[0114] Further, as shown in Figure 3 The bus network bus spacing determination apparatus 200 further includes a data storage module 240, which is configured to:

[0115] store the product information obtained in each training process of the Gaussian process prior model.

[0116] The bus pitch determination apparatus of the bus network provided in the embodiment of the present application comprises: a parameter configuration module, configured to configure initial routing parameters of each signal line in the bus network based on a preset bus width and a DRC rule, and determine an initial sample point set; wherein the initial routing parameters comprise a line width of the signal line and a line spacing between the signal line and a previous signal line; a delay calculation module, configured to perform parallel simulation processing on signal delays of signal lines configured with each set of candidate routing parameters in the initial sample point set, and determine a maximum delay value of each set of candidate routing parameters; and a processing module, configured to train a Gaussian process prior model based on each set of candidate routing parameters and the corresponding maximum delay value, determine an optimal routing parameter configuration based on an acquisition function and a predicted delay distribution output by the Gaussian process prior model, and perform next-round training on the Gaussian process prior model based on the optimal routing parameter configuration until an optimal line width and line spacing configuration is determined when the training reaches a maximum iteration number. The line width and line spacing of each signal line in the bus network are automatically optimized by the Gaussian process prior model, so as to achieve the goal of minimizing the maximum delay, and the efficiency and accuracy of the optimal line width and line spacing configuration of the bus network are improved.

[0117] Please refer to Figure 4 , Figure 4 A structural schematic diagram of an electronic device provided in the embodiment of the present application is shown in FIG. 4. Figure 4 As shown in FIG. 4, the electronic device 400 comprises a processor 410, a memory 420 and a bus 430.

[0118] The memory 420 stores machine readable instructions executable by the processor 410, and the processor 410 and the memory 420 communicate with each other through the bus 430 when the electronic device 400 is running. When the machine readable instructions are executed by the processor 410, the steps of the bus pitch determination method of the bus network in the method embodiment shown in FIG. 3 can be performed. For specific implementation manners, refer to the method embodiment, which will not be described here. Figure 1 As shown in FIG. 3, the bus pitch determination method of the bus network comprises the following steps.

[0119] The embodiment of the present application further provides a computer readable storage medium, which stores a computer program. When the computer program is run by a processor, the steps of the bus pitch determination method of the bus network in the method embodiment shown in FIG. 3 can be performed. For specific implementation manners, refer to the method embodiment, which will not be described here. Figure 1 As shown in FIG. 3, the bus pitch determination method of the bus network comprises the following steps.

[0120] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the system, device and unit described above can refer to the corresponding process in the foregoing method embodiment, which will not be described here.

[0121] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other manners. The described device embodiments are merely schematic, for example, the division of the units is only a logical function division, and there can be another division manner in actual implementation, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the displayed or discussed mutual couplings or direct couplings or communication connections between different units, or the among different units, can be indirect couplings or communication connections through some interfaces, devices or units, and can be in electrical, mechanical or other forms.

[0122] The units described as separated components can or can not be physically separated, and the components displayed as units can or can not be physical units, i.e., can be located in one place, or can be distributed on a plurality of network units. In actual implementation, some or all of the units can be selected according to actual needs to achieve the purposes of the embodiments of the present application.

[0123] In addition, each functional unit in the embodiments of the present application can be integrated in one processing unit, or each unit can exist physically as a separate unit, or two or more units can be integrated in one unit.

[0124] If the functions are implemented in the form of software function units and sold or used as independent products, they can be stored in a non-volatile computer readable storage medium executable by a processor. Based on this understanding, the technical solutions of the present application essentially or the part that contributes to the prior art or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods described in the embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0125] Finally, it should be noted that the above-described embodiments are merely specific embodiments of the present application, which are used to illustrate the technical solutions of the present application, but not to limit the same. The protection scope of the present application is not limited thereto. Although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that any skilled person in the art can still modify or easily think of changes to the technical solutions recorded in the foregoing embodiments, or make equivalent replacements to some of the technical features, within the technical scope disclosed by the present application. The modifications, changes or replacements do not make the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A method for determining the bus spacing of a bus network, characterized in that, The method for determining the bus spacing includes: Based on the preset bus width and DRC rules, the initial routing parameters of each signal line in the bus network are configured to determine the initial sampling point set; wherein, the initial routing parameters include the line width of the signal line and the line spacing between it and the previous signal line; Parallel simulation processing is performed on the signal delay of each signal line in each set of candidate routing parameters in the initial sampling point set to determine the maximum delay value of each set of candidate routing parameters. The Gaussian process prior model is trained based on each set of candidate routing parameter configurations and the corresponding maximum delay value. The optimal routing parameter configuration is determined based on the acquisition function and the predicted delay distribution output by the Gaussian process prior model. The Gaussian process prior model is then trained again based on the optimal routing parameter configuration until the training reaches the maximum number of iterations, at which point the optimal line width and line spacing configuration is determined. The optimal wiring parameter configuration is determined based on the acquisition function and the predicted delay distribution output by the Gaussian process prior model, including: Based on the probability information of the maximum delay value provided by the predicted delay distribution, a line width and line spacing configuration parameter with the maximum expected improvement value is searched in the entire line width and line spacing configuration space using an acquisition function. Check whether the configuration parameters of the line width and line spacing meet the requirements of the bus width and the DRC rules; If so, the configuration parameters of the line width and line spacing are configured as the optimal routing parameters; otherwise, the search continues in the entire configuration space of line width and line spacing.

2. The method for determining bus spacing according to claim 1, characterized in that, The initial routing parameters for each signal line in the bus network are configured based on a preset bus width and DRC rules to determine the initial set of sampling points, including: While ensuring that the line width and line spacing of each signal line are within the range of preset parameters and satisfy the bus width constraint, the initial routing parameters of each signal line are configured based on random sampling to generate multiple candidate routing parameter configurations. Check whether each candidate routing parameter configuration conforms to the DRC rule, and use all candidate routing parameter configurations that conform to the DRC rule as the initial sampling point set.

3. The method for determining bus spacing according to claim 1, characterized in that, The training of the Gaussian process prior model based on each set of candidate wiring parameter configurations and the corresponding maximum delay value includes: The quadratic exponential kernel function is used as the covariance function, and each set of candidate wiring parameters is configured as the input information of the Gaussian process prior model. The maximum delay value is used as the output target of the Gaussian process prior model. The Gaussian process prior model is controlled to learn the distribution relationship between each set of candidate routing parameter configurations and the corresponding maximum delay values. The hyperparameters and noise variance in the quadratic exponential kernel function are optimized by maximizing marginal likelihood in order to train the Gaussian process prior model.

4. The method for determining bus spacing according to claim 1, characterized in that, The predicted delay distribution is determined in the following way: Determine the first covariance matrix between the new routing parameter configuration and the existing candidate routing parameter configurations; Based on the first covariance matrix, the covariance matrix between the existing candidate routing parameter configurations, and the maximum delay value between the new routing parameter configurations, the predicted mean and variance are calculated to determine the predicted delay distribution of the new routing parameter configuration.

5. The method for determining bus spacing according to claim 1, characterized in that, The parallel simulation processing of the signal delay of each signal line for each set of candidate routing parameters in the initial sampling point set, to determine the maximum delay value for each set of candidate routing parameters, includes: Each set of candidate wiring parameters is configured and assigned to the corresponding processing process, and the processing process is controlled to monitor the running status of each subtask in real time; wherein, the subtask is a simulation task to determine the signal delay of the signal line. If an abnormal termination of a subtask is detected, the processing process is controlled to automatically record the abnormal information and resubmit the subtask according to the subtask identifier for simulation processing to determine the maximum delay value.

6. The method for determining bus spacing according to claim 1, characterized in that, After training the Gaussian process prior model based on each set of candidate routing parameter configurations and the corresponding maximum delay value, the bus spacing determination method further includes: The product information obtained during each training process of the Gaussian process prior model will be stored.

7. A bus spacing determination device for a bus network, characterized in that, The bus spacing determination device includes: The parameter configuration module is used to configure the initial routing parameters of each signal line in the bus network based on the preset bus width and DRC rules, and to determine the initial sampling point set; wherein, the initial routing parameters include the line width of the signal line and the line spacing between it and the previous signal line; The delay calculation module is used to perform parallel simulation processing on the signal delay of each signal line of each group of candidate wiring parameter configurations in the initial sampling point set, and determine the maximum delay value of each group of candidate wiring parameter configurations. The processing module is used to train the Gaussian process prior model based on each set of candidate routing parameter configurations and the corresponding maximum delay value, determine the optimal routing parameter configuration based on the acquisition function and the predicted delay distribution output by the Gaussian process prior model, and perform the next round of training on the Gaussian process prior model based on the optimal routing parameter configuration until the training reaches the maximum number of iterations and the optimal line width and line spacing configuration is determined. The processing module is used to determine the optimal wiring parameter configuration based on the acquisition function and the predicted delay distribution output by the Gaussian process prior model. Based on the probability information of the maximum delay value provided by the predicted delay distribution, a line width and line spacing configuration parameter with the maximum expected improvement value is searched in the entire line width and line spacing configuration space using an acquisition function. Check whether the configuration parameters of the line width and line spacing meet the requirements of the bus width and the DRC rules; If so, the configuration parameters of the line width and line spacing are configured as the optimal routing parameters; otherwise, the search continues in the entire configuration space of line width and line spacing.

8. An electronic device, characterized in that, include: The device includes a processor, a memory, and a bus. The memory stores machine-readable instructions executable by the processor. When the electronic device is running, the processor communicates with the memory via the bus. The machine-readable instructions are executed by the processor to perform the steps of the bus spacing determination method for the bus network as described in any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, performs the steps of the bus spacing determination method for a bus network as described in any one of claims 1 to 6.

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