Cholesteric LCD multi-gray scale display method and system

Abstract

The application discloses a kind of cholesteric LCD multi-gray scale display method and system, comprising: each physical pixel in cholesteric LCD is decomposed into a plurality of sub-pixels independently addressable, and x gray scale voltages are allocated to each sub-pixel, wherein x≥1;Control all the sub-pixels in cholesteric LCD enter P state;The corresponding RGB pixel data and target gray level n of the image to be displayed are obtained, the RGB pixel data is mapped to the corresponding target gray level n according to the pre-stored gray scale division strategy, to obtain the gray scale data corresponding to the RGB pixel data;Cholesteric LCD control signal is generated based on gray scale data, to control the gray scale state of each sub-pixel, while obtaining field synchronization signal, and according to field synchronization signal, PWM signal is generated, to control the power supply circuit in cholesteric LCD output gray scale voltage matched with the gray scale data, realize the multi-gray scale display of cholesteric LCD.The method and system of the application significantly improve the gray scale level under the condition of limited driving voltage.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a cholesteric LCD multi-gray scale display method and system. BACKGROUND

[0002] Cholesteric liquid crystal is widely used in electronic paper display due to its bistable characteristics. In the existing driving scheme, the panel is charged and discharged by alternately applying different voltage sequences to control the switching of liquid crystal molecules between H state (vertical alignment state), P state (planar state) or FC state (focal conic state). The traditional driving scheme controls the gray scale by a single voltage, which is limited by the response characteristics of the liquid crystal molecules. The actual achievable gray scale level is usually not more than 2 levels. The existing technology attempts to increase the number of voltage levels to improve the gray scale, but this will result in a dramatic increase in the complexity of the driving circuit and a decrease in the response speed. Therefore, how to realize high gray scale display under limited voltage levels has become a technical bottleneck in the industry. SUMMARY

[0003] To solve the technical problems in the background art, the present application provides a cholesteric LCD multi-gray scale display method and system.

[0004] The cholesteric LCD multi-gray scale display method provided by the present application comprises:

[0005] Each physical pixel in the cholesteric LCD is divided into a plurality of independently addressable sub-pixels, and each sub-pixel is assigned x gray scale voltages, wherein x≥1;

[0006] Control all sub-pixels in the cholesteric LCD to enter the P state;

[0007] Obtain the RGB pixel data corresponding to the image to be displayed and the target gray scale level n, map the RGB pixel data to the corresponding target gray scale level n according to the pre-stored gray scale division strategy, to obtain the gray scale data corresponding to the RGB pixel data;

[0008] Generate a control signal for the cholesteric LCD based on the gray scale data to control the gray scale state of each sub-pixel, simultaneously obtain a field synchronization signal, and generate a PWM signal based on the field synchronization signal to control the power supply circuit in the cholesteric LCD to output a gray scale voltage matching the gray scale data, thereby realizing multi-gray scale display of the cholesteric LCD.

[0009] Preferably, the control of all sub-pixels in the cholesteric LCD to enter the P state specifically comprises:

[0010] After driving the cholesteric LCD into the H state by outputting the maximum driving voltage, the driving voltage is lowered to 0 to make all sub-pixels in the cholesteric LCD enter the P state.

[0011] Preferably, the pre-stored gray scale division strategy specifically comprises:

[0012] Divide the RGB value of 0-255 into n gray scale intervals according to the target gray scale level n, wherein n≥2.

[0013] Preferably, the mapping of the RGB pixel data to the corresponding target gray scale level n to obtain the gray scale data corresponding to the RGB pixel data specifically comprises:

[0014] Comparing each RGB value in the RGB pixel data with the n gray scale intervals corresponding to the target gray scale level n one by one;

[0015] Determining the gray scale interval to which each RGB value in the RGB pixel data belongs to obtain the corresponding gray scale data, wherein the gray scale data contains the gray scale interval corresponding to each RGB value in the RGB pixel data.

[0016] Preferably, when outputting the gray scale voltage corresponding to the i-th gray scale interval, the control signal corresponding to the sub-pixel matched with the gray scale interval is configured as high level, and the duration T of the gray scale voltage is configured, and the corresponding PWM signal is generated in combination with the field synchronization signal to control the power supply circuit to continuously output the gray scale voltage within the time T of scanning all the pixel points, wherein the duration T is the time of scanning all the pixel points on the screen from left to right and from top to bottom.

[0017] And the process is iterated through all the gray scale intervals to complete the generation of the control signal and the PWM signal corresponding to the cholesteric LCD.

[0018] Preferably, it further comprises:

[0019] According to the number of sub-pixels decomposed from each physical pixel and the target gray scale level n, the gray scale voltage allocated to each sub-pixel is determined.

[0020] Preferably, when the target gray scale level n=8, the n gray scale intervals are: RGB<32 is the first gray scale interval, 32≤RGB<64 is the second gray scale interval, 64≤RGB<96 is the third gray scale interval, 96≤RGB<128 is the fourth gray scale interval, 128≤RGB<160 is the fifth gray scale interval, 160≤RGB<192 is the sixth gray scale interval, 192≤RGB<224 is the seventh gray scale interval, and 224≤RGB<256 is the eighth gray scale interval.

[0021] Preferably, when the control signal is high level, the current gray scale voltage is applied to the corresponding pixel; and when the control signal is low level, the state at the last moment is maintained.

[0022] The cholesteric LCD multi-gray scale display system provided by the application comprises:

[0023] a pixel resolution module, configured to resolve each physical pixel in the cholesteric LCD into a plurality of independently addressable sub-pixels, and assign x gray scale voltages to each sub-pixel, wherein x is greater than or equal to 1;

[0024] a control module, configured to control all sub-pixels in the cholesteric LCD to enter a P state;

[0025] a first processing module, configured to obtain RGB pixel data corresponding to an image to be displayed and a target gray scale level n, and map the RGB pixel data to the target gray scale level n according to a pre-stored gray scale division strategy to obtain gray scale data corresponding to the RGB pixel data;

[0026] a signal generation module, configured to generate a control signal of the cholesteric LCD based on the gray scale data to control gray scale states of the sub-pixels, obtain a field synchronization signal, and generate a PWM signal according to the field synchronization signal to control a power supply circuit in the cholesteric LCD to output a gray scale voltage matching the gray scale data, thereby realizing multi-gray scale display of the cholesteric LCD.

[0027] Preferably, the system further comprises a second processing module, configured to determine the gray scale voltage assigned to each sub-pixel according to a number of sub-pixels resolved from each physical pixel and the target gray scale level n.

[0028] In the present application, the proposed cholesteric LCD multi-gray scale display method and system significantly improve the gray scale level under the condition of limited driving voltage by resolving the pixels into a plurality of sub-pixels or increasing the number of gray scale voltages, and by simultaneously implementing sub-pixel partition collaborative driving and dynamic gray scale mapping. The stability and accuracy of multi-gray scale display are ensured by combining the timing synchronization of the PWM signal, thereby improving the level of detail and clarity of image display. Taking a three-sub-pixel double-voltage configuration as an example, a maximum of 27 gray scale display can be realized, thereby overcoming the cost and power consumption problems caused by the need to increase voltage grading in the traditional scheme. BRIEF DESCRIPTION OF DRAWINGS

[0029] Figure 1 a working flow diagram of a cholesteric LCD multi-gray scale display method proposed in the present application;

[0030] Figure 2 a voltage output structure diagram of driving control signals corresponding to different gray scales of a cholesteric LCD multi-gray scale display method proposed in the present application;

[0031] Figure 3 a driving control signal timing diagram of embodiment 1 of a cholesteric LCD multi-gray scale display method proposed in the present application;

[0032] Figure 4A physical pixel division schematic diagram of embodiment 2 of a cholesteric LCD multi-gray scale display method according to the present application;

[0033] Figure 5 A driving control signal timing diagram of embodiment 2 of a cholesteric LCD multi-gray scale display method according to the present application;

[0034] Figure 6 A system architecture schematic diagram of a cholesteric LCD multi-gray scale display system according to the present application. DETAILED DESCRIPTION

[0035] Reference Figures 1-6 The cholesteric LCD multi-gray scale display method according to the present application comprises the following steps:

[0036] S1, decompose each physical pixel in the cholesteric LCD into a plurality of independently addressable sub-pixels, and assign x gray scale voltages to each sub-pixel, wherein x≥1.

[0037] S2, control all sub-pixels in the cholesteric LCD to enter the P state.

[0038] In this embodiment, step S2 specifically comprises: after driving the cholesteric LCD into the H state by outputting the maximum driving voltage, then lowering the driving voltage to 0 to make all sub-pixels in the cholesteric LCD enter the P state.

[0039] S3, obtain the RGB pixel data corresponding to the image to be displayed and the target gray scale level n, and map the RGB pixel data to the corresponding target gray scale level n according to the pre-stored gray scale division strategy to obtain the gray scale data corresponding to the RGB pixel data.

[0040] In this embodiment, the pre-stored gray scale division strategy specifically comprises:

[0041] Divide the RGB values of 0-255 into n gray scale intervals according to the target gray scale level n, wherein n≥2.

[0042] In this embodiment, mapping the RGB pixel data to the corresponding target gray scale level n to obtain the gray scale data corresponding to the RGB pixel data specifically comprises:

[0043] Comparing each RGB value in the RGB pixel data with the n gray scale intervals corresponding to the target gray scale level n one by one;

[0044] Determine the gray scale interval to which each RGB value in the RGB pixel data belongs to obtain the corresponding gray scale data, and the gray scale data contains the gray scale interval corresponding to each RGB value in the RGB pixel data.

[0045] As Figure 2As shown, the image display timing is to output the maximum voltage first, so that the liquid crystal is in the H state, and then the voltage is quickly reduced, the H state liquid crystal enters the P state, and after entering the P state, different voltages are output to obtain different reflectivities, that is, different voltages are output after entering the P state to complete multi-gray scale display. Because the liquid crystal is totally reflected after entering the P state, it can be used as a gray scale, so n-1 gray scale voltages are needed when displaying n gray scales.

[0046] S4, generating a control signal of the cholesteric LCD based on the gray scale data to control the gray scale state of each sub-pixel, simultaneously acquiring a field synchronization signal, and generating a PWM signal according to the field synchronization signal to control the power supply circuit in the cholesteric LCD to output a gray scale voltage matching the gray scale data, thereby realizing multi-gray scale display of the cholesteric LCD.

[0047] In the embodiment, when the gray scale voltage corresponding to the i-th gray scale interval is output, the control signal corresponding to the sub-pixel matching the gray scale interval is configured as high level, and the duration T of the gray scale voltage is configured, and the corresponding PWM signal is generated in combination with the field synchronization signal to control the power supply circuit to continuously output the gray scale voltage within the time T of scanning all the pixel points, wherein the duration T is the time of scanning all the pixel points on the screen from left to right and from top to bottom.

[0048] And the process is iterated for all gray scale intervals to complete the generation of the control signal and the PWM signal of the cholesteric LCD.

[0049] Specifically, when the control signal is high level, the current gray scale voltage is applied to the corresponding pixel; and when the control signal is low level, the state at the previous moment is maintained.

[0050] In the embodiment, the method further comprises:

[0051] The value of the gray scale voltage allocated to each sub-pixel is determined according to the number of sub-pixels decomposed from each physical pixel and the target gray scale level n.

[0052] Specifically, when the sub-pixel is in the P state, it can be used as a gray scale state, and after adding x gray scale voltages, the sub-pixel has 1+x gray scales.

[0053] Specifically, the target gray scale level n is the product of the number of gray scale voltages corresponding to each sub-pixel plus one. For example, the number of sub-pixels is 3 (a\b\c), a corresponds to three gray scale voltages, b corresponds to two gray scale voltages, and c corresponds to one gray scale voltage, and the total number of gray scales is ;

[0054] Specifically, when the target gray scale level n = 8, the n gray scale intervals are: RGB < 32 is the 1st gray scale interval, 32≤RGB<64 is the 2nd gray scale interval, 64≤RGB<96 is the 3rd gray scale interval, 96≤RGB<128 is the 4th gray scale interval, 128≤RGB<160 is the 5th gray scale interval, 160≤RGB<192 is the 6th gray scale interval, 192≤RGB<224 is the 7th gray scale interval, and 224≤RGB<256 is the 8th gray scale interval.

[0055] Embodiment 1:

[0056] Suppose the number of gray scales n to be displayed is 8, the corresponding gray scale intervals are specifically:

[0057] RGB < 32 is gray scale 1; 32≤RGB<64 is gray scale 2, 64≤RGB<96 is gray scale 3, 96≤RGB<128 is gray scale 4, 128≤RGB<160 is gray scale 5, 160≤RGB<192 is gray scale 6, 192≤RGB<224 is gray scale 7, and 224≤RGB<256 is gray scale 8.

[0058] For a cholesteric LCD display screen, if the control signal is high, the corresponding pixel is applied with the current gray scale voltage, and if the control signal is low, the corresponding pixel maintains the state at the previous moment.

[0059] As shown in FIG. 1, when the voltage output of the driving control signal is the gray scale 1 voltage, the pixel point gray scale data of the RGB data less than 32 is output as high, and the rest of the pixel points are all low; similarly, when the voltage output of the driving control signal is the gray scale 7 voltage, the pixel point gray scale data of the RGB data greater than or equal to 192 and less than 224 is output as high, and the rest of the pixel points are all low. Figure 3 Embodiment 2:

[0060] Each physical pixel in the cholesteric LCD is composed of three sub-pixels, as shown in FIG. 2, when the gray scale voltage corresponding to the sub-pixel A is two voltages, and the gray scale voltage corresponding to the sub-pixels B and C is one voltage, 12 gray scale display can be realized; when the gray scale voltage corresponding to the sub-pixels A and B is two voltages, and the gray scale voltage corresponding to the sub-pixel C is one voltage, 18 gray scale display can be realized; when the gray scale voltage corresponding to the sub-pixels A, B and C are all two voltages, 27 gray scale display can be realized.

[0061] Figure 4 Taking 12 gray scale display as an example, the gray scale division and the corresponding gray scale coding are shown in the following table. The gray scale coding XXX corresponds to the sub-pixels A, B and C from left to right; 100 means that the sub-pixel A is black, and the sub-pixels B and C are white.

[0062] Taking 12 gray scale display as an example, the gray scale division and the corresponding gray scale coding are shown in the following table. The gray scale coding XXX corresponds to the sub-pixels A, B and C from left to right; 100 means that the sub-pixel A is black, and the sub-pixels B and C are white.

[0063] ​

[0064] Taking red data as an example, the timing circuit thereof is as shown in Figure 5 Fig. 1, and the same applies to the other two colors. The number of gray scale voltages can be increased to obtain more gray scales, or the number of sub-pixels can be increased to obtain more gray scales.

[0065] With reference to Figures 1-6 The present application provides a cholesteric LCD multi-gray scale display system, comprising:

[0066] a pixel decomposition module, configured to decompose each physical pixel in the cholesteric LCD into a plurality of independently addressable sub-pixels, and assign x gray scale voltages to each sub-pixel, wherein x≥1;

[0067] a control module, configured to control all the sub-pixels in the cholesteric LCD to enter a P state;

[0068] a first processing module, configured to obtain RGB pixel data corresponding to an image to be displayed and a target gray scale level n, map the RGB pixel data to the corresponding target gray scale level n according to a pre-stored gray scale division strategy, and obtain gray scale data corresponding to the RGB pixel data;

[0069] a signal generation module, configured to generate a control signal of the cholesteric LCD based on the gray scale data, to control the gray scale state of each sub-pixel, obtain a field synchronization signal, and generate a PWM signal according to the field synchronization signal, to control a power supply circuit in the cholesteric LCD to output a gray scale voltage matching the gray scale data, and realize multi-gray scale display of the cholesteric LCD.

[0070] In this embodiment, the second processing module is further configured to determine the gray scale voltage assigned to each sub-pixel according to the number of sub-pixels decomposed from each physical pixel and the target gray scale level n.

[0071] The above merely describes the preferred embodiments of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can make equivalent substitutions or changes to the technical solutions and the inventive concept of the present application within the technical scope disclosed by the present application, which should be covered within the protection scope of the present application.

Claims

1. A method for multilevel gray scale display of a cholesteric LCD, characterized by, The method comprises the following steps: decompose each physical pixel in the cholesteric LCD into a plurality of independently addressable sub-pixels, and assign x gray scale voltages to each sub-pixel, wherein x≥1; control all sub-pixels in the cholesteric LCD to enter a P state; obtain RGB pixel data corresponding to an image to be displayed and a target gray scale level n, map the RGB pixel data to the target gray scale level n according to a pre-stored gray scale division strategy to obtain gray scale data corresponding to the RGB pixel data; generate a control signal of the cholesteric LCD based on the gray scale data to control the gray scale state of each sub-pixel, simultaneously obtain a field synchronization signal, and generate a PWM signal according to the field synchronization signal to control a power supply circuit in the cholesteric LCD to output a gray scale voltage matching the gray scale data, thereby realizing multi-gray scale display of the cholesteric LCD.

2. The cholesteric LCD multi-gray scale display method according to claim 1, wherein, The step of controlling all sub-pixels in the cholesteric LCD to enter a P state specifically comprises: outputting a maximum driving voltage to drive the cholesteric LCD to enter an H state, and then lowering the driving voltage to 0 to make all sub-pixels in the cholesteric LCD enter a P state.

3. The cholesteric LCD multi-gray scale display method according to claim 1, wherein, The pre-stored gray scale division strategy specifically comprises: dividing RGB values of 0-255 into n gray scale intervals according to the target gray scale level n, wherein n≥2.

4. The cholesteric LCD multi-gray scale display method according to claim 3, wherein, The step of mapping the RGB pixel data to the target gray scale level n to obtain gray scale data corresponding to the RGB pixel data specifically comprises: comparing each RGB value in the RGB pixel data with n gray scale intervals corresponding to the target gray scale level n one by one; determining the gray scale interval to which each RGB value in the RGB pixel data belongs to obtain corresponding gray scale data, wherein the gray scale data contains the gray scale interval corresponding to each RGB value in the RGB pixel data.

5. The cholesteric LCD multi-gray scale display method according to claim 1, wherein, When outputting a gray scale voltage corresponding to the i-th gray scale interval, configuring the control signal of the sub-pixel matching the gray scale interval as a high level, configuring the duration T of the gray scale voltage, and generating a corresponding PWM signal in combination with the field synchronization signal to control the power supply circuit to continuously output the gray scale voltage within the time T of scanning all pixel points from left to right and from top to bottom. And traversing all gray scale intervals according to the above process to complete the generation of the control signal and the PWM signal of the cholesteric LCD.

6. The cholesteric LCD multi-gray scale display method according to claim 1, wherein, The method further comprises the following steps: determining the value of the gray scale voltage assigned to each sub-pixel according to the number of sub-pixels decomposed from each physical pixel and the target gray scale level n.

7. The cholesteric LCD multi-gray scale display method according to claim 4, wherein, When the target gray scale level n=8, the n gray scale intervals are as follows: RGB<32 is the first gray scale interval, 32≤RGB<64 is the second gray scale interval, 64≤RGB<96 is the third gray scale interval, 96≤RGB<128 is the fourth gray scale interval, 128≤RGB<160 is the fifth gray scale interval, 160≤RGB<192 is the sixth gray scale interval, 192≤RGB<224 is the seventh gray scale interval, and 224≤RGB<256 is the eighth gray scale interval.

8. The cholesteric LCD multi-gray scale display method according to claim 5, wherein, When the control signal is at a high level, the corresponding pixel is applied with a current gray scale voltage; and when the control signal is at a low level, the corresponding pixel maintains the state at the previous moment.

9. A cholesteric LCD multi-gray scale display system, characterized by, The method further comprises the following steps: a pixel resolution module configured to resolve each physical pixel in the cholesteric LCD into a plurality of independently addressable sub-pixels and assign each sub-pixel x gray scale voltages, where x≥1; a control module configured to control all the sub-pixels in the cholesteric LCD to enter a P state; a first processing module configured to obtain RGB pixel data corresponding to an image to be displayed and a target gray scale level n, map the RGB pixel data to the corresponding target gray scale level n according to a pre-stored gray scale division strategy, and obtain gray scale data corresponding to the RGB pixel data; a signal generation module configured to generate a control signal for the cholesteric LCD based on the gray scale data to control the gray scale state of each sub-pixel, obtain a field synchronization signal, and generate a PWM signal based on the field synchronization signal to control a power supply circuit in the cholesteric LCD to output a gray scale voltage matching the gray scale data, thereby realizing multi-gray scale display of the cholesteric LCD.

10. The cholesteric LCD multi-gray scale display system of claim 9, wherein, Further comprising: a second processing module configured to determine the gray scale voltage assigned to each sub-pixel according to the number of sub-pixels resolved from each physical pixel and the target gray scale level n.

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