Method for forming electronic device

Abstract

The invention provides a forming method of an electronic device. The method comprises the steps that a first chip and a second chip are provided, the first chip comprises a plurality of first through silicon vias, the second chip comprises a plurality of second through silicon vias, a plurality of first connecting convex blocks are attached to the lower surface of the first chip, and a plurality of second connecting convex blocks are attached to the lower surface of the second chip; at least one part of the plurality of first connecting bumps is respectively connected with the corresponding part of the plurality of first silicon through holes; the multiple first connecting convex blocks are coated with first scaling powder; enabling the plurality of first connecting bumps to be in contact with the upper surface of the second chip, so as to form respective connection between at least one part of the plurality of first connecting bumps and the corresponding part of the plurality of second through silicon vias; and heating the plurality of first connecting bumps and the first soldering flux by applying microwave radiation to the plurality of first connecting bumps and the first soldering flux so as to form connection between the first chip and the second chip.

Description

TECHNICAL FIELD

[0001] The present application relates generally to semiconductor technology, and more specifically, to a method of forming an electronic device. BACKGROUND

[0002] Through-Silicon Via (TSV) technology has great advantages in that it minimizes electrical parasitic elements associated with routing, which is critical to reducing routing delay time. Compared with wire bonding or flip chip technology, TSV technology can provide the shortest electrical routing and is the most effective method to improve electrical performance, and thus has received extensive attention in recent years. However, the non-uniformity of heat energy transfer in conventional Laser-Assisted Bonding (LAB) technology can adversely affect multi-layer electronic devices employing TSV technology. Specifically, the non-uniform heat transfer in conventional LAB technology can cause warpage problems, which can adversely affect device performance and subsequent manufacturing processes.

[0003] Therefore, there is a need to further improve the method of forming an electronic device employing TSV technology. SUMMARY

[0004] It is an object of the present application to provide a method of forming an electronic device employing TSV technology, which can reduce warpage problems of the device.

[0005] According to an aspect of the present application, an electronic device and a method of forming the same are provided. The method includes providing a first chip including a plurality of first through-silicon vias and a second chip including a plurality of second through-silicon vias, wherein a plurality of first connection bumps are attached to a lower surface of the first chip, and at least a portion of the plurality of first connection bumps are respectively connected to a corresponding portion of the plurality of first through-silicon vias; applying a first flux on the plurality of first connection bumps; contacting the plurality of first connection bumps with an upper surface of the second chip to form respective connections between at least a portion of the plurality of first connection bumps and a corresponding portion of the plurality of second through-silicon vias; and heating the plurality of first connection bumps and the first flux by applying microwave radiation to the plurality of first connection bumps and the first flux to form a connection between the first chip and the second chip.

[0006] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application, as claimed. Furthermore, the accompanying drawings illustrate one embodiment of the application, and together with the description, serve to explain the principles of the application. BRIEF DESCRIPTION OF DRAWINGS

[0007] The drawings referred to in this description are incorporated in and form a part of the specification, to the extent that the drawings illustrate what is described in the specification. The features illustrated in the drawings for one or more embodiments of the present application are by way of illustration only and need not be construed as limiting.

[0008] Figures 1A to 1E The various steps of the method for forming an electronic device according to the first embodiment of the present application are shown.

[0009] Figure 2 The step of microwave irradiation in the method for forming an electronic device according to the second embodiment of the present application is shown.

[0010] The same reference numerals are used throughout the drawings to designate the same or similar parts. DETAILED DESCRIPTION

[0011] The following detailed description of exemplary embodiments of the application references the drawings, which form a part of the description. The drawings show, by way of illustration, specific exemplary embodiments in which the application can be practiced. These embodiments are described in enough detail to enable those skilled in the art to practice the application. The application can be practiced with other embodiments as well, and logical, mechanical and electrical changes can be made without departing from the spirit or scope of the application. To the extent that the following detailed description is specific to a particular exemplary embodiment, it is intended to act as a teaching of a single illustrative embodiment only. The reader should not construe the description as limiting the scope of the application in any way, and the scope of the application is only limited by the appended claims.

[0012] In this document, the use of the singular includes the plural unless specifically stated otherwise. In this document, the use of "or" means "and / or" unless stated otherwise. Furthermore, the use of the term "including" as well as other forms such as "include", "includes" and "included" is not limiting. Also, terms such as "element" or "component" encompass both elements and components comprising a single unit and elements and components that comprise more than one subunit unless specifically stated otherwise. Further, the section headings used herein are for organizational purposes only and are not meant to be used as limiting.

[0013] As used herein, spatial or directional terms, such as "below," "above," "left," "right," "vertical," "horizontal," "side," and the like, can be used for ease of describing purposes only. The spatial or directional terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures. The device can be otherwise oriented (rotated 90 degrees or at other orientations) and the spatial or directional terms will be interpreted accordingly. It is to be understood that when an element is referred to as being "connected to" or "coupled to" another element, it can be directly connected to or coupled to the other element or one or more intervening elements can be present.

[0014] Figures 1A to 1E The various steps of the method for forming an electronic device according to the first embodiment of the present application are shown. In the following, reference will be made to Figures 1A to 1E The method will be described in more detail.

[0015] As Figure 1A is shown, a first chip 100 having two first through silicon vias (TSVs) 102 is provided. The first chip 100 can be any type of semiconductor chip. For example, the first chip can be a memory chip, such as a volatile memory (e.g. DRAM) or a non-volatile memory (e.g. ROM); the first chip can be a logic chip, such as an analog-to-digital converter or an application specific IC (ASIC), or other types of semiconductor chips, e.g. a power management chip (PMIC) or an optical sensor. Further, the first chip 100 contains at least one non-polar material. It can be understood that the first chip 100 can comprise a small amount of polar material, e.g. encapsulants or adhesives, in addition to the non-polar material. For example, the first chip 100 can contain more than 99 wt.%, 98 wt.%, 95 wt.% or 90 wt.% of the non-polar material, and correspondingly less than 1 wt.%, 2 wt.%, 5 wt.% or 10 wt.% of the polar material.

[0016] Figure 1AThe number and shape of the first TSVs 102 shown are merely exemplary. In some embodiments, the first chip 100 can contain any number of first TSVs 102, and the first TSVs can have any shape or configuration. In some embodiments, at least some of the first TSVs 102 are vertical vias that extend completely from the upper surface 104 to the lower surface 103 of the first chip 100. Alternatively, at least one of the first TSVs 102 can extend only a portion of the way within the first chip 100. For example, the first chip 100 can have a first substrate, and at least some of the first TSVs 102 can extend completely through the first substrate. Further, in some embodiments, multiple first TSVs 102 of the first chip 100 can have the same shape and configuration, or different shapes and configurations.

[0017] Further reference is made to Figure 1A The first chip 100 has two first connection bumps 101 attached to its lower surface 103. The two first connection bumps 101 are connected to respective first TSVs 102. In some embodiments, each first connection bump 101 can establish an electrical connection by being in direct contact with a first TSV 102. In some embodiments, the first connection bump 101 can be electrically connected to a first TSV 102 without being in direct contact with the TSV 102. For example, the bottom of the first chip 100 can form an additional wiring layer (not shown) that includes a wiring structure connecting the first TSVs 102 to the first connection bumps 101 on the additional wiring layer. The wiring structure can include, for example, wires and / or vertical contacts.

[0018] The first connection bumps 101 can be formed by depositing solder on the lower surface 103 of the first chip 100. In some embodiments, each of the first connection bumps 101 can comprise a metallic material, a combination of metallic materials, or a combination of metallic and non-metallic materials. More specifically, the solder material can be Al, Sn, Ni, Au, Ag, Pb, Bi, Cu, or a combination thereof. In some embodiments, the first connection bumps 101 can comprise a metallic powder. For example, the first connection bumps 101 can be a sintered metallic powder. In some other embodiments, the first connection bumps 101 can comprise a metallic powder and a binder material that glues the metallic powder together. The binder material should be sufficiently adhesive to glue the metallic powder together before, during, and after the heating process of the first connection bumps 101. In other words, the binder material should not completely volatilize during the heating process of the first connection bumps 101. In addition, the binder material can comprise a thermally conductive material that ensures efficient convective heat energy transfer within each of the first connection bumps 101 during the heating process. In some alternative embodiments, the binder material can comprise a polar material that can absorb microwave energy and thus can be heated selectively, enabling further facilitation of the heating process of the first connection bumps 101 when the first connection bumps 101 are subsequently exposed to microwave radiation. In addition to the two first connection bumps 101 shown in FIG. 1, other first connection bumps 105 are also attached on the lower surface 103 of the first chip 100. These first connection bumps 105 can not be aligned with the first TSVs 102, but instead can be aligned with and connected to other conductive structures (e.g., conductive patterns or pads) or non-conductive structures or locations on the lower surface 103 of the first chip 100. It can be appreciated that these first connection bumps 105 can be formed using the same materials and using the same deposition process as the first connection bumps 101. In some embodiments, the first connection bumps 105 that are aligned with or connected to the conductive patterns or pads of the first chip 100 can form conductive structures for electrical interconnection with conductive structures of other electronic components; while the first connection bumps 105 that are aligned with the non-conductive structures or locations can primarily serve a mechanical support function, rather than an electrical connection function.

[0019] Next, as Figure 1BAs shown, the first flux 106 is coated on the respective surfaces of the first connecting bumps 101. The first flux 106 can facilitate the subsequent heating process of the first connecting bumps 101, so that sufficient electrical connection between the first chip 100 and other chips or electronic components can be achieved through the first connecting bumps 101. The first flux 106 contains a large amount of one or more polar materials that can be heated selectively when exposed to microwave radiation. In addition, in some embodiments, the first flux 106 contains one or more polar materials that have a higher degree of polarization than the first connecting bumps 101. Therefore, when the first flux 106 and the first connecting bumps 101 are exposed to microwave radiation together, the first flux 106 can be heated to a higher temperature than the first connecting bumps 101, so that sufficient convective heat energy transfer from the first flux 106 to the first connecting bumps 101 is achieved. In some embodiments, the dielectric constant or dielectric loss factor of the first flux 106 is higher than that of the first connecting bumps 101. Therefore, the first flux 106 can absorb microwave energy more efficiently than the first connecting bumps 101 during the microwave radiation process. In some embodiments, the first flux 106 can contain one or more materials selected from the following combination: nonylphenol ethoxylate, glycerol monostearate, acid activator, water, and inorganic salt. In preferred embodiments, the first flux 106 can contain between 40 wt.% and 70 wt.% of nonylphenol ethoxylate, between 10 wt.% and 30 wt.% of glycerol monostearate, between 3 wt.% and 10 wt.% of acid activator, between 3 wt.% and 10 wt.% of water, and between 4 wt.% and 15 wt.% of inorganic salt.

[0020] In Figure 1B some embodiments, the first flux 106 is coated on the respective bottom surfaces of the first connecting bumps 101. In some other embodiments, the first flux 106 can be coated on the entire surface of the first connecting bumps 101 on the back of the first chip 100, so as to increase the contact area between the first flux 106 and the first connecting bumps 101, thereby enhancing the convective heat transfer from the first flux 106 to the corresponding first connecting bumps 101. In addition, as Figure 1B shown, the first flux 106 is coated on all the first connecting bumps 105 at the same time, so as to facilitate the subsequent heating process of these connecting bumps. The flux coating process can be implemented by immersing the connecting bumps in a container filled with flux using a flux immersion device. In some embodiments, an excess amount of flux can be coated on each first connecting bump 101, so as to increase the amount of polar materials and thereby improve the absorption efficiency of microwave energy.

[0021] Next, as Figure 1CAs shown, a second chip 200 including two second TSVs 202 is provided. Specifically, the first chip 100 is stacked on the upper surface 204 of the second chip 200, achieving direct contact between the first connecting bump 101 coated with the first flux 106 and the upper surface 204 of the second chip, thereby forming a connection between the first connecting bump 101 and the second TSV 202. It should be understood that the content of "forming a connection" refers to both direct connection and indirect connection achieved with the help of an intervening element. In some embodiments, the first connecting bump 101 coated with the first flux 106 is directly connected to the second TSV 202. In other embodiments, the first connecting bump 101 coated with the first flux 106 is connected to a conductive structure, such as a substrate or a conductive pattern, which is electrically connected to the TSV 202. Therefore, the first flux 106 is located between the bottom surface of the first connecting bump 101 and the upper surface 204 of the second chip 200. It is understandable that the first soldering flux 106 may slowly flow toward the second chip 200 due to surface tension, but most of the surface of the first connecting bump 101 may still be covered by the first soldering flux 106 .

[0022] Next, if Figure 1D As shown, a microwave source is positioned above first chip 100. Microwave radiation is applied from the microwave source to first chip 100, thereby heating first connector bumps 101 and first solder flux 106. Electronic components 110, typically composed of non-polar materials, may not absorb or may barely absorb microwave energy. Therefore, microwaves can penetrate first chip 100 and first connector bumps 101 and reach first solder flux 106. In some other embodiments, the microwave source is positioned at one or more sides of first chip 100. Microwave radiation can be applied from the sides to first connector bumps 101 and first solder flux 106. Consequently, microwaves can interact more directly with first connector bumps 101 and first solder flux 106 without first passing through first chip 100, which can increase energy absorption efficiency. It will also be appreciated that the placement of the microwave source can vary depending on the actual layout of the electronic device. For example, one or more microwave sources can be tilted 30 degrees, 45 degrees, 60 degrees, or any other suitable angle relative to the upper surface 204 of second chip 200.

[0023] Still refer to Figure 1DWhen first connecting bump 101 and first soldering flux 106 are simultaneously exposed to microwave radiation, the dipoles within the polar molecules of first soldering flux 106 are sensitive to the microwave electric field, and the dipoles can rotate under the influence of the electric field to align themselves with the direction of the electric field. The electric field of the microwaves changes periodically, which can cause the dipoles to rotate frequently. Therefore, when the dipoles rotate according to the direction of the electric field, they may collide with each other, generating heat energy and causing first soldering flux 106 to rise to a relatively high temperature, for example, to a temperature higher than the melting temperature of first connecting bump 101. In addition, first connecting bump 101, especially first connecting bump 101 containing metal powder, can also absorb microwave energy to generate heat, causing first connecting bump 101 to rise to a moderate temperature. When the temperature of the first soldering flux 106 is increased, a portion of the heated first soldering flux 106 may first volatilize, and the heat energy generated in the first soldering flux 106 may be transferred to the first connecting bump 101 by convection, which may cause the first connecting bump 101 to further increase in temperature. Then, the temperature of the first connecting bump 101 may increase to above the melting temperature of the first connecting bump 101, which causes the first connecting bump 101 to begin to melt and reshape during the reflow process of the first connecting bump 101. Finally, as Figure 1E As shown, the first flux 106 may be completely volatilized, thereby allowing the reflowed first connecting bump 101 to form an electrical connection between the first TSV 102 and the second TSV 202. In some other embodiments, only a portion of the first flux 106 may be volatilized, and the remaining first flux 106 may be removed from the first connecting bump 101. In other embodiments, the remaining first flux 106 and each first connecting bump 101 may be melted together to form an electrical connection between each pair of the first TSV 102 and the second TSV 202.

[0024] During the microwave irradiation process, the first flux 106 can be heated to reach a high temperature to provide sufficient heat to the first connecting bumps 101 by convection, while the first flux 106 should not be overheated to avoid the first flux 106 evaporating completely before the first connecting bumps 101 fully accept reflow. In other words, the temperature of the first flux 106 should be controlled within an appropriate range and for at least a period of time. In some embodiments, when rosin is used as the flux, especially for solder bumps of tin that can melt above 230°C, the appropriate temperature range can be between 120°C and 350°C. In some other embodiments, for example, a resin flux or other suitable polar flux can be used, and the appropriate temperature range can be between the melting temperature of the solder material and a temperature equal to or slightly greater than the vaporization temperature of the first flux 106, such as a temperature range from 10°C above the melting temperature of the solder material to 10°C above the vaporization temperature of the first flux 106, or to 10°C below the vaporization temperature of the first flux 106. In some embodiments, during the microwave irradiation process, the first flux 106 is heated to a first temperature, while the first connecting bumps 101 are heated to a second temperature lower than the first temperature.

[0025] In some embodiments, the microwave irradiation can be applied intermittently to control the temperature of the heated first flux 106, for example, the microwave irradiation can be applied and maintained for a certain duration (e.g., 10 seconds to 2 minutes), then the microwave irradiation is paused for another certain duration (e.g., 5 seconds to 30 seconds), and this cycle can be repeated for several times depending on the reflow process of the first connecting bumps 101. It can be appreciated that the certain duration can be several seconds to several minutes depending on the actual needs of the heating process, such as the specific composition of the first flux 106 and / or the first connecting bumps 101, the number and size of the first connecting bumps 101, and / or the power of the microwave irradiation, etc. In some other embodiments, a temperature sensor such as an infrared temperature sensor or an infrared image array can be used to monitor the temperature of the first flux 106 or the first connecting bumps 101, and real-time temperature measurements can be provided to the controller of the microwave source to adjust the power and / or duration of the microwave irradiation. In some preferred embodiments, the second chip 200 and the first chip 100 mounted thereon can be placed in an atmosphere with a high ambient temperature to avoid excessive heat energy being transferred from the first flux 106 and / or the first connecting bumps 101 to the first chip 100 and / or the second chip 200 due to a significant temperature difference between the first chip 100 and / or the second chip 200 and the first connecting bumps 101 / first flux 106 during the heating process. For example, the ambient temperature can be 10°C to 150°C, or preferably 10°C to 50°C, or more preferably 10°C to 30°C, lower than the melting temperature of the first connecting bumps 101.

[0026] In addition, in this embodiment, the microwave radiation is applied at a variable frequency during the microwave radiation step. By sweeping through a range of frequencies rapidly, the uniformity of the microwave energy can be increased compared to fixed frequency microwaves. For example, the varying microwave radiation can be applied over a frequency range between 1 GHz and 40 GHz, preferably between 1 GHz and 10 GHz. In some embodiments, the frequency of the microwaves is continuously varied during the application of microwave radiation to the first connection bumps 101 and the first flux 106. In other embodiments, the frequency of the microwave radiation is varied between a set of discrete values during the application of microwave radiation to the first connection bumps 101 and the first flux 106. These discrete values can be selected from specific frequencies that match the resonant frequencies of certain materials in the first connection bumps 101 or the first flux 106, to thereby increase their energy absorption efficiency.

[0027] The power of the microwave source can be set between 100 W and 2000 W. In other embodiments, the microwave radiation can employ a frequency higher than 10 GHz or have a microwave source power higher than 1000 W, which causes the temperature of the first connecting bump 101 and the first flux 106 to rise rapidly. In addition, the microwave radiation needs to be sustained for a minimum duration (e.g., 1 minute) to allow the first connecting bump 101 to sufficiently go through the reflow process and the first flux 106 to completely evaporate, thereby forming an effective electrical connection between the first TSV 102 and the second TSV 202 and avoiding further cleaning of residual flux material after the reflow process. It can be appreciated that the frequency, power, and duration of the microwave radiation can be determined according to the actual needs of the reflow process of the first connecting bump 101. At the same time, since the molecules in the non-polar material are not sensitive to the electric field of the microwave radiation, the first chip 100 and the second chip 200 can not be heated or almost not be heated by the microwave radiation when the first chip 100 and the second chip 200 are exposed to the microwave field together with the first connecting bump 101 and the first flux 106. In addition, the interconnect lines or metal layers within the first chip 100 and the second chip 200 can reflect the microwaves and almost not generate thermal energy. In this way, the first connecting bump 101 and the first flux 106 are selectively heated by the microwave radiation. This heating mechanism can provide a variety of advantages for the conventional reflow process of the first connecting bump 101 that utilizes a heating process. First, unlike the conventional heating process applied to the entire electronic device, the selective heating of the first connecting bump 101 and the first flux 106 by the microwave radiation can reduce the warping problem of the first chip 100, since the first chip 100 is almost not heated by the microwave radiation. Second, microwaves can penetrate the first flux 106 and the first connecting bump 101 to provide energy, so that heat can be generated in a volumetric manner throughout the first connecting bump 101, which allows a more uniform heat distribution from the surface to the interior of each first connecting bump 101. Third, microwave-induced molecular rotation does not break molecular bonds, since the energy of each photon is low, which can have less impact on the internal structure of the electronic device. Fourth, microwave heating can be quickly started and / or ended, which can shorten the heating duration and thus reduce energy consumption.

[0028] As previously described, all first connecting bumps 105 attached to lower surface 103 are made of the same or similar material as first connecting bumps 101. Furthermore, the microwave irradiation process can melt the first connecting bumps 105 along with their respective first soldering fluxes 106, thereby forming an additional connection between first chip 100 and second chip 200. Furthermore, the method described above may include additional steps. For example, during or after heating the first connecting bumps 101 and first soldering flux 106, the first chip 100 may be pressed toward the second chip 200 to establish a more stable connection between the two chips. As another example, the method may involve vertically aligning the first chip 100 with the second chip 200 before contacting the first connecting bumps 101 with the upper surface 204 of the second chip 200. In some embodiments, the first TSVs 102 and the second TSVs 202 are vertically aligned during this step. Furthermore, packaging materials, shielding materials, etc. may be formed on the exterior of the entire electronic device.

[0029] Figure 2 The microwave irradiation step of forming an electronic device according to the second embodiment of the present application is described. Figure 2 The steps shown can be performed in Figures 1A to 1C The steps shown are then followed, and instead of Figure 1D and 1E The steps shown are as Figures 1A to 1E Alternative embodiments to the illustrated embodiment.

[0030] exist Figure 2 In the illustrated embodiment, similar to the first chip 100, two second connecting bumps 201 are attached to the lower surface 203 of the second chip 200, and each second connecting bump 201 is electrically connected to the corresponding second TSV 202. In addition to the two second connecting bumps 201, other second connecting bumps 205 are attached to the lower surface 203 of the second chip 200. These second connecting bumps 205 may not be aligned with the second TSV 202, but may be aligned with other conductive structures (such as conductive patterns or pads) or non-conductive structures or parts on the lower surface 203 of the second chip 200 and connected to each other. In addition, the corresponding surfaces of the second connecting bumps 201, 205 are coated with a second flux 206. The formation process of the second connecting bumps 201, 205 and the second flux 206, the materials used, the connection with other parts of the second connecting bumps 201 and the second flux 206, etc. are similar to those in the embodiment of the present invention. Figures 1A to 1E The first connecting bumps 101 , 105 and the first soldering flux 106 described in the illustrated embodiment are similar and will not be described in detail.

[0031] The stacked first chip 100 and second chip 200 are further stacked onto the upper surface 304 of a third chip 300, which similarly has two third TSVs 302, so that the second connecting bumps 201 coated with the second solder flux 206 are in contact with the upper surface 304 of the third chip 300. Therefore, the second solder flux 206 is located between the bottom surface of the second connecting bumps 201 and the upper surface 304 of the third chip 300. It is understood that due to surface tension, the second solder flux 206 may also flow slightly toward the third chip 300, but a significant portion of the corresponding surface of the second connecting bumps 201 may still be covered by the second solder flux 206.

[0032] like Figure 2 As shown, the microwave source is located above the first chip 100 and emits microwave radiation to heat the first chip 100 and simultaneously heat the first connecting bumps 101, 105, the first soldering flux 106, the second connecting bumps 201, 205 and the second soldering flux 206. Figure 2 The microwave irradiation process parameters used in the steps shown may vary. Figure 1D The parameters described in the steps shown are similar and will not be described in detail. In some embodiments, the first connecting bumps 101, 105 and the first soldering flux 106 may not be heated at the same time as the second connecting bumps 201, 205 and the second soldering flux 206. Specifically, first perform Figures 1A to 1E Then, Figure 1E The stacked first chip 100 and the second chip 200 are placed on the upper surface 304 of the third chip 300, and microwave radiation is performed to heat the second connection bumps 201 and the second soldering flux 206. It is understood that although Figure 2 Only three chips are depicted, but the number of chips stacked together may not be limited to three and may exceed three in some instances.

[0033] Although not shown in the figure, in some embodiments, the first connection bumps 101 may be initially integrated with the second chip 200 instead of being integrated with the first chip 100. Specifically, the first connection bumps 101 are attached to the upper surface 204 of the second chip 200 and are electrically connected to the respective second TSVs 202. In this case, Figure 1BAs described above, the solder paste application process is applied to both the first connecting bumps 101 and the second connecting bumps 201 on the second chip 200. Subsequently, the first connecting bumps 101 are attached to the lower surface 103 of the first chip 100 to establish the connection between each pair of the first connecting bumps 101 and the first TSVs 102. Meanwhile, the second connecting bumps 201 are attached to the upper surface 304 of the third chip 300 to form the connection between the second connecting bumps 201 and the third TSVs 302. Subsequently, the first connecting bumps 101, the second connecting bumps 201, and the applied solder paste can be heated using a microwave radiation process to form the electrical connections between the first TSVs 102, the second TSVs 202, and the third TSVs 302.

[0034] In some embodiments, the first chip 100, the second chip 200, and the third chip 300 can be the same category of semiconductor chips. For example, each of them can be a memory semiconductor chip. The memory semiconductor chip can be, for example, a volatile memory semiconductor chip such as a dynamic random access memory (DRAM) or a static random access memory (SRAM), or a non-volatile memory semiconductor chip such as a phase change random access memory (PRAM), a magnetoresistive random access memory (MRAM), a ferroelectric random access memory (FeRAM), or a resistive random access memory (RRAM).

[0035] In some embodiments, the first chip 100, the second chip 200, and the third chip 300 can include different categories of semiconductor chips. For example, one or more of the first chip 100, the second chip 200, and the third chip 300 can be a logic chip, while the other chips can be a memory chip. For example, the logic chip includes a central processing unit (CPU) chip, a graphics processing unit (GPU) chip, and / or an application processor (AP) chip.

[0036] In some embodiments, after the steps of FIG. 1E or FIG. 2, a substrate can be further provided. The stacked chips can be formed on the substrate, and a packaging layer can also be formed on the substrate to package the stacked chips, thereby forming an electronic package. In some other embodiments, the method of forming an electronic device can not include the process of forming a packaging layer.

[0037] Although the exemplary methods for forming an electronic device of the present application are described in conjunction with the corresponding figures, it is understood that modifications and adaptations to the methods for forming an electronic device can be made by those skilled in the art in the light of the foregoing description.

[0038] Various embodiments have been described herein with reference to the accompanying drawings. However, it will be understood that various modifications and changes can be made thereto without departing from the broader scope of the application as set forth in the appended claims, and that the application is not limited to what has been particularly shown and described hereinabove. Furthermore, it is intended that the appended claims cover all such modifications and changes as fall within the true scope of the application.

Claims

1. A method for forming an electronic device, characterized in that The method comprises: Providing a first chip and a second chip, wherein the first chip includes a plurality of first through-silicon vias, and the second chip includes a plurality of second through-silicon vias, wherein a plurality of first connecting bumps are attached to a lower surface of the first chip, and at least a portion of the plurality of first connecting bumps are respectively connected to a corresponding portion of the plurality of first through-silicon vias; applying a first soldering flux on the plurality of first connection bumps; contacting the plurality of first connection bumps with an upper surface of the second chip to form respective connections between at least a portion of the plurality of first connection bumps and corresponding portions of the plurality of second through silicon vias; and The plurality of first connection bumps and the first soldering flux are heated by applying microwave radiation to the plurality of first connection bumps and the first soldering flux, so as to form a connection between the first chip and the second chip.

2. The method according to claim 1, characterized in that The first soldering flux is heated to a first temperature, and the first connection bump is heated to a second temperature, which is lower than the first temperature.

3. The method according to claim 1, characterized in that The first soldering flux includes a polar material having a higher polarization degree than that of the first connecting bump.

4. The method according to claim 1, wherein The dielectric constant or dielectric loss factor of the first soldering flux is higher than the dielectric constant or dielectric loss factor of the first connecting bump.

5. The method according to claim 1, wherein The first soldering flux includes one or more materials selected from the group consisting of nonylphenol ethoxylate, glyceryl monostearate, an acid activator, water, and an inorganic salt.

6. The method according to claim 5, characterized in that The first flux includes between 40 wt.% and 70 wt.% nonylphenol ethoxylate, between 10 wt.% and 30 wt.% glyceryl monostearate, between 3 wt.% and 10 wt.% acid activator, between 3 wt.% and 10 wt.% water, and between 4 wt.% and 15 wt.% inorganic salt.

7. The method according to claim 1, characterized in that The first connecting bump includes metal powder and an adhesive material for gluing the metal powder.

8. The method according to claim 7, characterized in that The binder material includes a polar material.

9. The method according to claim 7, characterized in that The adhesive material includes a thermally conductive material.

10. The method according to claim 1, characterized in that The applied frequency of the microwave radiation is in the range between 1 GHz and 40 GHz.

11. The method according to claim 1, characterized in that During the step of applying the microwave radiation to the first connection bump and the first solder flux, the microwave radiation is applied at a variable frequency.

12. The method according to claim 11, characterized in that During the step of applying the microwave radiation to the first connection bump and the first soldering flux, the frequency of the microwave radiation is continuously varied.

13. The method according to claim 11, characterized in that During the step of applying the microwave radiation to the first connection bump and the first solder flux, the frequency of the microwave radiation is varied between a set of discrete values.

14. The method according to claim 1, wherein The method further comprises: During or after heating the first connection bumps and the first soldering flux, the first chip is pressed toward the second chip.

15. The method according to claim 1, wherein The second chip includes a plurality of second connection bumps attached to a lower surface thereof, and at least a portion of the plurality of second connection bumps are respectively connected to a corresponding portion of the plurality of second through silicon vias, and the method further includes: Providing a third chip, wherein the third chip includes a plurality of third through-silicon vias; applying a second soldering flux on the plurality of second connection bumps; contacting the plurality of second connection bumps with the upper surface of the third chip, and forming connections between at least a portion of the plurality of second connection bumps and corresponding portions of the plurality of third through-silicon vias, respectively; and The second connection bumps and the second soldering flux are heated by applying microwave radiation to the second connection bumps and the second soldering flux, so as to form a connection between the second chip and the third chip.

16. The method according to claim 15, characterized in that The second connection bump and the second soldering flux are heated simultaneously with the first connection bump and the first soldering flux.

17. An electronic device, characterized in that: The electronic device is formed using the method according to any one of claims 1 to 16.

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