Double-sided heat dissipation flip GaN power chip packaging structure and packaging method
Through the double-sided heat dissipation flip-chip structure and welding layer connection, the inductance and heat dissipation problems in the GaN power chip package are solved, high-frequency and high-speed performance and good heat dissipation effect are achieved, and the chip's operating reliability is improved.
Patent Information
- Application Number
- CN202511145775.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-15
- Publication Date
- 2025-10-17
AI Technical Summary
The existing GaN power chip packaging method has wire bonding inductance that affects the performance of high-frequency and high-speed circuits, and the back-side heat dissipation effect is poor, resulting in poor chip working condition.
It adopts a double-sided heat dissipation flip-chip structure, connects the electrode and the lead frame terminal through the welding layer, eliminates the lead bonding, combines the heat dissipation plate for double-sided heat dissipation, and uses a thermal conductive adhesive layer and high thermal conductivity materials to improve the heat dissipation effect.
The influence of inductance is eliminated, high-frequency and high-speed performance is improved, heat dissipation effect is enhanced, and the reliability and working state of the chip under high current conditions are ensured.
Smart Images
Figure CN120809702A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of semiconductor packaging, in particular to a double-sided heat dissipation flip GaN power chip packaging structure and a packaging method. BACKGROUND
[0002] Power electronic products are developing towards high performance, multi-function, miniaturization and portability, not only the performance requirements of semiconductor devices are constantly improving, but also the packaging has higher requirements. In the field of power semiconductors, GaN power devices as a new generation of semiconductor devices have become the focus of research and development due to their excellent power characteristics. At present, the packaging methods of GaN discrete devices mainly include the following: DFN, TOLL, QFN, TO and the like.
[0003] These packaging methods basically use the same process idea: first, the GaN power chip is attached to the copper lead frame terminal, and then the source electrode, drain electrode and gate electrode of the GaN power chip are electrically connected to the designed terminal through gold wire or copper wire by wire bonding, and then the plastic packaging process is completed. This packaging method mainly has two disadvantages: first, the inductance of wire bonding is a key problem in high-frequency and high-speed circuits, and the resistance, parasitic capacitance and mechanical reliability will be affected under the condition of large current; second, the GaN power chip is usually packaged on the back, which leads to poor heat dissipation effect on the back side of the GaN power chip, affecting the working state of the GaN power chip. SUMMARY
[0004] The present application provides a double-sided heat dissipation flip GaN power chip packaging structure and a packaging method, which aims to solve the problem of poor working state of GaN power chip after packaging.
[0005] In order to achieve the above purpose, the embodiment of the present application provides a double-sided heat dissipation flip GaN power chip packaging structure, which comprises: An internal structure, the internal structure comprises: A GaN power chip, the GaN power chip has a drain electrode, a source electrode and a gate electrode on the front surface; A heat dissipation plate, which is arranged above the GaN power chip and is bonded to the back surface of the GaN power chip through a heat-conducting adhesive layer; A source lead frame terminal, which is arranged below the GaN power chip and is electrically connected to the source electrode through a source welding layer; A drain lead frame terminal, which is arranged below the GaN power chip and is electrically connected to the drain electrode through a drain welding layer; A gate lead frame terminal is arranged below the GaN power chip, and the gate lead frame terminal is electrically connected with the gate electrode through a gate solder layer. The lower surfaces of the source electrode lead frame terminal, the drain electrode lead frame terminal and the gate electrode lead frame terminal are flush. The double-sided heat dissipation flip GaN power chip packaging structure further comprises a plastic encapsulation body, which is wrapped outside the internal structure and exposes the upper surface of the heat dissipation plate and the lower surfaces of the source electrode lead frame terminal, the drain electrode lead frame terminal and the gate electrode lead frame terminal.
[0006] Preferably, the heat conductive glue layer is formed by coating a heat conductive glue between the heat dissipation plate and the GaN power chip.
[0007] Preferably, the heat dissipation plate is provided with a ring groove on the side away from the GaN power chip, the plastic encapsulation body covers the ring groove on the side of the heat dissipation plate away from the GaN power chip, and a part of the center of the heat dissipation plate is exposed.
[0008] Preferably, the source solder layer, the drain solder layer and the gate solder layer are formed by Au-Sn solder or SAC solder or copper material.
[0009] Preferably, the source solder layer, the drain solder layer and the gate solder layer are in one of a layer shape, a spherical shape or an ellipsoidal shape.
[0010] Preferably, the heat dissipation plate is one of an aluminum alloy, copper, a copper alloy or a graphene composite material.
[0011] The application further provides a packaging method of the double-sided heat dissipation flip GaN power chip packaging structure as described above, comprising the following steps: S20. Attaching the back surface of the GaN power chip to the heat dissipation plate; S30. Using flip soldering technology to electrically connect the source electrode lead frame terminal, the drain electrode lead frame terminal and the gate electrode lead frame terminal with the source electrode, the drain electrode and the gate electrode respectively to obtain an internal structure; S40. Plastic encapsulating the internal structure to obtain the double-sided heat dissipation flip GaN power chip packaging structure with the upper surface of the heat dissipation plate exposed and the lower surfaces of the source electrode lead frame terminal, the drain electrode lead frame terminal and the gate electrode lead frame terminal exposed.
[0012] Preferably, the method further comprises a step S10 before the step S20, and the step S10 comprises opening a ring groove on a first surface of the heat dissipation plate. In the step S20, the back surface of the GaN power chip is attached to a second surface of the heat dissipation plate, and the first surface is opposite to the second surface.
[0013] Preferably, in step S30, the source lead frame terminal and the source electrode are electrically connected through a source solder layer formed by a solder material; the drain lead frame terminal and the drain electrode are electrically connected through a drain solder layer formed by a solder material; the gate lead frame terminal and the gate electrode are electrically connected through a gate solder layer formed by a solder material.
[0014] Preferably, the GaN power chip and the heat sink are bonded through a heat conductive glue layer formed by a heat conductive glue.
[0015] The above scheme of the present application has the following beneficial effects: The present application connects each electrode in the GaN power chip and the corresponding lead frame terminal through a solder layer, discards the existing wire bonding mode, eliminates the influence of inductance, and enables the present packaging structure to provide higher frequency and higher speed use effects when in use.
[0016] In addition, in the present application, a heat sink is further arranged in the plastic package, and the heat sink solves the poor heat dissipation effect of the GaN power chip on one side of the plastic package. In one embodiment of the present application, a groove is arranged on the heat sink, the groove is covered by plastic sealing material during plastic sealing, and the center of the heat sink is exposed, which not only has a heat dissipation effect, but also enhances the ability of the plastic package to block water vapor invasion through the cooperation of the groove and the plastic package.
[0017] Other features and advantages of the present application will be described in detail in the following specific embodiments. BRIEF DESCRIPTION OF DRAWINGS
[0018] Figure 1 is a cross-sectional view of the packaging structure with a ring groove of the present application; Figure 2 is a top view of the packaging structure with a ring groove of the present application; Figure 3 is a bottom view of the packaging structure with a ring groove of the present application; Figure 4 is a schematic view of a solder layer of the packaging structure with a ring groove of the present application; Figure 5 is a cross-sectional view of the packaging structure without a ring groove of the present application; Figure 6 is a bottom view of a GaN power chip; Figure 7 is a cross-sectional view of a heat sink with a ring groove; Figure 8 is a schematic view of the connection between the heat sink with a ring groove and the GaN power chip; Figure 9is a schematic diagram of connection of GaN power chip and lead frame terminal.
[0019] [Legend of reference signs] 10-GaN power chip, 11-drain electrode, 12-source electrode, 13-gate electrode, 20-radiating plate, 21-ring groove, 30-source lead frame terminal, 31-source solder layer, 40-drain lead frame terminal, 41-drain solder layer, 50-gate lead frame terminal, 60-plastic package body.
[0020] 70-thermally conductive glue layer, DETAILED DESCRIPTION
[0021] In order to make the technical problems, technical solutions and advantages of the present application more clear, the following will be described in detail in combination with the drawings and specific embodiments.
[0022] As shown in the drawings, the embodiment of the present application provides a double-sided radiating flip-chip GaN power chip packaging structure, which comprises Figures 1-9 and Figure 1 the internal structure and the plastic package body 60, the plastic package body 60 is used for plastic packaging the internal structure. Specifically, the internal structure comprises the GaN power chip 10 as shown in the drawings, wherein the GaN power chip 10 has a front surface and a back surface, and the front surface has three electrodes of the drain electrode 11, the source electrode 12 and the gate electrode 13. The internal structure further comprises a radiating plate 20, which is arranged above the GaN power chip 10, and the radiating plate 20 and the back surface of the GaN power chip 10 are bonded together through the thermally conductive glue layer 70, and the internal structure further comprises lead frame terminals for electrical connection with the drain electrode 11, the source electrode 12 and the gate electrode 13. Specifically, the lead frame terminals comprise the drain lead frame terminal 40, the source lead frame terminal 30 and the gate lead frame terminal 50, wherein the drain lead frame terminal 40 and the drain electrode 11 are electrically connected through the drain solder layer 41 below the GaN power chip 10; the source lead frame terminal 30 and the source electrode 12 are electrically connected through the source solder layer 31 below the GaN power chip 10, and the gate lead frame terminal 50 and the gate electrode 13 are electrically connected through the gate solder layer below the GaN power chip 10. Figure 5 Figure 6 By using the solder layer to realize the connection of the lead frame terminal and the electrode, the mode of lead connection is cancelled, thereby eliminating the influence of inductance, and under the working condition of large current, physical basis is provided for reducing parasitic capacitance and improving mechanical reliability.
[0023] By using the solder layer to realize the connection of the lead frame terminal and the electrode, the mode of lead connection is cancelled, thereby eliminating the influence of inductance, and under the working condition of large current, physical basis is provided for reducing parasitic capacitance and improving mechanical reliability.
[0024] The aforementioned plastic package 60 is formed by a plastic package material, and the plastic package 60 is wrapped outside the internal structure, and the upper surface of the heat sink 20, the lower surface of the source lead frame terminal 30, the lower surface of the drain lead frame terminal 40, and the lower surface of the gate lead frame terminal are exposed.
[0025] As shown in Figure 1 and Figure 5 , the plastic package material is used to perform plastic packaging outside the internal structure, and the heat sink 20 is embedded in the plastic package 60, and one surface of the heat sink 20 is not covered by the plastic package 60, and the surface constitutes the outer surface of the plastic package 60. Under this structure, the plastic package 60 can improve heat dissipation on the side of the plastic package 60 through the high thermal conductivity of the heat sink 20. In addition, the GaN power chip 10 is heat dissipated through the respective lead frame terminals on the side away from the heat sink 20, realizing double-sided heat dissipation of the packaging structure, and the GaN power chip 10 can be maintained in a good working state.
[0026] Based on the above reasons, the electrode and the lead frame terminal are connected by the welding layer, and the heat sink 20 is additionally provided, so that the GaN power chip 10 can be maintained in a good working environment, and the working performance of the packaging structure can be fully improved.
[0027] The heat-conducting adhesive layer 70 is formed by heat-conducting adhesive coated between the heat sink 20 and the GaN power chip 10. Preferably, the heat-conducting adhesive is selected to have high heat-conducting effect.
[0028] As shown in Figure 1 , in an embodiment of the present application, a ring groove 21 is provided on the side of the heat sink 20 away from the GaN power chip 10, and the plastic package material covers the ring groove 21 on the side of the heat sink 20 away from the GaN power chip 10 and the center part of the heat sink 20 is exposed. In this embodiment, since the ring groove 21 is provided and the plastic package material forming the plastic package 60 is filled in the ring groove 21, the plastic package material can have good ability to block water vapor invasion.
[0029] As shown in Figure 5 , in another embodiment of the present application, the side of the heat sink 20 away from the GaN power chip 10 is not provided with the ring groove 21, and the plastic package material forming the plastic package 60 is flush with the heat sink 20.
[0030] The aforementioned source welding layer 31, drain welding layer 41, and gate welding layer are composed of a welding material, which can be one of Au-Sn solder or SAC solder or copper material.
[0031] As shown in Figure 4 and Figure 5 , the shapes of the source welding layer 31, the drain and the gate welding layer are formed by the aforementioned layer shape, spherical shape or ellipsoidal shape of the welding material.
[0032] Preferably, the heat dissipation plate 20 is one of an aluminum alloy, copper, a copper alloy, or a graphene composite material.
[0033] The application also provides a packaging method of the double-sided heat dissipation flip GaN power chip packaging structure, comprising the following steps: S20. The back surface of the GaN power chip 10 is attached to the heat dissipation plate 20.
[0034] As Figure 8 In this step, the heat-conducting glue is applied to one side of the heat dissipation plate 20, and the back surface of the GaN power chip 10 is bonded to the heat dissipation plate 20 through the heat-conducting glue, and the heat-conducting glue is cured through a high-temperature curing process.
[0035] S30. The source electrode lead frame terminal 30, the drain electrode lead frame terminal 40, and the gate electrode lead frame terminal 50 are respectively connected to the source electrode 12, the drain electrode 11, and the gate electrode 13 through flip-chip bonding technology to obtain an internal structure.
[0036] As Figure 9 In this step, the source electrode bonding layer 31 is prepared on the source electrode lead frame terminal 30, the drain electrode bonding layer 41 is prepared on the drain electrode lead frame terminal 40, and the gate electrode bonding layer is prepared on the gate electrode lead frame terminal 50, and the source electrode 12, the drain electrode 11, and the gate electrode 13 of the GaN power chip 10 are respectively bonded on the source electrode bonding layer 31, the drain electrode bonding layer 41, and the gate electrode bonding layer through flip-chip bonding technology.
[0037] S40. The internal structure is molded to obtain a double-sided heat dissipation flip GaN power chip packaging structure. After packaging, the double-sided heat dissipation flip GaN power chip packaging structure has the structure characteristics that the upper surface of the heat dissipation plate 20 is exposed on the upper surface of the molding body 60, and the lower surfaces of the source electrode lead frame terminal 30, the drain electrode lead frame terminal 40, and the gate electrode lead frame terminal 50 are exposed on the lower surface of the molding body 60.
[0038] As Figure 5 In this embodiment, when the internal structure is molded, the upper surface of the molding body 60 is flush with the upper surface of the heat dissipation plate 20.
[0039] In another embodiment, S10 is further provided before S20. As Figure 7, step S10 includes opening a ring groove 21 on the first surface of the heat sink 20, in this embodiment, the first surface of the heat sink 20 is the surface away from the GaN power chip 10, and is also the upper surface of the heat sink 20 from the perspective of the overall flip-chip GaN power chip package structure with double-sided heat dissipation. It can be understood that the heat sink 20 also has a second surface, which is opposite to the first surface. After completing step S10, step S20 is performed, in which the back surface of the GaN power chip 10 is attached to the second surface of the heat sink 20. In this embodiment, step S40 is also modified, and when step S40 is performed, the upper end surface of the plastic package 60 is higher than the first surface of the heat sink 20, and the plastic package 60 extends to the center of the heat sink 20 until the plastic filling material fills the groove, at which time the center of the heat sink 20 is exposed to the outside, and the edges of the heat sink 20 are wrapped by the plastic filling material.
[0040] The above describes the preferred embodiments of the present application, and it should be noted that for those skilled in the art, without departing from the principles of the present application, a number of improvements and refinements can be made, and these improvements and refinements should also be considered as the protection scope of the present application.
Claims
1. Double-sided heat dissipation flip-chip GaN power chip packaging structure, characterized by: include: An internal structure, comprising: A GaN power chip (10), wherein the front surface of the GaN power chip (10) has a drain electrode (11), a source electrode (12), and a gate electrode (13); A heat dissipation plate (20) is arranged above the GaN power chip (10), and the heat dissipation plate (20) is bonded to the back surface of the GaN power chip (10) via a thermally conductive adhesive layer (70); A source lead frame terminal (30) is arranged below the GaN power chip (10), and the source lead frame terminal (30) is electrically connected to the source electrode (12) via a source welding layer (31); A drain lead frame terminal (40) is arranged below the GaN power chip (10), and the drain lead frame terminal (40) is electrically connected to the drain electrode (11) via a drain welding layer (41); A gate lead frame terminal (50) is arranged below the GaN power chip (10), and the gate lead frame terminal (50) is electrically connected to the gate electrode (13) via a gate welding layer; The double-sided heat dissipation flip-chip GaN power chip packaging structure further includes a plastic package (60), which is wrapped around the internal structure and exposes the upper surface of the heat dissipation plate (20), the lower surface of the source lead frame terminal (30), the drain lead frame terminal (40), and the gate lead frame terminal (50).
2. The double-sided heat dissipation flip-chip GaN power chip packaging structure according to claim 1, characterized in that: The thermal conductive adhesive layer (70) is formed by coating the thermal conductive adhesive between the heat dissipation plate (20) and the GaN power chip (10).
3. The double-sided heat dissipation flip-chip GaN power chip packaging structure according to claim 1, characterized in that: The heat sink (20) is provided with an annular groove (21) on a side away from the GaN power chip (10); the plastic package (60) covers the annular groove (21) on a side of the heat sink (20) away from the GaN power chip (10); and the center portion of the heat sink (20) is exposed.
4. The double-sided heat dissipation flip-chip GaN power chip packaging structure according to claim 1, characterized in that: The source electrode welding layer (31), the drain electrode welding layer (41) and the gate electrode welding layer are formed of Au-Sn solder or SAC solder or copper material.
5. The double-sided heat dissipation flip-chip GaN power chip packaging structure according to claim 1, characterized in that: The source electrode welding layer (31), the drain electrode welding layer (41) and the gate electrode welding layer are in a layered, spherical or ellipsoidal shape.
6. The double-sided heat dissipation flip-chip GaN power chip packaging structure according to claim 1, characterized in that: The heat dissipation plate (20) is made of one of aluminum alloy, copper, copper alloy or graphene composite material.
7. A packaging method for the double-sided heat dissipation flip-chip GaN power chip packaging structure according to any one of claims 1 to 6, characterized in that: The steps include: S20. Mounting the back side of the GaN power chip (10) on the heat sink (20); S30. Using flip-chip welding technology, the source lead frame terminal (30), the drain lead frame terminal (40), and the gate lead frame terminal (50) are electrically connected to the source electrode (12), the drain electrode (11), and the gate electrode (13) to obtain an internal structure; S40. Plastic-encapsulating the internal structure to obtain a double-sided heat dissipation flip-chip GaN power chip packaging structure having an exposed upper surface of the heat dissipation plate (20) and exposed lower surfaces of the source lead frame terminal (30), the drain lead frame terminal (40), and the gate lead frame terminal (50).
8. The packaging method of the double-sided heat dissipation flip-chip GaN power chip packaging structure according to claim 7, characterized in that: Before step S20, step S10 is also included, wherein step S10 includes providing an annular groove (21) on the first surface of the heat dissipation plate (20); In step S20, the back surface of the GaN power chip (10) is mounted on the second surface of the heat sink (20), the first surface being opposite to the second surface.
9. The packaging method according to claim 7, wherein: In step S30, the source lead frame terminal (30) and the source electrode (12) are electrically connected via a source welding layer (31) formed of welding material; The drain lead frame terminal (40) and the drain electrode (11) are electrically connected via a drain welding layer (41) formed of a welding material; The gate lead frame terminal (50) and the gate electrode (13) are electrically connected via a gate welding layer formed by welding material.
10. The packaging method according to claim 7, wherein: The GaN power chip (10) and the heat dissipation plate (20) are bonded together via a thermally conductive adhesive layer (70) formed of thermally conductive adhesive.