Semiconductor structure and manufacturing method thereof

Abstract

The invention provides a semiconductor structure and a manufacturing method thereof, and belongs to the field of semiconductors. The method comprises the following steps: providing a substrate; manufacturing a first semiconductor layer on the surface of the substrate, wherein the first semiconductor layer comprises a diamond layer with a first doping type; and manufacturing a second semiconductor layer on the surface of the first semiconductor layer, wherein the second semiconductor layer comprises a gallium oxide layer with a second doping type. And a PN junction with better performance can be provided.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of semiconductor, and particularly relates to a semiconductor structure and a manufacturing method thereof. BACKGROUND

[0002] PN junction is the basis of various semiconductor devices, such as rectifier diode, voltage regulator diode, light emitting diode, junction field effect transistor and insulated gate field effect transistor, etc. The above devices widely use the unidirectional conduction performance, breakdown characteristics and photoelectric effect of PN junction. However, in the traditional silicon-based semiconductor, the performance of PN junction (such as using GaN) is limited by the band gap and material properties, and it is difficult to meet the needs of high-speed and high-power devices.

[0003] Therefore, it is urgent to provide a PN junction with better performance and a preparation method of the PN junction. SUMMARY

[0004] Therefore, the present application provides a semiconductor structure and a manufacturing method thereof, aiming to improve the performance of PN junction.

[0005] In a first aspect, the present application provides a manufacturing method of a semiconductor structure, comprising: providing a substrate; manufacturing a first semiconductor layer on the surface of the substrate, wherein the first semiconductor layer comprises a diamond layer with a first doping type; manufacturing a second semiconductor layer on the surface of the first semiconductor layer, wherein the second semiconductor layer comprises a gallium oxide layer with a second doping type.

[0006] Optionally, the step of manufacturing the second semiconductor layer on the surface of the first semiconductor layer, wherein the second semiconductor layer comprises a gallium oxide layer with a second doping type, comprises: continuously supplying a gallium source into the MPCVD growth cavity; continuously supplying an oxygen source into the MPCVD growth cavity; turning on a microwave power source to supply an impurity with the second doping type, and epitaxially obtaining a gallium oxide film with the second doping type in the MPCVD growth cavity.

[0007] Optionally, when continuously supplying the gallium source into the MPCVD growth cavity, the parameters are as follows: The temperature of the gallium source is -10℃-30℃, the pressure of the gallium source bottle is 100torr-760torr, and the flow rate of the carrier gas is 5sccm-50sccm.

[0008] Optionally, the supply ratio of the gallium source to the oxygen source is 10 2 ~10 5 .

[0009] Optionally, a microwave power source is turned on, and an impurity of the second doping type is introduced to epitaxially grow a gallium oxide film with the second doping type in the MPCVD growth chamber, and parameters are as follows: The microwave power is 2kW~3kW, the growth pressure is 40torr~60torr, the growth temperature is 400℃~600℃, the growth gas includes a carrier gas, the total flow of the growth gas and the oxygen source is 200sccm~500sccm, the ratio of the oxygen source to the growth gas is 1:48~3:97, the doping source temperature is 20℃~80℃, the pressure of the doping source bottle is 0.5torr~5torr, and the flow of the carrier gas of the doping source is 1sccm~20sccm.

[0010] Optionally, the thickness of the second semiconductor layer is 1.5 times to 2.5 times of the thickness of the first semiconductor layer.

[0011] Optionally, the method for manufacturing the semiconductor structure further includes: Manufacturing a buffer layer between the substrate and the first semiconductor layer.

[0012] Optionally, the step of manufacturing the buffer layer between the substrate and the first semiconductor layer includes: The high-nitrogen buffer layer is grown under the condition that the growth pressure is 120mtorr~170mtorr and the growth temperature is 800℃~900℃, by using a microwave power of 3500W~4500W, introducing hydrogen with a flow of 180sccm~220sccm, introducing methane with a flow of 5~15sccm, and introducing nitrogen with a flow of 0.5~3sccm.

[0013] Optionally, the method for manufacturing the semiconductor structure further includes: Manufacturing an electrode structure, the electrode structure including a first electrode electrically connected to the first semiconductor layer and a second electrode electrically connected to the second semiconductor layer, the first electrode and the second electrode being made of graphene material.

[0014] In a second aspect, the application provides a semiconductor structure manufactured by the method as any one of the above.

[0015] The technical scheme provided by the application has at least the following beneficial effects: The application provides a PN junction comprising a p-type doped diamond layer and an n-type doped gallium oxide layer, wherein the p-type doped diamond layer is doped with a p-type impurity by an MPCVD process, and the n-type doped gallium oxide layer is doped with an n-type impurity by the MPCVD process. By utilizing the ultrahigh thermal conductivity (>2000 W / m*K) of diamond and the high breakdown field strength (8 MV / cm) of gallium oxide, and combining the optimization of film crystallization quality by the MPCVD process, the prepared PN junction is significantly superior to a conventional silicon-based or GaN-based PN junction in terms of breakdown voltage (>10 kV), high-temperature stability (>500 DEG C) and power density (>5 kW / cm 2 In addition, by preparing the n-type doped gallium oxide layer by the MPCVD process, the strong cracking effect of microwave plasma in the MPCVD process can be utilized to highly activate the oxygen source and enhance the decomposition of the gallium source, so as to improve the reaction rate of the oxygen source and the gallium source, and the growth efficiency (the growth rate is greater than 5 μm / h, which is higher than the growth efficiency of a conventional MOCVD process) of the doped gallium oxide film can be improved by using the MPCVD process to manufacture the gallium oxide film, thereby being beneficial to improving the preparation efficiency of the PN junction. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without any creative effort.

[0017] Figure 1 The flow chart of the manufacturing method of the semiconductor structure provided by an embodiment of the present application is shown in the figure. Figure 2 The flow chart of the manufacturing method of the second semiconductor layer provided by an embodiment of the present application is shown in the figure. Figure 3 The flow chart of the manufacturing method of the semiconductor structure provided by another embodiment of the present application is shown in the figure. Figure 4 The flow chart of the manufacturing method of the semiconductor structure provided by another embodiment of the present application is shown in the figure Figure 5 The flow chart of the manufacturing method of the electrode structure provided by an embodiment of the present application is shown in the figure. Figure 6 The flow chart of the manufacturing method of the electrode structure provided by another embodiment of the present application is shown in the figure. Figure 7 The structural schematic diagram of the semiconductor structure provided by an embodiment of the present application is shown in the figure. Figure 8 The three-dimensional view of the semiconductor structure provided by an embodiment of the present application is shown in the figure. Figure 9 Structure diagram of a semiconductor structure according to another embodiment of the present application; Figure 10 Structure diagram of an MPCVD growth system according to an embodiment of the present application; Figure 11 SEM image of a second semiconductor layer according to an embodiment of the present application.

[0018] Reference signs are as follows: 1: growth chamber; 10: semiconductor structure; 100: step structure; 10a: substrate; 11a: buffer layer; 12a: first semiconductor layer; 13a: second semiconductor layer; 14a: electrode structure; 141a: first electrode; 142a: second electrode; 11: sample stage; 12: transition chamber; 13: atomic emission spectrometer window; 14: observation window; 2: methane supply pipeline; 20: methane source; 21: manual valve; 22: flow meter; 23: pneumatic valve; 3: hydrogen supply pipeline; 30: hydrogen source; 4: diborane mixed gas supply pipeline; 40: diborane source; 5: oxygen supply pipeline; 50: oxygen source; 6: silane supply pipeline; 60: silane source; 7: gallium source supply pipeline; 70: carrier gas source; 71: supply main pipeline; 72: first branch pipeline; 721: gas inlet sub-pipeline; 722: gas outlet sub-pipeline; 73: second branch pipeline; 74: gallium source; 8: gas mixing chamber; 9: tail gas treatment pipeline; 91: tail gas treatment main pipeline; 92: tail gas treatment branch pipeline; 901: butterfly valve; 902: molecular pump; 903: tail gas treatment device; 904: mechanical pump. DETAILED DESCRIPTION

[0019] In order to make the objectives, technical solutions and advantages of the present application clearer, the technical solutions in the present application will be described clearly and completely below with reference to the drawings in the present application. Obviously, the described embodiments are some embodiments of the present application, but not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of protection of the present application.

[0020] For gallium oxide material: the industry has long believed that MPCVD is not suitable for gallium oxide growth, because: 1. intrinsic damage mechanism: high-energy electrons (> 5eV) in the plasma will break the Ga-O bond (bond energy 2.8eV), resulting in an oxygen vacancy concentration exceeding the device tolerance limit (1e18cm-3) 2. Process uncontrollability: The temperature conflict between gallium source vaporization (>50°C) and oxygen source activation (<30°C) results in a precursor utilization rate of less than 20% in traditional reaction chambers.

[0021] In this application, 1. gradient power control is adopted to reduce the plasma energy to 3.8eV at the critical point of 1800W, which is lower than the Ga-O bond breaking threshold; 2. a dual-path carrier gas system (main path for oxygen / auxiliary path for gallium) is used to achieve a precursor utilization rate of >85%.

[0022] In view of this, the present application provides a semiconductor structure and a preparation method thereof, aiming to improve the performance of a PN junction.

[0023] Diamond is a semiconductor material with a wide bandgap (approximately 5.5 eV), high thermal conductivity (20 W / cm·K), high breakdown field strength, and high chemical stability. Its electron mobility is approximately three times that of silicon, and its hole mobility is approximately four times that of silicon. Due to its exceptional properties, diamond can be used in extreme environments such as high temperatures and radiation, and holds broad application prospects in electronic devices.

[0024] Gallium oxide ( As another emerging semiconductor material, p-type diamond (p-diamond) has attracted attention due to its wide bandgap (approximately 4.8 eV), high breakdown electric field, and excellent electron transport properties. The doping and preparation technology for n-type doped gallium oxide is relatively mature, capable of producing high-quality n-type doped gallium oxide layers. By splicing p-type diamond and n-type gallium oxide to form a PN junction, the respective advantages of each material can be fully utilized, while overcoming their respective shortcomings, resulting in the fabrication of high-performance semiconductor devices.

[0025] In the first aspect, the present application provides a PN junction comprising a p-type doped diamond layer and an n-type doped gallium oxide layer, wherein the p-type doped diamond layer is doped with p-type impurities by an MPCVD process, and the n-type doped gallium oxide layer is doped with n-type impurities by an MPCVD process. By utilizing the ultra-high thermal conductivity of diamond (>2000W / m·K) and the high breakdown field strength (8MV / cm) of gallium oxide, combined with the optimization of the MPCVD process on the crystallization quality of the thin film, the prepared PN junction has excellent breakdown voltage (>10kV), high temperature stability (>500℃) and power density (>5kW / cm 2The aspect is significantly superior to a traditional silicon-based or GaN-based PN junction. In addition, by preparing the N-type doped gallium oxide layer through the MPCVD process, the strong cracking effect of the microwave plasma in the MPCVD process can be utilized to highly activate the oxygen source and enhance the decomposition of the gallium source, thereby improving the reaction rate of the oxygen source and the gallium source. The growth efficiency of the doped gallium oxide film can be improved (the growth rate is greater than 5 μm / h, which is higher than the growth efficiency of a traditional MOCVD process), thereby being conducive to improving the preparation efficiency of the PN junction.

[0026] In the second aspect, the process parameters of the MPCVD are optimized to obtain a process parameter formula, and the process parameter formula is used for preparing the doped gallium oxide layer to improve the crystal quality, the compactness and the grain size of the doped gallium oxide layer, thereby improving the performance of the PN junction. The specific optimization principle of the process parameters is as follows: First, the influence of the MPCVD process parameters on the compactness of the film.

[0027] The microwave power is increased to enhance the dissociation and activation degree in the plasma, so that more high-energy particles bombard the growth surface to improve the surface atomic mobility. This is conducive to filling the micro voids formed in the growth process and promoting the film to form a tightly packed structure, thereby improving the compactness of the film. At the same time, sufficient plasma energy can also eliminate pores and defects in situ to avoid the formation of loose columnar grain boundary structures. In addition, the gas flow and the growth pressure change the film compactness by affecting the reactant supply and the plasma characteristics. Moderate oxygen flow can ensure sufficient oxygen source to participate in the reaction, so that Ga is fully oxidized and deposited into a continuous film layer. Insufficient oxygen flow will lead to local oxygen vacancies and insufficiently oxidized areas, which will destroy the continuity and compact structure of the film. Excessive oxygen (excessive gas supply ratio) may cause the plasma to be excessively cooled or cause rapid saturation nucleation, forming small isolated grains, which is not conducive to compact growth. In addition, the increase of the growth temperature also promotes the compactness: the higher substrate temperature enhances the surface diffusion, which promotes the adsorbed atoms to fill the low-density sites in the migration process, reduces the pores and defects, and thereby significantly improves the compactness of the film. Overall, by precisely controlling the above MPCVD process parameters in the optimization range, a high-compactness gallium oxide film with a smooth surface and no obvious voids can be obtained.

[0028] Second, the influence of the MPCVD process parameters on the crystallinity of the film.

[0029] Process parameters play a decisive role in the crystal quality (crystallinity) of gallium oxide films. First, the growth temperature is a key factor affecting the degree of crystallization: higher temperatures provide sufficient thermal energy for gallium oxide atoms to arrange in an orderly lattice position, thereby improving the crystallinity. The present application takes advantage of the characteristics of MPCVD plasma-assisted energy, even at relatively low substrate temperatures, by providing additional energy through high-density plasma to promote gallium oxide film crystallization. In addition, increasing the microwave power can enhance the effect of plasma on the growth surface, allowing the crystal nucleus to obtain higher energy for further growth and form a more perfect crystal structure. At the same time, the gas composition and supply ratio have a significant impact on the crystal structure of gallium oxide. Ensuring the appropriate supply ratio of oxygen source to gallium source can avoid lattice oxygen deficiency caused by insufficient oxygen. Oxygen vacancies are common point defects in gallium oxide, and excessive oxygen vacancies can destroy the order of the lattice and reduce the crystallinity; increasing the supply of oxygen helps to fill oxygen vacancies, making the lattice more complete and improving the crystal quality. Through experimental optimization, the present application selects 1500-4000W microwave power, 50-200mbar pressure, and a suitable combination of oxygen / nitrogen flow to achieve high-crystalline quality growth of gallium oxide films.

[0030] Third, the influence of MPCVD process parameters on grain size.

[0031] MPCVD process parameters also affect the grain size of gallium oxide films, which in turn relates to the performance of the film. Generally speaking, higher growth temperatures and sufficient surface energy help the grain to grow. When the temperature rises, the diffusion and rearrangement process of atoms in the film accelerates, small crystal nuclei can merge and grow, reducing the occurrence of new nucleation, resulting in an increase in the average grain size. The present application achieves a higher equivalent growth temperature through the combined action of substrate heating and plasma, and the grain size is significantly larger than that of conventional low-temperature deposited films, with more perfect grains. In addition to temperature, microwave power and atmosphere composition also affect grain size. Appropriately increasing the microwave power can increase the surface active species and growth energy, allowing existing grains to grow larger; it is necessary to control the balance between growth rate and nucleation rate. By adjusting the supply ratio of Ga source and oxygen and introducing an appropriate amount of nitrogen gas, the present process effectively reduces the supersaturation driving force, avoids the simultaneous occurrence of too many crystal nuclei, and allows the limited crystal nuclei to continue to grow. This increases the average size of the grains, and the grain size distribution is uniform. Larger grains mean fewer grain boundaries, and the reduction in grain boundary area not only reduces the defect density at the grain boundary, but also improves the overall density of the film. In summary, the optimized MPCVD parameters significantly improve the grain size of gallium oxide films, with complete and through-film grains, which is beneficial to the improvement of device performance and stability.

[0032] According to the above three points, the process parameters of the MPCVD are comprehensively optimized, so that the MPCVD process can be applied to the preparation of gallium oxide thin films, and the density, crystalline quality and grain size of the gallium oxide thin films prepared by the process parameter formula are relatively optimal.

[0033] In a third aspect, the electrode structure is made of graphene material. Graphene is an ideal electrode material due to its excellent electrical conductivity, thermal conductivity and mechanical strength, which can further improve the performance of the PN junction. By utilizing the high electrical conductivity and high thermal conductivity of graphene, the electrical conductivity and thermal management capability of the PN junction are improved. Finally, a diode device with high voltage bearing capacity, low leakage current and excellent conduction characteristics is realized.

[0034] Figure 1 The flow chart of the method for manufacturing the semiconductor structure is provided for an embodiment of the present application. Referring to Figure 1 , the method steps include: S101, providing a substrate.

[0035] In an example, the substrate can be a single crystal substrate.

[0036] Illustratively, the single crystal substrate can be a diamond substrate.

[0037] In other examples, the substrate can be a Si substrate, a SiC substrate, etc. The material of the substrate is not used to limit the present application.

[0038] S102, manufacturing a first semiconductor layer on the surface of the substrate, the first semiconductor layer including a diamond layer with a first doping type.

[0039] In an example, step S102 includes: Introducing a mixed gas of diborane and hydrogen into an MPCVD growth cavity, the volume ratio of diborane being 5%, growing a p-type diamond epitaxial layer on the diamond substrate, the doping concentration being about , the microwave power being 4200W, the growth pressure being 150mtorr, the growth temperature being 900℃, the hydrogen flow being 200sccm, the methane flow being 10sccm, and the diborane mixed gas flow being 0.5sccm.

[0040] In the present embodiment, the first doping type is P-type doping.

[0041] In an example, the P-type doping can be doping of boron elements.

[0042] In an example, the doping concentration of boron elements in the first semiconductor layer is to .

[0043] For example, the doping concentration of boron element in the first semiconductor layer is 1E17cm-3~1E21cm-3. .

[0044] In an example, the thickness of the first semiconductor layer is 50nm~500nm.

[0045] Illustratively, the thickness of the first semiconductor layer is 100nm.

[0046] S103, a second semiconductor layer is made on the surface of the first semiconductor layer, and the second semiconductor layer comprises a gallium oxide layer with a second doping type.

[0047] Referring to Figure 2 In an example, step S103 comprises: Step 1, continuously inputting a gallium source into the MPCVD growth chamber.

[0048] In an example, step 1 comprises: Opening the valve of the carrier gas, adjusting the temperature of the gallium source, the pressure of the gallium source bottle, and the flow rate of the carrier gas, and using the carrier gas to bring the gallium source into the growth chamber.

[0049] In an example, the first process parameter formula is as follows: The temperature of the gallium source is-10℃~30℃, the pressure of the gallium source bottle is 100torr~760torr, and the flow rate of the main carrier gas is 5sccm~50sccm.

[0050] Illustratively, the temperature of the gallium source is 20℃, the pressure of the gallium source bottle is 200torr, and the flow rate of the main carrier gas is 20sccm.

[0051] In an example, the carrier gas can be one or more of hydrogen and helium.

[0052] Step 2, continuously inputting an oxygen source into the MPCVD growth chamber.

[0053] In an example, step 2 comprises: In an example, step S204 comprises: Adjusting the flow rate of the oxygen, adjusting the supply amount of the gallium source and the oxygen source, and inputting the oxygen source into the growth chamber.

[0054] In an example, the second process parameter formula is as follows: The supply ratio of the gallium source to the oxygen source is 10 2 ~10 5 .

[0055] For example, the supply ratio of the gallium source to the oxygen source is 1000.

[0056] In an example, the oxygen source can be one or more of oxygen and ozone.

[0057] Step 3, turn on the microwave power, introduce the impurity of the second doping type, and epitaxially grow a gallium oxide film with the second doping type in the MPCVD growth cavity.

[0058] In an example, the third process parameter recipe includes: The microwave power is 2 kW-3 kW, the growth pressure is 40 torr-60 torr, the growth temperature is 400°C-600°C, the growth gas includes a carrier gas, the total flow rate of the growth gas and the oxygen source is 200 sccm-500 sccm, the ratio of the oxygen source to the growth gas is 1:48-3:97, the doping source temperature is 20°C-80°C, the pressure of the doping source bottle is 0.5 torr-5 torr, and the flow rate of the carrier gas of the doping source is 1 sccm-20 sccm.

[0059] In an example, the carrier gas is hydrogen.

[0060] In an example, the doping source is an N-type doping source. When the doping source is an N-type doping source, the doping source can be silicon (Si), tin (Sn), or germanium (Ge).

[0061] In an example, the thickness of the doping layer is 100-200 nm.

[0062] Illustratively, the thickness of the doping layer is 150 nm.

[0063] In this embodiment, the second doping type is an N-type doping.

[0064] In an example, the N-type doping can be doping of a silicon element.

[0065] In an example, the doping concentration of the silicon element in the second semiconductor layer is to .

[0066] For example, the doping concentration of the silicon element in the second semiconductor layer is .

[0067] In an example, the thickness of the first semiconductor layer is 100 nm-1000 nm.

[0068] Illustratively, the thickness of the first semiconductor layer is 200 nm.

[0069] In this embodiment, the thickness of the second semiconductor layer is 1.5 times-2.5 times the thickness of the first semiconductor layer.

[0070] For example, the thickness of the second semiconductor layer is 2 times the thickness of the first semiconductor layer.

[0071] Figure 3A flow chart of a method for manufacturing a semiconductor structure is provided in an embodiment of the present application. Referring to Figure 1 The method steps include: S201, providing a substrate.

[0072] Referring to step S101.

[0073] S202, manufacturing a buffer layer on a surface of the substrate.

[0074] S203, manufacturing a first semiconductor layer on a surface of the buffer layer, the first semiconductor layer comprising a diamond layer having a first doping type.

[0075] Referring to step S102.

[0076] S204, manufacturing a second semiconductor layer on a surface of the first semiconductor layer, the second semiconductor layer comprising a gallium oxide layer having a second doping type.

[0077] Referring to step S103.

[0078] Figure 4 A flow chart of a method for manufacturing a semiconductor structure is provided in another embodiment of the present application. Referring to Figure 4 The method steps include: S301, providing a substrate.

[0079] Referring to step S101.

[0080] S302, manufacturing a buffer layer on a surface of the substrate.

[0081] Referring to step S202.

[0082] S303, manufacturing a first semiconductor layer on a surface of the buffer layer, the first semiconductor layer comprising a diamond layer having a first doping type.

[0083] Referring to step S102.

[0084] S304, manufacturing a second semiconductor layer on a surface of the first semiconductor layer, the second semiconductor layer comprising a gallium oxide layer having a second doping type.

[0085] Referring to step S103.

[0086] S305, manufacturing an electrode structure, the electrode structure comprising a first electrode electrically connected to the first semiconductor layer and a second electrode electrically connected to the second semiconductor layer, the first electrode and the second electrode being made of graphene material.

[0087] Referring to Figure 5 In an example, step S305 includes: Step 1, a patterned photoresist layer is made on the surface of the second semiconductor layer, and the patterned photoresist layer exposes the electrode preparation area.

[0088] Step 2, etching the second semiconductor layer in the electrode preparation area to form a step structure, and the step structure exposes the first semiconductor layer.

[0089] In this embodiment, the second semiconductor layer is etched by a reactive ion etching process.

[0090] Step 3, making a first electrode and a second electrode, the first electrode is connected with the first semiconductor layer at the step structure, and the second electrode is connected with the second semiconductor layer at the step structure.

[0091] In an example, the first electrode and the second electrode can be prepared by magnetron sputtering, and the process parameters of magnetron sputtering are as follows: A high-purity (purity ≥ 99.9%) natural graphite target is used as the target material, and the target material has a diameter of 2 inches. The sputtering method adopts radio frequency magnetron sputtering (RF, 13.56 MHz); the working gas is high-purity argon (Ar, purity 99.999%), and the flow rate of the working gas is 14 sccm; the working pressure is 2 Pa; the RF power is 100 W; the target-substrate distance is about 15 cm; the substrate temperature is controlled between room temperature and 200°C (if high-quality graphene is required, it can be increased to 600°C); the deposition time is 15 minutes to 40 minutes, and the graphene film thickness is controlled to be 100 nm~200 nm; the graphene electrode thickness is about 100 nm for the p-terminal electrode and about 200 nm for the n-terminal electrode; the film thickness is controlled by using a quartz crystal oscillator; the uniformity is optimized by continuously rotating the substrate during deposition; and the post-processing is annealing at 400°C for 30 minutes in a nitrogen atmosphere after deposition to improve the conductivity of the graphene and the film-substrate interface adhesion performance.

[0092] Referring to Figure 6 In another example, step S204 includes: Step 1, a patterned photoresist layer is made on the surface of the second semiconductor layer, and the patterned photoresist layer exposes the electrode preparation area.

[0093] Step 2, etching the second semiconductor layer in the electrode preparation area to form a step structure, and the step structure exposes the first semiconductor layer.

[0094] Step 3, making a passivation layer, the passivation layer covers the first semiconductor layer and the second semiconductor layer.

[0095] In this embodiment, the passivation layer can be an insulating layer.

[0096] Step 4, manufacturing a first electrode and a second electrode, the first electrode is connected with the first semiconductor layer at the step structure, and the second electrode is connected with the second semiconductor layer at the step structure.

[0097] Figure 7 A structural schematic diagram of a semiconductor structure is provided in an embodiment of the present application. Referring to Figure 7 , the semiconductor structure comprises: a substrate 10.

[0098] a first semiconductor layer 20, the first semiconductor layer comprises a diamond layer with a first doping type.

[0099] a second semiconductor layer 30, the second semiconductor layer comprises a gallium oxide layer with a second doping type. The first semiconductor layer and the second semiconductor layer form a step structure 100.

[0100] an electrode structure 40, the electrode structure comprises a first electrode 401 electrically connected with the first semiconductor layer 20 at the step structure, and a second electrode 402 electrically connected with the second semiconductor layer 30 at the step structure, the first electrode 401 and the second electrode 402 are made of graphene material.

[0101] It should be noted that, Figure 7 the semiconductor structure shown in the figure is a PN junction, which can be applied to semiconductor devices such as current diode, voltage stabilizing diode, light emitting diode, junction field effect transistor and insulated gate field effect transistor, and the present application is not limited thereto.

[0102] In addition, on the basis of Figure 7 the structure, a film layer structure can be added, for example, a buffer layer is added between the substrate and the first semiconductor layer, or an insertion layer is added between the first semiconductor layer and the second semiconductor layer, or a buffer layer is added on the surface of the second semiconductor layer, and the present application is not limited thereto.

[0103] In addition, the first semiconductor layer and the second semiconductor layer can be single-layer or multi-layer structure, for example, the first semiconductor layer can add additional film layer structure on the basis of the diamond layer, and the present application is not limited thereto.

[0104] Figure 8 A three-dimensional view of a semiconductor structure is provided in an embodiment of the present application. Among them, Figure 8 is a three-dimensional view of the semiconductor structure in Figure 7 .

[0105] Figure 9 A structural schematic diagram of a semiconductor structure is provided in another embodiment of the present application. Referring to Figure 9 , the semiconductor structure comprises: a substrate 10.

[0106] The first semiconductor layer 20 includes a diamond layer having a first doping type.

[0107] The second semiconductor layer 30 includes a gallium oxide layer having a second doping type. The first semiconductor layer and the second semiconductor layer form a stepped structure 100 .

[0108] A passivation layer 50 covers the first semiconductor layer 20 and the second semiconductor layer 30 at the stepped structure.

[0109] The electrode structure 40 includes a first electrode 401 electrically connected to the first semiconductor layer 20 at the step structure, and a second electrode 402 electrically connected to the second semiconductor layer 30 at the step structure. The first electrode 401 and the second electrode 402 are made of graphene material.

[0110] Figure 10 This is a schematic diagram of the structure of the MPCVD growth system provided in one embodiment of the present application. Figure 10 , the MPCVD growth system includes: Growth chamber 1, used for growing semiconductor structures; A methane supply pipeline 2 is used to supply a methane mixed gas into the growth chamber 1; A hydrogen supply pipeline 3 is used to supply hydrogen into the growth chamber 1; a diborane mixed gas supply pipeline 4 for supplying the diborane mixed gas into the growth chamber 1; Oxygen supply pipeline 5, used for supplying oxygen source into the growth chamber 1; a silane supply line 6 for supplying silane into the growth chamber 1; A gallium source supply pipeline 7 is used to supply carrier gas and gallium source into the growth chamber 1; The gas mixing chamber 8 is used to mix the gases before they are introduced into the growth chamber 1 .

[0111] In one example, the growth chamber 1 has a sample stage 11 for supporting the semiconductor structure 10. The top of the growth chamber 1 has a transition chamber 12, one side of the growth chamber 1 has an atomic emission spectrometer window 13, and the other side has an observation window 14.

[0112] In one example, the methane supply pipeline 2 has a methane source 30 , a manual valve 21 , a flow meter 22 , and a pneumatic valve 23 in sequence.

[0113] In one example, the hydrogen supply pipeline 3 has a hydrogen source 20 , a manual valve 21 , a flow meter 22 , and a pneumatic valve 23 in sequence.

[0114] In an example, the diborane mixed gas supply pipeline 4 has, in sequence, a diborane source 40, a manual valve 21, a flow meter 22, and a pneumatic valve 23.

[0115] In an example, the oxygen supply pipeline 5 has, in sequence, an oxygen source 40, a manual valve 21, a flow meter 22, and a pneumatic valve 23.

[0116] In an example, the silane supply pipeline 6 has, in sequence, a silane source 40, a manual valve 21, a flow meter 22, and a pneumatic valve 23.

[0117] In an example, the gallium source supply pipeline 7 includes a supply main pipeline 71, a first supply branch pipeline 72, and a second supply branch pipeline 73.

[0118] The first supply branch pipeline 72 includes an inlet sub-pipeline 721 and an outlet sub-pipeline 722, the inlet sub-pipeline 721 is in communication with the supply main pipeline 71 at one end and with the gallium source 74 at the other end, the outlet sub-pipeline 722 is in communication with the gallium source 74 at one end and with the supply main pipeline 71 at the other end. The second supply branch pipeline 72 is in communication with the inlet sub-pipeline 721 and the outlet sub-pipeline 722.

[0119] In an example, the supply main pipeline 71 has, in sequence, a carrier gas source 70, a manual valve 21, a flow meter 22 (for measuring the flow of the main carrier gas), and a pneumatic valve 23.

[0120] In an example, the inlet sub-pipeline 721 has, in sequence, a pneumatic valve 23 and a manual valve 21.

[0121] In an example, the outlet sub-pipeline 522 has, in sequence, a manual valve 21 and a pneumatic valve 23.

[0122] In an example, the second supply branch pipeline 52 is provided with a pneumatic valve 23.

[0123] In an example, the MPCVD growth system further includes: An exhaust gas treatment pipeline 9 for treating the exhaust gas in the growth chamber 1.

[0124] In an example, the exhaust gas treatment pipeline 9 includes an exhaust gas treatment main pipeline 91 and an exhaust gas treatment branch pipeline 92, the exhaust gas treatment branch pipeline 92 is connected at both ends to the exhaust gas treatment main pipeline 91.

[0125] In an example, the exhaust gas treatment main pipeline 91 has, in sequence, a butterfly valve 901, a molecular pump 902, a pneumatic valve 23, an exhaust gas treatment device 903, and a mechanical pump 904.

[0126] In an example, the exhaust gas treatment branch pipeline 92 is provided with a pneumatic valve 93.

[0127] In combination with the MPCVD growth system in Figure 10 and the method for growing a gallium nitride crystal in Figures 1 to 4The method for preparing the gallium oxide film with the second doping type in the method steps, and some specific preparation examples of the gallium oxide layer with the second doping type are given. Example 1 The n-type gallium oxide doping technology is very mature and is widely applied to gallium oxide Schottky diodes and gallium oxide MOSFET devices. The n-type gallium oxide can be obtained by laser pulse deposition, magnetron sputtering, chemical vapor deposition (CVD) and other methods on a heterogeneous substrate. Therefore, based on the MPCVD diamond and gallium oxide heterogeneous epitaxial growth technology, the application develops a preparation method of diamond / gallium oxide heterojunction PN junction, and through the technology, the diamond / gallium oxide heterojunction PN junction device with low on-resistance, high withstand voltage, good stability at high temperature and high current bearing capacity can be realized.

[0128] Step one: the single crystal (111) diamond substrate is boiled at 280 DEG C for 30 min using 98% sulfuric acid, and is cleaned in acetone, alcohol and deionized water under ultrasonic cleaning for 15 min, and then is dried by blowing clean nitrogen.

[0129] Step two: the diamond substrate is etched by plasma etching using hydrogen and oxygen, the etching time is 10 min, the defects on the surface of the diamond substrate are removed, the microwave power in the etching process is 3000 W, the etching pressure is 100 mtorr, the hydrogen flow is 200 sccm, and the oxygen flow is 2 sccm.

[0130] Step three: a high-nitrogen buffer layer is grown to eliminate defects on the substrate, and the growth process parameters are as follows: the microwave power is 4000 W, the growth pressure is 150 mtorr, the growth temperature is 850 DEG C, the hydrogen flow is 200 sccm, the methane flow is 10 sccm, the nitrogen flow is 1 sccm, and the growth time is 2 hours.

[0131] Step four: a mixed gas of diborane and hydrogen is introduced, the volume ratio of diborane is 5%, and a p-type diamond epitaxial layer is grown on the diamond substrate, and the doping concentration is about , and the growth process parameters are as follows: the microwave power is 4200 W, the growth pressure is 150 mtorr, the growth temperature is 900 DEG C, the hydrogen flow is 200 sccm, the methane flow is 10 sccm, and the diborane mixed gas flow is 0.5 sccm.

[0132] Step five: a mixed gas of silane, hydrogen and oxygen is introduced, the volume ratio of silane is 5%, and an n-type gallium oxide layer is grown on the p-type diamond epitaxial layer, and the doping concentration is about , the growth process parameters: microwave power is 2700W, growth pressure is 80mtorr, growth temperature is 700℃, hydrogen flow is 200sccm, oxygen flow is 8sccm, carrier gas flow is 150sccm, and silane mixed gas flow is 0.5sccm.

[0133] Step six: using photolithography mask method, making pattern on n-type gallium oxide, using RIE method to remove gallium oxide layer in specific position. The process of RIE etching gallium oxide includes chemical reaction and physical etching. The etching gas is and , the etching gas flow is 20sccm~50sccm and 10sccm~40sccm respectively, the radio frequency power is 100W~300W, the pressure is 10mtorr~100mtorr, and the etching time is 5min~40min.

[0134] Step seven: using chemical vapor deposition (CVD) method to grow graphene as electrode material on specific area of p-type diamond and n-type gallium oxide, the thickness of each layer is 100nm, 200nm and 200nm respectively, to ensure good electrical contact and mechanical stability. The annealing atmosphere is nitrogen, and the annealing temperature is 400℃, to enhance the interface bonding of graphene and diamond and gallium oxide.

[0135] Example 2: In order to further optimize the performance of diamond / gallium oxide PN junction, different doping concentrations and growth temperatures are used in example 2 to explore their influence on device performance.

[0136] Step one: using 98% sulfuric acid to cook single crystal (100) diamond substrate at 280℃ for 25min, and then ultrasonic cleaning in acetone, alcohol and deionized water for 10min, and then blowing dry with clean nitrogen.

[0137] Step two: using hydrogen and oxygen plasma etching on diamond substrate for 8min, etching process parameters: 3500W, etching pressure is 100mtorr, hydrogen flow is 180sccm, and oxygen flow is 1.5sccm.

[0138] Step three: growing a high nitrogen buffer layer to eliminate defects on the substrate, the growth process parameters: microwave power is 4000W, growth pressure is 150mtorr, growth temperature is 850℃, hydrogen flow is 200sccm, methane flow is 10sccm, nitrogen flow is 1sccm, and growth time is 2 hours.

[0139] Step four: introducing mixed gas of diborane and hydrogen, the volume ratio of diborane is 10%, growing p-type diamond epitaxial layer on the diamond substrate, and the doping concentration is about , the growth process parameters are as follows: microwave power is 5000W, growth pressure is 140mtorr, growth temperature is 850℃, hydrogen flow is 180sccm, methane flow is 8sccm, and diborane mixed gas flow is 0.4sccm.

[0140] Step five: a layer of n-type gallium oxide is grown on the p-type diamond epitaxial layer by introducing a mixture of silane and hydrogen, and the volume ratio of silane is 10%, and the doping concentration is about 1*1018cm-3. , the growth process parameters are as follows: microwave power is 2800W, growth pressure is 80mtorr, growth temperature is 680℃, hydrogen flow is 180sccm, oxygen flow is 4sccm, carrier gas flow is 140sccm, and silane mixed gas flow is 0.4sccm.

[0141] Step six: a pattern is made on the n-type gallium oxide by using a photolithography mask method, and the gallium oxide layer at a specific position is removed by using an RIE method, and the etching method parameters are the same as those in example 1.

[0142] Step seven: graphene is grown as electrode material on the specific area of the p-type diamond and the n-type gallium oxide by using a chemical vapor deposition (CVD) method, and the thicknesses of each layer are 120nm, 220nm and 220nm respectively, so as to ensure good electrical contact and mechanical stability. The annealing atmosphere is nitrogen, and the annealing temperature is 450℃, so as to enhance the interface bonding of graphene and diamond and gallium oxide.

[0143] Figure 11 A surface scanning electron microscope (SEM) image of a gallium oxide doped film provided in the present application is shown in FIG. 4. Figure 11 The film surface shows a continuous, uniform and dense structure without obvious cracks or holes, indicating that the prepared film has good surface morphology and structural integrity. From the figure, it can be observed that the grain boundaries are obvious, and the grains are distributed in a polygonal shape, with a particle size of about tens to hundreds of nanometers, indicating that the film has obtained an excellent crystal growth environment under the MPCVD condition. Figure 11 The role of the MPCVD process parameter setting in the present application in controlling the grain size and improving the density is effectively verified, which lays a foundation for the improvement of the doping behavior and electrical performance in the subsequent.

[0144] Finally, it should be noted that: the above examples are only used to illustrate the technical solutions of the present application, but not to limit them; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing examples, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A method for manufacturing a semiconductor structure, characterized in that: include: providing a substrate; forming a first semiconductor layer on a surface of a substrate, wherein the first semiconductor layer comprises a diamond layer having a first doping type; A second semiconductor layer is formed on the surface of the first semiconductor layer, wherein the second semiconductor layer includes a gallium oxide layer having a second doping type.

2. The method for manufacturing a semiconductor structure according to claim 1, wherein: The step of forming a second semiconductor layer on the surface of the first semiconductor layer, wherein the second semiconductor layer includes a gallium oxide layer having a second doping type, comprises: Continuously introduce gallium source into the MPCVD growth chamber; Continuously introduce an oxygen source into the MPCVD growth chamber; The microwave power supply is turned on, and impurities of the second doping type are introduced to obtain a gallium oxide thin film having the second doping type by epitaxy in the MPCVD growth chamber.

3. The method for manufacturing a semiconductor structure according to claim 2, wherein: When the gallium source is continuously introduced into the MPCVD growth chamber, the parameters are as follows: The gallium source temperature is -10°C~30°C, the pressure of the gallium source bottle is 100torr~760torr, and the carrier gas flow rate is 5sccm~50sccm.

4. The method for manufacturing a semiconductor structure according to claim 2, wherein: The supply ratio of gallium source to oxygen source is 10 2 ~10 5 .

5. The method for manufacturing a semiconductor structure according to claim 2, wherein: Turn on the microwave power supply, introduce impurities of the second doping type, and epitaxially grow a gallium oxide film with the second doping type in the MPCVD growth chamber. The parameters are as follows: The microwave power is 2kW~3kW, the growth pressure is 40torr~60torr, the growth temperature is 400℃~600℃, the growth gas includes carrier gas, the total flow rate of growth gas and oxygen source is 200sccm~500sccm, the ratio of oxygen source to growth gas is 1:48~3:97, the doping source temperature is 20℃~80℃, the pressure of the doping source bottle is 0.5torr~5torr, and the carrier gas flow rate of the doping source is 1sccm~20sccm.

6. The method for manufacturing a semiconductor structure according to claim 2, wherein: The thickness of the second semiconductor layer is 1.5 to 2.5 times the thickness of the first semiconductor layer.

7. The method for manufacturing a semiconductor structure according to any one of claims 1 to 6, wherein: The method for manufacturing the semiconductor structure further includes: A buffer layer is formed between the substrate and the first semiconductor layer.

8. The method for manufacturing a semiconductor structure according to any one of claims 1 to 6, wherein: The step of forming a buffer layer between the substrate and the first semiconductor layer comprises: Under a growth pressure of 120mtorr~170mtorr and a growth temperature of 800℃~900℃, a microwave power of 3500W~4500W is used, and hydrogen with a flow rate of 180sccm~220sccm, methane with a flow rate of 5~15sccm, and nitrogen with a flow rate of 0.5~3sccm are introduced to grow a high nitrogen buffer layer.

9. The method for manufacturing a semiconductor structure according to any one of claims 1 to 6, wherein: The method for manufacturing the semiconductor structure further includes: An electrode structure is manufactured, wherein the electrode structure includes a first electrode electrically connected to the first semiconductor layer and a second electrode electrically connected to the second semiconductor layer, wherein the first electrode and the second electrode are made of graphene material.

10. A semiconductor structure, characterized in that The semiconductor structure is manufactured by the method according to any one of claims 1 to 9.

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