NAND Flash data decoding method, computer equipment and storage medium

Abstract

The embodiment of the invention provides an NAND Flash data decoding method, computer equipment and a storage medium, and the method comprises the steps: receiving a modulation request of an original code word, and carrying out the BPSK modulation of the original code word, and obtaining a first numerical value and a second numerical value; adding noise to the first value and the second value according to preset Gaussian distribution to obtain target Gaussian distribution and target code words; when the target Gaussian distribution has an overlapping region, calculating the boundary of the overlapping region to obtain a target boundary so as to obtain a target region; performing LLR region division on the target region to obtain thresholds of a plurality of LLR regions; performing LLR quantization on the target code word according to the thresholds of the plurality of LLR regions to obtain LLR information of the target code word; and inputting the LLR information of the target code word into LDPC for decoding to obtain decoding information. According to the embodiment of the invention, the decoding error correction performance obtained by LDPC simulation is more reliable and practical and is closer to the decoding error correction performance when an NAND Flash module is applied.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of decoding NAND Flash data, and particularly relates to a decoding method of NAND Flash data, a computer device and a storage medium. BACKGROUND

[0002] In the related art, NAND Flash is a kind of flash memory, which has been widely used in various electronic devices and is an important component that cannot be acquired. NAND Flash types include SLC, MLC, TLC, QLC, etc. Due to the physical characteristics of bit flipping of stored data, almost all NAND Flash modules need to be used with an ECC module. At present, LDPC code is the most common ECC code for NAND Flash modules. LDPC usually has good error correction capability to cope with the situation of bit flipping of NAND Flash data.

[0003] The decoding error correction performance of LDPC usually depends on its iterative algorithm and more importantly, the check matrix. LDPC simulation is the most important way to verify the decoding iterative algorithm and the check matrix of LDPC. The noise model used for simulating NAND Flash noise in the current mainstream LDPC simulation is Gaussian white noise, that is, after the LDPC code is modulated by BPSK, it is added with Gaussian white noise, and finally the code word with noise is obtained. Then, the LDPC code is decoded by LDPC, and one LDPC simulation decoding is completed. By repeatedly performing the above operation, the performance of the decoding iterative algorithm and the check matrix of LDPC can be evaluated when the test amount reaches the standard. However, it is difficult to be used for reliability evaluation of actual application scenarios of NAND Flash. SUMMARY

[0004] The present application aims to at least solve one of the technical problems existing in the prior art. To this end, the present application provides a decoding method of NAND Flash data, a computer device and a storage medium, which aims to improve the reliability and practicality of decoding error correction performance.

[0005] In a first aspect, an embodiment of the present application provides a decoding method of NAND Flash data, comprising: receiving a modulation request of an original code word and performing BPSK modulation on the original code word to obtain a first value and a second value; performing noise addition on the first value and the second value according to a preset Gaussian distribution to obtain a target Gaussian distribution and a target code word; when there is an overlapping region in the target Gaussian distribution, calculating a boundary of the overlapping region to obtain a target boundary to obtain a target region; perform LLR region division on the target region to obtain threshold values of a plurality of LLR regions; perform LLR quantization on the target codeword according to the threshold values of the plurality of LLR regions to obtain LLR information of the target codeword; input the LLR information of the target codeword into LDPC for decoding to obtain decoding information.

[0006] According to some embodiments of the present application, the target Gaussian distribution includes a first initial Gaussian distribution and a second initial Gaussian distribution, and the target codeword includes a first initial codeword and a second initial codeword.

[0007] According to some embodiments of the present application, the adding noise to the first value and the second value according to a preset Gaussian distribution to obtain a target Gaussian distribution and a target codeword includes: adding noise to the first value according to a preset first Gaussian distribution to obtain a first initial Gaussian distribution and a first initial codeword; adding noise to the second value according to a preset second Gaussian distribution to obtain a second initial Gaussian distribution and a second initial codeword.

[0008] According to some embodiments of the present application, the calculating a boundary of the overlapping region to obtain a target region includes: obtaining a preset value covered by the first initial Gaussian distribution; calculating a boundary of the overlapping region according to the preset value, the first value, the second value, the first initial Gaussian distribution, and the second initial Gaussian distribution to obtain a target boundary to obtain a target region.

[0009] According to some embodiments of the present application, the calculating a boundary of the overlapping region according to the preset value, the first value, the second value, the first initial Gaussian distribution, and the second initial Gaussian distribution to obtain a target boundary to obtain a target region includes: obtaining a first initial boundary of the overlapping region according to the preset value, the first value, and the first initial Gaussian distribution; obtaining a second initial boundary of the overlapping region according to the preset value, the second value, and the second initial Gaussian distribution; calculating a boundary of the overlapping region according to the first initial boundary and the second initial boundary to obtain a target boundary to obtain a target region.

[0010] According to some embodiments of the present application, the performing LLR region division on the target region to obtain threshold values of a plurality of LLR regions includes: performing LLR region division on the target region to obtain a plurality of LLR regions; According to the inverse cumulative distribution function or LDPC and a preset cumulative distribution, boundaries of the plurality of LLR regions are calculated; According to the boundaries of the plurality of LLR regions, midpoints of the plurality of LLR regions are obtained to obtain thresholds of the plurality of LLR regions.

[0011] According to some embodiments of the present application, the LLR quantization of the target codeword according to the thresholds of the plurality of LLR regions to obtain the LLR information of the target codeword comprises: obtaining an LLR value of the target codeword; comparing the LLR value with the thresholds of the plurality of LLR regions to determine an LLR region to which the LLR value belongs; quantizing the LLR value according to the LLR region to which the LLR value belongs.

[0012] According to some embodiments of the present application, the inputting of the LLR information of the target codeword into the LDPC for decoding to obtain decoding information comprises: performing iterative decoding operation based on the LLR information according to the check matrix structure of the LDPC code; stopping iteration and outputting the decoding information when a preset stopping condition is met, wherein the preset stopping condition comprises at least one of the following: the number of the iterative decoding operation reaches a preset number threshold, the decoding information satisfies a preset check equation, and the difference between the decoding information of the previous iteration and the decoding information of the current iteration is less than a preset difference threshold.

[0013] In a second aspect, embodiments of the present application provide a computer device, comprising: at least one memory; at least one processor; at least one computer program; the at least one computer program is stored in the at least one memory, and the at least one processor executes the at least one computer program to implement the decoding method of NAND Flash data of the first aspect.

[0014] In a third aspect, embodiments of the present application provide a computer readable storage medium, which stores a computer program, and the computer program is used to make a computer execute the decoding method of NAND Flash data of the first aspect.

[0015] According to the technical scheme of the embodiment of the present application, the following beneficial effects are achieved: first, a modulation request of an original code word is received and the original code word is BPSK modulated to obtain a first value and a second value; the first value and the second value are added with noise according to a preset Gaussian distribution to obtain a target Gaussian distribution and a target code word; when the target Gaussian distribution has an overlapping area, the boundary of the overlapping area is calculated to obtain a target boundary to obtain a target area; the target area is divided into LLR areas to obtain threshold values of the multiple LLR areas; the target code word is quantized according to the threshold values of the multiple LLR areas to obtain LLR information of the target code word; and the LLR information of the target code word is input into LDPC for decoding to obtain decoding information. The embodiment of the present application makes the decoding error correction performance obtained by LDPC simulation more reliable and practical and closer to the decoding error correction performance in the application of a NAND Flash module, and can be used to evaluate whether the LDPC can meet the error correction performance requirements of different NAND Flashes in various application scenarios.

[0016] Additional aspects and advantages of the present application will be in part apparent and in part pointed out hereinafter. BRIEF DESCRIPTION OF DRAWINGS

[0017] The accompanying drawings are included to provide a further understanding of the technical scheme of the present application, and constitute a part of the specification, and are used together with the embodiments of the present application to explain the technical scheme of the present application, and do not constitute a limitation on the technical scheme of the present application.

[0018] Figure 1 is a flowchart of a NAND Flash data decoding method provided by an embodiment of the present application; Figure 2 is a flowchart of obtaining a target Gaussian distribution and a target code word provided by an embodiment of the present application; Figure 3 is a flowchart of obtaining a target area provided by an embodiment of the present application; Figure 4 is a flowchart of obtaining a target area provided by another embodiment of the present application; Figure 5 is a flowchart of obtaining threshold values of multiple LLR areas provided by an embodiment of the present application; Figure 6 is a flowchart of obtaining LLR information of a target code word provided by an embodiment of the present application; Figure 7 is a flowchart of obtaining decoding information provided by an embodiment of the present application; Figure 8is a whole flowchart of a decoding method of NAND Flash data provided by an embodiment of the present application; Figure 9 is a hardware structure diagram of a computer device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0019] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the drawings, in which the same or similar notations represent the same or similar elements or elements having the same or similar functions throughout. The embodiments described below by referring to the drawings are exemplary only, and are used only for explaining the present application, and cannot be understood as a limitation of the present application.

[0020] In the description of the present application, it should be understood that, in relation to the orientation description, for example, the orientation or position relationship indicated by the up, down, front, back, left, right, etc. is based on the orientation or position relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as a limitation of the present application, which does not indicate or imply that the device or element indicated must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation of the present application.

[0021] In the description of the present application, the meaning of several is one or more, and the meaning of multiple is more than two, greater than, less than, more than, etc. are understood as not including the number, and above, below, etc. are understood as including the number. If it is described as first, second, it is only for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features or the order of indicated technical features.

[0022] In the description of the present application, unless otherwise explicitly limited, the words such as setting, installing, connecting, etc. should be understood in a broad sense, and the person skilled in the art can reasonably determine the specific meaning of the above words in the present application in combination with the specific content of the technical solution.

[0023] First, the meanings of several terms involved in the present application are analyzed: LLR sign bit (Log-Likelihood Ratio Sign Bit): a binary flag bit used to represent the positive and negative values of the log-likelihood ratio (LLR) in a communication system.

[0024] NAND Flash (Non-Volatile Memory, NVM, non-volatile memory): based on the floating gate transistor (Floating-Gate MOSFET) structure, data is stored for a long time through charge storage, and does not need to be powered continuously. Its name comes from its circuit structure as an "NAND" logic array, and is widely used in solid state drives (SSD), U disks, mobile phone storage, etc.

[0025] LDPC (Low-Density Parity-Check Code): A high-performance linear block error-correcting code, named for the extremely low proportion of 1 elements in the parity-check matrix (low-density property). Its core is to construct the parity-check relationship of the code word through a sparse check matrix, and to effectively correct the noise and interference introduced in the transmission process. LDPC code has low decoding complexity and can be implemented in parallel, and is widely used in modern communication systems (such as 5G, Wi-Fi, satellite communication) and storage systems (such as hard disk, flash memory). Its working principle is to pass reliability information (usually LLR, Log-Likelihood Ratio) between variable nodes and check nodes through iterative decoding algorithms (such as belief propagation algorithm), gradually correcting errors in received data until the check condition is met or the maximum iteration number is reached.

[0026] BPSK (Binary Phase Shift Keying): A basic digital modulation technique, belonging to the phase shift keying (PSK) modulation method. Its principle is to represent binary digital information (0 and 1) by changing the phase of the carrier, usually using two phase states that differ by 180° to correspond to "0" and "1" in binary. In BPSK modulation, when transmitting "0", the carrier phase may be 0°; when transmitting "1", the carrier phase is 180° (or vice versa). The receiving end recovers the original binary information by detecting the change of the carrier phase.

[0027] The decoding method of NAND Flash data provided by the embodiments of the present application is specifically explained by the following embodiments.

[0028] The embodiments of the present application can acquire and process related data based on artificial intelligence technology. Among them, artificial intelligence (AI) is to use digital computers or machines controlled by digital computers to simulate, extend and expand human intelligence, perceive the environment, acquire knowledge and use knowledge to obtain the best results. The theory, method, technology and application system. Artificial intelligence basic technologies generally include technologies such as sensors, special artificial intelligence chips, cloud computing, distributed storage, big data processing technology, operation / interaction system, mechatronics, etc. Artificial intelligence software technology mainly includes computer vision technology, robot technology, biometric technology, speech processing technology, natural language processing technology, and machine learning / deep learning, etc. Several major directions.

[0029] The method for decoding NAND Flash data provided in the embodiments of the present application relates to the technical field of decoding NAND Flash data. The method for decoding NAND Flash data provided in the embodiments of the present application can be applied in a terminal, can also be applied in a server end, and can also run in software in the terminal or the server end. In some embodiments, the terminal can be a smart phone, a tablet computer, a notebook computer, a desktop computer, etc.; the server end can be configured as an independent physical server, can also be configured as a server cluster or a distributed system composed of multiple physical servers, can also be configured as a cloud server for providing basic cloud computing services such as cloud service, cloud database, cloud computing, cloud function, cloud storage, network service, cloud communication, middleware service, domain name service, security service, CDN, and big data and artificial intelligence platform; and the software can implement the application of the method for decoding NAND Flash data and the like, but is not limited to the above forms.

[0030] The present application can be used in many general or special computer system environments or configurations. For example: personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable consumer electronics, network PCs, minicomputers, mainframe computers, distributed computing environments including any of the above systems or devices, etc. The present application can be described in the general context of computer-executable instructions executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The present application can also be practiced in a distributed computing environment, in which tasks are performed by remote processing devices connected by a communication network. In a distributed computing environment, program modules can be located in local and remote computer storage media, including storage devices.

[0031] It should be noted that in each specific embodiment of the present application, when relevant processing needs to be performed according to data related to the identity or characteristics of the user, such as user information, user behavior data, user history data, and user location information, the user's permission or consent will be obtained first, and the collection, use, and processing of the data will comply with relevant laws, regulations, and standards. In addition, when the embodiments of the present application need to obtain sensitive personal information of the user, the separate permission or separate consent of the user will be obtained through a pop-up window or a jump to a confirmation page, and after obtaining the separate permission or separate consent of the user, the necessary user-related data for enabling the embodiments of the present application to normally operate will be obtained.

[0032] Referring to Figure 1 , Figure 1is a flowchart of a decoding method of NAND Flash data provided by an embodiment of the present application; the decoding method of NAND Flash data provided by the embodiment of the present application includes but is not limited to steps S110 to S160, and each step will be introduced in turn. Step S110, receiving a modulation request of an original code word and performing BPSK modulation on the original code word to obtain a first value and a second value; It should be noted that BPSK (Binary Phase Shift Keying) is a modulation method for converting binary data into analog signals: the original code word is a binary sequence, such as 0 and 1, and the BPSK modulation rule is usually that 0 is mapped to the first value (such as +1) and 1 is mapped to the second value (such as -1).

[0033] Step S120, adding noise to the first value and the second value according to a preset Gaussian distribution to obtain a target Gaussian distribution and a target code word; It should be noted that the preset Gaussian distribution is a normal distribution with a mean of 0 and a variance of σ 2 The first value (+1) and the second value (-1) after modulation are added with Gaussian noise, and the target code word obtained after adding noise is the actual received signal, and the target Gaussian distribution refers to the probability distribution of the two signals (original +1 and original -1) after adding noise.

[0034] Step S130, when the target Gaussian distribution has an overlapping region, calculating the boundary of the overlapping region to obtain a target boundary to obtain a target region; It should be noted that when the two Gaussian distributions overlap, the overlapping region needs to be determined, and the two Gaussian distributions (with +1 and -1 as the center respectively) will have an intersection point, and the target boundary is the intersection point of the two distributions.

[0035] Step S140, performing LLR region division on the target region to obtain threshold values of a plurality of LLR regions; It should be noted that LLR (Log Likelihood Ratio) represents the logarithm of the probability ratio of the received symbol being 0 rather than 1, and the calculation formula of LLR is: LLR = ln[P(0|r) / P(1|r)].

[0036] Step S150, performing LLR quantization on the target code word according to the threshold values of the plurality of LLR regions to obtain LLR information of the target code word; Step S160, inputting the LLR information of the target code word into an LDPC for decoding to obtain decoding information.

[0037] It should be noted that the quantized LLR information is input into the LDPC decoder, and the decoder uses the check matrix and the iterative algorithm to perform error correction, and after multiple iterations, the final decoding information is output.

[0038] In an embodiment, a modulation request of an original code word is received, the original code word is a binary sequence, and a BPSK modulation mode is used to map binary "0" to a first value +1 and binary "1" to a second value -1. A noise sequence is generated according to a preset Gaussian distribution (mean value is 0 and variance is σ 2 ), and the noise is superimposed on the obtained first value and second value respectively to obtain a target Gaussian distribution after noise addition. The target Gaussian distribution is a convolution result of the original signal distribution and the Gaussian noise distribution. The obtained target Gaussian distribution is analyzed, and it is found that there is an overlapping area between the Gaussian distribution representing "0" (centered around +1) and the Gaussian distribution representing "1" (centered around -1). The target boundary of the overlapping area is calculated by solving the points at which the probability density functions of the two Gaussian distributions are equal. LLR (Log Likelihood Ratio) region division is performed on the obtained target region. According to a preset quantization precision, the target region is divided into multiple sub-regions and the threshold values of the regions are determined. The obtained target code word is subjected to LLR quantization according to the multiple LLR region threshold values. The obtained LLR information is input into an LDPC decoder, and the iterative decoding is performed by using a belief propagation algorithm. The decoder processes the received LLR information according to a check matrix, and outputs decoding information after a preset number of iterations. The embodiment of the present application realizes a complete communication process from signal modulation, noise addition, quantization to decoding, and can accurately recover the original information in the presence of noise interference.

[0039] It is worth noting that the scheme proposed in the embodiment of the present application makes the decoding error correction performance obtained by LDPC simulation more reliable and practical, and closer to the decoding error correction performance when the NAND Flash module is applied, and can be used to evaluate whether the LDPC can meet the error correction performance requirements of different NAND Flashes in various application scenarios.

[0040] In an embodiment, the target Gaussian distribution includes a first initial Gaussian distribution and a second initial Gaussian distribution, and the target code word includes a first initial code word and a second initial code word.

[0041] It should be noted that the first initial Gaussian distribution (mean value is 0 and standard deviation is σ1), the second initial Gaussian distribution (mean value is 0 and standard deviation is σ2), and the standard deviations of the two initial Gaussian distributions can be the same or different.

[0042] Referring to Figure 2 , Figure 2is a flowchart provided by an embodiment of the application for obtaining a target Gaussian distribution and a target code word; regarding the step S120 of adding noise to the first value and the second value according to the preset Gaussian distribution to obtain the target Gaussian distribution and the target code word, the step S210 to the step S220 are included but not limited to, and each step will be introduced in turn. The step S210 adds noise to the first value according to the preset first Gaussian distribution to obtain a first initial Gaussian distribution and a first initial code word. The step S220 adds noise to the second value according to the preset second Gaussian distribution to obtain a second initial Gaussian distribution and a second initial code word.

[0043] In an embodiment, a first value after BPSK modulation is received (assuming +1, corresponding to the original code word "0"), the first initial Gaussian distribution is N(μ1, ), wherein μ1=1, =0.5, a noise sequence matching the length of the first value is generated according to N(1, 0.5), and the noise sequence is superimposed on the first value to obtain the first initial code word: In an embodiment, a second value after BPSK modulation is received (assuming -1, corresponding to the original code word "1"), the second initial Gaussian distribution is N(μ2, ), wherein μ2=-1, =0.5, a noise sequence is generated according to N(-1, 0.5), and the noise sequence is superimposed on the second value to obtain the second initial code word.

[0044] It is worth noting that different symbols may be interfered by noise with different characteristics (such as different noise intensity differences in different frequency bands) in the transmission process, and the embodiments of the application set independent Gaussian distribution models for the two values after BPSK modulation, which more accurately simulates the noise interference in the actual communication environment.

[0045] Referring to Figure 3 , Figure 3 is a flowchart provided by an embodiment of the application for obtaining a target region; regarding the step S130 of calculating the boundary of the overlapping region to obtain the target region, the step S310 to the step S320 are included but not limited to, and each step will be introduced in turn. The step S310 obtains a preset value covered by the first initial Gaussian distribution. The step S320 calculates the boundary of the overlapping region according to the preset value, the first value, the second value, the first initial Gaussian distribution and the second initial Gaussian distribution to obtain a target boundary to obtain the target region.

[0046] It should be noted that when the preset value is 99.7%, the right side quantile of the Gaussian distribution covering 99.7% distribution is taken as the boundary threshold, when the preset value is 99.9%, the right side quantile of the Gaussian distribution covering 99.9% distribution is taken as the boundary threshold, and the preset value can be adjusted according to actual conditions.

[0047] In an embodiment, the boundary of the overlapping region is calculated by the preset value, the first value, the second value, the first initial Gaussian distribution and the second initial Gaussian distribution, the left side quantile and the right side quantile are obtained, the upper boundary of the overlapping region and the lower boundary of the overlapping region are obtained according to the left side quantile and the right side quantile, and the target boundary is obtained according to the upper boundary of the overlapping region and the lower boundary of the overlapping region to obtain the target region.

[0048] Referring to Figure 4 , Figure 4 is a flowchart of obtaining a target region provided by another embodiment of the present application; regarding the step S320 of calculating the boundary of the overlapping region according to the preset value, the first value, the second value, the first initial Gaussian distribution and the second initial Gaussian distribution to obtain the target boundary to obtain the target region, including but not limited to steps S410 to S430, each step will be introduced in turn. Step S410, obtaining the first initial boundary of the overlapping region according to the preset value, the first value and the first initial Gaussian distribution; Step S420, obtaining the second initial boundary of the overlapping region according to the preset value, the second value and the second initial Gaussian distribution; Step S430, calculating the boundary of the overlapping region according to the first initial boundary and the second initial boundary to obtain the target boundary to obtain the target region.

[0049] In an embodiment, when the preset value is 99.7%, the first value is 1, the second value is -1, the first initial Gaussian distribution is N (1, ), wherein =0.5, the left side quantile is 1-3*σ1, the lower boundary of the overlapping region is the first initial boundary, the right side quantile of the second initial Gaussian distribution covering 99.7% distribution is -1+3*σ2, the upper boundary of the overlapping region is the second initial boundary, and thus the boundary of the overlapping region is 【1-3*σ1, -1+3*σ2】.

[0050] Referring to Figure 5 , Figure 5 is a flowchart of obtaining the threshold of a plurality of LLR regions provided by an embodiment of the present application; regarding the step S140 of dividing the target region into a plurality of LLR regions to obtain the threshold of the plurality of LLR regions, including but not limited to steps S510 to S530, each step will be introduced in turn. Step S510: performing LLR region division on the target area to obtain multiple LLR regions; Step S520: Calculate based on the inverse cumulative distribution function or LDPC and a preset cumulative distribution to obtain boundaries of multiple LLR regions; Step S530 : Obtain midpoints of the multiple LLR regions according to the boundaries of the multiple LLR regions to obtain thresholds of the multiple LLR regions.

[0051] In one embodiment, the quantization level of the LLR region is set: taking 10 levels of LLR region quantization as an example (corresponding to the LDPC 5-bit soft decoding mode), the bit threshold can be divided into 10 LLR regions: [high confidence 1, medium-high confidence 1, medium confidence 1, medium-low confidence 1, low confidence 1, low confidence 0, medium-low confidence 0, medium confidence 0, medium-high confidence 0, high confidence 0]; the overlapping boundary obtained above is used as the boundary between high confidence and medium-high confidence, and the eight LLR regions [medium-high confidence 1, medium confidence 1, medium-low confidence 1, low confidence 1, low confidence 0, medium-low confidence 0, medium confidence 0, medium-high confidence 0] are in the overlapping area. LLR region division is performed on the overlapping area: the cumulative distribution size of each LLR area can be set to be the same, and the boundary of each LLR area is calculated based on this using the inverse cumulative distribution function; or according to the algorithm characteristics of LDPC (for example, low-confidence variable nodes have a greater impact on the information propagated by the check node), the cumulative distribution of the low-confidence area can be set to be smaller, and the higher-confidence area to be second, and then the boundary of each LLR area is calculated based on the cumulative distribution value set for each confidence area.

[0052] See also Figure 6 , Figure 6 This is a flow chart of obtaining LLR information of a target codeword according to an embodiment of the present application. Regarding the above-mentioned step S150, LLR quantization of the target codeword is performed according to the thresholds of multiple LLR regions to obtain the LLR information of the target codeword, including but not limited to steps S610 to S630. Each step is introduced in sequence below. Step S610: Obtain the LLR value of the target codeword; Step S620: Compare the LLR value with thresholds of multiple LLR regions to determine the LLR region to which the LLR value belongs; Step S630: quantize the LLR value according to the LLR region to which the LLR value belongs.

[0053] In an embodiment, the log-likelihood ratio (LLR) value of the target codeword is obtained, the target codeword is decoded, and the corresponding LLR value is calculated. The LLR value obtained in the previous step is compared with the threshold values of a plurality of LLR regions preset in detail. Through the comparison, it can be determined which specific LLR region the LLR value belongs to. The region division is helpful for more accurate processing of the LLR value in the subsequent step. Finally, according to the LLR region to which the LLR value belongs, a quantization operation is performed on the LLR value. The quantization operation includes mapping the LLR value to a corresponding quantization level, so as to facilitate further signal processing or data transmission. Through such quantization, the complexity of the data can be effectively reduced, while maintaining the necessary information integrity.

[0054] Referring to Figure 7 , Figure 7 is a flowchart of obtaining decoding information provided by an embodiment of the present application; regarding the step S160 of inputting the LLR information of the target codeword into the LDPC for decoding to obtain decoding information, the following steps S710 to S720 are included but not limited to, which will be introduced in turn. Step S710, performing iterative decoding operation based on the LLR information according to the check matrix structure of the LDPC code; Step S720, stopping iteration and outputting the decoding information when a preset stopping condition is met, wherein the preset stopping condition includes at least one of the following: the number of times of the iterative decoding operation reaches a preset number threshold, the decoding information satisfies a preset check equation, and the difference between the decoding information of the previous iteration and the decoding information of the current iteration is less than a preset difference threshold.

[0055] It should be noted that the maximum number of iterations is set to prevent the decoding time from being too long to affect the real-time performance. The counter is incremented by 1 after each iteration. When the maximum number of iterations is set to 50, the iteration is stopped and the decoding information is outputted regardless of whether the decoding is successful or not when the counter is 50. When the decoding information after iteration satisfies all check constraints (i.e., Hx =0, c is a hard decision vector), the decoding is successful, and the iteration can be stopped in advance. Hx is calculated after each iteration, and if the result is a full zero vector, the iteration is stopped. Assuming that the decoding information after a certain iteration satisfies all check equations, even if the current number of iterations is only 20 (less than 50), the iteration can still be terminated in advance, saving 30 times of calculation resources of iteration. When the decoding information of two consecutive iterations is extremely small (such as the number of different bits is less than 2), it indicates that the decoding has converged, and it is difficult to improve the performance by continuing the iteration. The iteration can be stopped, and the Hamming distance d between the decoding information of the kth time and the (k-1)th time is calculated. If d≤1 (preset threshold), the iteration is stopped.

[0056] Referring to Figure 8 , Figure 8is a whole flow schematic diagram of a decoding method of NAND Flash data provided by an embodiment of the present application.

[0057] Step S8001, BPSK modulation is performed on the original code word. Step S8002, Gaussian distribution A and B are generated. Step S8003, Gaussian distribution A is used for noise addition to obtain Gaussian distribution A_N, and Gaussian distribution B is used for noise addition to obtain Gaussian distribution B_N. Step S8004, the overlapping region of the two Gaussian distributions is calculated. Step S8005, the quantization level of the LLR region is designed. Step S8006, the LLR region is divided in the overlapping region. Step S8007, the LLR value of each LLR region is calculated. Step S8008, the LLR value of each LLR region is used for LLR quantization of the noise code word N. Step S8009, the LLR information of the noise code word N is input into the LDPC to complete the decoding.

[0058] In an embodiment, binary phase shift keying (BPSK) modulation is performed on the original code word to convert the original code word into a corresponding BPSK signal for subsequent processing and transmission. Next, two Gaussian distributions are generated, named Gaussian distribution A and Gaussian distribution B, which will be used for subsequent noise addition process, and the distribution of the random variable has a specific mean and variance. After generating Gaussian distribution A and Gaussian distribution B, the two distributions are used for noise addition operation. Gaussian distribution A is used to generate noise-added Gaussian distribution A_N, and similarly, Gaussian distribution B is used to generate noise-added Gaussian distribution B_N. The overlapping region of the two Gaussian distributions A_N and B_N is calculated, which represents the part that may overlap between the two distributions under the influence of noise. After determining the overlapping region, the quantization level of the LLR region is designed, which means that the continuous LLR value is discretized into a limited number of levels for processing and storage in a digital system. According to the designed quantization level, the LLR region is divided in the overlapping region into several sub-regions, each of which corresponds to a specific LLR value. The LLR value of each LLR region is calculated. The LLR value is an important indicator for measuring the similarity between the received signal and the original signal, which can help to determine the original information contained in the received signal. According to the LLR value of each LLR region, the noise code word N is subjected to LLR quantization, and each code word in the noise code word N is mapped to the corresponding LLR value, thereby obtaining the quantized noise code word. The LLR information of the noise code word N is input into the decoder of the low-density parity-check (LDPC) code to complete the decoding process.

[0059] In an embodiment, by fine-tuning the threshold of the boundary of the two Gaussian distribution overlapping areas, adjusting the threshold of the LLR area in the overlapping area, and the like, the decoding error correction performance obtained by LDPC simulation is more reliable and practical, and can be used to evaluate whether LDPC can meet the error correction performance requirements of different NAND Flash in various application scenarios.

[0060] The embodiment of the present application also provides a computer device, which comprises at least one memory, at least one processor, and at least one computer program stored in the at least one memory, and the at least one processor executes the at least one computer program to implement the decoding method of NAND Flash data in any one of the above embodiments. The computer device can be any intelligent terminal including a tablet computer, a vehicle-mounted computer, and the like.

[0061] Referring to Figure 9 , Figure 9 is a hardware structure schematic diagram of a computer device provided by an embodiment of the present application, and the computer device comprises: The processor 910 can be implemented in a general-purpose CPU (Central Processing Unit), a microprocessor, an ASIC (Application Specific Integrated Circuit), or one or more integrated circuits, and is used to execute related programs to implement the technical solutions provided by the embodiments of the present application; The memory 920 can be implemented in the form of a ROM (ReadOnly Memory), a static storage device, a dynamic storage device, or a RAM (Random Access Memory). The memory 920 can store an operating system and other application programs, and when the technical solutions provided by the embodiments of the present application are implemented by software or firmware, the related program codes are stored in the memory 920 and are called and executed by the processor 910 to implement the decoding method of NAND Flash data in the embodiments of the present application; The input / output interface 930 is used to realize information input and output; The communication interface 940 is used to realize the communication interaction between the device and other devices, and can realize communication through a wired manner (for example, a USB, a network cable, and the like) or a wireless manner (for example, a mobile network, WIFI, Bluetooth, and the like); The bus 950 transmits information between various components (for example, the processor 910, the memory 920, the input / output interface 930, and the communication interface 940) of the device. The processor 910, the memory 920, the input / output interface 930, and the communication interface 940 are connected to each other through a bus 950.

[0062] The embodiment of the present application further provides a computer readable storage medium, which stores a computer program, and the computer program is executed by a processor to realize the decoding method of the NAND Flash data.

[0063] The memory is a non-transitory computer readable storage medium, and can be used to store non-transitory software programs and non-transitory computer executable programs. In addition, the memory can include a high-speed random access memory, and can further include a non-transitory memory, for example, at least one magnetic disk storage device, a flash memory device, or other non-transitory solid-state memory device. In some embodiments, the memory can optionally include a memory remotely arranged relative to the processor, and the remote memory can be connected to the processor through a network. Examples of the network include but are not limited to the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.

[0064] The embodiments described in the embodiments of the present application are used to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided by the embodiments of the present application. Those skilled in the art can know that, with the evolution of technology and the appearance of new application scenarios, the technical solutions provided by the embodiments of the present application are also applicable to similar technical problems.

[0065] Those skilled in the art can understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of the present application, and can include more or fewer steps than the figures, or combine certain steps, or different steps.

[0066] The device embodiments described above are only schematic, and the units described as separate components can or can not be physically separate, that is, can be located in one place, or can be distributed on multiple network units. Part or all of the modules can be selected according to actual needs to achieve the purpose of the embodiments of the present application.

[0067] Those skilled in the art can understand that all or some of the steps in the above disclosed method, the function modules / units in the system and the device can be implemented as software, firmware, hardware and their appropriate combinations.

[0068] The terms "first", "second", "third", "fourth", and the like in the description of this application and in the claims hereof, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the use of the terms so termed herein is solely for the convenience of the reader and does not limit the scope of the application. It is also to be understood that the description and examples in this application are intended to cover all possible combinations where any of the several elements can represent one or more elements.

[0069] It should be understood that, in the application, "at least one" means one or more, "multiple" means two or more. "And / or" is used to describe the relationship between associated objects, which means that there can be three relationships, for example, "A and / or B" can represent three cases: only A exists, only B exists, and A and B exist at the same time, where A and B can be singular or plural. The character " / " generally represents an "or" relationship between the associated objects. "At least one of the following" or similar expressions means any combination of these items, including any combination of single or multiple items. For example, at least one of a, b or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0070] In several embodiments provided in the application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only illustrative, for example, the division of the above units is only a logical function division, and actual implementation can have another division manner, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed each other can be indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0071] The units described above as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, that is, they can be located in one place, or they can be distributed on multiple network units. According to actual needs, part or all of the units can be selected to achieve the purpose of the embodiment of the application.

[0072] In addition, each function unit in each embodiment of the present application can be integrated in one processing unit, or each unit can be physically present separately, or two or more units can be integrated in one unit. The integrated unit can be realized in the form of hardware or in the form of a software function unit.

[0073] If the integrated unit is realized in the form of a software function unit and sold or used as an independent product, it can be stored in a computer readable storage medium. Based on such understanding, the technical solutions of the present application, essentially or in part, or all or part of the technical solutions can be embodied in the form of a software product. The computer software product is stored in a storage medium, and includes multiple instructions used to cause a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods in the embodiments of the present application. The foregoing storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various other media that can store programs.

[0074] The preferred embodiments of the embodiments of the present application are described above with reference to the accompanying drawings, and are not limited to the scope of the embodiments of the present application. Any modifications, equivalent replacements and improvements made by those skilled in the art without departing from the scope and essence of the embodiments of the present application shall be within the scope of the embodiments of the present application.

Claims

1. A method of decoding NAND Flash data, the method comprising: The method comprises the following steps: receiving a modulation request of an original code word and performing BPSK modulation on the original code word to obtain a first value and a second value; adding noise to the first value and the second value according to a preset Gaussian distribution to obtain a target Gaussian distribution and a target code word; when there is an overlapping area in the target Gaussian distribution, calculating a boundary of the overlapping area to obtain a target boundary to obtain a target area; performing LLR area division on the target area to obtain threshold values of a plurality of LLR areas; performing LLR quantization on the target code word according to the threshold values of the plurality of LLR areas to obtain LLR information of the target code word; inputting the LLR information of the target code word into LDPC for decoding to obtain decoding information.

2. The method of claim 1, wherein, The target Gaussian distribution comprises a first initial Gaussian distribution and a second initial Gaussian distribution, and the target code word comprises a first initial code word and a second initial code word.

3. The method of claim 2, wherein, The method comprises the following steps: adding noise to the first value according to a preset first Gaussian distribution to obtain a first initial Gaussian distribution and a first initial code word; adding noise to the second value according to a preset second Gaussian distribution to obtain a second initial Gaussian distribution and a second initial code word.

4. The method of claim 2, wherein, The method comprises the following steps: obtaining a preset value covered by the first initial Gaussian distribution; calculating the boundary of the overlapping area according to the preset value, the first value, the second value, the first initial Gaussian distribution and the second initial Gaussian distribution to obtain a target boundary to obtain a target area.

5. The method of claim 4, wherein, The method comprises the following steps: obtaining a first initial boundary of the overlapping area according to the preset value, the first value and the first initial Gaussian distribution; obtaining a second initial boundary of the overlapping area according to the preset value, the second value and the second initial Gaussian distribution; calculating the boundary of the overlapping area according to the first initial boundary and the second initial boundary to obtain a target boundary to obtain a target area.

6. The method of claim 1, wherein, The method comprises the following steps: performing LLR area division on the target area to obtain a plurality of LLR areas; calculating a boundary of the plurality of LLR areas according to an inverse cumulative distribution function or LDPC and a preset cumulative distribution; obtaining a midpoint of the plurality of LLR areas according to the boundary of the plurality of LLR areas to obtain threshold values of the plurality of LLR areas.

7. The method of claim 6, wherein, The method comprises the following steps: obtaining an LLR value of the target code word; comparing the LLR value with thresholds of a plurality of LLR regions to determine the LLR region to which the LLR value belongs; The LLR value is quantized according to the LLR region to which the LLR value belongs.

8. The method of claim 1, wherein, The step of inputting the LLR information of the target codeword into the LDPC for decoding to obtain decoding information includes: performing an iterative decoding operation based on the LLR information according to a check matrix structure of the LDPC code; When a preset stopping condition is met, the iteration is stopped and the decoding information is output, wherein the preset stopping condition includes at least one of the following: the number of iterative decoding operations reaches a preset number threshold, the decoding information satisfies a preset verification equation, and the difference between the decoding information of the two previous and subsequent iterations is less than a preset difference threshold.

9. A computer device, comprising: include: at least one memory; at least one processor; at least one computer program; The at least one computer program is stored in the at least one memory, and the at least one processor executes the at least one computer program to implement the method according to any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, and the computer program is configured to cause a computer to execute the method according to any one of claims 1 to 8.

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