PCIe (Peripheral Component Interface Express) equipment initialization state management method and related product

Abstract

The invention provides a PCIe (Peripheral Component Interconnect Express) device initialization state management method, which can be applied to a PCIe device, and comprises the following steps: after the PCIe device establishes a PCIe link with an opposite terminal device, checking whether the initialization state of the PCIe device is abnormal and whether the PCIe device is allocated with a BDF number so as to determine whether the PCIe link needs to execute a repair operation.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of computer, more particularly, to a PCIe device initialization state management method and device, equipment and a computer readable storage medium. BACKGROUND

[0002] Peripheral Component Interconnect Express (PCIe) is a high-speed serial computer expansion bus standard, which has the characteristics of high speed, serial, point-to-point and double-channel high bandwidth. A device connected to a peer device through a PCIe bus is called a PCIe device. With the development of information technology and the increase of information quantity, the application of PCIe devices is becoming more and more widespread. The peer devices connected by the PCIe devices can include servers, personal computers (PCs), accelerator cards or processors, and other devices with PCIe expansion bus interfaces.

[0003] As a peripheral component of a peer device, the normal use of a PCIe device requires performing an initialization operation on the PCIe device to establish a PCIe link between the PCIe device and the peer device. During the PCIe device initialization operation, the configuration of the basic information of the PCIe device needs to be completed first, and then the PCIe device completes link training with the peer device through an LTSSM state machine to establish a PCIe link with the peer device. Due to the uncertainty of the external environment, there may be link abnormalities or device basic information configuration abnormalities during the establishment of the PCIe link, which ultimately leads to PCIe link establishment abnormalities, i.e., PCIe device initialization state abnormalities. In the peer device, the PCIe device may not be detected (e.g., PCIe device card drop occurs) or a large number of error records may be generated, which ultimately may cause errors or performance degradation of the peer device.

[0004] In the existing scheme, during the identification of the PCIe device by the peer device, the PCIe device is usually passive and waits for the peer device to identify it. If the PCIe device has link establishment abnormalities or initialization state abnormalities, state checking, repair or abnormal record are usually also dependent on the peer device to perform. This way is low in execution efficiency and does not have universality for PCIe devices that need to adapt to a large number of different peer devices. In addition, the repair operation in the existing scheme is usually repaired by restarting the peer device. Restarting usually takes a long time and cannot quickly complete the repair operation when the state is abnormal. Moreover, the PCIe bus is in an unusable state during the restart, which affects the normal operation of the business. SUMMARY

[0005] The disclosure provides a PCIe device initialization state management method, device, equipment and computer readable storage medium, which can be universally applied to PCIe devices, is independent of peer devices, and helps to effectively solve the problem of PCIe device card drop or incorrect identification by peer devices.

[0006] According to a first aspect of the disclosure, a PCIe device initialization state management method is provided, applied to the PCIe device, and the method comprises: after the PCIe device and a peer device establish a PCIe link, checking whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been allocated a BDF number, to determine whether the PCIe link needs to perform a repair operation.

[0007] In the method, the PCIe device actively checks the initialization state of the device and whether the device has been allocated a BDF number during the initialization process, and combines the two checking results to determine whether the PCIe link needs to perform a repair operation. The method is a general PCIe device initialization state management scheme, which is independent of whether the peer device accessed by the PCIe device is a server, a PC or other devices, and helps to effectively solve the problem of PCIe device card drop or initialization state abnormality causing the PCIe device to be incorrectly identified by the peer device.

[0008] In a possible implementation, the checking of whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been allocated a BDF number comprises: after determining whether the initialization state of the PCIe device is abnormal, checking whether the PCIe device has been allocated a BDF number.

[0009] In this implementation, it is first determined whether the initialization state of the PCIe device is abnormal, and then it is checked whether the PCIe device has been allocated a BDF number. In this way, it can be determined whether to perform a repair operation according to the latest BDF information, ensuring the accuracy of the determination result.

[0010] In a possible implementation, the checking of whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been allocated a BDF number, to determine whether the PCIe link needs to perform a repair operation, comprises: when the initialization state of the PCIe device is abnormal and the PCIe device has not been allocated a BDF number, performing a repair operation on the PCIe link, otherwise, exiting the execution flow of the management method or determining whether to re-execute the management method.

[0011] In the embodiment, when the initialization state of the PCIe device is abnormal and the PCIe device is not assigned with a BDF number, the PCIe device actively performs the repair operation without depending on the peer device to which the PCIe device is connected, effectively solves the problem of abnormal initialization state of the PCIe device or card drop, and improves the execution efficiency.

[0012] In a possible implementation, the checking of whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been assigned with a BDF number to determine whether the PCIe link needs to perform the repair operation comprises: when the PCIe device has been assigned with a BDF number, exiting the execution flow of the management method; and when the initialization state of the PCIe device is normal and the PCIe device is not assigned with a BDF number, further determining whether to re-execute the management method.

[0013] In the embodiment, when the PCIe device has been assigned with a BDF number, the execution flow of the management method is directly exited regardless of whether the initialization state of the PCIe device is abnormal, further avoiding the PCIe device that has completed enumeration from being dropped due to the execution of the repair operation.

[0014] In a possible implementation, the determination of whether to re-execute the management method comprises: determining whether the execution time of the PCIe device initialization state management method exceeds T0, and if yes, exiting the execution flow of the PCIe device initialization state management method; otherwise, re-executing the PCIe device initialization state management method.

[0015] In the embodiment, by controlling the execution time of the PCIe device initialization state management method to be less than T0, the PCIe device can be prevented from being dropped due to missing enumeration.

[0016] In a possible implementation, the repair operation comprises re-executing at least one link training on the PCIe device.

[0017] In the embodiment, the repair operation can comprise re-executing the PCIe link training once, which theoretically realizes the repair of the PCIe link and meets the time requirement of the PCIe protocol. In a possible implementation, the checking of whether the initialization state of the PCIe device is abnormal comprises: checking whether the number of times that the PCIe link enters the recovery state is less than or equal to an expected number of times and whether the PCIe link is stable in the L0 state, to determine whether the initialization state of the PCIe device is abnormal.

[0018] In the embodiment, by checking whether the number of times that the PCIe link enters the recovery state is less than or equal to an expected number of times and whether the PCIe link is stable in the L0 state, the two checking results are comprehensively considered to more accurately determine whether the initialization state of the PCIe device is abnormal, and coverage is improved.

[0019] In a possible implementation, the checking whether the number of times that the PCIe link enters the recovery state is less than or equal to an expected number of times and whether the PCIe link is stable in the L0 state to determine whether the initialization state of the PCIe device is abnormal includes: comparing the actual number of times that the PCIe link enters the recovery state with the expected number of times, and if the actual number of times is less than or equal to the expected number of times, further checking whether the PCIe link is stable in the L0 state; otherwise, determining that the initialization state of the PCIe device is abnormal.

[0020] In a possible implementation, the comparing the actual number of times that the PCIe link enters the recovery state with the expected number of times includes: determining the expected number of times according to an initial rate and a target rate of the PCIe link.

[0021] In a possible implementation, the further checking whether the PCIe link is stable in the L0 state includes: checking whether the PCIe link is stable in the L0 state for more than an expected time, and if the PCIe link is stable in the L0 state for more than the expected time, determining that the initialization state of the PCIe device is normal; otherwise, determining that the initialization state of the PCIe device is abnormal.

[0022] According to a second aspect of the present disclosure, a PCIe device initialization state management apparatus is provided, which is applied to the PCIe device, and the apparatus includes: a repair determination module configured to check whether an initialization state of the PCIe device is abnormal and whether the PCIe device has been allocated a BDF number after the PCIe device establishes a PCIe link with a peer device, to determine whether the PCIe link needs to perform a repair operation.

[0023] In a possible implementation, the repair determination module includes: a state checking module configured to check whether an initialization state of the PCIe device is abnormal after the PCIe device establishes a PCIe link with a peer device; and a BDF number determination module configured to check whether the PCIe device has been allocated a BDF number after determining whether the initialization state of the PCIe device is abnormal.

[0024] In a possible implementation, the apparatus further includes a repair execution module configured to perform a repair operation on the PCIe link when the initialization state of the PCIe device is abnormal and the PCIe device is not assigned with a BDF number.

[0025] In a possible implementation, the apparatus further includes a condition judgment module configured to further judge whether to re-enter the PCIe device initialization state management apparatus when the initialization state of the PCIe device is normal and the PCIe device is not assigned with a BDF number.

[0026] According to a third aspect of the present disclosure, an electronic device is provided, including one or more processors and a memory, the memory having stored therein a computer readable program, the processor being configured to execute the method as described above, or implement the function of the apparatus as described above by running the program in the memory.

[0027] According to a fourth aspect of the present disclosure, a computer readable storage medium is provided, including computer executable instructions, when the computer executable instructions are run by one or more processors, the method as described above is executed, or the processor is caused to implement the function of the apparatus as described above. BRIEF DESCRIPTION OF DRAWINGS

[0028] The above and other objects, features and advantages of the exemplary embodiments of the present disclosure will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0029] Figure 1 A flow chart of a PCIe device initialization state management method according to one embodiment of the present disclosure is shown;

[0030] Figure 2 A flow chart of the method of step S1 according to one embodiment of the present disclosure is shown;

[0031] Figure 3 A flow chart of a PCIe device initialization state management method according to one embodiment of the present disclosure is shown;

[0032] Figure 4 A flow chart of a PCIe device initialization state management method according to another embodiment of the present disclosure is shown;

[0033] Figure 5 A structural schematic diagram of a PCIe device initialization state management apparatus according to one embodiment of the present disclosure is shown;

[0034] Figure 6FIG. 1 shows a schematic diagram of a PCIe device according to one embodiment of the present disclosure. DETAILED DESCRIPTION

[0035] The technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the drawings in the embodiments of the present disclosure. Obviously, the described embodiments are part of, rather than all of, the embodiments of the present disclosure. Based on the embodiments in the present disclosure, all other embodiments obtained by a person of ordinary skill in the art without creative effort fall within the protection scope of the present disclosure.

[0036] It should be understood that the terms "first", "second", "third", and "fourth" and the like in the claims, the specification, and the drawings of the present disclosure are used to distinguish different objects, and are not used to describe a particular order. "First", "second", "third", and "fourth" and the like do not mean only one, but also can mean multiple. The terms "comprise" and "include" used in the specification and claims of the present disclosure indicate the presence of described features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or sets thereof.

[0037] It should also be understood that the terms used in the specification of the present disclosure are only for the purpose of describing specific embodiments, and are not intended to limit the present disclosure. As used in the specification and claims of the present disclosure, the singular forms "a", "an", and "the" are intended to include the plural forms, unless the context clearly indicates otherwise. It should be further understood that the term "and / or" used in the specification and claims of the present disclosure means any combination of one or more of the associated listed items and all possible combinations thereof, and includes these combinations.

[0038] As used in the specification and claims of the present disclosure, the term "if" can be interpreted as "when" or "upon" or "in response to a determination" or "in response to detecting" depending on the context. Similarly, the phrase "if determined" or "if detected [the described condition or event]" can be interpreted as meaning "upon determining" or "in response to determining" or "upon detecting [the described condition or event]" or "in response to detecting [the described condition or event]" depending on the context.

[0039] The specific embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0040] Peripheral Component Interconnect Express (PCIe) is a high-speed serial computer expansion bus standard with high speed, serial, point-to-point, dual-channel high bandwidth and other characteristics. A device connected to a peer device through a PCIe bus is called a PCIe device. With the development of information technology and the increase of information volume, the application of PCIe devices is becoming more and more widespread. The peer devices connected by the PCIe devices can include servers, personal computers (PCs), accelerator cards, processors and other devices with PCIe expansion bus interfaces.

[0041] As a peripheral component of a peer device, a PCIe device needs to be initialized to establish a PCIe link between the PCIe device and the peer device. During the initialization of the PCIe device, the basic information of the PCIe device needs to be configured first, and then the PCIe device completes link training with the peer device through an LTSSM state machine to establish a PCIe link with the peer device. Due to the uncertainty of the external environment, there may be link abnormalities or device basic information configuration abnormalities during the establishment of the PCIe link, which may eventually lead to PCIe link establishment abnormalities, i.e., PCIe device initialization state abnormalities. In the peer device, the PCIe device cannot be detected (e.g., PCIe device card drop occurs) or a large number of error records are generated, which may eventually cause errors or performance degradation of the peer device.

[0042] In the prior art, during the identification of the PCIe device by the peer device, the PCIe device is usually passive and waits for the peer device to identify it. If the PCIe device and the peer device have link establishment abnormalities or initialization state abnormalities, state checking, repair or abnormal record are usually dependent on the peer device to perform. This method is low in execution efficiency and is not universal for PCIe devices that need to adapt to a large number of different peer devices.

[0043] The PCIe device initialization state management method provided by the embodiments of the present application can be applied to a PCIe device, which can include the following steps: after the PCIe device and a peer device establish a PCIe link, checking whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been assigned a BDF number to determine whether the PCIe link needs to perform a repair operation.

[0044] In the method, the PCIe device actively checks the initialization state of the device and whether the device has been assigned a BDF number during the initialization process, and determines whether the PCIe link needs to perform a repair operation in combination with the two check results. The method is a general PCIe device initialization state management scheme, which does not depend on whether the opposite device accessed by the PCIe device is a server or a PC or other device, and helps to effectively solve the problem that the PCIe device cannot be correctly identified by the opposite device due to card drop or abnormal initialization state of the PCIe device.

[0045] The PCIe bus structure mainly includes three types of nodes of RC (root complex), Switch (switching device) and ep (endpoint), each of which is distinguished by a BDF (Bus, Device, Function) number. After the PCIe device establishes a PCIe link with the opposite device, the opposite device initiates an enumeration process for the PCIe device to assign a BDF number to the PCIe device, which can save the BDF number in the device register of the PCIe device.

[0046] When the PCIe device has been assigned a BDF number, it indicates that the opposite device has completed the enumeration of the PCIe device, so in the process of determining whether the PCIe link needs to perform a repair operation, in addition to checking whether the initialization state of the PCIe device is abnormal, it is also necessary to check whether the PCIe device has been assigned a BDF number, so as to further avoid the PCIe device that has completed the enumeration from being dropped due to the execution of the repair operation.

[0047] Figure 1 A flowchart of a PCIe device initialization state management method according to an embodiment of the present disclosure is shown. As shown in Figure 1 The PCIe device initialization state management method can be applied to the PCIe device and can specifically include the following steps:

[0048] Step S1, check whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been assigned a BDF number;

[0049] After the PCIe device establishes a PCIe link with the opposite device, the initialization state of the PCIe device is checked by the PCIe device to determine whether it is abnormal and whether the PCIe device has been assigned a BDF number.

[0050] Specifically, whether the PCIe device has been assigned a BDF number can be checked by directly reading the information of the BDF number from the device register of the PCIe device to determine whether the BDF number has been assigned.

[0051] In one embodiment, the initialization state of the PCIe device is checked first to determine whether it is abnormal, and then it is checked whether the PCIe device has been assigned a BDF number. In this way, it can be determined whether to perform a repair operation according to the latest BDF number assignment information, thereby ensuring the accuracy of the determination result.

[0052] In another embodiment, the initialization state of the PCIe device is checked in parallel to determine whether it is abnormal, and whether the PCIe device has been assigned a BDF number. This can improve the execution efficiency and the utilization rate of device resources, but can also result in the inability to obtain the latest BDF information. Because the initialization state is usually checked for a period of time, and the BDF number can be directly read from the device register, the determination of the BDF is usually performed first if the two are executed in parallel.

[0053] In other embodiments, the PCIe device is first checked to determine whether it has been assigned a BDF number, and then the initialization state of the PCIe device is checked to determine whether it is abnormal. In this way, there is still a problem of being unable to obtain the latest BDF number assignment information, but in some scenarios, this approach can help save computing resources. For example, after the PCIe device and the peer device establish a PCIe link, it is found that the PCIe device has been assigned a BDF number, and then the execution flow of the management method can be directly exited without performing the subsequent initialization state check operation.

[0054] Optionally, the above several embodiments can also be combined, for example, the first and third embodiments can be combined, the PCIe device is first checked to determine whether it has been assigned a BDF number, and then the initialization state of the PCIe device is checked to determine whether it is abnormal, and finally the PCIe device is checked again to determine whether it has been assigned a BDF number. In this way, the latest BDF information can be obtained to ensure the accuracy of the determination result, and computing resources can be saved.

[0055] Step S2, according to the check result, determining whether the PCIe link needs to perform a repair operation.

[0056] After checking the initialization state of the PCIe device to determine whether it is abnormal, and checking whether the PCIe device has been assigned a BDF number, the two check results are combined, and the PCIe device is further used to determine whether the PCIe link needs to perform a repair operation.

[0057] Figure 2 A method flowchart of step S1 according to one embodiment of the present disclosure is shown. As shown in FIG. 1, the method includes the following steps. Figure 2As shown, step S1 can include: step S11, checking whether the initialization state of the PCIe device is abnormal; and step S12, checking whether the PCIe device has been assigned a BDF number. That is, after determining whether the initialization state of the PCIe device is abnormal, it is further checked whether the PCIe device has been assigned a BDF number.

[0058] The repair operation in the prior art also often relies on the peer device to perform. Once an exception occurs, the PCIe device can only passively wait for the peer device to perform a repair action, which is usually performed by restarting the peer device. Restarting often takes a long time and cannot quickly complete the repair operation when the state is abnormal. Moreover, the PCIe bus is in an unusable state during the restart, affecting the normal operation of the service.

[0059] In one embodiment, the checking of whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been assigned a BDF number to determine whether the PCIe link needs to perform a repair operation, or step S2, can include: when the initialization state of the PCIe device is abnormal and the PCIe device has not been assigned a BDF number, performing a repair operation on the PCIe link, otherwise, exiting the execution flow of the management method or determining whether to re-execute the management method.

[0060] In this embodiment, when the initialization state of the PCIe device is abnormal and the PCIe device has not been assigned a BDF number, the PCIe device can actively perform a repair operation on the PCIe link, without relying on the peer device to which the PCIe device is connected, effectively solving the problem of abnormal initialization state or card drop of the PCIe device, and improving the execution efficiency. In other cases, for example, when the PCIe device has been assigned a BDF number, it indicates that the peer device has completed the enumeration of the PCIe device. In order to avoid card drop, even if the initialization state of the PCIe device is abnormal, a repair operation can not be performed, but the execution flow of the management method can be exited, or it can be further determined whether to re-execute the management method.

[0061] Optionally, after the repair operation is performed, the execution flow of the management method can be exited and the state checking and repair log of the PCIe device can be printed and recorded for fault detection.

[0062] More specifically, the printing and recording of the state checking and repair log of the PCIe device can also be performed by the PCIe device, without relying on the peer device, to ensure that the management method is universally applicable to PCIe devices that need to be adapted to a large number of different peer devices.

[0063] Further, the checking whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been assigned a BDF number to determine whether the PCIe link needs to perform a repair operation or the reverse exits the execution flow of the management method or determines whether to re-execute the management method can include: when the PCIe device has been assigned a BDF number, exiting the execution flow of the management method; and when the initialization state of the PCIe device is normal and the PCIe device has not been assigned a BDF number, further determining whether to re-execute the management method.

[0064] In this embodiment, when the PCIe device has been assigned a BDF number, the execution flow of the management method is directly exited regardless of whether the initialization state of the PCIe device is abnormal, further avoiding the PCIe device that has completed enumeration from being dropped due to the execution of the repair operation.

[0065] Optionally, when the execution flow of the management method is exited, the status check and repair log of the PCIe device can be printed and recorded synchronously for fault detection.

[0066] After the PCIe link between the PCIe device and the peer device is established, the peer device initiates an enumeration process for the PCIe device to assign a BDF number to the PCIe device, and the PCIe device can save the BDF number in a device register thereof. According to the PCIe protocol, the enumeration process needs to be completed within a specific time T0 after the peer device is started, T0 being a time specified by the PCIe protocol, usually 1s, so if the execution time of the PCIe device initialization state management method exceeds T0, the PCIe device will be dropped due to missing enumeration.

[0067] In one embodiment, the determination of whether to re-execute the management method can include: determining whether the execution time of the PCIe device initialization state management method exceeds T0, and if so, exiting the execution flow of the PCIe device initialization state management method; otherwise, re-executing the PCIe device initialization state management method. By controlling the execution time of the PCIe device initialization state management method to be less than T0, the PCIe device can be prevented from being dropped due to missing enumeration.

[0068] In this embodiment, when the initialization state of the PCIe device is normal and the PCIe device is not assigned with a BDF number, it is further determined whether the execution time of the PCIe device initialization state management method exceeds T0. If not, it returns to the beginning stage of the management method, and the initialization state of the PCIe device is repeatedly checked to determine whether it is abnormal and whether the PCIe device has been assigned with a BDF number, so as to avoid the change of the initialization state during the assignment of the BDF number. Until the PCIe device has been assigned with a BDF number, or the execution of the repair operation is completed, or the execution time of the initialization state management method exceeds T0, the execution process of the management method is exited or ended, and the state checking and repair log of the PCIe device can be printed and recorded for fault detection.

[0069] In one embodiment, the repair operation can include re-executing the link training of the PCIe device at least once.

[0070] Optionally, the repair operation can include re-executing the PCIe link training once. Such a setting theoretically realizes the repair of the PCIe link while meeting the time requirement of the PCIe protocol. The time T0 of the PCIe protocol is usually 1s. By executing the PCIe link training only once, more time allowance can be left for other operations on the basis of meeting the protocol requirement.

[0071] Optionally, the repair operation can include re-executing the PCIe link training of the PCIe device multiple times, for example, by means of preset repair times, or returning to the beginning stage of the management method after the execution of the repair operation to check whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been assigned with a BDF number, so as to determine whether the repair operation needs to be executed again. Through such a loop, until the initialization state is repaired to be normal, the execution process of the management method is exited. In this embodiment, multiple PCIe link trainings can be executed to ensure that the abnormal state is completely repaired.

[0072] In one embodiment, the repair operation can include re-executing the initialization operation of the PCIe device at least once, so that the PCIe device re-executes the link training at least once.

[0073] Figure 3 A flowchart of a PCIe device initialization state management method according to one embodiment of the present disclosure is shown. As shown in the figure, the PCIe device initialization state management method can be applied to the PCIe device, and can specifically include the following steps: Figure 3

[0074] Step S11, check whether the initialization state of the PCIe device is abnormal.​

[0075] After the PCIe device and the peer device establish the PCIe link through the PCIe link training, the initialization state of the PCIe device can be actively checked by the PCIe device; and when the initialization state of the PCIe device is abnormal, step S100 can be executed to mark F2, and when the initialization state of the PCIe device is normal, step S103 can be executed to mark F3.

[0076] Step S12, check whether the PCIe device has been allocated a BDF number;

[0077] After determining whether the initialization state of the PCIe device is abnormal, the PCIe device can be actively checked by the PCIe device to check whether the PCIe device has been allocated a BDF number, and when the PCIe device has been allocated a BDF number, step S104 can be executed to mark F4, and then the execution flow of the management method is exited, and the log of the state checking and repair process of the PCIe device can be printed and recorded.

[0078] Step S13, when the PCIe device is not allocated a BDF number, further determine whether F2 is marked;

[0079] When the PCIe device is not allocated a BDF number, in combination with the checking result of step S11, it can be determined whether the repair operation needs to be performed.

[0080] Step S14, when the PCIe device is not allocated a BDF number and it is determined that F2 is marked, the repair operation is performed; that is, when the initialization state of the PCIe device is abnormal and the PCIe device is not allocated a BDF number, the repair operation is performed on the PCIe link by the PCIe device.

[0081] Specifically, the repair operation can include re-executing the link training once for the PCIe device, that is, the PCIe device can train from the lowest rate to the target rate again; and after the repair operation of the PCIe link is performed once, step S105 can be executed to mark F5, and then the execution flow of the management method is exited, and the log of the state checking and repair process can be printed and recorded.

[0082] Step S15, when the PCIe device is not allocated a BDF number and it is determined that F2 is not marked, further determine whether the execution time of the PCIe device initialization state management method is greater than or equal to T0;

[0083] Specifically, the current execution time of the PCIe device initialization state management method can be obtained or recorded first, and then it is determined whether the current execution time is greater than or equal to T0;

[0084] When the current execution time of the PCIe device initialization state management method is greater than or equal to T0, the execution flow of the management method can be directly exited, and the log of the state checking and repair process can be printed and recorded.

[0085] When the current execution time of the PCIe device initialization state management method is less than T0, the PCIe device initialization state management method can be re-executed, that is, the method repeatedly checks the PCIe device initialization state and the device BDF number allocation until the PCIe device is allocated a BDF number or completes a repair operation or the execution time exceeds T0, then the execution flow of the management method is exited, and the log of the state checking and repair process can be printed and recorded.

[0086] It should be understood that the above only describes Figure 3 The implementation process of each step in the embodiment shown, the technical effect of each step, and other implementation manners can be referred to the corresponding or corresponding description in the foregoing, and will not be described here.

[0087] Further, the above marking of the state after the execution of the plurality of steps is helpful for recording the state to facilitate the execution of subsequent steps and fault detection, but the marked steps are not necessary, for example, in other embodiments, the marked steps can be removed, or can be replaced by other ways. In addition, the printing and recording of the log operation is not necessary, in other embodiments, it can be directly exited without printing and recording the log.

[0088] In an embodiment, the checking whether the initialization state of the PCIe device is abnormal can include: checking whether the number of times that the PCIe link enters the recovery state is less than or equal to an expected number of times and whether the PCIe link is stable in the L0 state, so as to determine whether the initialization state of the PCIe device is abnormal.

[0089] Link training of the PCIe link can make the PCIe link enter various states, including a detect state, a polling state, a configuration state, an L0 state, a recovery state, and the like. Among them, in the L0 state, the link can normally transmit data.

[0090] In some practical scenarios, the initialization state of the PCIe device is abnormal, but the PCIe link is stable in the L0 state. Therefore, only checking whether the PCIe link is stable in the L0 state cannot accurately determine whether the initialization state of the PCIe device is abnormal. In the above embodiment, by checking whether the number of times that the PCIe link enters the recovery state is less than or equal to the expected number of times and whether the PCIe link is stable in the L0 state, the initialization state of the PCIe device can be more accurately determined to be abnormal, and the coverage rate is improved.

[0091] During PCIe link training, the LTSSM state machines of the devices at both ends of the link can negotiate the current rate by entering the recovery state. When the number of times that the PCIe link enters the recovery state is greater than the expected number of times, it indicates that there are more instabilities in the expected rate, causing the LTSSM state machines of the devices at both ends of the link to re-enter the recovery state for negotiation.

[0092] When the number of times that the PCIe link enters the recovery state is less than the expected number of times, it indicates that the PCIe link has not negotiated the expected rate. The expected rate is determined only according to the target rate that can be reached by the PCIe device, without considering the target rate that can be reached by the opposite device. If the opposite device can only support GEN3 and the target rate is GEN5, the final rate can only be negotiated to GEN3. When the number of times that the PCIe link enters the recovery state is equal to the expected number of times, it indicates that the PCIe link has negotiated the expected rate.

[0093] In one embodiment, the expected number of times can be determined according to the initial rate and the target rate of the PCIe link.

[0094] Generally, PCIe link training starts from the GEN1 rate and gradually increases to the target rate for data transmission, and usually skips the GEN2 rate by default. If the target rate of the PCIe link is GEN4, the expected number of times that the recovery state is entered from the beginning to the end of the link training is 2. If the target rate of the PCIe link is GEN5, the expected number of times that the recovery state is entered from the beginning to the end of the link training is 3. Similarly, the expected number of times that the recovery state is entered from the beginning to the end of the link training is 4 when the target rate of the PCIe link is GEN6.

[0095] In one embodiment, the checking whether the PCIe link is stable in the L0 state can include: checking whether the PCIe link is stable in the L0 state for an expected time.

[0096] The expected time can be set according to experience. The expected time can be greater than or equal to the expected time.

[0097] Further, the PCIe link being stable in the L0 state for more than an expected time can include that the state of the PCIe link does not jump within the expected time, and the rate and bandwidth of the PCIe link do not change within the expected time.

[0098] In one embodiment, the checking whether the number of times the PCIe link enters the recovery state is less than or equal to an expected number of times and whether the PCIe link is stable in the L0 state, so as to determine whether the initialization state of the PCIe device is abnormal, can include: comparing an actual number of times the PCIe link enters the recovery state with the expected number of times, and if the actual number of times is less than or equal to the expected number of times, further checking whether the PCIe link is stable in the L0 state; otherwise, determining that the initialization state of the PCIe device is abnormal.

[0099] Specifically, after the PCIe device and the peer device establish the PCIe link, the checking whether the initialization state of the PCIe device is abnormal is performed; in the initialization state checking process, the number of times the PCIe link enters the recovery state can be checked first, if the number of times the PCIe link enters the recovery state is greater than the expected number of times, it can be directly determined that the initialization state of the PCIe device is abnormal, if the number of times the PCIe link enters the recovery state is less than or equal to the expected number of times, it can be further checked whether the PCIe link is stable in the L0 state.

[0100] In one embodiment, the further checking whether the PCIe link is stable in the L0 state can include: checking whether the PCIe link is stable in the L0 state for more than an expected time, and if the PCIe link is stable in the L0 state for more than the expected time, determining that the initialization state of the PCIe device is normal; otherwise, determining that the initialization state of the PCIe device is abnormal.

[0101] It should be understood that the specific description of the PCIe link being stable in the L0 state for more than the expected time has been described in other embodiments above, and will not be repeated here.

[0102] Figure 4 A flowchart of a PCIe device initialization state management method according to one embodiment of the present disclosure is shown.

[0103] As shown in Figure 4 The PCIe device initialization state management method can be applied to the PCIe device. Figure 4 is in Figure 3The step S11 is refined, i.e., the step of checking whether the initialization state of the PCIe device is abnormal, wherein the checking whether the initialization state of the PCIe device is abnormal can include:

[0104] Step S112: checking whether the number of times that the PCIe link enters the recovery state is less than or equal to an expected number of times;

[0105] Specifically, the actual number of times that the PCIe link enters the recovery state can be acquired first, and then the actual number of times is compared with the expected number of times; when it is checked that the actual number of times that the PCIe link enters the recovery state is greater than the expected number of times, it is considered that the initialization state of the PCIe device is abnormal, and the step S101 can be executed to mark F21.

[0106] Step S114: when it is checked that the actual number of times that the PCIe link enters the recovery state is less than or equal to the expected number of times, further checking whether the PCIe link is stable in the L0 state;

[0107] Specifically, the state of the PCIe link can be continuously acquired within an expected time T1 first, and then it is judged whether the PCIe link is always stable in the L0 state within the T1 time period; when the PCIe link is stable in the L0 state for less than T1 time, it is considered that the initialization state of the PCIe device is abnormal, and the step S102 can be executed to mark F22; otherwise, it is considered that the initialization state of the PCIe device is normal, and the step S103 can be executed to mark F3.

[0108] The marks F21 and F22 belong to two specific cases of the mark F2.

[0109] Further, based on the step of checking whether the initialization state of the PCIe device is abnormal, Figure 4 and Figure 3 there are some differences in the description of the step 13, as shown in Figure 4 , the step 13 can be that when the PCIe device is not assigned a BDF number, it is further judged whether F21 or F22 is marked.

[0110] It should be understood that Figure 4 the remaining execution steps and logic are the same as or similar to those in Figure 3 , and the corresponding content can be described with reference to the content in Figure 3 , which will not be described here.

[0111] The embodiment of the present application further provides a PCIe device initialization state management apparatus applied to the PCIe device, which can comprise: a repair judgment module, configured to check whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been allocated a BDF number after the PCIe device and a peer device establish a PCIe link, so as to determine whether the PCIe link needs to perform a repair operation.

[0112] The repair judgment module can comprise: a state checking module, configured to check whether the initialization state of the PCIe device is abnormal after the PCIe device and a peer device establish a PCIe link; and a BDF number judgment module, configured to check whether the PCIe device has been allocated a BDF number after it is determined whether the initialization state of the PCIe device is abnormal.

[0113] Further, the apparatus can further comprise: a repair execution module, configured to perform a repair operation on the PCIe link when the initialization state of the PCIe device is abnormal and the PCIe device has not been allocated a BDF number.

[0114] Further, the apparatus can further comprise: a condition judgment module, configured to further judge whether to re-enter the PCIe device initialization state management apparatus when the initialization state of the PCIe device is normal and the PCIe device has not been allocated a BDF number.

[0115] Figure 5 A block diagram of a PCIe device initialization state management apparatus 10 according to one embodiment of the present disclosure is shown. As shown in the figure, the PCIe device initialization state management apparatus 10 can be applied to a PCIe device. The management apparatus 10 can comprise: a repair judgment module 100, a repair execution module 400 and a condition judgment module 300; wherein the repair judgment module 100 can comprise a state checking module 110 and a BDF number judgment module 120. Figure 5

[0116] After the PCIe device and a peer device establish a PCIe link, first enter the state checking module 110 in the repair judgment module 100, in which module, whether the initialization state of the PCIe device is abnormal will be checked;

[0117] After it is determined whether the initialization state of the PCIe device is abnormal, enter the BDF number judgment module 120, in which module, the BDF number allocation information of the current PCIe device can be acquired, and then it is determined whether the PCIe device has been allocated a BDF number;

[0118] ​Based on the processing result of the repair judgment module 100, it can be selected to enter the repair execution module 400, or enter the condition judgment module 300, or directly exit the management device 10; wherein when the initialization state of the PCIe device is abnormal and the PCIe device is not assigned a BDF number, enter the repair execution module 400, in which module, repair operation can be performed on the PCIe link; when the initialization state of the PCIe device is normal and the PCIe device is not assigned a BDF number, enter the condition judgment module 300, in which module, it can be further judged whether to re-enter the PCIe device initialization state management device; otherwise, directly exit the management device 10, and the state check and repair log of the PCIe device can be printed and recorded.

[0119] Further, the functional details of each module in the management device 10 can be realized by referring to the introduction of the above management method, which will not be repeated here.

[0120] Figure 6 A structural schematic diagram of a PCIe device according to an embodiment of the present disclosure is shown. As shown, the PCIe device can include a computing device 210, a processing device 230, an interface device 220 and a storage device 240. Figure 6

[0121] The computing device 210 is configured to perform user-specified operations, mainly implemented as a single-core or multi-core intelligent processor to perform artificial intelligence-related operations, which can interact with the processing device 230 through the interface device 220 to jointly complete the user-specified task.

[0122] The processing device 230 is a general-purpose processing device, which performs basic controls including but not limited to data transfer, starting and / or stopping of the computing device 210. According to different implementation manners, the processing device 230 can be one or more types of processors of central processing unit (CPU), graphics processing unit (GPU) or other general-purpose and / or computing devices, including but not limited to digital signal processor (DSP), application specific integrated circuit (ASIC), field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic device, discrete hardware component, etc., and the number thereof can be determined according to actual needs.

[0123] ​The interface device 220 is configured to transmit data and control instructions between the computing device 210 and the processing device 230. For example, the computing device 210 can obtain input data from the processing device 230 via the interface device 220 and write the input data into a storage device on the computing device 210. Further, the computing device 210 can obtain control instructions from the processing device 230 via the interface device 220 and write the control instructions into a control buffer on the computing device 210. Alternatively, the interface device 220 can also read data from the storage device on the computing device 210 and transmit the data to the processing device 230.

[0124] The storage device 240 is configured to store data to be processed, which can be a DDR memory (DRAM), and is configured to store data of the computing device 210 and / or the processing device 230. The storage device 240 can be regarded as an external storage resource of the computing device 210.

[0125] The embodiments of the present disclosure further provide a computer readable storage medium, which includes computer executable instructions, when the computer executable instructions are executed by one or more processors, perform the method as described above, or cause the processors to realize the functions of the apparatus as described above.

[0126] The embodiments of the present disclosure further provide an electronic device, which includes one or more processors and a memory, the memory stores computer readable programs, the processors execute the programs in the memory to perform the method as described above, or realize the functions of the apparatus as described above.

[0127] According to different application scenarios, the electronic device or apparatus of the present disclosure can include a server, a cloud server, a server cluster, a data processing apparatus, a robot, a computer, a printer, a scanner, a tablet computer, a smart terminal, a PC device, an Internet of Things terminal, a mobile terminal, a mobile phone, a vehicle record instrument, a navigator, a sensor, a camera, a camera, a video camera, a projector, a watch, a headset, a mobile storage, a wearable device, a visual terminal, an autonomous driving terminal, a vehicle, a household appliance, and / or a medical device. The vehicle includes an airplane, a ship and / or a vehicle; the household appliance includes a television, an air conditioner, a microwave oven, a refrigerator, an electric rice cooker, a humidifier, a washing machine, an electric lamp, a gas stove, an oil smoke exhaust machine; the medical device includes a nuclear magnetic resonance instrument, a B-ultrasound instrument and / or an electrocardiograph. The electronic device or apparatus of the present disclosure can also be applied to the fields of Internet, Internet of Things, data center, energy, transportation, public management, manufacturing, education, power grid, telecommunications, finance, retail, construction site, medical treatment, etc. Further, the electronic device or apparatus of the present disclosure can also be used in cloud, edge, terminal and other application scenarios related to artificial intelligence, big data and / or cloud computing. In one or more embodiments, the electronic device or apparatus with high computing power according to the present disclosure scheme can be applied to a cloud device (such as a cloud server), while the electronic device or apparatus with small power consumption can be applied to a terminal device and / or an edge device (such as a smart phone or a camera). In one or more embodiments, the hardware information of the cloud device and the hardware information of the terminal device and / or the edge device are compatible with each other, so that suitable hardware resources can be matched from the hardware resources of the cloud device according to the hardware information of the terminal device and / or the edge device to simulate the hardware resources of the terminal device and / or the edge device, so as to complete the unified management, scheduling and collaborative work of end-cloud integration or cloud-edge integration.

[0128] The above describes the embodiments of the present disclosure in detail, and the principles and implementation manners of the present disclosure are described by applying specific examples. The above description of the embodiments is only used to help understand the method of the present disclosure and its core idea. Meanwhile, the changes or deformations made by the person skilled in the art according to the idea of the present disclosure, based on the specific implementation manners and application scope of the present disclosure, all belong to the protection scope of the present disclosure. In summary, the content of the present specification should not be understood as a limitation of the present disclosure.

Claims

1. A PCIe device initialization state management method, characterized by, The method is applied to the PCIe device, and the method comprises: After the PCIe device and a peer device establish a PCIe link, it is checked whether an initialization state of the PCIe device is abnormal and whether the PCIe device has been allocated a BDF number, so as to determine whether the PCIe link needs to perform a repair operation.

2. The method of claim 1, wherein, The checking whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been allocated the BDF number comprises: After it is determined whether the initialization state of the PCIe device is abnormal, it is checked whether the PCIe device has been allocated the BDF number.

3. The method according to claim 1 or 2, characterized in that, The checking whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been allocated the BDF number, so as to determine whether the PCIe link needs to perform the repair operation, comprises: When the initialization state of the PCIe device is abnormal and the PCIe device has not been allocated the BDF number, the repair operation is performed on the PCIe link, otherwise, the execution flow of the management method is exited or it is determined whether the management method is re-executed.

4. The method according to any one of claims 1 to 3, characterized in that, The checking whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been allocated the BDF number, so as to determine whether the PCIe link needs to perform the repair operation, comprises: When the PCIe device has been allocated the BDF number, the execution flow of the management method is exited; When the initialization state of the PCIe device is normal and the PCIe device has not been allocated the BDF number, it is further determined whether the management method is re-executed.

5. The method according to claim 3 or 4, characterized in that, The determining whether the management method is re-executed comprises: It is determined whether an execution time of the PCIe device initialization state management method exceeds T0, if yes, the execution flow of the PCIe device initialization state management method is exited, otherwise, the PCIe device initialization state management method is re-executed.

6. The method according to any one of claims 1 to 5, characterized in that, The repair operation comprises re-executing at least one link training on the PCIe device.

7. The method according to any one of claims 1 to 6, characterized in that, The checking whether the initialization state of the PCIe device is abnormal comprises: It is checked whether a number of times that the PCIe link enters a recovery state is less than or equal to an expected number of times and whether the PCIe link is stable in an L0 state, so as to determine whether the initialization state of the PCIe device is abnormal.

8. The method of claim 7, wherein, The checking whether the number of times that the PCIe link enters the recovery state is less than or equal to the expected number of times and whether the PCIe link is stable in the L0 state, so as to determine whether the initialization state of the PCIe device is abnormal, comprises: The actual number of times that the PCIe link enters the recovery state is compared with the expected number of times, and if the actual number of times is less than or equal to the expected number of times, it is further checked whether the PCIe link is stable in the L0 state, otherwise, it is determined that the initialization state of the PCIe device is abnormal.

9. The method according to claim 7 or 8, characterized in that, The method further comprises: The expected number of times is determined according to an initial rate and a target rate of the PCIe link.

10. The method according to claim 8 or 9, characterized in that, The further checking whether the PCIe link is stable in the L0 state comprises: checking whether the PCIe link is stable in the L0 state for more than an expected time, and determining that the initialization state of the PCIe device is normal if the PCIe link is stable in the L0 state for more than the expected time; otherwise, determining that the initialization state of the PCIe device is abnormal.

11. A PCIe device initialization state management apparatus, characterized by comprising: The device is applied to the PCIe device, and the device comprises: a repair determination module configured to check whether the initialization state of the PCIe device is abnormal and whether the PCIe device has been assigned a BDF number after the PCIe device establishes a PCIe link with a peer device, to determine whether the PCIe link needs to perform a repair operation.

12. The apparatus of claim 11, wherein, The repair determination module comprises: a state checking module configured to check whether the initialization state of the PCIe device is abnormal after the PCIe device establishes a PCIe link with a peer device; a BDF number determination module configured to check whether the PCIe device has been assigned a BDF number after determining whether the initialization state of the PCIe device is abnormal.

13. The apparatus of claim 11 or 12, wherein, The device further comprises: a repair execution module configured to perform a repair operation on the PCIe link when the initialization state of the PCIe device is abnormal and the PCIe device is not assigned a BDF number.

14. The apparatus of any one of claims 11-13, wherein, The device further comprises: a condition determination module configured to further determine whether to re-enter the PCIe device initialization state management device when the initialization state of the PCIe device is normal and the PCIe device is not assigned a BDF number.

15. An electronic device comprising one or more processors and memory, the memory having stored therein computer readable programs, the processors, by running the programs in the memory, performing the method of any one of claims 1 to 10, or implementing the functions of the device of any one of claims 11 to 14.

16. A computer readable storage medium comprising computer executable instructions which, when executed by one or more processors, perform the method of any one of claims 1 to 10, or cause the processors to implement the functions of the device of any one of claims 11 to 14.

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