Error mitigation methods and related apparatuses

Abstract

This application discloses an error mitigation method and related apparatus, relating to the field of quantum computing technology. Upon detecting a first quantum computing task, at least one preset error correction method can be displayed for the user to select based on relevant information about the first quantum computing task. The user can then correct the running result of the quantum computing task according to the selected error correction method. This method allows for more flexible correction of quantum computing tasks by displaying at least one preset error correction method based on relevant information, and the user can also choose a suitable error correction method according to the actual scenario. This approach helps to more accurately correct the running result of the quantum computing task.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of quantum computing, and in particular to an error mitigation method and related device. BACKGROUND

[0002] Quantum computing is a computing mode that uses quantum mechanics principles for information processing; unlike traditional binary computing, quantum computing uses qubits as the basic computing unit, which can represent both 0 and 1 states simultaneously, thus realizing parallel computing and exponential information processing capabilities. Quantum computing has shown potential to surpass classical computing in solving certain problems such as large integer factorization, search algorithms, and simulating quantum systems.

[0003] Although quantum computing has great potential, it faces major challenges in practical applications, the most important of which is quantum noise. Quantum systems are very sensitive to the environment and are easily disturbed by external interference, leading to degradation of quantum states and generation of computing errors. These errors not only affect the accuracy of the computing results, but also increase exponentially with the number of qubits.

[0004] Current quantum computing platforms are mainly in the intermediate-scale noisy quantum computer (NISQ, Noisy Intermediate-Scale Quantum) stage. NISQ devices have a certain number of qubits, but their performance is significantly affected by noise and errors; when performing quantum computing on NISQ devices, it is necessary to consider how to effectively mitigate the effects of noise and errors. Therefore, how to mitigate noise in the quantum computing process is of great significance. SUMMARY

[0005] The embodiments of the present application provide an error mitigation method and related device, by configuring and displaying at least one preset error correction method, so that in the process of correcting the running results of the first quantum computing task, the error correction method suitable for the first quantum computing task can be flexibly selected, thereby helping to more accurately correct the running results of the first quantum computing task.

[0006] The first aspect of the embodiments of the present application provides an error mitigation method, comprising: in response to receiving a first quantum computing task, displaying at least one preset error correction method according to the relevant information of the first quantum computing task; wherein the relevant information at least includes the following: qubit information, quantum circuit structure information;

[0007] According to the selected first error correction method, the running results of the first quantum computing task are corrected.

[0008] Optionally, the error correction programs corresponding to the at least one preset error correction mode are packaged according to a unified interface protocol, and the running result of the quantum computing task is corrected according to the selected first error correction mode, including:

[0009] The first error correction program is called and run through the interface of the first error correction program to correct the running result of the quantum computing task.

[0010] Optionally, the preset error correction mode includes at least one of the following:

[0011] The confusion matrix correction mode, the zero noise extrapolation (ZNE) correction mode, the probabilistic error cancellation correction mode, and the quantum error correction code correction mode.

[0012] Optionally, the method further includes:

[0013] In response to detecting that the first correction result does not meet the predefined condition, a second error correction mode is selected from the at least one preset error correction mode to correct the running result of the quantum computing task, wherein the first correction result is used to indicate the correction result of the first error correction mode for the running result of the quantum computing task.

[0014] The predefined condition includes at least one of the following:

[0015] Whether the data coincidence degree before and after correction meets a preset threshold, and whether the probability distribution after correction meets a physical constraint.

[0016] Optionally, the at least one preset error correction mode is displayed according to the related information of the first quantum computing task, including:

[0017] The corresponding relationship information is obtained from the first storage space, wherein the corresponding relationship is used to indicate the error correction mode corresponding to each historical quantum computing task.

[0018] The related information of the first quantum computing task is used to determine a plurality of historical quantum computing tasks matched with the first quantum computing task.

[0019] At least one preset error correction mode is determined and displayed according to the error correction mode corresponding to the plurality of historical quantum computing tasks.

[0020] Optionally, the plurality of historical quantum computing tasks matched with the first quantum computing task are determined according to the related information of the first quantum computing task, including:

[0021] A plurality of historical quantum computing tasks having a task similarity greater than a preset threshold with the first quantum computing task are determined.

[0022] And, the at least one preset error correction mode is determined and displayed according to an error correction mode corresponding to the plurality of historical quantum computing tasks.

[0023] The at least one preset error correction mode is determined and displayed according to a number of times of using each error correction mode by the plurality of historical quantum computing tasks.

[0024] Optionally, in a case where the number of qubits indicated by the related information is less than the first number, the at least one preset error correction mode displayed includes a depolarizing correction mode.

[0025] In a case where the number of qubits indicated by the related information is greater than or equal to the first number, and / or, the number of logical gates in the quantum circuit structure indicated by the related information is greater than a second number, the at least one preset error correction mode displayed includes a zero noise extrapolation (ZNE) correction mode and a probabilistic error cancellation correction mode.

[0026] The second aspect of the embodiment of the present application provides an error mitigation device, comprising:

[0027] The display unit is configured to, in response to receiving the first quantum computing task, display at least one preset error correction mode according to related information of the first quantum computing task, wherein the related information at least includes quantum bit information and quantum circuit structure information.

[0028] The correction unit is configured to correct a running result of the first quantum computing task according to the selected first error correction mode.

[0029] The third aspect of the embodiment of the present application provides an electronic device, comprising a processor and a memory.

[0030] The processor and the memory are connected, wherein the memory is configured to store a computer program, and the processor is configured to invoke the computer program to execute the method in the first aspect of the embodiment of the present application.

[0031] The fourth aspect of the embodiment of the present application provides a computer readable storage medium, which stores a computer program, and the computer program includes program instructions, which, when executed by a processor, execute the method in the first aspect of the embodiment of the present application.

[0032] The error mitigation method and related device provided by the embodiments of the present application can pre-encapsulate different error correction programs through unified interfaces, and then display at least one preset error correction method according to the related information of the first quantum computing task, and then correct the result of the first quantum computing task according to the selected first error correction method. This correction method makes different quantum computing tasks adopt different error correction methods, which is beneficial to making the final correction result more accurate. At the same time, this method also integrates different error correction methods, making the interaction process between the quantum computing task and the quantum operation system more smooth. When processing different quantum computing tasks, the user only needs to select according to the displayed error correction method, which makes the user's interaction experience better. BRIEF DESCRIPTION OF DRAWINGS

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained from these drawings without creative labor.

[0034] Figure 1 An example system block diagram of the error mitigation method provided by an embodiment of the present application is shown;

[0035] Figure 2 A flowchart of the error mitigation method provided by an embodiment of the present application is shown;

[0036] Figure 3 A modular diagram of a quantum operation framework for implementing the error mitigation method provided by an embodiment of the present application is shown;

[0037] Figure 4 A display diagram of displaying at least one error mitigation method provided by an embodiment of the present application is shown;

[0038] Figure 5 A structural diagram of the error mitigation device provided by an embodiment of the present application is shown;

[0039] Figure 6 A structural diagram of the computer device provided by an embodiment of the present application is shown. DETAILED DESCRIPTION

[0040] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative labor fall within the scope of protection of the present application.

[0041] A classical computer uses transistors to encode information in binary data, such as bits, where each bit can represent a value of 1 or 0. These 1s and 0s act as switches that drive the functionality of a classical computer. If there are n bits of data, there are 2n n possible classical states, and one state is represented at a time.

[0042] A quantum computer uses quantum processors that operate on data represented by qubits, also known as quantum bits. A qubit can represent a classical binary state of “0,” “1,” or a superposition of “0” and “1.” Because of the ability to represent a superposition of “0” and “1,” a qubit can represent both “0” and “1” states at the same time. For example, if there are n bits of data, there are 2n quantum states that can be represented at the same time. Further, qubits in a superposition can be correlated to each other, known as entanglement, where the state of one qubit (whether it is a 1 or 0 or both) can depend on the state of another qubit, and more information can be encoded within two entangled qubits. Based on the principles of superposition and entanglement, qubits can enable a quantum computer to perform functions that can be relatively complex and time-consuming for a classical computer.

[0043] Reference is made to Figure 1 , which shows an example system block diagram of an application error mitigation method provided by an embodiment of the present application. The system can be a hybrid computing system that includes one or more quantum computers, quantum hardware systems, and / or classical computers in combination. As shown in the example, Figure 1 the system can include a quantum hardware system 110 and a classical computer 120. In one implementation, the quantum hardware system 110 and the classical computer 120 can be configured to communicate via one or more of a wired connection and / or a wireless connection (e.g., a wireless network). The quantum hardware system 110 can include a quantum chip set composed of one or more quantum chips that include various hardware components for processing data encoded in qubits. The quantum chip set can be a quantum computing core surrounded by infrastructure to protect the quantum chips from electromagnetic noise sources, mechanical vibration sources, heat sources, and other sources of noise that can degrade the performance of the quantum chips. The classical computer 120 can be electronically integrated with the quantum hardware system 110 via any suitable wired and / or wireless electronic connection.

[0044] In Figure 1 In the example shown, quantum hardware system 110 can be any suitable set of components capable of performing quantum operations on a physical system. Quantum operations, for example, can be quantum gate operations that manipulate the quantum state of qubits to evolve and / or entangle. In Figure 1 In the example embodiment shown, quantum hardware system 110 can include a supervisory controller 111, an interface 112, and a quantum chip 113. In some embodiments, all or portions of each of supervisory controller 111, interface 112, and quantum chip 113 can be located in a cryogenic environment to assist in performing quantum operations. Quantum chip 113 can be any hardware capable of processing information using quantum states. This hardware can include a plurality of qubits and devices that couple or entangle the qubits in order to process information using quantum states. Qubits can include, but are not limited to, charge qubits, flux qubits, phase qubits, spin qubits, and ion qubits. Quantum chip can include a set of quantum logic gates configured to perform quantum logic operations on qubits stored in a quantum register. Quantum gates can include one or more single-qubit gates, two-qubit gates, and / or other multi-qubit gates.

[0045] Supervisory controller 111 can be any combination of digital computing devices capable of performing quantum computations (e.g., executing quantum circuits) in conjunction with interface 112. The digital computing devices can include digital processors and memory for storing and executing quantum instructions using interface 112. The digital computing devices can also include a communication protocol device for receiving instructions and sending results of executed quantum computations to a classical computer. Additionally, the digital computing devices can also include a communication interface with interface 112. In one embodiment, supervisory controller 111 can be configured to receive classical instructions (e.g., from classical computer 120) and convert the classical instructions into supervisory instructions for interface 112. The supervisory instructions provided by supervisory controller 111 to interface 112 can be, for example, digital signals that indicate which of the quantum gates need to act on the qubits to perform a particular function. Interface 112 can be configured to convert these digital signals into analog signals (e.g., analog pulses of microwave pulses) that can be used to apply quantum gates on the qubits to manipulate the interactions between the qubits.

[0046] Interface 112 can be a classical-quantum interface including a combination of devices capable of receiving instructions from control machine 111 and converting the instructions into a device for implementing quantum operations. In one embodiment, interface 112 can transform instructions from control machine 111 into drive signals that can drive or manipulate qubits, and / or act quantum gates on qubits. Additionally, interface 112 can be configured to convert signals received from quantum chip 113 into digital signals that can be processed and transmitted by control machine 111. Devices included in interface 112 can include, but are not limited to, digital-to-analog converters, analog-to-digital converters, waveform generators, attenuators, amplifiers, optical fibers, lasers, and filters. Interface 112 can further include circuit components configured to measure a plurality of qubits after a quantum gate has acted on the qubits, where the measurement can produce a result represented in classical bits. Each measurement performed by interface 112 can be read out to a device connected to quantum hardware system 110, such as classical computer 120. Multiple measurement results provided by interface 112 can represent probabilistic results.

[0047] Classical computer 120 can include hardware components such as processors and storage devices (e.g., including memory devices and classical registers) for processing data encoded in classical bits. In one embodiment, classical computer 120 can be configured to provide various control signals, instructions, and data encoded in classical bits to quantum hardware system 110. Further, quantum states measured by quantum hardware system 110 can be read out by classical computer 120, and classical computer 120 can store the measured quantum states as classical bits in classical registers. In one embodiment, classical computer 120 can be any suitable combination of computer executable hardware and / or computer executable software capable of executing preparation module 121 to perform quantum computations using data stored in data storage module 122 as part of a build and compute. Data storage module 122 can be a repository for data to be analyzed using quantum computing algorithms and results of that analysis. Preparation module 121 can be a program or module capable of preparing classical data from data storage module 122 as part of a quantum circuit implementation. Preparation module 121 can be instantiated as part of a larger algorithm, such as a function call of an application programming interface (API), or by parsing a hybrid classical-quantum computation into quantum and classical computing aspects. For example, preparation module 121 can generate instructions for creating a quantum circuit using quantum gates. In embodiments, such instructions can be stored by control machine 111 and components of interface 112 can be instantiated to execute such that quantum operations of the quantum gates can be performed on quantum chip 113.

[0048] The classical computer 120 can be a laptop computer, a desktop computer, a vehicle integrated computer, a smart mobile device, a tablet device, and / or any other suitable classical computing device. Additionally or alternatively, the classical computer 120 can also operate as part of a cloud computing service model, such as software as a service (SaaS), platform as a service (PaaS), or infrastructure as a service (IaaS). The classical computer 120 can also be located in a cloud computing deployment model, such as a private cloud, community cloud, public cloud, or hybrid cloud.

[0049] In combination with the description of the above background, there are many reasons for noise, that is, there are many sources of noise. For example, measurement process noise: when reading the quantum state, the insufficient sensitivity of the detector, environmental electromagnetic interference, etc., cause the measurement result to be inconsistent with the actual quantum state (for example, the ideal |0> state is misjudged as the |1> state).

[0050] Quantum bit interaction noise: quantum bits interact with each other through physical coupling (such as capacitance, inductance), which causes mutual interference, which is manifested as the state of a bit affecting the measurement result or operation accuracy of adjacent bits (for example, when q0 is in the |1> state, the measurement error rate of q1 increases).

[0051] Operation process noise: quantum gate operation (such as single-bit X gate, multi-bit CNOT gate) due to insufficient hardware precision (such as control pulse delay, amplitude deviation) causes non-ideal state transition, or noise caused by line crosstalk (such as adjacent wire electromagnetic radiation interference quantum bit operation).

[0052] Multi-bit gate operation noise: when performing multi-bit joint operation, due to the non-ideal nature of quantum entanglement, the noise of the control bit is transmitted to the target bit, resulting in overall operation error.

[0053] As can be seen, in the quantum computing process, noise can be generated in multiple stages, and therefore, in order to obtain accurate calculation results, it is usually necessary to mitigate the errors caused by these noises (for example, the processing result can be adjusted through post-processing, thereby playing a role in error mitigation).

[0054] In the related art, quantum error mitigation techniques are also derived, for example, M3 (Measurement-based mitigation of readout errors) error mitigation techniques and zero-noise extrapolation (ZNE) error mitigation techniques, finite element (FEM) based grouping modeling and iterative calibration techniques, probabilistic error cancellation (PEC) techniques, etc. However, different error mitigation techniques have their own advantages and disadvantages, and the existing framework usually selects to use a single error mitigation technique, so that the same error mitigation technique is used for different quantum computing tasks, which may cause poor error mitigation effect for some computing tasks. It can also be understood that the error mitigation method in the related art has great limitations in error mitigation for diverse quantum computing tasks, so that accurate error mitigation cannot be performed.

[0055] Based on this, the present disclosure provides an error mitigation method. In the present disclosure, the error mitigation method can encapsulate different error correction programs through a unified interface in advance, then display at least one preset error correction method according to the related information of a first quantum computing task, and then correct the result of the first quantum computing task according to the selected first error correction method. This correction method allows different quantum computing tasks to use different error correction methods, which is beneficial to make the final correction result more accurate. At the same time, this method also integrates different error correction methods, making the interaction process between the quantum computing task and the quantum operation system more smooth. When processing different quantum computing tasks, the user only needs to select according to the displayed error correction method, so that the user's interaction experience is also good.

[0056] Please refer to Figure 2 which shows a flowchart of an error mitigation method provided by an embodiment of the present application. The method can be applied in a computer device, which refers to an electronic device with data computing and processing capability. The method can include the following steps:

[0057] Step 201, in response to receiving a first quantum computing task, displaying at least one preset error correction method according to the related information of the first quantum computing task.

[0058] Here, the related information at least includes the following: quantum bit information, quantum circuit structure information.

[0059] Step 202, correcting the running result corresponding to the first quantum computing task according to the selected first error correction method.

[0060] As an example, different error correction methods may be adapted to different correction scenarios. For example, a confusion matrix correction method, which does not require additional quantum resources, is suitable for fast correction of a small number of bits (e.g., can be adapted to a scenario in which the number of quantum bits is less than 20); a FEM-based grouping modeling calibration method, which can accurately capture noise in each group, is more efficient than global correction, and can be more suitable for scenarios in which the number of quantum bits is large (>20) and the noise between bits is different; a zero noise extrapolation (ZNE) correction method, which effectively alleviates the cumulative error of gate operations by enhancing the zero noise result of noise extrapolation, can be more suitable for scenarios in which the quantum circuit depth is large (the number of gate operations is large); a probability error cancellation (PEC) correction method, which improves phase accuracy by eliminating the influence of noise gates through classical post-processing, can be more suitable for scenarios in which the accuracy requirement of gate operations is extremely high; and a quantum error correction code (QEC) correction method, which can continuously detect and correct errors, can ensure no error accumulation in long-time tasks, and this correction method can be suitable for scenarios in which the number of quantum bits is sufficient (e.g., 1000+ physical bits) and the task running time is long (e.g., hours).

[0061] Here, the preset error correction method has been pre-set with parameters related to the error correction method, and can be directly used for error correction.

[0062] As can be seen from the above analysis, different error correction methods may be adapted to different error correction scenarios. When the first quantum computing task is received, at least one preset error correction method can be displayed according to the relevant information of the quantum computing task. The user can then select at least one preset error correction method displayed, so that the selected error correction method can be used to correct the running result of the quantum computing task.

[0063] Of course, since the correction process of different error correction methods can be different, some error correction methods can require the addition of some logic gates in the quantum circuit; some error correction methods are only post-processing methods (do not change the structure of the circuit, but only correct the result through subsequent algorithms to make the result more accurate), so only the running result of the quantum computing task needs to be corrected according to the error correction method selected by the user.

[0064] It can be seen that in the present disclosure, after the first quantum computing task is detected, at least one preset error correction method can be displayed according to the related information of the first quantum computing task for the user to select, and the running result corresponding to the quantum computing task can be corrected according to the selected first error correction method. In the process of correcting the quantum computing task, at least one preset error correction method can be displayed according to the related information, and the user can also select the error correction method according to the actual scene. This method makes the correction of the quantum computing task more flexible, which helps to more accurately correct the running result of the quantum computing task.

[0065] In some implementations, the displayed at least one preset error correction method can also be understood as displaying at least one error correction identifier (one error correction method corresponds to one error correction identifier), so that the user can select the error correction method by selecting the error correction identifier.

[0066] In some embodiments, the error correction programs corresponding to the at least one preset error correction method can be encapsulated according to a unified interface protocol, and the above step 202 “correcting the running result corresponding to the quantum computing task according to the error correction method selected by the user” can be used for:

[0067] correcting the running result of the quantum computing task by calling and running the first error correction program corresponding to the first error correction method through the interface of the first error correction program.

[0068] As an example, the error correction programs corresponding to the at least one preset error correction method are encapsulated according to a unified interface protocol, and the interface type can usually be a standardized interface (such as REST API, or RPC, message queue, etc.), which is used to realize the decoupling of the “calling party (such as a workflow engine)” and the “called party (error correction program)”. The format and rules of data interaction can be defined to ensure that the calling party does not need to understand the underlying implementation (such as algorithm details, code language) of the correction program, and only needs to pass parameters according to the interface specification to trigger the correction.

[0069] As an example, each error correction program can be integrated into an error correction method library, and its interface information (such as interface address, input and output parameter description) is registered in the framework. For example, the “confusion matrix correction program” needs to register the URL of its REST API, and the supported input data format (such as JSON format of the original measurement result). In this way, each error correction method can be accurately and timely called.

[0070] In order to facilitate the understanding of the framework logic of the present disclosure, the following Figure 3 The hardware framework of the present disclosure is described, and the functions of different architectures, such as Figure 3As shown, Figure 3 A schematic diagram of a framework for performing an error mitigation method is provided in the present disclosure.

[0071] By Figure 3 As can be seen, the task information extraction module 301 can be used to detect and parse the relevant information of the quantum computing task, including the qubit information (number, noise characteristics, topology structure), quantum circuit structure information (gate operation type, circuit depth, measurement position), etc. Its implementation can be achieved by parsing the quantum circuit code (such as QASM, Cirq) or calling the quantum hardware interface, automatically extracting the above information, and providing the basis for subsequent recommendation of correction methods.

[0072] The error correction method library 302 can be used to store a plurality of preset error correction methods (such as readout error confusion matrix correction, FEM grouping modeling calibration, ZNE, PEC, etc.), each of which corresponds to a predefined implementation logic (algorithm, parameter range, applicable scene rule). And can contain the "replacement fragment" of each correction method, that is, the executable code logic, configuration template and parameter description. That is, when a certain error correction method is selected, the error correction method is replaced with the original error correction method that needs to be corrected.

[0073] The method recommendation and selection module 303 can be used to match the applicable rules in the error correction method library based on the output of the task information extraction module, recommend at least one correction method to the user, support user manual selection or automatic adaptation of the optimal method. Its logic basis can be: built-in scene matching rules (such as "multiple qubits correspond to FEM grouping", "gate operation intensive corresponds to ZNE"), and specific matching rules can be set according to historical conditions.

[0074] The parameter configuration and mapping module 304 can be used to map the correction method selected by the user and its configuration parameters (such as the number of iterations, the number of groupings) into an executable workflow model, and call the corresponding replacement fragment in the method library. Its key role lies in the conversion of "abstract correction requirements" to "specific execution logic", for example, "FEM grouping modeling" can be mapped to grouping algorithms, noise sub-model construction code and iterative calibration processes.

[0075] The execution and correction engine 305 can be used to drive the correction program to run, receive the original running results of the quantum computing task (such as measurement data), apply the mapped correction logic for processing, and output the corrected results. This part can include: workflow engine (scheduling execution steps), classical computing unit (running correction algorithms), hardware interface (obtaining original results).

[0076] The data storage and provenance module 306 can be specifically used to store key data in the correction process, including task information, selected correction method, configuration parameters, original results, corrected results, and execution logs. For example, the QProv (Quantum Provenance) provenance system can be used to ensure that the correction process is reproducible and supports historical data reuse (e.g., directly calling past configurations for the same task).

[0077] The extension and management module 307 is used to support adding new error correction methods to the method library (through the expert definition module), updating scene matching rules, and extending hardware interface to adapt to new quantum devices. This part allows the user to dynamically update the preset error correction methods, rather than being fixed. This approach helps to update the error correction methods in a timely manner, thereby helping to ensure the error correction effect.

[0078] In some embodiments, the preset error correction methods include at least one of the following:

[0079] Confusion matrix correction method, zero noise extrapolation (ZNE) correction method, probabilistic error cancellation correction method, and quantum error correction code correction method.

[0080] Of course, only some of the preset error correction methods are illustrated here. In actual applications, the error correction methods can also be selected according to the actual application scenarios.

[0081] In some embodiments, the above method can further include:

[0082] In response to detecting that the first correction result does not meet the predefined condition, selecting a second error correction method from at least one preset error correction method to correct the running result of the quantum computing task.

[0083] Here, the first correction result is used to indicate the correction result of the first error correction method for the running result of the quantum computing task.

[0084] Here, the predefined condition can include at least one of the following:

[0085] Whether the data coincidence degree before and after correction reaches a preset threshold, whether the probability distribution after correction meets the physical constraint.

[0086] It should be understood that the first correction result should indicate that the probability distribution after correction should meet all probability values within the interval [0, 1]. For example, using the matrix inversion method produces [0.9, -0.1], which is illegal because of the negative probability. Therefore, it can be understood that the first correction result does not meet the predefined condition, thereby triggering the switching to use the second correction method for correction (e.g., the zero noise extrapolation (ZNE) correction method).

[0087] As an example, the data similarity before and after the correction (such as cosine similarity, KL divergence, which can reflect the data similarity) should generally be greater than or equal to 90%; if less than 90%, it may prove that the first error correction method is not reasonable, and the second error correction method can be used for correction.

[0088] Of course, in actual application scenarios, when the correction result of the second error correction method also does not meet the condition, a third error correction method can be used for correction until the correction result meets the condition.

[0089] As an example, the first correction method and the second correction method can have certain correlation, for example, the second error correction method can be mutually dependent on the first error correction method, can be downgraded from a high-precision method to a high-stability method (such as switching from matrix inversion to ZNE), or can avoid switching to a correction method with more overhead. Of course, in actual scenarios, the selection rules of the first correction method and the second correction method can also be reasonably selected according to the actual application scenario.

[0090] In order to facilitate understanding, the correlation between the first error correction method and the second error correction method can be illustrated by examples, for example, when the first correction method is matrix inversion method (REM) (the confusion matrix M may become a singular matrix due to hardware drift, which cannot be inverted. Make the corrected probability appear negative (such as [0.9, -0.1]), the second correction method can be ZNE (ignore M and directly extrapolate noise by calling ZNE fragment).

[0091] For another example, the first error correction method is matrix inversion method (REM), and the second error correction method is a grouping modeling and iterative calibration technology based on finite element (FEM); the first correction method is ZNE (the result diverges after noise amplification (such as non-monotonic extrapolation curve); hardware does not support pulse stretching (cannot adjust noise level)), at this time, the second correction method can be CDR, which trains the error model using Clifford circuit. For another example, the first correction method is CDR (the circuit contains a large number of non-Clifford gates (such as 10 T gates), and the CDR model error is too large), at this time, the second correction method can be PEC.

[0092] That is, in the present disclosure, when the correction result does not meet the condition, the correction method can be automatically switched, and this method makes the finally obtained correction result more accurate, and this process does not require the participation of the user, so that the interactive experience is good.

[0093] In some embodiments, "displaying at least one preset error correction method according to the related information of the first quantum computing task" in step 201 can specifically include:

[0094] Obtain the corresponding relationship information from the first storage space, determine a plurality of historical quantum computing tasks matched with the first quantum computing task according to the related information of the first quantum computing task, and display at least one preset error correction method according to the error correction methods corresponding to the plurality of quantum computing tasks.

[0095] Here, the corresponding relationship is used to indicate the error correction method corresponding to each historical quantum computing task.

[0096] As an example, the first storage space can be used to store information related to historical quantum computing tasks. The storage space can be separated from the program storage space corresponding to the error correction method, so that the error correction method to be used can be efficiently queried, and the calling of the error correction program can be efficiently implemented.

[0097] As an example, in the present disclosure, the corresponding quantum characteristics of the related information of the historical quantum computing task (as a matching reference) can include but are not limited to: the number of qubits, the noise characteristics of qubits (such as readout error rate, coherence time), the structure of quantum circuit (the proportion of gate operation type, circuit depth, measurement times), task type (such as VQE, QAOA, logical gate test) and the like.

[0098] It should be understood that the related information of each quantum computing task can be stored in a structured form (such as a feature vector: [number of qubits = 10, readout error rate = 5%, proportion of CNOT gate = 30%, task type = VQE, etc.]), so that comparison can be facilitated.

[0099] It should be understood that the structured related information can also correspond to error correction methods and effect data (as a recommendation basis), for example, the error correction method finally adopted by each historical task (such as “FEM grouping modeling calibration”), the effect index after correction (such as coincidence degree before and after correction = 0.92, whether to meet physical constraints = yes), user feedback (such as “effective” “ineffective”) and the like can be recorded. Through these correction process and result information, the error correction method adopted by each historical quantum computing task and the correction effect can be indicated, so as to facilitate more reasonable display of at least one error correction method that can be used for the first quantum computing task.

[0100] In some embodiments, the above determining a plurality of historical quantum computing tasks matched with the first quantum computing task according to the related information of the first quantum computing task can specifically include:

[0101] Determining a plurality of historical quantum computing tasks in the historical computing tasks having a task similarity greater than a preset threshold with the first quantum computing task;

[0102] And, the error correction method corresponding to the plurality of historical quantum computing tasks is determined and displayed, and the at least one preset error correction method is displayed.

[0103] The error correction method corresponding to the plurality of historical quantum computing tasks is determined and displayed, and the at least one preset error correction method is displayed.

[0104] As an example, when the comparison of the quantum computing task is specifically performed, it can be performed by matching the feature extraction and the similarity calculation. For example, the quantization feature of the current task (the first quantum computing task) is extracted to generate a feature vector (consistent with the historical task feature dimension). For example, the current task feature vector can be [quantum bit number=12, readout error rate=6%, CNOT gate proportion=25%, task type=VQE, etc.]. After obtaining the feature vector, similarity calculation can be performed, such as calculating the similarity between the current task and the historical task feature vector by an algorithm (such as Euclidean distance, cosine similarity, weighted similarity). For example, if a historical task feature vector is [10, 5%, 30%, VQE], the similarity between the current task and the historical task feature vector can be quantified as 85% (quantum bit number, task type is highly similar).

[0105] Of course, a similarity threshold (such as ≥70%) can be set to filter out a plurality of historical tasks (such as 3-5 most similar tasks) that exceed the threshold. If the similarity is lower than the threshold (such as no matching historical task), a fallback mechanism (such as recommending a default correction method or recommending based on expert rules) can be triggered.

[0106] In this way, the plurality of historical quantum computing tasks determined to be matched can have a high similarity with the first quantum computing task, and thus the correction method for the plurality of quantum computing tasks can be adapted to the first quantum computing task, thereby helping to correct the running result of the first quantum computing task.

[0107] As an example, the rule of determining and displaying the at least one preset error correction method can adopt the following manner:

[0108] The recommended method can be filtered from the matched plurality of historical tasks in combination with historical effects and task commonalities, and specific rules can include high-frequency effective priority, optimal effect priority, and exclusion of invalid methods. Specifically:

[0109] High-frequency effective priority

[0110] The error correction method that is most frequently used and achieves satisfactory results in historical matching tasks is the one used most often. For example, in three historical VQE matching tasks, if two used "ZNE" and achieved satisfactory results (overlap ≥ 0.85), and one used "PEC", then "ZNE" is the preferred choice.

[0111] Prioritize the best results

[0112] If multiple correction methods exist in the historical tasks, choose the one with the best correction effect (e.g., highest overlap and 100% physical constraint satisfaction). For example, in the matched historical tasks, the average overlap of "FEM grouping modeling" is 0.93, and "confusion matrix correction" is 0.82, so "FEM grouping modeling" is recommended.

[0113] Excluding invalid methods

[0114] If a certain error correction method has failed in the matching history of a task (e.g., overlap < 0.8), then that method is excluded. For example, if "simple confusion matrix correction" failed in a 12-bit task in the past, then that method is not recommended for the current 12-bit task.

[0115] Of course, the specific method listed above, and the determination of at least one preset error correction method, can be reasonably set according to the actual situation.

[0116] In some implementations, at least one preset error correction method may be displayed with a reason for selection, such as "mostly chosen" or "best performance", so that users can better select the error correction method for the first quantum computing task from the displayed instructions of preset error correction methods.

[0117] To facilitate understanding of at least one error correction method shown, it can be combined with Figure 4 To explain, Figure 4 This can be understood as a schematic diagram showing at least one error correction method in one possible implementation of this disclosure. It can be seen that after displaying the identifier corresponding to at least one error correction method, the reasons for recommending to display this error correction method can also be displayed, thereby helping users to more accurately select the error correction method for the first quantum computing task and helping to more accurately achieve the correction selection for the first quantum computing task.

[0118] In some embodiments, when the relevant information indicates that the number of qubits is less than a first number, at least one preset error correction method is displayed, including a confusion matrix correction method.

[0119] In a case where the relevant information indicates that the number of qubits is greater than or equal to the first number, and / or the relevant information indicates that the number of logical gates in the quantum circuit structure is greater than the second number, the at least one preset error correction mode displayed includes a zero noise extrapolation (ZNE) correction mode and a probabilistic error cancellation correction mode.

[0120] It should be understood that the first number can be limited according to actual conditions, such as 20, 25, etc. For example, when the number of qubits is less than the first number, the noise difference between qubits is small (such as readout error rate, coherence time is close), and the overall noise scale is controllable, which is suitable for a simple and efficient correction mode (such as confusion matrix correction).

[0121] When the number of qubits is greater than or equal to the first number, the noise difference between bits is significant (such as the readout error rate of qubits at different positions differs by 2-3 times), and the complexity of the noise model increases, so a simple method cannot be used to cover it, and a more complex method (such as ZNE and PEC) is needed.

[0122] As an example, the second number can be 50, 60, etc. That is, the second number is related to the depth of the quantum circuit. When the number of logical gates is less than or equal to the second number, the error accumulation of gate operation is less (when the error of single gate operation is less than or equal to 1%, the cumulative error of 50 gates is less than or equal to 50%), which is not the main error source. When the number of logical gates is greater than the second number, the gate operation error (such as the phase deviation of the CNOT gate and the amplitude attenuation of the single-bit gate) becomes the dominant error (the cumulative error can be greater than 50%), which needs to be corrected. That is, in the present disclosure, when the relevant information indicates that the number of qubits is greater than or equal to the first number, and / or the relevant information indicates that the number of logical gates in the quantum circuit structure is greater than the second number, the zero noise extrapolation (ZNE) correction mode and the probabilistic error cancellation correction mode can be displayed, so that the at least one preset error correction mode displayed can be more suitable for the correction of the first quantum computing task.

[0123] Figure 5 A structural schematic diagram of an error mitigation device 500 provided by an embodiment of the present application is shown. The device 500 includes:

[0124] A display unit 501 is configured to, in response to receiving a first quantum computing task, display at least one preset error correction mode according to relevant information of the first quantum computing task. The relevant information includes at least the following: qubit information and quantum circuit structure information.

[0125] A correction unit 502 is configured to correct the running result of the first quantum computing task according to the selected first error correction mode.

[0126] In some embodiments, the at least one preset error correction manner corresponds to an error correction program encapsulated according to a unified interface protocol, and the correction unit 502 is specifically further configured to:

[0127] The first error correction program is called and run through the interface of the first error correction program to correct the running result of the quantum computing task.

[0128] In some embodiments, the preset error correction manner includes at least one of the following:

[0129] The confusion matrix correction manner, the zero noise extrapolation (ZNE) correction manner, the probabilistic error cancellation correction manner, and the quantum error correction code correction manner.

[0130] In some embodiments, the device 500 is specifically further configured to:

[0131] In response to detecting that the first correction result does not meet the predefined condition, a second error correction manner is selected from the at least one preset error correction manner to correct the running result corresponding to the quantum computing task, wherein the first correction result is used to indicate the correction result of the first error correction manner for the running result of the quantum computing task.

[0132] The predefined condition includes at least one of the following:

[0133] Whether the data coincidence degree before and after correction meets a preset threshold, and whether the probability distribution after correction meets a physical constraint.

[0134] In some embodiments, the display unit 501 is specifically further configured to:

[0135] The corresponding relationship information is obtained from the first storage space, wherein the corresponding relationship is used to indicate the error correction manner corresponding to each historical quantum computing task.

[0136] According to the related information of the first quantum computing task, a plurality of historical quantum computing tasks matched with the first quantum computing task are determined.

[0137] According to the error correction manners corresponding to the plurality of historical quantum computing tasks, at least one preset error correction manner is determined and displayed.

[0138] In some embodiments, the display unit 501 is specifically further configured to:

[0139] A plurality of historical quantum computing tasks having a task similarity greater than a preset threshold with the first quantum computing task are determined.

[0140] And, the at least one preset error correction mode is determined and displayed according to the error correction mode corresponding to the plurality of historical quantum computing tasks.

[0141] The at least one preset error correction mode is determined and displayed according to the number of times of each error correction mode used by the plurality of historical quantum computing tasks.

[0142] In some embodiments, when the relevant information indicates that the number of qubits is less than the first number, the at least one preset error correction mode displayed includes a depolarizing correction mode.

[0143] When the relevant information indicates that the number of qubits is greater than or equal to the first number, and / or, when the relevant information indicates that the number of logical gates in the quantum circuit structure is greater than the second number, the at least one preset error correction mode displayed includes a zero noise extrapolation (ZNE) correction mode and a probabilistic error cancellation correction mode.

[0144] Figure 6 A structure diagram of a computer device provided by an embodiment of the present application is shown, which includes a memory and a processor, the memory stores a computer program, and the processor implements the functions of the computer system of the error mitigation method in any of the above embodiments when executing the computer program.

[0145] The embodiment of the present application further provides a computer readable storage medium, which stores a computer program, and the computer program makes the computer execute the functions of the computer system of the error mitigation method in any of the above embodiments when executed by the computer.

[0146] The embodiment of the present application further provides a computer program product containing instructions, which makes the computer execute the functions of the computer system of the error mitigation method in any of the above embodiments when executed by the computer.

[0147] It can be understood that the specific examples in the present application are only to help those skilled in the art better understand the embodiments of the present application, and do not limit the scope of the present application.

[0148] It can be understood that in various embodiments of the present application, the size of the serial number of each process does not mean the order of execution, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0149] It can be understood that the various embodiments described in the present application can be implemented alone or in combination, and the embodiments of the present application do not limit this.

[0150] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in the description herein is for describing particular embodiments only and is not intended to be limiting of the application. The use herein of the terms "and / or" includes a combination of one or more of the associated listed items. As used in this description and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0151] It can be understood that the processor in the embodiments of the present application can be an integrated circuit chip with a signal processing capability. In the implementation process, the steps of the above method embodiments can be completed by hardware integrated logic circuits in the processor or by instructions in the form of software. The processor mentioned above can be a general processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components. The disclosed methods, steps and logic block diagrams in the embodiments of the present application can be implemented or executed. The general processor can be a microprocessor or the processor can also be any conventional processor. The steps of the method disclosed in combination with the embodiments of the present application can be directly embodied as a hardware code processor for execution, or a combination of hardware and software modules in the code processor for execution. The software module can be located in a random access memory, a flash memory, a read only memory, a programmable read only memory or an electrically erasable programmable memory, a register, and other mature storage media in the art. The storage medium is located in the memory, and the processor reads the information in the memory and combines the hardware to complete the steps of the above method.

[0152] It can be understood that the memory in the embodiments of the present application can be a volatile memory or a non-volatile memory, or can include both volatile and non-volatile memories. Among them, the non-volatile memory can be a read only memory (ROM), a programmable read only memory (PROM), an erasable programmable read only memory (EPROM), an electrically erasable programmable read only memory (EEPROM) or a flash memory. The volatile memory can be a random access memory (RAM). It should be noted that the memory of the system and method described herein is intended to include but not limited to these and any other suitable type of memory.

[0153] Those skilled in the art can clearly understand that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be realized by electronic hardware or a combination of computer software and electronic hardware. Whether the functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0154] Those skilled in the art can clearly understand that, for the convenience and brevity of the description, the specific working processes of the above-described system, device and unit can refer to the corresponding processes in the foregoing method embodiments, which will not be repeated here.

[0155] In several embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the above-described device embodiments are merely schematic, for example, the division of units is only a logical function division, and actual implementation can have another division manner, for example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the displayed or discussed units can be indirect coupling or communication connection through some interfaces, devices or units, which can be electrical, mechanical or other forms.

[0156] The units described as separate components can or can not be physically separated, and the components shown as units can or can not be physical units, that is, they can be located in one place, or can be distributed on multiple network units. Part or all of the units can be selected according to actual needs to achieve the purpose of the present embodiment scheme.

[0157] In addition, each functional unit in each embodiment of the present application can be integrated into a processing unit, or each unit can exist physically independently, or two or more units can be integrated into one unit.

[0158] If the functions are implemented in the form of software function units and sold or used as independent products, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application or the parts of the technical solutions that essentially contribute to the prior art can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes a plurality of instructions for causing a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the methods of the various embodiments of the present application. The aforementioned storage medium includes a U disk, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, and various media that can store program codes.

[0159] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art can easily think of changes or replacements within the technical scope disclosed in the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A method of error mitigation, the method comprising: The method comprises the following steps: in response to receiving a first quantum computing task, displaying at least one preset error correction method according to the relevant information of the first quantum computing task; wherein the relevant information at least includes the following: qubit information, quantum circuit structure information; the error correction programs corresponding to the at least one preset error correction method are all encapsulated according to a unified interface protocol; correcting the running result of the first quantum computing task according to the selected first error correction method; The step of displaying at least one preset error correction method according to the relevant information of the first quantum computing task comprises the following steps: obtaining corresponding relationship information from a first storage space, wherein the corresponding relationship is used to indicate the error correction methods corresponding to each historical quantum computing task; determining a plurality of historical quantum computing tasks matched with the first quantum computing task according to the relevant information of the first quantum computing task; determining and displaying at least one preset error correction method according to the error correction methods corresponding to the plurality of historical quantum computing tasks.

2. The method of claim 1, wherein, The step of correcting the running result of the quantum computing task according to the selected first error correction method comprises the following steps: calling and running the first error correction program to correct the running result of the quantum computing task through the interface of the first error correction program corresponding to the first error correction method.

3. The method of claim 1, wherein, The preset error correction method comprises at least one of the following: confusion matrix correction method, zero noise extrapolation correction method, probability error elimination correction method, quantum error correction code correction method.

4. The method of claim 1, wherein, The method further comprises the following steps: in response to detecting that the first correction result does not meet a predefined condition, selecting a second error correction method from the at least one preset error correction method to correct the running result of the quantum computing task; wherein the first correction result is used to indicate the correction result of the running result of the quantum computing task by the first error correction method; The predefined condition at least includes one of the following: whether the data coincidence degree before and after correction reaches a preset threshold, whether the probability distribution after correction meets a physical constraint.

5. The method of claim 1, wherein, The step of determining a plurality of historical quantum computing tasks matched with the first quantum computing task according to the relevant information of the first quantum computing task comprises the following steps: determining a plurality of historical quantum computing tasks with a task similarity greater than a preset threshold in historical computing tasks; The step of determining and displaying at least one preset error correction method according to the error correction methods corresponding to the plurality of historical quantum computing tasks comprises the following steps: determining and displaying at least one preset error correction method according to the number of times of each error correction method used by the plurality of historical quantum computing tasks.

6. The method of claim 3, wherein, In the case where the number of qubits indicated by the relevant information is less than a first number, the at least one preset error correction method displayed comprises a confusion matrix correction method; In the case where the number of qubits indicated by the relevant information is greater than or equal to the first number, and / or, in the case where the number of logical gates in the quantum circuit structure indicated by the relevant information is greater than a second number, The at least one preset error correction mode displayed includes a zero noise extrapolation (ZNE) correction mode and a probabilistic error cancellation correction mode.

7. An error mitigation apparatus, characterized by, The method comprises the steps of: The display unit is configured to, in response to receiving a first quantum computing task, acquire corresponding relationship information from a first storage space, wherein the corresponding relationship is used to indicate error correction modes corresponding to historical quantum computing tasks; determine a plurality of historical quantum computing tasks matched with the first quantum computing task according to related information of the first quantum computing task; and determine and display at least one preset error correction mode according to error correction modes corresponding to the plurality of historical quantum computing tasks; wherein the related information at least includes quantum bit information and quantum circuit structure information; and error correction programs corresponding to the at least one preset error correction mode are all encapsulated according to a unified interface protocol. The correction unit is configured to correct a running result of the first quantum computing task according to the selected first error correction mode.

8. An electronic device, comprising: The method comprises the steps of: A processor and a memory are provided. The processor and the memory are connected, wherein the memory is configured to store a computer program, and the processor is configured to call the computer program to execute the method according to any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer readable storage medium stores a computer program, and the computer program includes program instructions, which, when executed by a processor, execute the method according to any one of claims 1-6.

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