An asynchronous execution method and system for an ATE tester

Abstract

The present application relates to the field of integrated circuit automatic test equipment, and discloses an asynchronous execution method and system for ATE test machines.The asynchronous execution method comprises the following steps: an SDK module forms a plurality of executable tasks from test item interface instructions issued by an upper computer and stores the executable tasks in a task stack; the SDK module polls tasks in the task stack, judges the executability of the tasks and processing modules; if the tasks are executable, the SDK module further judges whether lower modules participate; according to the judgment result, the SDK module processes the tasks by itself or distributes the tasks to an ATOS module for processing or distributes the tasks to an FPGA module through the ATOS module for processing; the SDK module, the ATOS module and the FPGA module asynchronously process the assigned tasks at the same time; and after the tasks are completed, the processing results are returned to the task stack; after all subtasks of the current test item are completed, the SDK module loads tasks of the next test item until all test items are completed.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of integrated circuit automatic test equipment, in particular to an asynchronous execution method and system for ATE tester. BACKGROUND

[0002] With the explosive development of integrated circuit industry in China, the demand for automatic test equipment (ATE) used in chip packaging and testing field is increasing. For ATE tester, time efficiency performance has become a key competitive factor. The shorter time spent by the same ATE tester to test the same chip not only improves the market competitiveness of the tester, but also reduces the time and labor costs for chip packaging and testing manufacturers.

[0003] The existing ATE test architecture is usually composed of multiple functional modules, and these modules adopt serial execution mode. Under this architecture, when the traditional ATE tester executes test items, test instructions need to be transmitted from the host computer to each level of execution module in turn, and the execution results also need to be returned along the same path. This one-way execution process makes modules with different processing characteristics unable to work simultaneously. For example, when the bottom module executes tasks, the upper module, even if it has the ability to process other irrelevant tasks, can only wait for the hardware module to complete the work. This mode not only leads to waste of system resources, but also cannot fully utilize the processing capacity of each module. SUMMARY

[0004] The purpose of the present application is to provide an asynchronous execution method and system for ATE tester to solve the problem of resource waste and low efficiency caused by serial execution of existing ATE tester.

[0005] To solve the above technical problems, the present application provides an asynchronous execution method and system for ATE tester. The asynchronous execution method for ATE tester comprises:

[0006] The SDK module forms multiple executable tasks from the test item interface instructions issued by the host computer and stores them in the task stack;

[0007] The SDK module polls the tasks in the task stack, judges the executability of the tasks and the processing module;

[0008] If the task is executable, the SDK module further judges whether the lower module participates;

[0009] According to the judgment result, the SDK module processes the task by itself or distributes the task to the ATOS module for processing or distributes the task to the FPGA module through the ATOS module for processing, and the SDK module, the ATOS module and the FPGA module simultaneously asynchronously process the assigned tasks, and return the processing results to the task stack after the task is completed.

[0010] After all sub-tasks of the current test item are completed, the SDK module loads the task of the next test item until all test items are completed.

[0011] Further, the judging task executability and processing module comprises:

[0012] judging whether the task meets the execution condition according to the task dependency relationship;

[0013] if the task does not meet the execution condition, the task is kept in the task stack for waiting;

[0014] if the task meets the execution condition, it is determined that the task is in an executable state, and the processing module of the task is further judged.

[0015] Further, if the task is executable, the SDK module further judges whether the lower module participates, comprising:

[0016] if the lower module does not need to participate, the SDK module processes the task by itself;

[0017] if the lower module needs to participate, the task is distributed to the ATOS module;

[0018] After the ATOS module receives the task, it is further judged whether the FPGA module needs to participate.

[0019] Further, the further judging whether the FPGA module needs to participate comprises:

[0020] if the FPGA module does not need to participate, the ATOS module processes the task by itself;

[0021] if the FPGA module needs to participate, the ATOS module distributes the task to the FPGA module for processing.

[0022] Further, the process of returning the processing result to the task stack comprises:

[0023] when the SDK module processes the task, the processing result is directly returned to the task stack through the SDK module.

[0024] Further, the process of returning the processing result to the task stack further comprises:

[0025] when the ATOS module processes the task, the processing result is returned to the task stack through the ATOS module and the SDK module in sequence.

[0026] Further, the process of returning the processing result to the task stack further comprises:

[0027] When the FPGA module processes a task, the processing result is returned to the task stack in turn through the FPGA module, the ATOS module and the SDK module.

[0028] Further, the tasks in the task stack include interdependent tasks and independent tasks, the interdependent tasks are executed in order according to the dependency relationship, and the independent tasks can be executed in parallel.

[0029] An asynchronous execution system for an ATE tester, which is operated by using the above asynchronous execution method for the ATE tester, comprises:

[0030] An SDK module, which is connected with the host computer through a data bus, is used for receiving a test item interface instruction of the host computer, managing a task stack, dispatching and distributing tasks, and executing tasks without the participation of lower modules;

[0031] An ATOS module, which is connected with the SDK module through a communication interface, is used for executing tasks distributed by the SDK module, and deciding whether to further distribute the tasks to the FPGA module according to the tasks;

[0032] An FPGA module, which is connected with the ATOS module through a communication interface, is used for executing tasks distributed by the ATOS module;

[0033] A task stack, which is used for storing and managing various tasks formed by the test item interface instruction, the dependency relationship of the tasks and the execution result of the tasks.

[0034] Compared with the prior art, the present application has at least the following beneficial effects:

[0035] The asynchronous execution method for the ATE tester provided by the present application converts the test item interface instruction issued by the host computer into a plurality of executable tasks and stores the tasks in a task stack, judges the executability of the tasks by polling through the SDK module, and distributes the tasks to appropriate processing modules according to the characteristics of the tasks, so that the asynchronous and parallel work of the SDK module, the ATOS module and the FPGA module is realized, different test tasks can be processed by the modules at the same time, the mutual waiting among the modules is avoided, and the system resource utilization rate is significantly improved. Meanwhile, the dependency relationship of the tasks is managed in the task stack, so that the independent tasks can be executed in parallel, the overall test time is reduced, and the test efficiency of the ATE tester is improved. BRIEF DESCRIPTION OF DRAWINGS

[0036] Figure 1 The flowchart of the asynchronous execution method for the ATE tester in an embodiment of the present application;

[0037] Figure 2 The flowchart of a specific embodiment of the present application;

[0038] Figure 3 This is a flowchart of the asynchronous execution phase of a task in a specific embodiment of the present invention;

[0039] Figure 4 This is a schematic diagram of the structure of an asynchronous execution system for an ATE test machine according to an embodiment of the present invention. Detailed Implementation

[0040] Based on the teachings of this specification, those skilled in the art can form new technical solutions by combining different implementation methods without creating technical contradictions. Such variations should be considered to fall within the protection scope of this patent.

[0041] The following will describe in more detail an asynchronous execution method and system for an ATE test machine according to the present invention, with reference to the accompanying diagrams, which illustrate preferred embodiments of the invention. It should be understood that those skilled in the art can modify the invention described herein while still achieving its advantageous effects. Therefore, the following description should be understood as being of general knowledge to those skilled in the art and is not intended to limit the invention.

[0042] The invention is described more specifically by way of example in the following paragraphs with reference to the accompanying drawings. The advantages and features of the invention will become clearer from the following description. It should be noted that the drawings are in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the invention.

[0043] Example 1

[0044] like Figure 1 As shown in the figure, this embodiment of the invention proposes an asynchronous execution method for an ATE test machine, including:

[0045] First, the SDK module transforms the test item interface instructions issued by the host computer into multiple executable tasks and stores them in the task heap. Specifically, after receiving the test item interface instructions from the host computer module, the SDK module parses and processes them, decomposing a single test item into multiple independent executable tasks. These tasks include different types of operations such as test parameter setting, signal generation, data acquisition, and result analysis. The SDK module encapsulates these tasks according to a predefined format and stores them in the task storage area of ​​the task heap for subsequent processing. This task decomposition mechanism can break down complex test items into multiple simple sub-tasks, facilitating parallel processing and improving the system's processing efficiency and resource utilization.

[0046] Then, the SDK module polls the tasks in the task stack, judges the executability of the tasks and the processing module. In the polling process, the SDK module checks the state of each task in the task stack in turn. This polling mechanism realizes real-time monitoring of the state of the tasks, so that executable tasks can be discovered and assigned in time, avoiding long-term retention of tasks; also, the system can intelligently select the most suitable execution order according to the current state.

[0047] Further, if the task is executable, the SDK module further judges whether the lower module participates. In this step, the SDK module decides the execution path of the task according to the type and complexity of the task, so that the task is assigned to the most suitable processing module, simple tasks are directly processed by the upper module, and complex tasks are issued to a special hardware module, avoiding waste of processing capacity and resource mismatch; by selecting the execution path most suitable for the characteristics of the task, the completion time of the task is shortened, and the processing efficiency of the system is improved.

[0048] Then, according to the judgment result, the SDK module processes the task by itself or distributes the task to the ATOS module for processing or distributes the task to the FPGA module for processing through the ATOS module. The SDK module, the ATOS module and the FPGA module asynchronously process the assigned tasks at the same time, and return the processing results to the task stack after the tasks are completed. In the task distribution process, the system selects the most suitable execution module according to the characteristics of the task, and fully utilizes the expertise of each module. For example, for pure software logic processing tasks such as simple data conversion and comparison operations, the SDK module can directly process without calling the lower module. For tasks that need to operate system bottom resources, such as device driver control and hardware configuration, the ATOS module is used for processing. For tasks that need hardware acceleration such as high-speed signal generation and acquisition and complex waveform processing, the FPGA module is used for execution. This flexible task distribution strategy enables the system to automatically select the most suitable processing module according to the characteristics of the task, improving the processing efficiency and resource utilization.

[0049] Secondly, asynchronous parallel execution breaks the serial processing limitation of traditional test systems, and the three modules can work at the same time without waiting for each other, significantly improving the overall processing capacity and response speed of the system. All processing results are finally collected in the task stack, so that the data remains complete, facilitating subsequent analysis and report generation; in addition, this method also improves the fault tolerance and maintainability of the system, and the loose coupling structure between modules makes the failure of a single module not cause the entire system to crash, and also facilitates module-level upgrade and optimization, providing long-term technical adaptability for the system.

[0050] Finally, after all sub-tasks of the current test item are completed, the SDK module loads the tasks of the next test item until all test items are completed, so that the integrity and continuity of the test are maintained, the automatic processing of batch test items is supported, the analysis results are integrated at the test item level, and the automation degree of the test process and the data management efficiency are improved.

[0051] In the embodiment, the judging module judges whether the task meets the execution condition according to the task dependency relationship, and if the task does not meet the execution condition, the task is kept in the task stack to wait, and if the task meets the execution condition, the task is determined to be executable, and the processing module of the task is further judged. The task scheduling mechanism based on the dependency relationship enables the test tasks to be executed in the correct logical order, prevents inaccurate test results or system abnormalities caused by incorrect execution order, and reduces invalid operations by not attempting to execute tasks whose preconditions are not met.

[0052] In the embodiment, if the task is executable, the SDK module further judges whether the lower module participates, including if the lower module does not need to participate, the SDK module processes the task by itself, and if the lower module needs to participate, the task is distributed to the ATOS module, and the ATOS module further judges whether the FPGA module needs to participate after receiving the task. The task distribution mechanism not only establishes a clear task processing hierarchy from the SDK module to the ATOS module to the FPGA module, forming a top-down task allocation path, but also optimizes the decision-making process by making simple judgments at the higher level first and only passing down decisions to lower modules when necessary, reducing decision-making delays and unnecessary inter-module communication. In addition, this design improves the maintainability and scalability of the system, with clear responsibilities and boundaries for each module, facilitating independent optimization or functional expansion at a specific level while maintaining the stability and consistency of the overall system, providing a good architectural foundation for the long-term evolution of complex test systems.

[0053] In the embodiment, the further judgment whether the FPGA module needs to participate includes if the FPGA module does not need to participate, the ATOS module processes by itself, and if the FPGA module needs to participate, the ATOS module distributes the task to the FPGA module for processing. The FPGA calling decision mechanism based on task characteristics enables efficient allocation of hardware resources, as only complex tasks that truly require FPGA hardware acceleration are allocated to the FPGA module, avoiding waste of hardware resources. The ATOS module as an intermediate layer clarifies the hierarchy of the system, which can independently process system-level tasks and serve as a control interface for the FPGA module, simplifying the overall system architecture.

[0054] In the embodiment, the process of returning the processing result to the task stack includes: when the SDK module processes the task, the processing result is returned to the task stack directly through the SDK module; when the ATOS module processes the task, the processing result is returned to the task stack through the ATOS module and the SDK module in sequence; and when the FPGA module processes the task, the processing result is returned to the task stack through the FPGA module, the ATOS module and the SDK module in sequence. The result returning mechanism establishes a clear and consistent data backflow path. No matter which level the task is processed at, the result finally needs to pass through the SDK module to return to the task stack, so that the data flow has standardization and traceability. The SDK module as the manager of the task stack can comprehensively master the execution state and result of all tasks, which is beneficial to subsequent data analysis and test evaluation, improves the maintainability and data management efficiency of the system, and provides reliable guarantee for high-quality test result report.

[0055] In the embodiment, the tasks in the task stack include interdependent tasks and independent tasks. The interdependent tasks are executed in sequence according to the dependency relationship, and the independent tasks can be executed in parallel. For example, subtask 2 depends on the execution result of subtask 1. The system will make subtask 1 execute first. Only when subtask 1 is completed and the result is stored in the result storage area, subtask 2 can be determined as an executable state. For the independent tasks, for example, there is no dependency relationship between subtask 3 and subtask 4. They can be allocated to different processing modules and executed in parallel, which greatly improves the processing efficiency of the system.

[0056] Embodiment two

[0057] As shown in Figure 4 The embodiment provides an asynchronous execution system for an ATE tester, which is operated by the method in the embodiment one. The asynchronous execution system includes an SDK module, an ATOS module, an FPGA module and a task stack.

[0058] Specifically, the SDK module is the upper layer of the system and is also the core control module of the system. The SDK module is connected with the host computer through a data bus, is used to receive the test item interface instruction of the host computer, manages the task stack, dispatches and distributes tasks, and executes tasks that do not need the participation of the lower module.

[0059] The ATOS module is the intermediate layer control module, is connected with the SDK module through a communication interface, is used to execute the task distributed by the SDK module, and decides whether to further distribute the task to the FPGA module according to the task.

[0060] The FPGA module, as the underlying hardware execution module, connects to the ATOS module via a communication interface to execute tasks distributed by the ATOS module. The FPGA module has a programmable logic array, enabling parallel data processing, and is particularly suitable for executing complex testing tasks requiring hardware acceleration.

[0061] The task heap is the system's data hub, directly connected to the SDK modules. It stores and manages various tasks generated by test item interface instructions, their dependencies, and execution results. The task heap employs an efficient data structure design, comprising a task storage area and a result storage area. The task storage area stores tasks to be executed and their dependencies, while the result storage area records the processing results of completed tasks. This design enables the system to efficiently manage a large number of parallel tasks and ensures that tasks are executed in the correct dependency order.

[0062] Example 3

[0063] like Figures 2-3 As shown, this embodiment is a specific implementation based on Embodiment 1 and Embodiment 2.

[0064] In this embodiment, the host computer inputs tasks to the system via the CPU. The task stack generates four subtasks: subtask 1 is "running pattern 1, chip transmit / receive storage," subtask 2 is "error data processing," subtask 3 is "running pattern 2, chip transmit / receive storage," and subtask 4 is "temperature measurement." The execution of subtask 2 depends on subtask 1. The resources and modules to be executed for subtasks 2, 3, and 4 are independent of each other; therefore, subtasks 2, 3, and 4 are processed asynchronously.

[0065] Subtask 1 is processed by the FPGA module because pattern execution and chip transmission / reception storage require hardware acceleration and direct chip control, which suits the hardware processing capabilities of the FPGA module. Subtask 2 is processed by the SDK module because data processing mainly involves logical calculations and analysis, making direct processing by the SDK suitable. Subtask 3 is executed by the FPGA module, similar to subtask 1, requiring hardware-level chip interaction capabilities. Subtask 4 is executed by the ATOS module because temperature monitoring is a system resource call task, making processing at the ATOS operating system level most appropriate.

[0066] In the initial state, the SDK module, the ATOS module, and the FPGA module are all in an idle state. Subtask 1 is pushed as the first task and enters the judgment process.

[0067] When subtask 1 is executing in the FPGA module, subtask 2 is pushed and determined to be executable. Since subtask 2 depends on the completion of subtask 1, subtask 2 is in the non-executable state and returns to the task stack to continue waiting.

[0068] When subtask 1 is completed, subtask 1 is marked as "completed". Subtask 2 is pushed again and determined to be executable. At this time, subtask 2 is in the executable state and is assigned to the SDK module for processing.

[0069] While subtask 2 is executing in the SDK module, subtask 3 is pushed and determined to be executable. After subtask 3 is determined by the SDK module, it is pushed to the ATOS module for further determination. Finally, subtask 3 is processed by the FPGA module.

[0070] While subtask 2 and subtask 3 are being processed in their respective modules, the system continues to push subtask 4 for determination. After the system determines that subtask 4 is executable, subtask 4 is processed through the SDK module to the ATOS module.

[0071] As shown in detail in Figure 3 subtasks 2, 3, and 4 are executed asynchronously in different modules, i.e., the SDK module processes subtask 2, the FPGA module processes subtask 3, and the ATOS module processes subtask 4. At this time, subtasks 2, 3, and 4 are all in the "executing" state.

[0072] When the SDK module finishes processing subtask 2, the execution result is returned to the task stack and the state is updated.

[0073] When the FPGA module finishes processing subtask 3, the execution result is returned to the ATOS module, then to the SDK module, and finally to the task stack, with the state being updated.

[0074] When the ATOS module finishes processing subtask 4, the execution result is returned to the SDK module, and finally to the task stack, with the state being updated.

[0075] When all tasks are completed, the subtasks in the task stack are emptied, and the system is ready to receive the next test item task.

[0076] In summary, the asynchronous execution method for the ATE tester provided by the application converts the test item interface instruction issued by the upper computer into a plurality of executable tasks and stores them in a task stack, judges the executability of the tasks through the SDK module and distributes them to appropriate processing modules according to the task characteristics, realizes the asynchronous parallel work of the SDK module, the ATOS module and the FPGA module, makes each module be able to process different test tasks at the same time, avoids the mutual waiting among the modules, significantly improves the system resource utilization. At the same time, the dependency relationship of the tasks is managed in the task stack, so that the tasks without dependency can be executed in parallel, the overall test time is reduced, and the test efficiency of the ATE tester is improved.

[0077] Obviously, those skilled in the art can make various modifications and variations to the application without departing from the spirit and scope of the application. Thus, if these modifications and variations of the application belong to the scope of the claims of the application and their equivalent technologies, the application also intends to include these modifications and variations.

Claims

1. An asynchronous execution method for an ATE test machine, characterized in that, include: The SDK module generates multiple executable tasks from the test item interface instructions issued by the host computer and stores them in the task stack. The SDK module polls the tasks in the task heap to determine the executability of the tasks and the processing module. If the task is executable, the SDK module further determines whether the lower-level module should participate; Based on the judgment result, the SDK module will process the task itself, or distribute the task to the ATOS module for processing, or distribute the task to the FPGA module through the ATOS module for processing. The SDK module, the ATOS module, and the FPGA module will process the assigned task asynchronously at the same time. After the task is completed, the processing result will be returned to the task stack. Once all subtasks of the current test item are completed, the SDK module loads the task for the next test item, until all test items are completed.

2. The asynchronous execution method for an ATE test machine as described in claim 1, characterized in that, The module for determining the executability and processing of the task includes: Based on task dependencies, determine whether the task meets the execution conditions; If a task does not meet the execution conditions, it will be kept in the task heap and wait. If the task meets the execution conditions, the task is determined to be executable, and the task's processing module is further determined.

3. The asynchronous execution method for an ATE test machine as described in claim 1, characterized in that, If the task is executable, the SDK module further determines whether the lower-level module is involved, including: If the involvement of lower-level modules is not required, the SDK module will handle the task itself; If the participation of lower-level modules is required, the task will be distributed to the ATOS module. After receiving the task, the ATOS module further determines whether the FPGA module needs to participate.

4. The asynchronous execution method for an ATE test machine as described in claim 3, characterized in that, The further determination of whether the FPGA module needs to be involved includes: If the FPGA module is not required, the ATOS module will handle the process itself. If the FPGA module is required to participate, the ATOS module will assign the task to the FPGA module for processing.

5. The asynchronous execution method for an ATE test machine as described in claim 1, characterized in that, The process of returning the processing result to the task heap includes: When the SDK module processes a task, the processing result is directly returned to the task stack via the SDK module.

6. The asynchronous execution method for an ATE test machine as described in claim 5, characterized in that, The process of returning the processing result to the task heap also includes: When the ATOS module processes a task, the processing result is returned to the task stack via the ATOS module and the SDK module in sequence.

7. The asynchronous execution method for an ATE test machine as described in claim 6, characterized in that, The process of returning the processing result to the task heap also includes: When the FPGA module processes a task, the processing result is returned to the task stack via the FPGA module, the ATOS module, and the SDK module in sequence.

8. The asynchronous execution method for an ATE test machine as described in claim 1, characterized in that, The tasks in the task stack include interdependent tasks and independent tasks. Interdependent tasks are executed in the order of their dependencies, while independent tasks can be executed in parallel.

9. An asynchronous execution system for an ATE test machine, operating using the asynchronous execution method for an ATE test machine as described in any one of claims 1-8, characterized in that, include: The SDK module connects to the host computer via a data bus. It is used to receive test item interface instructions from the host computer, manage the task heap, schedule and distribute tasks, and execute tasks that do not require the participation of lower-level modules. The ATOS module connects to the SDK module via a communication interface and is used to execute tasks distributed by the SDK module, and decide whether to further distribute the tasks to the FPGA module based on the tasks. The FPGA module is connected to the ATOS module via a communication interface and is used to execute tasks distributed by the ATOS module; The task heap is used to store and manage various tasks formed by test item interface instructions, their dependencies, and execution results.

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