Method, apparatus, medium, program and server system for handling timer events

By configuring fast and slow timer execution regions and using time-slice-level triggering instead of event-by-event triggering, the problem of insufficient precision of timer events in existing technologies is solved. This achieves microsecond or even nanosecond-level precision without increasing resource overhead, thereby improving the system's processing efficiency and stability.

CN120849067BActive Publication Date: 2025-12-05LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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Patent Information

Application Number
CN202511362180.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-09-23
Publication Date
2025-12-05
Estimated Expiration
2045-09-23

AI Technical Summary

Technical Problem

Existing technologies struggle to maintain microsecond or even nanosecond-level precision in triggering timer events without introducing additional resource overhead. This is especially true when implementing high-precision soft timers at the application layer of task-intensive storage servers, raising the question of how to batch process timed tasks in high-concurrency scenarios.

Method used

By configuring fast and slow timer execution regions, timed tasks with different timeout durations can be handled separately. The fast region uses short time slices to handle expired events, while the slow region uses long time slices to manage timeout tasks. By combining time slice-level triggering with event-by-event triggering, microsecond or even nanosecond-level precision can be achieved.

Benefits of technology

Without increasing system overhead, it achieves timer event triggering accuracy at the microsecond or even nanosecond level, improving system processing efficiency and stability, and enhancing flexibility and scalability to adapt to different load conditions.

✦ Generated by Eureka AI based on patent content.

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Abstract

The application discloses a timer event processing method, device, medium, program and server system, relates to the technical field of servers, and through a timer scheduling step, timer events that expire in a queue of a fast timer execution area are first processed, and then after the first time slice start time of the fast timer execution area is updated in a slow timer execution area, the timer events that expire in the queue of the fast timer execution area are processed again. This algorithm replaces "event-by-event triggering" with "time slice-level triggering", significantly reduces the processing frequency of the system on the timer events, and simultaneously utilizes the complementary advantages of the fast and slow areas, so that the timer event triggering with the accuracy of microseconds or even nanoseconds can be realized without increasing additional resource overhead, thereby solving the problem that the prior art is difficult to trigger the timer events with the accuracy of microseconds or even nanoseconds without introducing additional resource overhead.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of servers, and in particular to a timer event processing method, a timer event processing device, a computer readable storage medium, a computer program product, and a server system. BACKGROUND

[0002] As a pure software implementation, the application layer timer avoids the troubles of hardware dependence and context switching, but in terms of precision, the traditional implementation can only achieve microsecond level, and for distributed systems, IO-intensive services and other scenarios that require microsecond or even nanosecond level precision, such precision is often insufficient. In addition, when processing large-scale fine-grained timing tasks, the application layer timer needs to check and trigger timer events one by one, so in a high concurrency scenario, it may generate high system overhead.

[0003] Although the prior art attempts to improve the precision and efficiency of the application layer timer by improving the software algorithm and optimizing the scheduling strategy, these methods often have difficulty in achieving a good balance between precision improvement, system overhead reduction, and cross-platform adaptability enhancement. Especially in the application of high-precision soft timer in the application layer of task-intensive storage servers, how to maintain microsecond or even nanosecond level precision without introducing additional resource overhead, and be able to process timing tasks in batches.

[0004] That is, the existing scheme is difficult to maintain microsecond or even nanosecond level precision to trigger timer events without introducing additional resource overhead. SUMMARY

[0005] The present application provides a timer event processing method, a timer event processing device, a computer readable storage medium, a computer program product, and a server system to at least solve the problem that the existing scheme is difficult to maintain microsecond or even nanosecond level precision to trigger timer events without introducing additional resource overhead.

[0006] This application provides a method for handling timer events, including: configuring a timer event structure, the timer event structure including a timeout duration and a corresponding callback function; configuring a fast timer execution region, the fast timer execution region deploying a preset number of first time slices, the length of each first time slice being a preset duration, used to handle expired timer events; configuring a slow timer execution region, the slow timer execution region deploying a preset number of second time slices, the length of each second time slice being the product of the preset number and the preset duration, used to manage timed tasks exceeding a time threshold; and executing a timer scheduling step, the timer scheduling step including: processing expired timer events in the queue of the fast timer execution region, and after updating the start time of each first time slice in the fast timer execution region using the slow timer execution region, processing the expired timer events in the queue of the fast timer execution region again.

[0007] This application also provides a timer event processing apparatus, comprising: a first processing unit for configuring a timer event structure, the timer event structure including a timeout duration and a corresponding callback function; a second processing unit for configuring a fast timer execution region, the fast timer execution region deploying a preset number of first time slices, each first time slice having a preset duration, for processing expired timer events; a third processing unit for configuring a slow timer execution region, the slow timer execution region deploying a preset number of second time slices, each second time slice having a duration equal to the product of the preset number and the preset duration, for managing timed tasks exceeding a time threshold; and a fourth processing unit for executing timer scheduling steps, the timer scheduling steps including: processing expired timer events in the queue of the fast timer execution region, and after updating the start time of each first time slice in the fast timer execution region using the slow timer execution region, processing expired timer events in the queue of the fast timer execution region again.

[0008] This application also provides a computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the steps of a method for handling any timer event.

[0009] This application also provides a computer program product, including a computer program, wherein when the computer program is executed by a processor, it implements the steps of a method for handling any kind of timer event.

[0010] This application also provides a server system, including: a server for executing a method for handling any type of timer event.

[0011] This application describes a timer scheduling process that first processes expired timer events in the queue of the fast timer execution region, then updates the first time slice start time of the fast timer execution region in the slow timer execution region, and finally processes expired timer events in the queue of the fast timer execution region again. This algorithm replaces "event-by-event triggering" with "time-slice-level triggering," significantly reducing the system's processing frequency for timer events. It also leverages the complementary advantages of the fast and slow regions, ensuring that timer event triggering can achieve microsecond or even nanosecond precision without increasing additional resource overhead. This solves the problem of existing solutions failing to maintain microsecond or even nanosecond precision for triggering timer events without introducing additional resource overhead. Attached Figure Description

[0012] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 A flowchart illustrating a timer event processing method provided in an embodiment of this application;

[0014] Figure 2 A schematic diagram of the high-resolution timer event structure provided in the embodiments of this application;

[0015] Figure 3 A schematic diagram illustrating the structure of the linked list provided in an embodiment of this application;

[0016] Figure 4 A schematic diagram of the state of the fast timer execution region and the slow timer execution region on the timeline provided in the embodiments of this application;

[0017] Figure 5 This is a structural block diagram of a timer event processing device provided in an embodiment of this application. Detailed Implementation

[0018] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0019] It should be noted that, in the description of this application, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first," "second," etc., in this application are used to distinguish similar objects and are not used to describe a specific order or sequence.

[0020] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0021] The specific application environment architecture or specific hardware architecture on which the execution of the timer event handling method depends is described here.

[0022] Embodiments of this application provide a method for handling timer events, such as... Figure 1 As shown, the method includes the following steps:

[0023] Step S101: Configure the timer event structure, which includes the timeout duration and the corresponding callback function;

[0024] Step S102: Configure the fast timer execution area. The fast timer execution area deploys a preset number of first time slices. The length of each first time slice is a preset duration, which is used to process expired timer events.

[0025] Step S103: Configure the slow timer execution area. The slow timer execution area deploys a preset number of second time slices. The length of each second time slice is the product of the preset number and the preset duration. It is used to manage timed tasks that exceed the time threshold.

[0026] Step S104: Execute the timer scheduling step, which includes: processing the timer events that have expired in the queue of the fast timer execution region, and after updating the start time of each first time slice of the fast timer execution region using the slow timer execution region, processing the timer events that have expired in the queue of the fast timer execution region again.

[0027] In the above steps, the timer event structure is designed to be more compact and efficient, containing two core elements: timeout duration and corresponding callback function. This design allows for precise event management, and the linked list structure enables ordered storage and fast access to events, reducing memory and computing resource consumption. The fast timer execution area deploys a preset number (e.g., 128) of first time slices, each with a fixed length of a preset duration (e.g., 1024 CPU clock cycles, where CPU refers to the central processing unit). This design utilizes the fixed frequency of the hardware clock, and by dividing the time into slices, it can process timer events expiring within each time slice in batches, avoiding the high overhead of querying and processing each event individually in traditional methods. Simultaneously, because the time slice length is short enough, it can guarantee high-precision timing at the microsecond or even nanosecond level. The slow timer execution area also deploys a preset number (e.g., 128) of second time slices, each with a length that is a multiple of the preset duration of the fast timer execution area (e.g., 128 × 1024 CPU clock cycles). This design manages timed tasks with long timeouts that exceed the processing range of the fast region. The slow region, with its longer time slice period, reduces the scheduling frequency of timer events, thereby lowering system overhead. Simultaneously, when the time slice in the slow region expires, the timer events within it are batch-updated to the fast region, ensuring that all timer events are processed promptly and with high precision. The timer scheduling steps of this application include first processing the timer events that have expired in the queue of the fast timer execution region, and then, after updating the first time slice start time of the fast timer execution region in the slow timer execution region, processing the timer events that have expired in the queue of the fast timer execution region again. This algorithm replaces "event-by-event triggering" with "time slice-level triggering," significantly reducing the system's processing frequency of timer events. It also leverages the complementary advantages of the fast and slow regions, ensuring that timer event triggering with microsecond or even nanosecond precision can be achieved without increasing additional resource overhead. This solves the problem of existing solutions struggling to maintain microsecond or even nanosecond precision in triggering timer events without introducing additional resource overhead.

[0028] In one embodiment of this application, processing timer events that have expired in the queue of the fast timer execution area includes: if the timeout period has not elapsed, storing all first time slices up to and before the current time in chronological order into a horizontal linked list, and determining the unique identifier of the current first time slice, with the number of horizontal linked lists corresponding one-to-one with the number of callback functions; if the timeout period has elapsed, determining the unique identifier of the current first time slice, calling the callback function, and deleting the corresponding first time slice from the horizontal linked list to realize the corresponding timer event.

[0029] This application also provides a use case for handling expired timer events in the queue of a fast timer execution region: In high-performance database servers, to ensure data consistency and connection reliability, it is usually necessary to perform regular heartbeat checks and timeout reconnection strategies on database connections. Especially in task-intensive environments, database connections may be frequently established and disconnected, and each disconnection and reconnection requires precise timing control to ensure that system performance or data consistency is not affected by retries that are too early or too late. The method of this invention can play a significant role in such scenarios:

[0030] Implementation Process: Whenever a database connection is established, the system creates a high-resolution soft timer event based on a preset heartbeat interval (e.g., 1 millisecond, equivalent to approximately 3000 milliseconds) and registers it in the application-layer soft timer system. Since the heartbeat interval typically does not exceed the time domain of the fast timer execution area (i.e., 128 * 1024 = 131,072 milliseconds, approximately 43.9 ms), these timer events are inserted into the Fast Timer Queue (FTQ). For connections with long periods of no response, the system needs to set a longer timeout policy (e.g., 500 milliseconds or more). In this case, these timer events will be identified as exceeding the time domain of the fast timer execution area and will be directly added to the Slow Timer Queue (STQ). In the heartbeat detection and timeout reconnection strategy, the soft timer system of this invention can finely manage the timeout of these timer events. For example, when the current time advances to a certain time slice boundary, the system will batch process all expired timer events in that time slice queue (whether FTQ or STQ), executing the corresponding callback function to send a heartbeat packet or attempt reconnection.

[0031] The beneficial effects of handling expired timer events in the queue of the fast timer execution region are as follows: By batch processing timer events within the same time slice, the individual overhead of each event trigger is reduced, greatly improving the system's efficiency in handling a large number of heartbeat and timeout events, and ensuring high response speed for database connection management. This method avoids unnecessary context switching between kernel mode and user mode, and also reduces dependence on hardware resources, enabling the system to utilize existing computing resources more efficiently. Precise soft timer event triggering ensures timely reconnection or other remedial measures even in the event of network fluctuations or hardware failures, enhancing the system's robustness and fault tolerance. Database administrators can dynamically adjust the heartbeat interval and timeout time according to actual needs, and even set different timeout strategies for individual connections. This flexibility and customizability are difficult to achieve with traditional hard timers or single-precision soft timers. Because the soft timer of this invention is implemented at the application layer and decoupled from specific hardware and operating systems, it is easier to deploy and maintain in different database environments. New features or optimizations can also be easily added in the future without worrying about underlying compatibility issues.

[0032] In one embodiment of this application, determining the unique identifier of the current first time slice includes: determining the first difference as the difference between the timeout duration and the start time of the current first time slice; determining the first ratio as the ratio of the first difference to a preset duration; determining the first sum as the sum of the number of the currently processed queue and the first ratio; performing a remainder operation on the ratio of the first sum to a preset number to obtain a first remainder, and determining the unique identifier of the current first time slice as the first remainder.

[0033] Specifically, by calculating the ratio (first ratio) of the difference between the timeout duration and the start time of the current time slice (the first difference) to the preset duration (i.e., the length of the time slice, such as 1024 CPU clock cycles), we can accurately locate which time slice a timer event belongs to. This is because the ratio calculation is essentially a normalization process, converting different timeout durations into standardized values ​​relative to the time slice, ensuring that timer events can be accurately mapped to specific positions on the time axis. The first sum (the sum of the current processing queue number and the first ratio) and the subsequent percentage processing (the first percentage) provide a unique identifier for the timer event in the time slice queue. This method avoids multiple checks and sorting operations for each event. When time progresses to a certain time slice boundary, the set of timer events that need to be processed can be determined through simple mathematical calculations, significantly improving scheduling efficiency. By using the first remainder (usually the number of time slice queues, such as 128) obtained by taking the remainder of the ratio of the first sum to the preset number to determine the unique identifier of the time slice, this method cleverly handles the boundary problem of queue numbers. Even if the result of a ratio or sum calculation exceeds the range of queue numbers, the remainder operation can ensure that the result is within a reasonable range of queue numbers, thus avoiding overflow and incorrect location issues.

[0034] In one embodiment of this application, the method further includes: in the process of storing the first time slices sequentially into the horizontal linked list in chronological order, if there are multiple callback functions with the same timeout duration, storing the corresponding multiple first time slices into the vertical linked list.

[0035] Specifically, when searching for timers that have timed out in a horizontal linked list, if there are multiple timers at a given time point, timeout checks require traversing all nodes in the horizontal linked list one by one, increasing the time complexity of handling timeout events. However, using a vertical linked list allows for centralized management of timer events with the same timeout duration. When a timeout point is reached, only events in the vertical linked list need to be processed, reducing the number of traversals and improving efficiency. The vertical linked list groups events with the same timeout duration together, allowing for quick location of event groups at the same time point when adding or deleting timer events, without requiring multiple searches or moves in the horizontal linked list. This simplifies the complexity of timer management and reduces maintenance costs. By storing events with the same timeout duration in the same vertical linked list, the existence of isolated nodes in memory is reduced, optimizing memory layout and improving memory usage efficiency. Compared to the scattered storage in horizontal linked lists, this centralized storage method is more beneficial for memory management and potential caching optimization, reducing memory fragmentation. In the vertical linked list, timer events can be sorted according to priority or other custom parameters. When multiple events time out simultaneously, callback functions can be executed in priority order, ensuring that high-priority tasks are processed first. This is especially important in task-intensive storage server application layers. When time progresses to a specific time slice, only the head of the horizontal linked list for that time slice needs to be checked. If a timeout exists, all events on the vertical linked list are further processed. This is much simpler than performing timeout checks on every node in the horizontal linked list, reducing computational and logical complexity. The vertical linked list design makes it relatively easy to add new features or adjust timeout handling logic, such as supporting more complex timeout behaviors or adding additional data structures to optimize performance in specific scenarios. This design flexibility helps adapt to constantly changing application requirements.

[0036] In one embodiment of this application, calling a callback function includes: calling the callback function corresponding to each first time slice in the vertical linked list respectively.

[0037] Specifically, when multiple timers have the same timeout, they are linked together in the same vertical linked list. This means that these timers will expire simultaneously, and all expired callback functions can be processed with a single traversal, avoiding multiple individual wake-ups and scheduling, significantly reducing system overhead and improving processing efficiency. The vertical linked list design simplifies the scheduling logic because for all timers with the same timeout, only one check is needed to see if the current time has exceeded the timeout. If it has, the callback functions of all timers in the linked list can be called consecutively without repeatedly comparing timeouts, making the code more concise and easier to maintain. In the vertical linked list, timers are arranged in the order they were added. This ensures that even if multiple timers expire in the same time slice, their callback functions will be called in the order they were registered, which is particularly important for some application scenarios that require strict sequential execution. Since timers with the same timeout are organized in the same linked list, they share the same processing logic, which reduces potential resource contention when processing expired timers, such as the use of locks, thereby further improving the system's concurrent processing capabilities.

[0038] In one embodiment of this application, updating the start time of each first time slice of the fast timer execution region using the slow timer execution region includes: delaying the start time of each second time slice of the slow timer execution region by the product of a preset number and a preset duration; and delaying the start time of each first time slice of the fast timer execution region by the product of a preset number and a preset duration.

[0039] Specifically, the start time of the fast timer's execution area is updated by using the start time of the slow timer's execution area's time slice, ensuring close coordination between the two. This design keeps the scheduling of the slow and fast timers consistent in time, avoiding scheduling errors or resource waste caused by time inconsistencies. Delaying the start time of the slow timer's time slice by a preset number of times multiplied by a preset duration means that the slow timer's update frequency is lower than that of the fast timer. This reduces the frequency of the slow timer's update to the fast timer, thereby reducing interference to the fast timer's execution area and improving the overall system stability and efficiency. The fast timer's execution area handles timed tasks with shorter time intervals, while the slow timer's execution area handles timed tasks with relatively longer time intervals. By updating the fast timer's time slice start time with a preset delay duration, it is ensured that the fast timer focuses on processing currently high-priority timed tasks, while the slow timer handles subsequent lower-priority tasks, thus achieving reasonable resource allocation and improving system response speed and resource utilization. This design simplifies the scheduling logic, allowing the fast and slow timer execution areas to automatically update according to preset time slice rules, reducing the complexity of the scheduling algorithm and also reducing the possibility of errors. The preset number and preset duration can be flexibly adjusted according to actual needs. This means that the system can dynamically adjust the length and number of time slices according to different load conditions to adapt to different business scenarios and improve the system's flexibility and scalability.

[0040] In one embodiment of this application, the method further includes: if the difference between the timeout duration and the start time of the current first time slice is greater than the target product, re-inserting the timers in the queues corresponding to the expired time slices in the slow timer execution area into the corresponding queues in the fast timer execution area, where the target product is the product of a preset number and a preset duration.

[0041] Specifically, when the difference between the detected timeout duration and the current fast time slice start time exceeds the product of a preset number (e.g., 128) and a preset duration (e.g., 1024 ticks), it means that the timeout period of the timer event has exceeded the management threshold of the fast timer. Since the time slice length of the slow timer region is 128 times that of the fast timer region, transferring timers from the slow region to the fast region before timeout avoids the context switching overhead of processing in the slow region. This is because processing in the fast region is more frequent and is completed in user mode, without needing to enter kernel mode. This reduces the consumption of system resources and improves processing efficiency. The fast timer has a finer timing granularity of 1024 CPU clock cycles (i.e., 1 tick), while the slow timer has a timing granularity of 128 × 1024 ticks. By switching from a slow timer to a fast timer region when it is about to expire, the triggering accuracy of timer events can be ensured to be at the level of hundreds of nanoseconds. This is crucial for scenarios requiring high-precision timing control (such as network connection monitoring and data transmission timeout judgment). In the fast timer region, timer events are triggered at the time slice level, rather than one by one. This means that when a time slice expires, all timer events within that time slice are processed in batches, reducing the number of interrupts required to process each event individually, thereby reducing the system's interrupt management cost and improving the overall stability and performance of the system. By adjusting the preset number (N) and preset duration (time slice length), the granularity and processing strategy of the timers can be dynamically adjusted according to different business needs and system load conditions, enabling this technical solution to flexibly cope with various scenarios while maintaining good scalability. In the slow timer region, because the timeout time of timer events is relatively long, a simpler method (such as direct insertion to the tail of the queue) can be used for queue management, eliminating the need for complex sorting operations, which reduces processing overhead in the slow region. When a timer event is close to its timeout point, it is then transferred to the fast timer region for more granular time management and event triggering, thus simplifying the overall scheduling logic. By transferring slow timer events that are about to expire to a fast region for processing, the complexity of the slow timer region can be reduced, preventing it from becoming too large and difficult to maintain.

[0042] In one embodiment of this application, the method further includes: during the process of re-inserting the timers in the queue corresponding to the expiration time slice in the slow timer execution area into the corresponding queues in the fast timer execution area, determining the second difference as the difference between the timeout duration and the start time of the current second time slice; determining the second ratio as the ratio of the second difference to the target product; determining the second sum as the sum of the number of the currently processed queue and the second ratio; performing remainder processing on the ratio of the second sum to a preset number to obtain the second remainder, and determining the unique identifier of the current second time slice as the second remainder.

[0043] Specifically, calculating the second difference (the difference between the timer's timeout duration and the start time of the current slow time slice) and the second ratio (the ratio of the difference to the target product, which typically refers to the length of the fast timer's time slice) allows the timer to be precisely positioned in its most suitable fast timer queue. This is because the fast timer queue has a finer time granularity, more accurately reflecting the timeout point of the timer. By determining the second sum (the sum of the current processing queue number and the second ratio) and performing a modulo operation with a preset number (usually the number of queues in the fast timer execution area), the ID (second remainder) of the fast timer queue into which the timer should be inserted can be directly obtained. This eliminates the need for complex sorting operations in the fast timer queue, significantly improving the efficiency of inserting and updating timers; it also helps to balance the load across queues in the fast timer execution area. Through the calculation of the second ratio and the second remainder, timers are evenly distributed across different fast timer queues, avoiding overcrowding in any one queue, which could lead to decreased timing accuracy or increased processing latency. In practical applications, the task's timeout time and system time may change. By dynamically calculating the second difference and the second ratio, the timer can quickly adapt and find its correct queue position even when the system time fluctuates or the task timeout time is adjusted, thus enhancing the robustness and flexibility of the system.

[0044] In one embodiment of this application, the method further includes: if a system abnormality is detected or the queue processing fails during the processing of timer events that have expired in the queue of the slow timer execution area, initializing the state of the queue of the slow timer execution area.

[0045] Specifically, system anomalies can lead to data structure corruption. Initializing the queue eliminates uncertainties in abnormal states, ensuring the integrity of the timer data structure and maintaining data consistency. If errors occur during queue processing and are not handled, they may accumulate in subsequent operations, eventually leading to larger-scale system failures. Initializing the queue immediately clears the source of errors, preventing them from affecting subsequent scheduled tasks. By resetting the queue state, the normal operation of the timer mechanism can be ensured, allowing for rapid recovery of normal service even in abnormal situations, enhancing system reliability and stability. Direct queue initialization avoids complex error backtracking and repair processes. Especially in high-concurrency environments, this simple recovery strategy can resolve problems more quickly and reduce system downtime.

[0046] In one embodiment of this application, the method further includes: recording the state of the queue for each time slice and the triggering record of timer events in a log manner.

[0047] Specifically, logs can quickly identify abnormal behavior in a timer system, such as unexpected timeouts, callback function failures, or queue processing delays. When system failures occur, logs provide the sequence and details of events, helping to trace the root cause of the problem. Logs record the complete path of timers from registration to triggering, including their transfers between different queues, which helps analyze which part of the process is consuming excessive time. By regularly reviewing logs, the load on each time-slice queue can be statistically analyzed, the effectiveness of system resource allocation can be evaluated, and a basis for subsequent optimization can be provided.

[0048] In one embodiment of this application, processing timer events that have expired in the queue of the fast timer execution area includes: processing timer events that have expired in the queue of the fast timer execution area in a multi-threaded manner.

[0049] Specifically, multithreading allows multiple timer event callback functions to execute concurrently, especially in multi-core processor environments, fully utilizing hardware resources and improving the speed and efficiency of event processing. This is particularly important in I / O-intensive or task-intensive applications, as these applications typically generate a large number of tasks that require periodic monitoring and processing. In a single-threaded model, processing one timer event before starting the next can lead to high latency. Multithreading allows each expired timer event to be processed immediately, significantly reducing average response time and improving system real-time performance and user experience. By executing expired timer events in parallel, more events can be processed per unit of time, increasing system throughput. This is crucial for systems that handle a large number of concurrent requests, such as high-performance storage servers, databases, or distributed systems. The multithreaded model can dynamically adjust thread usage based on the actual load of each thread, preventing a single thread from becoming a bottleneck due to excessive workload, resulting in more balanced resource allocation and more stable system operation.

[0050] This application sets the timer's counting granularity to 1024 CPU clock cycles (denoted as 1 tick), using this as the smallest time unit to construct the time-slice system. The system divides the entire timeline into continuous and non-overlapping time slices (each time slice is N ticks long, N is configurable), and each time slice is associated with an independent timer task queue. When the system time advances to the boundary of a time slice, the timer module processes the callback functions of all expired tasks in that time slice queue in batches, achieving efficient timed triggering. This design, through hardware clock alignment (using integer multiples of 1024 cycles to reduce counting errors) and batch task scheduling (time-slice-level triggering rather than triggering tasks one by one), significantly reduces the system overhead caused by high-frequency triggering while maintaining accuracy at the hundreds of nanosecond level.

[0051] Design of high-resolution timer event structure: The design of high-resolution timer event structure, such as... Figure 2 As shown, it contains four core elements: the first node, Time_Next, forms a horizontal singly linked list in chronological order of timeout times; the second node, Time_Same_Next, forms a vertical singly linked list of events with the same timeout time; the timeout time, i.e., the TimeOut field, records the relative timeout time of the event; and a callback function, i.e., the Time_Func function pointer, specifies the callback function triggered when the timer event times out; thus, it achieves orderly management and precise triggering of events with different timeout times.

[0052] In both fast and slow timers, FTQ and STQ consist of 128 timer queues composed of high-resolution timer event structures; CFQ and CSQ are the current fast queue ID and current slow queue ID, respectively; FST and SST are the current fast time slice start time and current slow region start time, respectively; Fast timer cnt and Slow timer cnt represent the total number of fast region timers and the total number of slow region timers, respectively. The linked list structure is as follows: Figure 3 As shown.

[0053] The design of the Fast Timer execution area: The Fast Timer execution area adopts an architecture of 128 time slices. Each time slice has a fixed length of N ticks, and each time slice corresponds to a dedicated Fast Timer Queue (FTQ), forming a one-to-one mapping relationship between "time slices" and "queues". Precise time management and queue scheduling are achieved within the area through three key variables: the current Fast Queue (CTQ) is used to mark the currently processed queue ID (range 0-127), the Fast Start Time (FST) records the start time of the current time slice, and the current time (Curr Time) reflects the system's current time in real time. When the Curr Time exceeds the range of the current time slice, the FST is synchronously updated to the start time of the next time slice, thus identifying the timer queue (FTQ) corresponding to the next time slice to be processed. Simultaneously, the CFQ (i.e., the currently processed queue number) is also switched to the ID of the next queue.

[0054] The registration logic design for the fast timer is as follows: The difference between the timeout timeout and the FST is calculated to be within 0 to 128×N ticks. The ID that should be inserted into the queue is then confirmed. The difference is divided by N and rounded down, then added to the ID of the current fast queue Curr Fast Queue (CTQ). Finally, the remainder is taken after processing 128 to obtain the target queue ID.

[0055] The slow timer execution region also employs a 128-time-slice architecture, with each time slice being 128 × N ticks long and corresponding to a dedicated slow timer queue (STQ). Within the region, the current slow queue (CSQ) marks the queue ID being processed. During initialization, the slow start time (SST) is assigned the value (FST + 128 × N) ticks. As FST is continuously refreshed and equals SST, SST is updated to the start position of the next time slice. Simultaneously, timers from the previous time slice are updated in the fast timer execution region's queue, and each time slice in the slow timer execution region exactly covers the entire time span of the fast timer execution region.

[0056] Slow timer registration logic design: If the result of subtracting FST from the timeout timeout timeOut is greater than 128 × N ticks, it indicates that the timeout timeout time exceeds the time domain of the fast timer execution area. Further determine the difference between the timeout timeout timeout and SST, calculate the slow time slice in which it falls, and then directly insert the timer into the queue STQ corresponding to the time slice without sorting.

[0057] The design of the fast timer execution area processor is as follows: First, obtain the current tick count. Then, check if there is a timer in the current processing queue (CFQ). If so, obtain the first timer and determine if its timeout has expired. The determination method is as follows:

[0058] HRT_timeout - CURR_time > N;

[0059] Here, CURR_time is the current time, and HRT_timeout is the timeout period. If the left side is greater than the right side, it indicates a timeout has occurred; otherwise, it indicates no timeout has occurred. When a timeout occurs, the callback function in the timer is executed. Then, it checks if there is a task with the same timeout in the vertical timer list. If so, its callback function is executed. Otherwise, it checks if timers in the horizontal timer list have expired. If so, their callback functions are executed, and the timers in their vertical timer list are checked until no timers have expired. All expired timers are removed from the queue. Finally, it checks if the current time slice has expired. If so, the FST value is incremented by N to point to the start of the next time slice, and the current processing queue CFQ is incremented by one. The timeout checking logic is then repeated until it is determined that all timers in the current queue and the current time slice have not expired.

[0060] The design of the slow timer execution area processor. It obtains the current tick count and checks if the current time slice has expired. The determination method is as follows:

[0061] SST-CURR_time>128*N;

[0062] As shown in the formula above, if the left side is greater than the right side, it indicates that the timeout has occurred; otherwise, it indicates that the timeout has not occurred. If a timeout occurs, the timer in the STQ queue corresponding to the current time slice is re-inserted into the queue corresponding to the fast timer execution region.

[0063] The states of the fast timer execution region and the slow timer execution region on the timeline are as follows: Figure 4 As shown.

[0064] Adding to the linked list occurs during timer creation, specifically within the timer registration logic, which includes fast timer registration and slow timer registration. When the queue ID to which the timer should be inserted is calculated, the timer's timeout time is compared and sorted against existing timers in the queue. If a timer with the same timeout is found in the queue, the second node of the timer to be inserted is attached to the tail of the linked list of timers with the same timeout. If no timer with the same timeout is found in the queue, the first node of the timer to be inserted is inserted into the horizontal linked list in sequence.

[0065] Deletion operations in the linked list: In the fast execution region, when the callback function detects that a timer has expired, it executes the timer's timeout task and then removes it from the corresponding queue linked list. In the slow execution region, when SST is refreshed, the timer in the queue corresponding to the slow region time slice of SST is removed from the linked list and inserted into the corresponding queue linked list in the corresponding fast execution region.

[0066] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods according to the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method.

[0067] Embodiments of this application also provide a timer event processing device, such as... Figure 5 As shown, the device includes:

[0068] The first processing unit 51 is used to configure the timer event structure, which includes the timeout duration and the corresponding callback function.

[0069] The second processing unit 52 is used to configure a fast timer execution area, in which a preset number of first time slices are deployed, and the length of each first time slice is a preset duration, for processing timer events that have expired.

[0070] The third processing unit 53 is used to configure the slow timer execution area, which deploys a preset number of second time slices. The length of each second time slice is the product of the preset number and the preset duration. It is used to manage timed tasks that exceed the time threshold.

[0071] The fourth processing unit 54 is used to execute timer scheduling steps, which include: processing timer events that have expired in the queue of the fast timer execution region, and after updating the start time of each first time slice of the fast timer execution region using the slow timer execution region, processing the timer events that have expired in the queue of the fast timer execution region again.

[0072] In the aforementioned device, the timer event structure is designed to be more compact and efficient, incorporating two core elements: timeout duration and corresponding callback functions. This design allows for precise event management, while the linked list structure enables ordered storage and fast access to events, reducing memory and computing resource consumption. The fast timer execution area deploys a preset number (e.g., 128) of first time slices, each with a fixed length of a preset duration (e.g., 1024 CPU clock cycles, where CPU refers to the central processing unit). This design utilizes the fixed frequency of the hardware clock, allowing for batch processing of timer events expiring within each time slice by dividing the time into slices, avoiding the high overhead of querying and processing each event individually in traditional methods. Furthermore, the sufficiently short time slice length ensures high-precision timing at the microsecond or even nanosecond level. The slow timer execution area also deploys a preset number (e.g., 128) of second time slices, each with a length that is a multiple of the preset duration of the fast timer execution area (e.g., 128 × 1024 CPU clock cycles). This design manages timed tasks with long timeouts that exceed the processing range of the fast region. The slow region, with its longer time slice period, reduces the scheduling frequency of timer events, thereby lowering system overhead. Simultaneously, when the time slice in the slow region expires, the timer events within it are batch-updated to the fast region, ensuring that all timer events are processed promptly and with high precision. The timer scheduling steps of this application include first processing the timer events that have expired in the queue of the fast timer execution region, and then, after updating the first time slice start time of the fast timer execution region in the slow timer execution region, processing the timer events that have expired in the queue of the fast timer execution region again. This algorithm replaces "event-by-event triggering" with "time slice-level triggering," significantly reducing the system's processing frequency of timer events. It also leverages the complementary advantages of the fast and slow regions, ensuring that timer event triggering with microsecond or even nanosecond precision can be achieved without increasing additional resource overhead. This solves the problem of existing solutions struggling to maintain microsecond or even nanosecond precision in triggering timer events without introducing additional resource overhead.

[0073] In one embodiment of this application, the fourth processing unit includes: a first processing module for storing all first time slices up to and before the current time in chronological order into a horizontal linked list if no timeout period has elapsed, and determining the unique identifier of the current first time slice, wherein the number of horizontal linked lists corresponds one-to-one with the number of callback functions; and a second processing module for determining the unique identifier of the current first time slice if the timeout period has elapsed, calling the callback function, and deleting the corresponding first time slice from the horizontal linked list to realize the corresponding timer event.

[0074] In one embodiment of this application, the first processing module is configured to include: a first determining submodule for determining a first difference as the difference between the timeout duration and the start time of the current first time slice; a second determining submodule for determining a first ratio as the ratio of the first difference to a preset duration; a third determining submodule for determining a first sum as the sum of the number of the currently processed queue and the first ratio; and a fourth determining submodule for performing a remainder operation on the ratio of the first sum to a preset number to obtain a first remainder, and determining the unique identifier of the current first time slice as the first remainder.

[0075] In one embodiment of this application, the apparatus further includes: a fifth processing unit, used to store multiple first time slices into a vertical linked list when there are multiple callback functions with the same timeout duration during the process of storing the first time slices into the horizontal linked list in chronological order.

[0076] In one embodiment of this application, the second processing module includes: a processing submodule for calling and processing the callback functions corresponding to each first time slice in the vertical linked list.

[0077] In one embodiment of this application, the fourth processing unit includes: a third processing module for delaying the start time of each second time slice of the slow timer execution region by a preset number of times and a preset duration; and a fourth processing module for delaying the start time of each first time slice of the fast timer execution region by a preset number of times and a preset duration.

[0078] In one embodiment of this application, the apparatus further includes: a sixth processing unit configured to, when the difference between the timeout duration and the start time of the current first time slice is greater than a target product, re-insert the timers in the queues corresponding to the expired time slices in the slow timer execution area into the corresponding queues in the fast timer execution area, wherein the target product is the product of a preset number and a preset duration.

[0079] In one embodiment of this application, the apparatus further includes: a first determining unit configured to determine, during the process of re-inserting timers in the queues corresponding to the expiration time slices in the slow timer execution region into the corresponding queues in the fast timer execution region, a second determining unit configured to determine a second ratio configured to determine the ratio of the second difference to the target product; a third determining unit configured to determine a second sum configured to determine the sum of the number of the currently processed queue and the second ratio; and a fourth determining unit configured to perform remainder processing on the ratio of the second sum to a preset number to obtain a second remainder, and determine the unique identifier of the current second time slice as the second remainder.

[0080] In one embodiment of this application, the apparatus further includes: a seventh processing unit configured to initialize the state of the queue in the slow timer execution area when a system abnormality or queue processing failure is detected during the processing of timer events that have expired in the queue of the slow timer execution area.

[0081] In one embodiment of this application, the apparatus further includes: an eighth processing unit for recording the status of the queues for each time slice and the triggering record of timer events in a log manner.

[0082] In one embodiment of this application, the fourth processing unit includes: a fifth processing module for processing timer events that have expired in the queue of the fast timer execution area in a multi-threaded manner.

[0083] For a description of the features in the embodiment corresponding to the timer event processing device, please refer to the relevant description in the embodiment corresponding to the timer event processing method, which will not be repeated here.

[0084] Embodiments of this application also provide a server system, including: a server for executing a method for processing any type of timer event.

[0085] Embodiments of this application also provide a computer-readable storage medium storing a computer program, wherein the computer program is configured to execute the steps in any of the above-described timer event processing method embodiments when running.

[0086] In one exemplary embodiment, the aforementioned computer-readable storage medium may include, but is not limited to, various media capable of storing computer programs, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard disk, magnetic disk, or optical disk.

[0087] Embodiments of this application also provide a computer program product, which includes a computer program that, when executed by a processor, implements the steps in any of the above-described timer event processing method embodiments.

[0088] Embodiments of this application also provide another computer program product, including a non-volatile computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps in any of the above-described timer event processing method embodiments.

[0089] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0090] The foregoing has provided a detailed description of a timer event processing method, a timer event processing apparatus, a computer-readable storage medium, a computer program product and service system, and the system provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are only intended to aid in understanding the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.

Claims

1. A method for handling timer events, characterized in that, include: Configure a timer event structure, which includes a timeout duration and a corresponding callback function; Configure a fast timer execution area, wherein the fast timer execution area deploys a preset number of first time slices, and the length of each first time slice is a preset duration, for processing expired timer events; Configure a slow timer execution area, in which a preset number of second time slices are deployed, and the length of each second time slice is the product of the preset number and the preset duration, for managing timed tasks that exceed a time threshold; The timer scheduling step includes: processing the timer events that have expired in the queue of the fast timer execution region, and after updating the start time of each of the first time slices of the fast timer execution region using the slow timer execution region, processing the timer events that have expired in the queue of the fast timer execution region again.

2. The timer event processing method according to claim 1, characterized in that, Processing the timer events that have expired in the queue of the fast timer execution area includes: If the timeout period has not elapsed, all first time slices up to and before the current time will be stored in a horizontal linked list in chronological order, and a unique identifier for the current first time slice will be determined. The number of the horizontal linked lists corresponds one-to-one with the number of the callback functions. If the timeout period has elapsed, the unique identifier of the current first time slice is determined, the callback function is invoked, and the first time slice is deleted from the corresponding horizontal linked list to realize the corresponding timer event.

3. The timer event processing method according to claim 2, characterized in that, Determining the unique identifier of the current first time slice includes: The first difference is determined to be the difference between the timeout duration and the start time of the current first time slice; The first ratio is determined to be the ratio of the first difference to the preset duration; The first sum is determined to be the sum of the number of the currently processed queue and the first ratio; The ratio of the first sum to the preset number is moduloed to obtain a first remainder, and the unique identifier of the current first time slice is determined as the first remainder.

4. The timer event processing method according to claim 2, characterized in that, The method further includes: During the process of storing the first time slices sequentially into the horizontal linked list in chronological order, if there are multiple callback functions with the same timeout duration, the corresponding multiple first time slices are stored into the vertical linked list.

5. The timer event processing method according to claim 4, characterized in that, Calling the callback function includes: The callback functions corresponding to each of the first time slices in the vertical linked list are called and processed respectively.

6. The method for processing timer events according to claim 1, characterized in that, Updating the start time of each of the first time slices in the fast timer execution region using the slow timer execution region includes: The start time of each second time slice in the slow timer execution region is delayed by the product of the preset number and the preset duration. The start time of each of the first time slices in the fast timer execution region is delayed by the product of the preset number and the preset duration.

7. The method for processing timer events according to claim 1, characterized in that, The method further includes: If the difference between the timeout duration and the start time of the current second time slice is greater than the target product, the timers in the queue corresponding to the expiration time slice in the slow timer execution area are re-inserted into the corresponding queues in the fast timer execution area. The target product is the product of the preset number and the preset duration.

8. The method for processing timer events according to claim 7, characterized in that, The method further includes: During the process of re-inserting the timers in the queue corresponding to the expiration time slice in the slow timer execution area into the corresponding queues in the fast timer execution area, the second difference is determined to be the difference between the timeout duration and the start time of the current second time slice; The second ratio is determined to be the ratio of the second difference to the target product; The second sum is determined to be the sum of the number of the currently processed queue and the second ratio; The ratio of the second sum to the preset number is moduloed to obtain a second remainder, and the unique identifier of the current second time slice is determined as the second remainder.

9. The method for processing timer events according to claim 7, characterized in that, The method further includes: If a system anomaly or queue processing failure is detected during the processing of expired timer events in the queue of the slow timer execution area, the state of the queue in the slow timer execution area is initialized.

10. The method for processing timer events according to claim 1, characterized in that, The method further includes: The status of the queue for each time slice, as well as the triggering records of the timer events, are recorded in a log format.

11. The method for processing timer events according to claim 1, characterized in that, Processing the timer events that have expired in the queue of the fast timer execution area includes: The timer events that have expired in the queue of the fast timer execution area are processed in a multi-threaded manner.

12. A timer event processing device, characterized in that, include: The first processing unit is used to configure the timer event structure, which includes a timeout duration and a corresponding callback function. The second processing unit is used to configure a fast timer execution area, wherein the fast timer execution area deploys a preset number of first time slices, and the length of each first time slice is a preset duration, for processing timer events that have expired; The third processing unit is used to configure a slow timer execution area, wherein a preset number of second time slices are deployed in the slow timer execution area, and the length of each second time slice is the product of the preset number and the preset duration, and is used to manage timed tasks that exceed the time threshold. The fourth processing unit is used to execute a timer scheduling step, which includes: processing the timer events that have expired in the queue of the fast timer execution region, and after updating the start time of each of the first time slices of the fast timer execution region using the slow timer execution region, processing the timer events that have expired in the queue of the fast timer execution region again.

13. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, wherein when the computer program is executed by a processor, it implements the steps of the timer event processing method as described in any one of claims 1 to 11.

14. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the timer event processing method according to any one of claims 1 to 11.

15. A server system, characterized in that, include: A server for executing the timer event processing method according to any one of claims 1 to 11.

Citation Information

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