Memory trampling problem positioning method and device, equipment and storage medium

Abstract

The invention discloses a memory trampling problem positioning method, device and equipment and a storage medium, and the method comprises the steps: respectively deploying memory detection tools at the head part and the tail part of a function of an initial node after detecting that a communication software system generates memory trampling; positioning a target node in the initial nodes through a memory detection tool according to a memory detection rule; the memory detection rule defines a detection address, a logic expression sequence number and a target value associated with memory trampling; if the code line number corresponding to the target node is greater than a preset line number threshold value, segmenting the code in the target node, and taking the segmented code as an initial node again; and returning to execute the operation of deploying the memory detection tools at the head and the tail of the function of the initial node in the system until the target code segment or the code line corresponding to the memory trampling problem is determined. According to the technical scheme provided by the embodiment of the invention, the memory trampling problem can be quickly positioned, and the accuracy and reliability of a problem positioning result are improved.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a method, apparatus, device, and storage medium for locating memory trampling problems. Background Art

[0002] In external application or internal environment testing of communication software systems, it is common to encounter situations where memory is rewritten, leading to abnormal communication processes or even system crashes.

[0003] In existing technologies, addressing memory malfunctions typically requires continuously adding debug logs to analyze and locate the problem step by step, which cannot meet the needs of testers who lack experience with software systems or face urgent failures.

[0004] Therefore, there is an urgent need for an effective technical means to quickly locate and resolve illegal memory access problems that occur in the later stages of software development or software maintenance after the system anomaly is caused by the modification of memory addresses, so as to avoid harm to the program and user data. Summary of the Invention

[0005] This invention provides a method, apparatus, device, and storage medium for locating memory malfunctions, which can quickly locate memory malfunctions, enable comprehensive testing of communication software systems, and improve the accuracy and reliability of problem location results.

[0006] According to one aspect of the present invention, a method for locating memory stampede problems is provided, the method comprising:

[0007] After a memory slippage is detected in the communication software system, memory detection tools are deployed at the beginning and end of the functions of the preset initial node in the system.

[0008] The memory detection tool locates the target node in the initial node according to the preset memory detection rules; the memory detection rules define the detection address, logical expression number and target value associated with memory stepping.

[0009] If the number of lines of code corresponding to the target node is greater than a preset line number threshold, the code in the target node is segmented, and the segmented code is used as the initial node again.

[0010] Return to the operation of deploying memory detection tools at the beginning and end of the function of the preset initial node in the system, until the target code segment or line of code corresponding to the memory trampling problem is determined.

[0011] Optionally, the memory detection tool locates the target node in the initial node according to preset memory detection rules, including:

[0012] The devmem command-line tool allows for real-time adjustment of the detection address, logical expression number, and target value defined in the memory detection rules.

[0013] Using the memory detection tool, the target node is located in the initial node according to the adjusted latest memory detection rules.

[0014] Optionally, the memory detection tool locates the target node in the initial node according to preset memory detection rules, including:

[0015] The memory detection tool determines whether the memory data in the header of the initial node function satisfies the preset logical expression according to the memory detection rules.

[0016] The memory detection tool determines whether the memory data at the end of the initial node function satisfies the preset logical expression according to the memory detection rules.

[0017] If the memory data at the beginning of the initial node function does not satisfy the preset logical expression, but the memory data at the end of the function satisfies the preset logical expression, then the initial node is taken as the target node.

[0018] Optionally, the memory detection tool, according to the memory detection rules, determines whether the memory data in the header of the initial node function satisfies a preset logical expression, including:

[0019] The memory detection tool generates multiple detection arrays based on multiple detection addresses, logical expression numbers, and target values ​​in the memory detection rules, and simultaneously detects multiple memory addresses in the memory data of the initial node function header based on the multiple detection arrays.

[0020] Using the memory detection tool, and according to the memory detection rules, it determines whether the memory data at the end of the initial node function satisfies a preset logical expression, including:

[0021] The memory detection tool generates multiple detection arrays based on multiple detection addresses, logical expression numbers, and target values ​​in the memory detection rules, and simultaneously detects multiple memory addresses in the memory data at the end of the initial node function based on these multiple detection arrays.

[0022] Optionally, the detection address, logical expression number, and target value defined in the memory detection rules can be adjusted in real time using the devmem command-line tool, including:

[0023] Three unused shared addresses in the communication software system are used as the detection address, the logical expression sequence number, and the pointer corresponding to the target value, respectively.

[0024] Using the devmem command-line tool, the detection address, logical expression number, and target value defined in the memory detection rules are adjusted in real time based on the pointer.

[0025] Optionally, before deploying memory detection tools at the function header and tail of the preset initial node in the system, the following steps are also included:

[0026] In response to a node selection request, the node specified in the request is used as the initial node; or...

[0027] The initial node is determined in the corresponding running code of the communication software system based on multiple functional modules.

[0028] According to another aspect of the present invention, a memory stamping problem location device is provided, the device comprising:

[0029] The tool deployment module is used to deploy memory detection tools at the function header and tail of the preset initial node in the system after detecting a memory crash in the communication software system.

[0030] The target node localization module is used to locate the target node in the initial node according to the preset memory detection rules using the memory detection tool; the memory detection rules define the detection address, logical expression number and target value associated with memory stepping.

[0031] The segmentation module is used to segment the code in the target node if the number of lines of code corresponding to the target node is greater than a preset line number threshold, and then use the segmented code as the initial node again.

[0032] The loop execution module is used to return the operation of deploying memory detection tools at the beginning and end of the function that executes the preset initial node in the system, until the target code segment or line of code corresponding to the memory trampling problem is determined.

[0033] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0034] At least one processor; and

[0035] A memory communicatively connected to the at least one processor; wherein,

[0036] The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the memory trampling problem localization method according to any embodiment of the present invention.

[0037] According to another aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing computer instructions for causing a processor to execute and implement the memory trampling problem localization method according to any embodiment of the present invention.

[0038] According to another aspect of the present invention, a computer program product is provided, the computer program product comprising a computer program that, when executed by a processor, implements the memory trampling problem localization method according to any embodiment of the present invention.

[0039] The technical solution provided by this invention, upon detecting a memory scramble in a communication software system, deploys memory detection tools at the beginning and end of functions of a preset initial node in the system. These tools locate the target node within the initial node according to preset memory detection rules. The memory detection rules define the detection address, logical expression number, and target value associated with the memory scramble. If the number of lines of code corresponding to the target node exceeds a preset line count threshold, the code in the target node is segmented, and the segmented code is used as a new initial node. The process of deploying memory detection tools at the beginning and end of functions of the initial node in the system is repeated until the target code segment or line of code corresponding to the memory scramble problem is determined. This technique allows for rapid location of memory scramble problems, enabling comprehensive detection of the communication software system and improving the accuracy and reliability of problem location results.

[0040] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1a This is a flowchart of a memory trampling problem localization method provided by an embodiment of the present invention;

[0043] Figure 1b This is a flowchart of a method for detecting memory data in the header of a node function using a memory detection tool according to an embodiment of the present invention;

[0044] Figure 1cThis is a flowchart of a method for detecting the tail memory data of a node function using a memory detection tool according to an embodiment of the present invention;

[0045] Figure 2 This is a flowchart of another memory trampling problem localization method provided by an embodiment of the present invention;

[0046] Figure 3 This is a schematic diagram of a memory trampling problem location device provided according to an embodiment of the present invention;

[0047] Figure 4 This is a schematic diagram of the structure of an electronic device that implements the memory trampling problem localization method according to an embodiment of the present invention. Detailed Implementation

[0048] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0049] It should be noted that the terms "first", "second", etc. in the description and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the numbers used in this way can be interchanged where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0050] Figure 1a This is a flowchart of a memory trampling problem localization method provided by an embodiment of the present invention. This embodiment can be applied to the situation where memory trampling problems are quickly located after the memory address of a communication software system is modified, causing system abnormalities. The method can be executed by a memory trampling problem localization device, which can be implemented in hardware and / or software and configured in an electronic device.

[0051] like Figure 1a As shown, the method includes:

[0052] Step 110: After detecting a memory slippage in the communication software system, deploy memory detection tools at the function header and tail of the preset initial node in the system.

[0053] In this embodiment, after a memory lapse occurs in the communication software system, the first step is to determine the code node to be tested (i.e., the initial node). Optionally, if the tester is familiar with the system code, or has a suspected or confirmed node, this node can be used as the initial node; if the tester is not familiar with the code, several broader nodes can be determined as initial nodes based on the system's operating framework.

[0054] In one specific embodiment, before deploying the memory detection tool in the function header and footer of the preset initial node in the system, the method further includes: responding to a node selection request and using the node specified in the node selection request as the initial node; or, determining the initial node in the corresponding running code of the system according to multiple functional modules in the communication software system.

[0055] If the tester actively triggers a node selection request, the node specified in this request can be used as the initial node. If the tester is unfamiliar with the code, they can actively determine the initial node from the corresponding running code of the system based on one or more tasks and functional modules existing in the uplink and downlink channels of the communication software system.

[0056] In this step, after determining the initial nodes, the memory detection tool provided in this embodiment can be deployed at the beginning and end of the main function of each initial node. The memory detection tool pre-encapsulates memory detection rules associated with locating memory malfunctions, and is implemented in software form.

[0057] Step 120: Using the memory detection tool, locate the target node in the initial node according to the preset memory detection rules.

[0058] In this embodiment, the memory detection tool is used to detect whether the function header memory data and tail memory data of a node satisfy a preset logical expression.

[0059] In an initial node, if the function header memory data and the tail memory data of an initial node both satisfy a preset logical expression, or if the function header memory data satisfies a preset logical expression but the tail memory data does not satisfy a preset logical expression, then it can be determined that this initial node is unrelated to memory churn, that is, the initial node is a normal operating node. In this case, a memory detection tool can be used to detect the next initial node.

[0060] Correspondingly, if the memory data at the beginning of a function of an initial node does not satisfy the preset logical expression, but the memory data at the end of the function does satisfy the preset logical expression, then it can be determined that this initial node is related to memory collapse, that is, the initial node is the target node of the abnormal operation.

[0061] In a specific embodiment, the memory detection rule defines a detection address A, a target value B, and a logical expression number C associated with memory trampling. Detection address A is the address being trampled; target address B is the expected value during normal operation corresponding to the trampled address; and logical expression number C indicates the specific logical expression, i.e., the logical relationship between the actual value at the detection address and the target value. For example, the mapping table between logical expression numbers and logical expressions can be shown in Table 1:

[0062] Table 1

[0063] Serial Number Corresponding logical expression 0 == (equals) 1 ! = (not equal to) 2 >(greater than) 3 <(less than) 4 >= (greater than or equal to)

[0064] Table 1 lists only some commonly used logical expressions. The specific numerical relationships can be extended according to the actual scenario, and this embodiment does not impose any restrictions on this.

[0065] In one embodiment of this example, the memory detection tool locates the target node in the initial node according to a preset memory detection rule, including:

[0066] Step 121: Using the memory detection tool, determine whether the memory data in the header of the initial node function satisfies the preset logical expression according to the memory detection rules;

[0067] In this step, the memory detection tool determines whether the memory data in the header of the initial node function satisfies the preset logical expression according to the memory detection rules. This includes: generating multiple detection arrays using the memory detection tool based on multiple detection addresses, logical expression numbers, and target values ​​in the memory detection rules, and simultaneously detecting multiple memory addresses in the memory data of the header of the initial node function based on the multiple detection arrays.

[0068] In real-world scenarios, when inspecting memory data at the header of a node function, a memory inspection tool can inspect data at only one address, or it can expand A, B, and C into a 3*M three-dimensional array to inspect data at M addresses simultaneously.

[0069] In a specific embodiment, the initial nodes can be numbered and defined as P(1, 2, ..., N). In order to record the detection results of the memory data at the head and tail of the node function, a shared variable bitmap for the node number can be introduced. The bitmap has N bits, and each bit represents whether the memory of the corresponding node has an anomaly. The initial value of the shared variable is 0. If multiple addresses need to be detected at the same time, the bitmap can be expanded into an array. Figure 1b A flowchart illustrating the method for memory testing tools to detect memory data in the header of node functions:

[0070] Among them, such as Figure 1b As shown, i j This represents the i-th node of the j-th detection address, in bitmap format. j This represents the bitmap of the j-th detection address. A j B j C j These represent the j-th detection address, target value, and logical expression index, respectively. If multiple addresses need to be detected simultaneously, this process is executed cyclically.

[0071] Step 122: Using the memory detection tool, determine whether the memory data at the end of the initial node function satisfies the preset logical expression according to the memory detection rules;

[0072] In this step, the memory detection tool determines whether the memory data at the end of the initial node function satisfies the preset logical expression according to the memory detection rules. This includes: generating multiple detection arrays using the memory detection tool based on multiple detection addresses, logical expression numbers, and target values ​​in the memory detection rules, and simultaneously detecting multiple memory addresses in the memory data at the end of the initial node function based on the multiple detection arrays.

[0073] In real-world scenarios, when detecting memory data at the end of a node function, a memory detection tool can either detect data at only one address, or expand A, B, and C into a 3*M three-dimensional array to detect data at M addresses simultaneously.

[0074] In one specific embodiment Figure 1c A flowchart illustrating a method for memory testing tools to detect the memory data at the end of node functions:

[0075] Among them, such as Figure 1c As shown, T j This indicates the target node found at the j-th detection location. When outputting the node label, a fixed block of memory can be determined, and then the target node label can be written to that memory address so that the corresponding target node can be found by querying the memory address.

[0076] Step 123: If the memory data at the beginning of the initial node function does not satisfy the preset logical expression, but the memory data at the end of the function satisfies the preset logical expression, then the initial node is taken as the target node.

[0077] In a specific embodiment, the correspondence between the memory data detection results and the target node determination results can be shown in Table 2:

[0078] Table 2

[0079]

[0080] Step 130: Determine whether the number of lines of code corresponding to the target node is greater than a preset line number threshold. If yes, proceed to step 140. If no, determine that the memory trampling problem localization method has ended.

[0081] In this embodiment, if the target node is a short code segment or line of code, and is sufficient to accurately locate the memory trampling problem, then the memory trampling problem localization method can be considered complete. If the number of lines of code involved in the target node exceeds a preset line number threshold, and the tester is insufficient to accurately locate the memory trampling problem, a re-inspection request can be triggered on the target node. In this case, step 140 can be executed.

[0082] Step 140: Segment the code in the target node, and use the segmented code as the initial node again. Then, return to the operation of deploying memory detection tools in the function header and tail of the initial node in the system in step 110, until the target code segment or line of code corresponding to the memory trampling problem is determined.

[0083] In this embodiment, if the target node is too large to locate the problem, the scope of the target node can be narrowed down, and then a memory detection tool can be used to re-detect each of the narrowed nodes until the target code segment or line of code corresponding to the memory trampling problem is determined.

[0084] The technical solution provided by this invention, upon detecting a memory scramble in a communication software system, deploys memory detection tools at the beginning and end of functions of a preset initial node in the system. These tools locate the target node within the initial node according to preset memory detection rules. The memory detection rules define the detection address, logical expression number, and target value associated with the memory scramble. If the number of lines of code corresponding to the target node exceeds a preset line count threshold, the code in the target node is segmented, and the segmented code is used as a new initial node. The process of deploying memory detection tools at the beginning and end of functions of the initial node in the system is repeated until the target code segment or line of code corresponding to the memory scramble problem is determined. This technique allows for rapid location of memory scramble problems, enabling comprehensive detection of the communication software system and improving the accuracy and reliability of problem location results.

[0085] Figure 2 A flowchart of another memory trampling problem localization method provided by an embodiment of the present invention is shown below. Figure 2 As shown, the method includes:

[0086] Step 210: After detecting a memory slippage in the communication software system, deploy memory detection tools at the function header and tail of the preset initial node in the system.

[0087] Step 220: Use the devmem command-line tool to adjust the detection address, logical expression number, and target value defined in the memory detection rules in real time.

[0088] In this embodiment, in order to improve the flexibility of the detection tool by modifying the detection address, target value, and logical expression number of the detected memory in real time during system operation, an implementation method is provided that uses the devmem command-line tool to adjust the memory detection rules in real time.

[0089] In one embodiment of this example, the detection address, logical expression number, and target value defined in the memory detection rules are adjusted in real time using the devmem command-line tool. This includes: using three unused shared addresses in the communication software system as pointers corresponding to the detection address, logical expression number, and target value, respectively; and adjusting the detection address, logical expression number, and target value defined in the memory detection rules in real time according to the pointers using the devmem command-line tool.

[0090] Specifically, two unused 4-byte shared addresses and one unused 1-byte shared address can be found in the communication software system. These three shared addresses X, Y, and Z serve as pointers to A, B, and C, respectively. The devmem command-line tool can initialize the data pointed to by the X, Y, and Z pointers. For example, if pointer X points to A as 0x98000000, pointer Y points to B as 0, and pointer Z points to C as 4, then the data pointed to by 0x98000000 will always be greater than or equal to 0. Then, the devmem command-line tool can be used to modify the detection address, logical expression number, and target value defined in the memory detection rules in real time. The specific correspondence between the modified values ​​and the devmem commands is shown in Table 3.

[0091] Table 3

[0092] Modified value Order A devmem X 32A B devmem Y 32B C devmem Z 8C

[0093] The advantage of this setup is that the detection address, target value, and logical expression sequence number in the memory detection rules can be modified in real time through the devmem command-line tool, which improves the flexibility of the memory detection tool. Users can dynamically adjust the detection rules according to actual needs to adapt to different memory problem scenarios.

[0094] Step 230: Using the memory detection tool, locate the target node in the initial node according to the adjusted latest memory detection rules.

[0095] Step 240: Determine whether the number of lines of code corresponding to the target node is greater than a preset line number threshold. If yes, proceed to step 250. If no, determine that the memory trampling problem localization method has ended.

[0096] Step 250: Segment the code in the target node, and use the segmented code as the initial node again. Then, return to the operation of deploying memory detection tools in the function header and tail of the initial node in the system in step 210, until the target code segment or line of code corresponding to the memory trampling problem is determined.

[0097] The technical solution provided by this invention, after detecting a memory scramble in a communication software system, deploys memory detection tools at the beginning and end of functions of a preset initial node in the system. Using the devmem command-line tool, the detection address, logical expression number, and target value defined in the memory detection rules are adjusted in real time. The memory detection tools, based on the adjusted latest memory detection rules, locate the target node in the initial node and determine whether the number of lines of code corresponding to the target node exceeds a preset line count threshold. If so, the code in the target node is segmented, and the segmented code is used as a new initial node. The process then returns to deploying the memory detection tools at the beginning and end of functions of the initial node in the system until the target code segment or line of code corresponding to the memory scramble problem is determined. If not, the memory scramble problem localization method is considered complete. This technical means can quickly locate memory scramble problems, achieve comprehensive detection of the communication software system, improve the flexibility of memory detection tools, and enhance the accuracy of problem localization results.

[0098] Figure 3 This is a schematic diagram of a memory trampling problem location device provided in an embodiment of the present invention. The device is applied in electronic devices, such as... Figure 3 As shown, the device includes: a tool deployment module 310, a target node positioning module 320, a segmentation module 330, and a loop execution module 340.

[0099] The tool deployment module 310 is used to deploy memory detection tools at the function header and tail of the preset initial node in the system after detecting a memory crash in the communication software system.

[0100] The target node positioning module 320 is used to locate the target node in the initial node according to the preset memory detection rules by the memory detection tool; the memory detection rules define the detection address, logical expression number and target value associated with memory stepping.

[0101] The segmentation module 330 is used to segment the code in the target node if the number of lines of code corresponding to the target node is greater than a preset line number threshold, and then use the segmented code as the initial node again.

[0102] The loop execution module 340 is used to return the operation of deploying memory detection tools at the beginning and end of the function executed at the preset initial node in the system, until the target code segment or line of code corresponding to the memory trampling problem is determined.

[0103] The technical solution provided by this invention, upon detecting a memory scramble in a communication software system, deploys memory detection tools at the beginning and end of functions of a preset initial node in the system. These tools locate the target node within the initial node according to preset memory detection rules. The memory detection rules define the detection address, logical expression number, and target value associated with the memory scramble. If the number of lines of code corresponding to the target node exceeds a preset line count threshold, the code in the target node is segmented, and the segmented code is used as a new initial node. The process of deploying memory detection tools at the beginning and end of functions of the initial node in the system is repeated until the target code segment or line of code corresponding to the memory scramble problem is determined. This technique allows for rapid location of memory scramble problems, enabling comprehensive detection of the communication software system and improving the accuracy and reliability of problem location results.

[0104] Based on the above embodiments, the target node positioning module 320 includes:

[0105] The detection parameter adjustment unit is used to adjust the detection address, logical expression number, and target value defined in the memory detection rules in real time through the devmem command-line tool;

[0106] The detection parameter application unit is used to locate the target node in the initial node by means of the memory detection tool and according to the adjusted latest memory detection rules;

[0107] The header data detection unit is used to determine, through the memory detection tool and according to the memory detection rules, whether the memory data of the initial node function header satisfies the preset logical expression.

[0108] The tail data detection unit is used to determine, through the memory detection tool and according to the memory detection rules, whether the memory data at the tail of the initial node function satisfies the preset logical expression;

[0109] The target node determination unit is used to determine the initial node as the target node if the memory data at the beginning of the function of the initial node does not satisfy a preset logical expression, but the memory data at the end of the function satisfies the preset logical expression.

[0110] The header data multi-address detection unit is used to generate multiple detection arrays based on multiple detection addresses, logical expression numbers and target values ​​in the memory detection rules through the memory detection tool, and to simultaneously detect multiple memory addresses in the memory data of the initial node function header based on the multiple detection arrays.

[0111] The tail data multi-address detection unit is used to generate multiple detection arrays based on multiple detection addresses, logical expression numbers and target values ​​in the memory detection rules through the memory detection tool, and to simultaneously detect multiple memory addresses in the memory data at the tail of the initial node function based on the multiple detection arrays.

[0112] The pointer determination unit is used to use three unused shared addresses in the communication software system as the detection address, the logical expression sequence number, and the pointer corresponding to the target value, respectively.

[0113] The parameter adjustment unit is used to adjust the detection address, logical expression number, and target value defined in the memory detection rules in real time according to the pointer via the devmem command-line tool.

[0114] The device further includes:

[0115] An initial node determination module is used to respond to a node selection request and select the node specified in the node selection request as the initial node; or, based on multiple functional modules in the communication software system, the initial node is determined in the corresponding running code of the system.

[0116] The above-described apparatus can execute the methods provided in all the foregoing embodiments of the present invention, and has the corresponding functional modules and beneficial effects for executing the above methods. Technical details not described in detail in the embodiments of the present invention can be found in the methods provided in all the foregoing embodiments of the present invention.

[0117] Figure 4 A schematic diagram of an electronic device 10 that can be used to implement embodiments of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0118] like Figure 4As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded from storage unit 18 into the RAM 13. The RAM 13 may also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0119] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0120] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as the memory trampling problem localization method.

[0121] In some embodiments, the memory trampling problem localization method may be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the memory trampling problem localization method described above may be performed. Alternatively, in other embodiments, processor 11 may be configured to perform the memory trampling problem localization method by any other suitable means (e.g., by means of firmware).

[0122] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0123] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0124] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0125] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0126] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or computing systems that include middleware components (e.g., application servers), or computing systems that include frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0127] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0128] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0129] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method for locating memory stampede problems, characterized in that, The method includes: After a memory lapse is detected in the communication software system, memory detection tools are deployed at the beginning and end of the functions of the preset initial node in the system. The memory detection tool locates the target node in the initial node according to the preset memory detection rules; the memory detection rules define the detection address, logical expression number and target value associated with memory stepping. If the number of lines of code corresponding to the target node is greater than a preset line number threshold, the code in the target node is segmented, and the segmented code is used as the initial node again. Return to the operation of deploying memory detection tools at the beginning and end of the function of the initial node in the system, until the target code segment or line of code corresponding to the memory trampling problem is determined.

2. The method according to claim 1, characterized in that, The memory detection tool locates the target node in the initial node according to preset memory detection rules, including: The devmem command-line tool allows for real-time adjustment of the detection address, logical expression number, and target value defined in the memory detection rules. Using the memory detection tool, the target node is located in the initial node according to the adjusted latest memory detection rules.

3. The method according to claim 1, characterized in that, The memory detection tool locates the target node in the initial node according to preset memory detection rules, including: The memory detection tool determines whether the memory data in the header of the initial node function satisfies the preset logical expression according to the memory detection rules. The memory detection tool determines whether the memory data at the end of the initial node function satisfies the preset logical expression according to the memory detection rules. If the memory data at the beginning of the initial node function does not satisfy the preset logical expression, but the memory data at the end of the function satisfies the preset logical expression, then the initial node is taken as the target node.

4. The method according to claim 3, characterized in that, The memory detection tool, based on the memory detection rules, determines whether the memory data in the header of the initial node function satisfies a preset logical expression, including: The memory detection tool generates multiple detection arrays based on multiple detection addresses, logical expression numbers, and target values ​​in the memory detection rules, and simultaneously detects multiple memory addresses in the memory data of the initial node function header based on the multiple detection arrays. Using the memory detection tool, and according to the memory detection rules, it determines whether the memory data at the end of the initial node function satisfies a preset logical expression, including: The memory detection tool generates multiple detection arrays based on multiple detection addresses, logical expression numbers, and target values ​​in the memory detection rules, and simultaneously detects multiple memory addresses in the memory data at the end of the initial node function based on these multiple detection arrays.

5. The method according to claim 2, characterized in that, The devmem command-line tool allows for real-time adjustment of the detection address, logical expression sequence number, and target value defined in the memory detection rules, including: Three unused shared addresses in the communication software system are used as the detection address, the logical expression sequence number, and the pointer corresponding to the target value, respectively. Using the devmem command-line tool, the detection address, logical expression number, and target value defined in the memory detection rules are adjusted in real time based on the pointer.

6. The method according to claim 1, characterized in that, Before deploying memory detection tools at the function header and tail of the preset initial node in the system, the following is also included: In response to a node selection request, the node specified in the request is used as the initial node; or... The initial node is determined in the corresponding running code of the communication software system based on multiple functional modules.

7. A memory stamping problem location device, characterized in that, The device includes: The tool deployment module is used to deploy memory detection tools at the function header and tail of the preset initial node in the system after detecting a memory crash in the communication software system. The target node localization module is used to locate the target node in the initial node according to the preset memory detection rules using the memory detection tool; the memory detection rules define the detection address, logical expression number and target value associated with memory stepping. The segmentation module is used to segment the code in the target node if the number of lines of code corresponding to the target node is greater than a preset line number threshold, and then use the segmented code as the initial node again. The loop execution module is used to return the operation of deploying memory detection tools at the beginning and end of the function that executes the preset initial node in the system, until the target code segment or line of code corresponding to the memory trampling problem is determined.

8. An electronic device, characterized in that, The electronic device includes: At least one processor; and A memory communicatively connected to the at least one processor; wherein, The memory stores a computer program that can be executed by the at least one processor, the computer program being executed by the at least one processor to enable the at least one processor to perform the memory trampling problem localization method according to any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that are used to cause a processor to execute the memory trampling problem localization method according to any one of claims 1-6.

10. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements the memory trampling problem localization method according to any one of claims 1-6.

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