Display driving chip and display device

Abstract

The invention belongs to the field of display, and particularly relates to a display driving chip and a display device.The display driving chip comprises a press-fit impedance detection circuit, the press-fit impedance detection circuit can be used for detecting press-fit impedance of the display driving chip, and the press-fit impedance detection circuit comprises at least one impedance detection module, a detection path selection module and a processing module; the impedance detection module is used for detecting the pressing impedance of the display driving chip, the detection path selection module is connected with the impedance detection module and used for selecting the detection path of the impedance detection module, and the processing module is connected with the control end of the detection path selection module. The processing module can output a path selection signal to control the detection path selection module to select a detection path. According to the invention, the press-fit impedance detection circuit is built in the display driving chip, the press-fit impedance can be detected without additional detection equipment and complex operation, and the convenience of press-fit impedance detection is improved.

Description

Technical Field

[0001] This application belongs to the field of display technology, specifically relating to a display driver chip and a display device. Background Technology

[0002] Display driver chips and display panels can be connected in various ways. For example, COG (Chip On Glass) technology is used to directly bond the display driver chip to the array substrate of the display panel. Another example is COF (Chip On Film) technology, which bonds the display driver chip to a flexible circuit board to form a flip-chip film, and then connects it to the array substrate of the display panel.

[0003] Regardless of the bonding method used for the display driver chip, a good electrical and mechanical connection between the display driver chip and the carrier is required. The bonding impedance is a key parameter that reflects the electrical and mechanical connection status between the display driver chip and the carrier.

[0004] Common methods for testing clamping impedance include AC impedance measurement, DC resistance measurement, and time-domain reflection measurement. Existing clamping impedance testing methods all require specialized equipment, which is costly, complex to operate, and demands expertise and experience for operation and data analysis. Summary of the Invention

[0005] The purpose of this application is to provide a display driver chip and display device, which improves the convenience of pressing impedance detection by detecting the bonding impedance of the display driver chip through a built-in impedance detection circuit.

[0006] To achieve the above objectives, this application provides a display driver chip, which includes a pressure resistance detection circuit, the pressure resistance detection circuit comprising: At least one impedance detection module is provided for detecting the compression impedance of the display driver chip. A detection path selection module, connected to the impedance detection module, is used to select the detection path of the impedance detection module; The processing module is connected to the detection path selection module, and the processing module can output a path selection signal to control the detection path selection module to select the detection path.

[0007] Optionally, the compression impedance detection circuit includes an impedance detection module, which includes a programmable constant current source and a first voltage detection unit. The programmable constant current source is connected to the processing module, which can set the test current provided by the programmable constant current source. The first terminal of the programmable constant current source is connected to the first input terminal of the detection path selection module, and the first output terminal of the detection path selection module is connected to the second terminal of the programmable constant current source. The first voltage detection unit is connected to the first input terminal and the first output terminal of the detection path selection module and is used to detect the first load voltage of the detection path selected by the detection path selection module. The first voltage detection unit is connected to the processing module, which can calculate the compression impedance based on the test current and the first load voltage.

[0008] Optionally, the impedance detection module further includes a current sensing resistor and a second voltage detection unit. The first and second ends of the current sensing resistor are connected one-to-one with the first output end of the detection path selection module and the second end of the programmable constant current source. The second voltage detection unit is used to detect the second load voltage of the current sensing resistor.

[0009] Optionally, the second voltage detection unit includes a first resistor, a second resistor, a third resistor, a fourth resistor, and a first operational amplifier. The first end of the current sensing resistor is connected to the non-inverting input of the first operational amplifier through the first resistor. The non-inverting input of the first operational amplifier is connected to the ground terminal through the second resistor. The second end of the current sensing resistor is connected to the inverting input of the first operational amplifier through the third resistor and a first connection node. The output terminal of the first operational amplifier is connected to the first connection node through the fourth resistor.

[0010] Optionally, the programmable constant current source includes a first digital-to-analog converter, a second digital-to-analog converter, a subtractor, and a constant current output unit. The first digital-to-analog converter and the second digital-to-analog converter are both connected to the processing module and the subtractor, and the constant current output unit is connected to the subtractor.

[0011] Optionally, the compression impedance detection circuit includes multiple impedance detection modules, each of which is connected to the input pin of the display driver chip. The detection path selection module connects all the impedance detection modules and the processing module, and the detection path selection module can output the detection results of each impedance detection module.

[0012] Optionally, the impedance detection module includes a buffer, a fifth resistor, a sixth resistor, a transistor, an inverter, and a latch. The control terminal of the transistor is connected to an input pin through the fifth resistor and the buffer. The first terminal of the transistor is connected to a voltage source through the sixth resistor. The first terminal of the transistor is connected to the input terminal of the latch through the inverter. The output terminal of the latch is connected to the detection path selection module. The second terminal of the transistor is connected to a ground terminal. The latch is also connected to the voltage source and the ground terminal.

[0013] Optionally, the impedance detection module includes a detection resistor, a monostable delay trigger, a non-inverting proportional attenuator, a trigger, a third digital-to-analog converter, and a latch. The detection resistor is connected to the scan signal output pin of the display driver chip and a level converter. The non-inverting proportional attenuator is connected to the scan signal output pin and is also connected to the scan signal output pin through the monostable delay trigger. The trigger is connected to the non-inverting proportional attenuator and the processing module. The third digital-to-analog converter is connected to the trigger and the processing module. The latch is connected to the processing module and the detection path selection module.

[0014] Optionally, the compression impedance detection circuit further includes a signal selection module. The first input terminal of the signal selection module is connected to the level converter through the detection resistor, the second input terminal of the signal selection module is connected to the level converter, and the output terminal of the signal selection module is connected to the scan signal output pin.

[0015] This application also provides a display device, including: Display panel; The display driver chip is connected to the display panel.

[0016] The display driver chip and display device disclosed in this application have the following beneficial effects: In this application, the display driver chip includes a compression impedance detection circuit. This circuit detects the compression impedance of the display driver chip. The compression impedance detection circuit includes at least one impedance detection module, a detection path selection module, and a processing module. The impedance detection module detects the compression impedance of the display driver chip. The detection path selection module is connected to the impedance detection module and selects the detection path for the impedance detection module. The processing module is connected to the control terminal of the detection path selection module and outputs a path selection signal to control the detection path selection module to select the detection path. This application integrates the compression impedance detection circuit into the display driver chip, eliminating the need for additional detection equipment and complex operations, thus improving the convenience of compression impedance detection.

[0017] Other features and advantages of this application will become apparent from the following detailed description, or may be learned in part from practice of this application.

[0018] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0019] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. It is obvious that the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.

[0020] Figure 1 This is a schematic diagram of the display driver chip in Embodiment 1 of this application.

[0021] Figure 2 This is a schematic diagram of the pressure impedance detection circuit in Embodiment 1 of this application.

[0022] Figure 3 This is a schematic diagram of the detection path of the display driver chip in Embodiment 1 of this application.

[0023] Figure 4 This is a schematic diagram of quantitative detection of compression impedance in Embodiment 1 of this application.

[0024] Figure 5 This is a schematic diagram of the structure of the second voltage detection unit in Embodiment 1 of this application.

[0025] Figure 6 This is a schematic diagram of the structure of the programmable constant current source in Embodiment 2 of this application.

[0026] Figure 7 This is a schematic diagram of the pressure impedance detection circuit in Embodiment 2 of this application.

[0027] Figure 8 This is a schematic diagram of the pressure impedance detection circuit in Embodiment 3 of this application.

[0028] Figure 9 This is a schematic diagram of a waveform where the scanning signal has a gentle slope in Embodiment 3 of this application.

[0029] Figure 10 This is a schematic diagram of a waveform where the scanning signal has a steep slope in Embodiment 3 of this application.

[0030] Figure 11 This is a schematic diagram of the display device in Embodiment 4 of this application.

[0031] Figure 12This is a schematic diagram of quantitative detection of the bonding impedance of a flexible circuit board in Embodiment 4 of this application.

[0032] Explanation of reference numerals in the attached figures: 10. Display driver chip; 100. Press-fit impedance detection circuit; 110. Impedance detection module; 111. Programmable constant current source; 1111. First digital-to-analog converter; 1112. Second digital-to-analog converter; 1113. Subtractor; 1114. Constant current output unit; 112. First voltage detection unit; 113. Current sensing resistor; 114. Second voltage detection unit; 1141. First resistor; 1142. Second resistor; 1143. Third resistor; 1144. Fourth resistor; 1145. First operational amplifier; 115. Buffer; 116. Fifth resistor; 117. Sixth resistor; 118. Transistor; 119. Inverter; 120. Latch; 121. Monostable multivibrator; 122. Non-inverting proportional attenuator; 123. Flip-flop; 124. Third digital-to-analog converter; 125. Detection resistor; 130. Processing module; 140. Detection path selection module; 150. Signal selection module; 160. Built-in memory; 211. Power input pin; 212. Signal input pin; 213. Data signal output pin; 214. Scan signal output pin; 215. Detection point; 300. Output selection circuit; 20. Level converter; 30. Gate drive power supply; 40. Timing controller; 50. Display panel; 60. Main board; 61. Serial interface; 70. Flexible circuit board. Detailed Implementation

[0033] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided to make this application more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art.

[0034] Furthermore, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Numerous specific details are provided in the following description to give a thorough understanding of embodiments of this application. However, those skilled in the art will recognize that the technical solutions of this application can be practiced without one or more of the specific details, or other methods, components, apparatuses, steps, etc., can be employed. In other instances, well-known methods, apparatuses, implementations, or operations are not shown or described in detail to avoid obscuring various aspects of this application.

[0035] The present application will now be described in further detail with reference to the accompanying drawings and specific embodiments. It should be noted that the technical features involved in the various embodiments described below can be combined with each other as long as they do not conflict with each other. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present application, and should not be construed as limiting the present application.

[0036] Example 1 See Figure 1 and Figure 2 As shown, in this embodiment, the display driver chip 10 includes a clamping impedance detection circuit 100, which can be used to detect the clamping impedance of the display driver chip 10. It should be noted that the display driver chip 10 also includes a data driving circuit (not shown).

[0037] The compression impedance detection circuit 100 includes at least one impedance detection module 110, a detection path selection module 140, and a processing module 130. The impedance detection module 110 detects the compression impedance of the display driver chip 10. The detection path selection module 140 is connected to the impedance detection module 110 and is used to select the detection path of the impedance detection module 110. The processing module 130 is connected to the detection path selection module 140 and can output a path selection signal to control the detection path selection module 140 to select the detection path.

[0038] Common methods for testing clamping impedance include AC impedance measurement, DC resistance measurement, and time-domain reflection measurement. Existing clamping impedance testing methods all require specialized equipment, which is costly, complex to operate, and demands expertise and experience for operation and data analysis.

[0039] In this embodiment, the display driver chip 10 includes a compression impedance detection circuit 100. The compression impedance detection circuit 100 can be used to detect the compression impedance of the display driver chip 10. The compression impedance detection circuit 100 includes at least one impedance detection module 110, a detection path selection module 140, and a processing module 130. The impedance detection module 110 is used to detect the compression impedance of the display driver chip 10. The detection path selection module 140 is connected to the impedance detection module 110 and is used to select the detection path of the impedance detection module 110. The processing module 130 is connected to the control terminal of the detection path selection module 140 and can output a path selection signal to control the detection path selection module 140 to select the detection path. This application integrates the compression impedance detection circuit 100 into the display driver chip 10, eliminating the need for additional detection equipment and complex operations for detecting compression impedance, thus improving the convenience of compression impedance detection.

[0040] For example, the display driver chip 10 can be bonded to the array substrate of the display panel 50 using COG technology. It should be understood that the display driver chip 10 can also use other bonding methods. The display driver chip 10 may include multiple power input pins 211, multiple signal input pins 212, multiple data signal output pins 213, and multiple scan signal output pins 214, such as... Figure 3 As shown. The display driver chip 10 has multiple detection points 215 internally, each detection point 215 being connected to a corresponding pin. Any two pins of the display driver chip 10 can be shorted externally via traces, such as... Figure 4 As shown. The detection path selection module 140 selects two detection points 215 corresponding to the two pins that are shorted by the trace to be connected to the compression impedance detection circuit 100, so that the sum of the compression impedances R1+R2 of these two pins can be detected. The compression impedance of a single pin is half of the sum of the detected compression impedances.

[0041] In some embodiments, the pressure impedance detection circuit 100 includes an impedance detection module 110, which includes a programmable constant current source 111 and a first voltage detection unit 112. The programmable constant current source 111 is connected to a processing module 130, which can set the test current provided by the programmable constant current source 111. The first end of the programmable constant current source 111 is connected to the first input end of the detection path selection module 140, and the first output end of the detection path selection module 140 is connected to the second end of the programmable constant current source 111. The second input end and the second output end of the detection path selection module 140 are respectively connected to a detection point 215 to select a detection path.

[0042] The first voltage detection unit 112 is connected to the first input terminal and the first output terminal of the detection path selection module 140, and is used to detect the first load voltage V1 of the detection path selected by the detection path selection module 140. The first voltage detection unit 112 is connected to the processing module 130, which can calculate the voltage-coupled impedance based on the test current and the first load voltage.

[0043] The specific value of the clamping impedance can be detected by the programmable constant current source 111 and the first voltage detection unit 112, so as to more accurately determine the electrical and mechanical condition of the display driver chip 10. At the same time, all detection paths share a single impedance detection module 110, reducing the circuit's footprint in the chip design.

[0044] In some embodiments, the impedance detection module 110 further includes a current-sensing resistor 113 and a second voltage detection unit 114. The first and second ends of the current-sensing resistor 113 are connected one-to-one with the first output terminal of the detection path selection module 140 and the second end of the programmable constant current source 111. The second voltage detection unit 114 is connected to the first and second ends of the current-sensing resistor 113 and is used to detect the second load voltage VOP of the current-sensing resistor 113.

[0045] When the compression impedance detection circuit 100 is working: First, the processing module 130 controls the detection path selection module 140 to select the detection path, and the processing module 130 also controls the programmable constant current source 111 to generate the test current i. Second, the first load voltage V1 measured by the first voltage detection unit 112 is output to the processing module 130, and the second load voltage VOP measured by the second voltage detection unit 114 is output to the processing module 130, where VOP = Rsense × i; Third, the processing module 130 calculates the bonding impedance Rbond=V1 / i based on the first load voltage V1 and the test current i, and judges the bonding quality based on the bonding impedance Rbond, the second load voltage VOP, the first load voltage V1 and the test current i.

[0046] It should be noted that the current sensing resistor 113 has a resistance of approximately 20 milliohms and a contact impedance of approximately 1 to 5 ohms. The resistance of the current sensing resistor 113 is much smaller than the resistance of the contact impedance.

[0047] When the first load voltage V1 and the test current i can be detected, and the bonding impedance Rbond is within 5 ohms, the test path bonding can be considered qualified. When the pressure-bond impedance Rbond is much greater than 5 ohms, the first load voltage V1, the second load voltage VOP and the test current i cannot be detected, which can be considered that the detection path is bound to an open circuit. When the pressure-bond impedance Rbond is much less than 5 ohms, the second load voltage VOP and the test current i can be detected, but the first load voltage V1 cannot be detected, which indicates that the detection path is short-circuited.

[0048] In some embodiments, see Figure 5As shown, the second voltage detection unit 114 includes a first resistor 1141, a second resistor 1142, a third resistor 1143, a fourth resistor 1144, and a first operational amplifier 1145. The first terminal of the current-sensing resistor 113 is connected to the non-inverting input terminal of the first operational amplifier 1145 through the first resistor 1141. The non-inverting input terminal of the first operational amplifier 1145 is connected to ground through the second resistor 1142. The second terminal of the current-sensing resistor 113 is connected to the inverting input terminal of the first operational amplifier 1145 through the third resistor 1143 and a first connection node A. The output terminal of the first operational amplifier 1145 is connected to the first connection node A through the fourth resistor 1144. Voltages VP and VN are applied to the two power supply terminals of the first operational amplifier 1145, respectively. The structure of the first voltage detection unit 112 may be the same as or different from the structure of the second voltage detection unit 114.

[0049] The resistance values ​​of the first resistor 1141, the second resistor 1142, the third resistor 1143, and the fourth resistor 1144 can be equal. Based on the working principle of the operational amplifier, the voltage difference Vop across the current sensing resistor 113 is: Vop = i × Rsense.

[0050] In some embodiments, see Figure 6 As shown, the programmable constant current source 111 includes a first digital-to-analog converter 1111, a second digital-to-analog converter 1112, a subtractor 1113, and a constant current output unit 1114. The first digital-to-analog converter 1111 and the second digital-to-analog converter 1112 are both connected to the processing module 130 and the subtractor 1113, and the constant current output unit 1114 is connected to the subtractor 1113.

[0051] The processing module 130 can output two digital voltage signals, DAC1 and DAC2. These digital signals are converted from digital to analog signals to generate voltages V2 and V3. Voltages V2 and V3 are then processed by a subtractor 1113 to obtain a difference ΔV, where ΔV = V2 - V3. The constant current output unit 1114 converts this difference ΔV into a test current i for output. The subtractor 1113 includes a second operational amplifier. The constant current output unit 1114 can be a constant current control unit composed of operational amplifiers or transistors, such as a Howland constant current source composed of operational amplifiers.

[0052] In some embodiments, the display driver chip 10 further includes an output selection circuit 300, which is connected to the pressure impedance detection circuit 100 and other detection circuits, and is used to select the detection results of the pressure impedance detection circuit 100 or other detection circuits.

[0053] Example 2 The main difference between Example 2 and Example 1 is that the structure of the pressure impedance detection circuit 100 is different.

[0054] See Figure 7 As shown, the compression impedance detection circuit 100 includes multiple impedance detection modules 110, each of which is connected to an input or output pin of the display driver chip 10. A detection path selection module 140 connects all the impedance detection modules 110 and the processing module 130, and the detection path selection module 140 can output the detection results of each impedance detection module 110.

[0055] Each input or output pin of the display driver chip 10 is connected to an impedance detection module 110, and the clamping impedance of each input or output pin can be detected individually.

[0056] In some embodiments, the impedance detection module 110 includes a buffer 115, a fifth resistor 116, a sixth resistor 117, a transistor 118, an inverter 119, and a latch 120. The transistor 118 may be a metal-oxide-semiconductor field-effect transistor (MOS). The control terminal of the transistor 118 is connected to an input pin via the fifth resistor 116 and the buffer 115. The input pin may include a power input pin 211 or a signal input pin 212. The first terminal of the transistor 118 is connected to a voltage source via the sixth resistor 117. The voltage source voltage is Vlogic. The first terminal of the transistor 118 is connected to the input terminal of the latch 120 via the inverter 119. The output terminal of the latch 120 is connected to the detection path selection module 140. The second terminal of the transistor 118 is connected to ground. The latch 120 is also connected to the voltage source and ground. The buffer 115 and the input pin are connected via a second connection node B. The data driving circuit is connected to the input pin via the second connection node B.

[0057] The signal from power input pin 211 or signal input pin 212 is isolated by buffer 115 before entering transistor 118. If the input pin's impedance is within the normal range, transistor 118 is turned on, the input of inverter 119 is pulled low, inverted to a high level, and stored in latch 120. If the input pin's impedance is outside the normal range (i.e., the impedance is too high or too low), transistor 118 is turned off, the input of inverter 119 is pulled high, inverted to a low level, and stored in latch 120. All impedance detection modules 110 are connected to processing module 130, which outputs a path selection signal to sequentially detect the impedance of each input pin and determine the bonding quality.

[0058] Example 3 The main difference between Embodiment 3 and Embodiment 2 is that the impedance detection module 110 has a different structure.

[0059] See Figure 8As shown, the impedance detection module 110 includes a detection resistor 125, a monostable delay trigger 121, a non-inverting proportional attenuator 122, a trigger 123, a third digital-to-analog converter 124, and a latch 120. The detection resistor 125 is connected to the scan signal output pin 214 of the display driver chip 10 and a level converter 20. The level converter 20 is also connected to the gate drive power supply 30 and the timing controller 40 (TCON). The timing controller 40 controls the level converter 20 to generate the scan signal. The gate drive power supply 30 and the timing controller 40 can be integrated into the display driver chip 10, or they can be set independently of the display driver chip 10.

[0060] The detection resistor 125 is connected to the scan signal output pin 214 via the third connection node C. The in-phase proportional attenuator 122 is also connected to the third connection node C via a monostable delay trigger 121. The trigger 123 is connected to the in-phase proportional attenuator 122 and the processing module 130. The third digital-to-analog converter 124 is connected to the trigger 123 and the processing module 130. The latch 120 is connected to the processing module 130 and the detection path selection module 140.

[0061] See Figure 9 and Figure 10 As shown, the level converter 20 outputs a scanning signal, which passes through the detection resistor 125 and enters the third connection node C. Under good bonding conditions, it connects to the downstream load, forming a gently sloping transition edge drive waveform a. Under abnormal bonding conditions (excessive or insufficient clamping impedance), it fails to connect to the downstream load, resulting in a steeper transition edge drive waveform a. Waveform a is delayed by the monostable delay trigger 121 to obtain a delayed waveform b, with a delay time of t. Waveforms a and b are attenuated by the in-phase proportional attenuator 122, transforming from a high-voltage drive waveform to a low-voltage drive waveform, and then enter the trigger 123 for digital-to-analog conversion to obtain voltages Va and Vb. Simultaneously, the processing module 130 receives the signal from the trigger 123 to acquire voltages Va and Vb. The processing module 130 calculates the difference Vc between voltages Va and Vb and makes a judgment: Vc = |Va - Vb|. If Vc is greater than the set voltage, the bonding is considered good; if Vc is less than the set voltage, the bonding is considered open.

[0062] The processing module 130 can store the judgment result in the latch 120 and then output it through the detection path selection module 140. All impedance detection modules 110 are connected to the processing module 130. The processing module 130 can output a path selection signal to sequentially detect the bonding impedance of each scan signal output pin 214 and determine the bonding quality.

[0063] In some embodiments, the compression impedance detection circuit 100 further includes a signal selection module 150. The first input terminal of the signal selection module 150 is connected to the level converter 20 through the detection resistor 125, the second input terminal of the signal selection module 150 is connected to the level converter 20, and the output terminal of the signal selection module 150 is connected to the third connection node C.

[0064] When pressure impedance detection is required, the processing module 130 controls the signal selection module 150 to operate. The scanning signal generated by the level converter 20 enters the signal selection module 150 after passing through the detection resistor 125, and is then output to the third connection node C. When pressure impedance detection is not required, the processing module 130 controls the signal selection module 150 to operate. The scanning signal generated by the level converter 20 does not pass through the detection resistor 125 before entering the signal selection module 150, and is then output to the third connection node C.

[0065] When pressure impedance detection is not required, the scan signal generated by the level converter 20 does not enter the signal selection module 150 through the detection resistor 125, which can prevent the pressure impedance detection circuit 100 from affecting the output of the scan signal.

[0066] Example 4 See Figure 11 As shown, in this embodiment, the display device includes a display panel 50 and a display driver chip 10 disclosed in Embodiments 1 to 3, and the display driver chip 10 is connected to the display panel 50.

[0067] In this embodiment, the display device includes a display driver chip 10, which includes a compression impedance detection circuit 100. The compression impedance detection circuit 100 can be used to detect the compression impedance of the display driver chip 10. The compression impedance detection circuit 100 includes at least one impedance detection module 110, a detection path selection module 140, and a processing module 130. The impedance detection module 110 is used to detect the compression impedance of the display driver chip 10. The detection path selection module 140 is connected to the impedance detection module 110 and is used to select the detection path of the impedance detection module 110. The processing module 130 is connected to the control terminal of the detection path selection module 140 and can output a path selection signal to control the detection path selection module 140 to select the detection path. This application integrates the compression impedance detection circuit 100 into the display driver chip 10, eliminating the need for additional detection equipment and complex operations for detecting compression impedance, thus improving the convenience of compression impedance detection.

[0068] In some embodiments, the display device further includes a motherboard 60 and a flexible printed circuit board (FPC). The display driver chip 10 is bonded to the array substrate of the display panel 50, and the flexible printed circuit board 70 connects the array substrate of the display panel 50 and the motherboard 60. A serial interface 61 may be provided on the motherboard 60. The serial interface 61 is connected to the processing module 130 or the detection path selection module 140 of the display driver chip 10 through the flexible printed circuit board 70. The detection result of the compression impedance detection circuit 100 is output to an external host connected to the serial interface 61 through the processing module 130 or the detection path selection module 140. The detection result of the compression impedance detection circuit 100 can also be output to the output selection circuit 300 through the processing module 130 or the detection path selection module 140, and then output to the serial interface 61 through the output selection circuit 300.

[0069] An external host can control the processing module 130 to select the detection path via the serial interface 61. The processing module 130 can also be connected to the built-in storage 160 of the display driver chip 10. The built-in storage 160 stores the control program, and the processing module 130 executes the control program to automatically select the detection path. At the same time, the detection results of the impedance detection module 110 can also be stored in the built-in storage 160 and read by the external host connected via the serial interface 61.

[0070] In some embodiments, the compression resistance detection circuit 100 can also be used to detect the compression resistance of the flexible circuit board 70. See also Figure 4 and Figure 12 As shown, the detection path selection module 140 selects two detection points 215. First, it detects the clamping impedance R1+R2 of the two input pins of the display driver chip 10. Then, it detects the clamping impedance R1+R2+R3+R4+R5+R6 of the two pins corresponding to the end of the flexible circuit board 70 that is bonded to the motherboard 60 through the same two detection points 215. R3 and R4 are the clamping impedances of the two pins of the end of the flexible circuit board 70 that is bonded to the display panel 50, respectively. R5 and R6 are the clamping impedances of the two pins of the end of the flexible circuit board 70 that is bonded to the motherboard 60, respectively. The clamping impedance R3+R4+R5+R6 of the two pins of the flexible circuit board 70 can be obtained by subtracting the two detection results.

[0071] The terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0072] In this application, unless otherwise expressly specified and limited, the terms "assembly," "connection," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0073] In the description of this specification, references to terms such as "some embodiments," "exemplarily," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. The illustrative expressions of the above terms in this specification do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in a suitable manner in any one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0074] Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of this application. Therefore, any changes or modifications made in accordance with the claims and description of this application should fall within the scope of this patent application.

Claims

1. A display driver chip, the display driver chip comprising a pressure impedance detection circuit, characterized in that, The compression impedance detection circuit includes: At least one impedance detection module is provided for detecting the compression impedance of the display driver chip. A detection path selection module, connected to the impedance detection module, is used to select the detection path of the impedance detection module; The processing module is connected to the detection path selection module, and the processing module can output a path selection signal to control the detection path selection module to select the detection path.

2. The display driver chip according to claim 1, characterized in that, The compression impedance detection circuit includes an impedance detection module, which comprises a programmable constant current source and a first voltage detection unit. The programmable constant current source is connected to the processing module, which can set the test current provided by the programmable constant current source. The first terminal of the programmable constant current source is connected to the first input terminal of the detection path selection module, and the first output terminal of the detection path selection module is connected to the second terminal of the programmable constant current source. The first voltage detection unit is connected to the first input terminal and the first output terminal of the detection path selection module and is used to detect the first load voltage of the detection path selected by the detection path selection module. The first voltage detection unit is connected to the processing module, which can calculate the compression impedance based on the test current and the first load voltage.

3. The display driver chip according to claim 2, characterized in that, The impedance detection module further includes a current sensing resistor and a second voltage detection unit. The first and second ends of the current sensing resistor are connected one-to-one with the first output end of the detection path selection module and the second end of the programmable constant current source. The second voltage detection unit is used to detect the second load voltage of the current sensing resistor.

4. The display driver chip according to claim 3, characterized in that, The second voltage detection unit includes a first resistor, a second resistor, a third resistor, a fourth resistor, and a first operational amplifier. The first end of the current sensing resistor is connected to the non-inverting input of the first operational amplifier through the first resistor. The non-inverting input of the first operational amplifier is connected to the ground terminal through the second resistor. The second end of the current sensing resistor is connected to the inverting input of the first operational amplifier through the third resistor and a first connection node. The output terminal of the first operational amplifier is connected to the first connection node through the fourth resistor.

5. The display driver chip according to claim 2, characterized in that, The programmable constant current source includes a first digital-to-analog converter, a second digital-to-analog converter, a subtractor, and a constant current output unit. The first digital-to-analog converter and the second digital-to-analog converter are both connected to the processing module and the subtractor, and the constant current output unit is connected to the subtractor.

6. The display driver chip according to claim 1, characterized in that, The compression impedance detection circuit includes multiple impedance detection modules, each of which is connected to the input pin of the display driver chip. The detection path selection module connects all the impedance detection modules and the processing module, and the detection path selection module can output the detection results of each impedance detection module.

7. The display driver chip according to claim 6, characterized in that, The impedance detection module includes a buffer, a fifth resistor, a sixth resistor, a transistor, an inverter, and a latch. The control terminal of the transistor is connected to an input pin through the fifth resistor and the buffer. The first terminal of the transistor is connected to a voltage source through the sixth resistor. The first terminal of the transistor is connected to the input terminal of the latch through the inverter. The output terminal of the latch is connected to the detection path selection module. The second terminal of the transistor is connected to a ground terminal. The latch is also connected to the voltage source and the ground terminal.

8. The display driver chip according to claim 6, characterized in that, The impedance detection module includes a detection resistor, a monostable delay trigger, a non-inverting proportional attenuator, a trigger, a third digital-to-analog converter, and a latch. The detection resistor is connected to the scan signal output pin of the display driver chip and a level converter. The non-inverting proportional attenuator is connected to the scan signal output pin and is connected to the scan signal output pin through the monostable delay trigger. The trigger is connected to the non-inverting proportional attenuator and the processing module. The third digital-to-analog converter is connected to the trigger and the processing module. The latch is connected to the processing module and the detection path selection module.

9. The display driver chip according to claim 8, characterized in that, The compression impedance detection circuit further includes a signal selection module. The first input terminal of the signal selection module is connected to the level converter through the detection resistor. The second input terminal of the signal selection module is connected to the level converter. The output terminal of the signal selection module is connected to the scan signal output pin.

10. A display device, characterized in that, include: Display panel; The display driver chip as described in any one of claims 1 to 9 is connected to the display panel.

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